mx98905.c revision 1.14
1 /* $NetBSD: mx98905.c,v 1.14 2009/03/14 15:36:17 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 35 * adapters. 36 * 37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 38 * 39 * Copyright (C) 1993, David Greenman. This software may be used, modified, 40 * copied, distributed, and sold, in both source and binary form provided that 41 * the above copyright and these terms are retained. Under no circumstances is 42 * the author responsible for the proper functioning of this software, nor does 43 * the author assume any responsibility for damages incurred with its use. 44 */ 45 46 /* 47 * Special routines for the Macronix MX 98905. For use with the "ne" driver. 48 */ 49 50 /* 51 * <URL:http://mail-index.NetBSD.org/port-arm32/1996/06/23/0005.html>: 52 * There are 2 types of etherh card. One uses the macronics chipset MX98905 53 * and that chipset has a bug in it, in that it the MSB remote DMA 54 * register does not work. There is a workaround for this which 55 * should be around soon. In fact, I think only the buffer ram test 56 * ever transfers more than 256 bytes across the DMA channel, so diabling 57 * it will make the mx stuff work. 58 */ 59 60 #include <sys/param.h> 61 62 __KERNEL_RCSID(0, "$NetBSD: mx98905.c,v 1.14 2009/03/14 15:36:17 dsl Exp $"); 63 64 #include <sys/device.h> 65 #include <sys/mbuf.h> 66 #include <sys/socket.h> 67 #include <sys/syslog.h> 68 #include <sys/systm.h> 69 70 #include <net/if.h> 71 #include <net/if_ether.h> 72 #include <net/if_media.h> 73 74 #include <sys/bus.h> 75 76 #include <dev/ic/dp8390reg.h> 77 #include <dev/ic/dp8390var.h> 78 #include <dev/ic/ne2000reg.h> 79 #include <dev/ic/ne2000var.h> 80 #include <dev/ic/mx98905var.h> 81 82 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 83 #define bus_space_write_stream_2 bus_space_write_2 84 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 85 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 86 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 87 88 static inline void mx98905_write_setup(struct dp8390_softc *, int, int); 89 static inline void mx98905_write_wait(struct dp8390_softc *); 90 91 void 92 mx98905_attach(struct dp8390_softc *sc) 93 { 94 95 sc->ring_copy = mx98905_ring_copy; 96 sc->write_mbuf = mx98905_write_mbuf; 97 sc->read_hdr = mx98905_read_hdr; 98 } 99 100 static inline void 101 mx98905_write_setup(sc, len, buf) 102 struct dp8390_softc *sc; 103 int len, buf; 104 { 105 bus_space_tag_t nict = sc->sc_regt; 106 bus_space_handle_t nich = sc->sc_regh; 107 108 /* Select page 0 registers. */ 109 NIC_BARRIER(nict, nich); 110 bus_space_write_1(nict, nich, ED_P0_CR, 111 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 112 NIC_BARRIER(nict, nich); 113 114 /* Reset remote DMA complete flag. */ 115 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 116 NIC_BARRIER(nict, nich); 117 118 /* Set up DMA byte count. */ 119 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 120 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 121 122 /* Set up destination address in NIC mem. */ 123 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 124 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 125 126 /* Set remote DMA write. */ 127 NIC_BARRIER(nict, nich); 128 bus_space_write_1(nict, nich, 129 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 130 NIC_BARRIER(nict, nich); 131 } 132 133 134 static inline void 135 mx98905_write_wait(struct dp8390_softc *sc) 136 { 137 int maxwait = 100; /* about 120us */ 138 bus_space_tag_t nict = sc->sc_regt; 139 bus_space_handle_t nich = sc->sc_regh; 140 141 /* 142 * Wait for remote DMA to complete. This is necessary because on the 143 * transmit side, data is handled internally by the NIC in bursts, and 144 * we can't start another remote DMA until this one completes. Not 145 * waiting causes really bad things to happen - like the NIC wedging 146 * the bus. 147 */ 148 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 149 ED_ISR_RDC) && --maxwait) { 150 bus_space_read_1(nict, nich, ED_P0_CRDA1); 151 bus_space_read_1(nict, nich, ED_P0_CRDA0); 152 NIC_BARRIER(nict, nich); 153 DELAY(1); 154 } 155 156 if (maxwait == 0) { 157 log(LOG_WARNING, 158 "%s: remote transmit DMA failed to complete\n", 159 device_xname(sc->sc_dev)); 160 dp8390_reset(sc); 161 } 162 } 163 164 /* 165 * Write an mbuf chain to the destination NIC memory address using programmed 166 * I/O. 167 */ 168 int 169 mx98905_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf) 170 { 171 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 172 bus_space_tag_t nict = sc->sc_regt; 173 bus_space_handle_t nich = sc->sc_regh; 174 bus_space_tag_t asict = nsc->sc_asict; 175 bus_space_handle_t asich = nsc->sc_asich; 176 int savelen, dmalen, resid, len; 177 u_int8_t *data, savebyte[2]; 178 int l, leftover; 179 #ifdef DIAGNOSTIC 180 u_int8_t *lim; 181 #endif 182 int i; 183 184 resid = savelen = m->m_pkthdr.len; 185 186 dmalen = min(resid, 254); 187 188 mx98905_write_setup(sc, dmalen, buf); 189 190 buf += dmalen; 191 resid -= dmalen; 192 193 /* 194 * Transfer the mbuf chain to the NIC memory. NE2000 cards 195 * require that data be transferred as words, and only words, 196 * so that case requires some extra code to patch over odd-length 197 * mbufs. 198 */ 199 /* NE2000s are a bit trickier. */ 200 /* Start out with no leftover data. */ 201 leftover = 0; 202 savebyte[0] = savebyte[1] = 0; 203 204 for (; m != 0; m = m->m_next) { 205 l = m->m_len; 206 if (l == 0) 207 continue; 208 data = mtod(m, u_int8_t *); 209 #ifdef DIAGNOSTIC 210 lim = data + l; 211 #endif 212 while (l > 0) { 213 if (leftover) { 214 /* 215 * Data left over (from mbuf or 216 * realignment). Buffer the next 217 * byte, and write it and the leftover 218 * data out. 219 */ 220 savebyte[1] = *data++; 221 l--; 222 bus_space_write_stream_2(asict, asich, 223 NE2000_ASIC_DATA, *(u_int16_t *)savebyte); 224 dmalen -= 2; 225 leftover = 0; 226 } else if (BUS_SPACE_ALIGNED_POINTER(data, 227 u_int16_t) == 0) { 228 /* Unaligned data; buffer the next byte. */ 229 savebyte[0] = *data++; 230 l--; 231 leftover = 1; 232 } else { 233 /* 234 * Aligned data; output contiguous 235 * words as much as we can, then 236 * buffer the remaining byte, if any. 237 */ 238 len = min(l, dmalen); 239 leftover = len & 1; 240 len &= ~1; 241 bus_space_write_multi_stream_2(asict, 242 asich, NE2000_ASIC_DATA, 243 (u_int16_t *)data, len >> 1); 244 dmalen -= len; 245 data += len; 246 if (leftover) 247 savebyte[0] = *data++; 248 l -= len + leftover; 249 } 250 if (dmalen == 0 && resid > 0) { 251 mx98905_write_wait(sc); 252 dmalen = min(resid, 254); 253 254 mx98905_write_setup(sc, dmalen, buf); 255 256 buf += dmalen; 257 resid -= dmalen; 258 } 259 } 260 if (l < 0) 261 panic("mx98905_write_mbuf: negative len"); 262 #ifdef DIAGNOSTIC 263 if (data != lim) 264 panic("mx98905_write_mbuf: data != lim"); 265 #endif 266 } 267 if (leftover) { 268 savebyte[1] = 0; 269 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 270 *(u_int16_t *)savebyte); 271 } 272 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) { 273 for(i = 0; i < (ETHER_MIN_LEN - ETHER_CRC_LEN - savelen) >> 1; 274 i++) 275 bus_space_write_stream_2(asict, asich, 276 NE2000_ASIC_DATA, 0); 277 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN; 278 } 279 NIC_BARRIER(nict, nich); 280 281 mx98905_write_wait(sc); 282 283 return (savelen); 284 } 285 286 /* 287 * Given a source and destination address, copy 'amout' of a packet from 288 * the ring buffer into a linear destination buffer. Takes into account 289 * ring-wrap. 290 */ 291 int 292 mx98905_ring_copy(struct dp8390_softc *sc, int src, void *vdst, u_short amount) 293 { 294 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 295 uint8_t *dst = vdst; 296 bus_space_tag_t nict = sc->sc_regt; 297 bus_space_handle_t nich = sc->sc_regh; 298 bus_space_tag_t asict = nsc->sc_asict; 299 bus_space_handle_t asich = nsc->sc_asich; 300 u_short tmp_amount; 301 int useword = nsc->sc_useword; 302 303 /* Does copy wrap to lower addr in ring buffer? */ 304 if (src + amount > sc->mem_end) { 305 tmp_amount = sc->mem_end - src; 306 307 /* Copy amount up to end of NIC memory. */ 308 mx98905_readmem(nict, nich, asict, asich, src, 309 (u_int8_t *)dst, tmp_amount, useword); 310 311 amount -= tmp_amount; 312 src = sc->mem_ring; 313 dst += tmp_amount; 314 } 315 316 mx98905_readmem(nict, nich, asict, asich, src, dst, amount, useword); 317 318 return (src + amount); 319 } 320 321 void 322 mx98905_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr) 323 { 324 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 325 326 mx98905_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 327 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 328 nsc->sc_useword); 329 #if BYTE_ORDER == BIG_ENDIAN 330 hdr->count = bswap16(hdr->count); 331 #endif 332 } 333 334 static inline void 335 mx98905_read_setup(bus_space_tag_t nict, bus_space_handle_t nich, 336 int len, int buf) 337 { 338 339 /* Select page 0 registers. */ 340 NIC_BARRIER(nict, nich); 341 bus_space_write_1(nict, nich, ED_P0_CR, 342 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 343 NIC_BARRIER(nict, nich); 344 345 /* Set up DMA byte count. */ 346 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 347 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 348 349 /* Set up source address in NIC mem. */ 350 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 351 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 352 353 NIC_BARRIER(nict, nich); 354 bus_space_write_1(nict, nich, ED_P0_CR, 355 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 356 357 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 358 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 359 } 360 361 /* 362 * Given a NIC memory source address and a host memory destination address, 363 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 364 * rounded up to a word - ok as long as mbufs are word sized. 365 */ 366 void 367 mx98905_readmem(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich, int src, u_int8_t *dst, size_t amount, int useword) 368 { 369 int len, resid; 370 371 resid = amount; 372 /* Round up to a word. */ 373 if (resid & 1) 374 ++resid; 375 376 while (resid > 0) { 377 len = min(resid, 254); 378 mx98905_read_setup(nict, nich, len, src); 379 if (useword) 380 bus_space_read_multi_stream_2(asict, asich, 381 NE2000_ASIC_DATA, (u_int16_t *)dst, len >> 1); 382 else 383 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 384 dst, len); 385 resid -= len; 386 src += len; 387 dst += len; 388 } 389 } 390
Indexes created Wed Oct 22 13:09:56 GMT 2025