mx98905.c revision 1.9
1/*	$NetBSD: mx98905.c,v 1.9 2007/03/04 06:01:59 christos Exp $	*/
2
3/*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by the NetBSD
22 *	Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40/*
41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 * adapters.
43 *
44 * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
45 *
46 * Copyright (C) 1993, David Greenman.  This software may be used, modified,
47 * copied, distributed, and sold, in both source and binary form provided that
48 * the above copyright and these terms are retained.  Under no circumstances is
49 * the author responsible for the proper functioning of this software, nor does
50 * the author assume any responsibility for damages incurred with its use.
51 */
52
53/*
54 * Special routines for the Macronix MX 98905.  For use with the "ne" driver.
55 */
56
57/*
58 * <URL:http://mail-index.NetBSD.org/port-arm32/1996/06/23/0005.html>:
59 * There are 2 types of etherh card.  One uses the macronics chipset MX98905
60 * and that chipset has a bug in it, in that it the MSB remote DMA
61 * register does not work.  There is a workaround for this which
62 * should be around soon.  In fact, I think only the buffer ram test
63 * ever transfers more than 256 bytes across the DMA channel, so diabling
64 * it will make the mx stuff work.
65 */
66
67#include <sys/param.h>
68
69__KERNEL_RCSID(0, "$NetBSD: mx98905.c,v 1.9 2007/03/04 06:01:59 christos Exp $");
70
71#include <sys/device.h>
72#include <sys/mbuf.h>
73#include <sys/socket.h>
74#include <sys/syslog.h>
75#include <sys/systm.h>
76
77#include <net/if.h>
78#include <net/if_ether.h>
79#include <net/if_media.h>
80
81#include <machine/bus.h>
82
83#include <dev/ic/dp8390reg.h>
84#include <dev/ic/dp8390var.h>
85#include <dev/ic/ne2000reg.h>
86#include <dev/ic/ne2000var.h>
87#include <dev/ic/mx98905var.h>
88
89#ifndef __BUS_SPACE_HAS_STREAM_METHODS
90#define	bus_space_write_stream_2	bus_space_write_2
91#define	bus_space_write_multi_stream_2	bus_space_write_multi_2
92#define	bus_space_read_multi_stream_2	bus_space_read_multi_2
93#endif /* __BUS_SPACE_HAS_STREAM_METHODS */
94
95static inline void mx98905_write_setup(struct dp8390_softc *, int, int);
96static inline void mx98905_write_wait(struct dp8390_softc *);
97
98void
99mx98905_attach(struct dp8390_softc *sc)
100{
101
102	sc->ring_copy = mx98905_ring_copy;
103	sc->write_mbuf = mx98905_write_mbuf;
104	sc->read_hdr = mx98905_read_hdr;
105}
106
107static inline void
108mx98905_write_setup(sc, len, buf)
109	struct dp8390_softc *sc;
110	int len, buf;
111{
112	bus_space_tag_t nict = sc->sc_regt;
113	bus_space_handle_t nich = sc->sc_regh;
114
115	/* Select page 0 registers. */
116	NIC_BARRIER(nict, nich);
117	bus_space_write_1(nict, nich, ED_P0_CR,
118	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
119	NIC_BARRIER(nict, nich);
120
121	/* Reset remote DMA complete flag. */
122	bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
123	NIC_BARRIER(nict, nich);
124
125	/* Set up DMA byte count. */
126	bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
127	bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
128
129	/* Set up destination address in NIC mem. */
130	bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
131	bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
132
133	/* Set remote DMA write. */
134	NIC_BARRIER(nict, nich);
135	bus_space_write_1(nict, nich,
136	    ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
137	NIC_BARRIER(nict, nich);
138}
139
140
141static inline void
142mx98905_write_wait(sc)
143	struct dp8390_softc *sc;
144{
145	int maxwait = 100;	/* about 120us */
146	bus_space_tag_t nict = sc->sc_regt;
147	bus_space_handle_t nich = sc->sc_regh;
148
149	/*
150	 * Wait for remote DMA to complete.  This is necessary because on the
151	 * transmit side, data is handled internally by the NIC in bursts, and
152	 * we can't start another remote DMA until this one completes.  Not
153	 * waiting causes really bad things to happen - like the NIC wedging
154	 * the bus.
155	 */
156	while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
157	    ED_ISR_RDC) && --maxwait) {
158		bus_space_read_1(nict, nich, ED_P0_CRDA1);
159		bus_space_read_1(nict, nich, ED_P0_CRDA0);
160		NIC_BARRIER(nict, nich);
161		DELAY(1);
162	}
163
164	if (maxwait == 0) {
165		log(LOG_WARNING,
166		    "%s: remote transmit DMA failed to complete\n",
167		    sc->sc_dev.dv_xname);
168		dp8390_reset(sc);
169	}
170}
171
172/*
173 * Write an mbuf chain to the destination NIC memory address using programmed
174 * I/O.
175 */
176int
177mx98905_write_mbuf(sc, m, buf)
178	struct dp8390_softc *sc;
179	struct mbuf *m;
180	int buf;
181{
182	struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
183	bus_space_tag_t nict = sc->sc_regt;
184	bus_space_handle_t nich = sc->sc_regh;
185	bus_space_tag_t asict = nsc->sc_asict;
186	bus_space_handle_t asich = nsc->sc_asich;
187	int savelen, dmalen, resid, len;
188	u_int8_t *data, savebyte[2];
189	int l, leftover;
190#ifdef DIAGNOSTIC
191	u_int8_t *lim;
192#endif
193	int i;
194
195	resid = savelen = m->m_pkthdr.len;
196
197	dmalen = min(resid, 254);
198
199	mx98905_write_setup(sc, dmalen, buf);
200
201	buf += dmalen;
202	resid -= dmalen;
203
204	/*
205	 * Transfer the mbuf chain to the NIC memory.  NE2000 cards
206	 * require that data be transferred as words, and only words,
207	 * so that case requires some extra code to patch over odd-length
208	 * mbufs.
209	 */
210	/* NE2000s are a bit trickier. */
211	/* Start out with no leftover data. */
212	leftover = 0;
213	savebyte[0] = savebyte[1] = 0;
214
215	for (; m != 0; m = m->m_next) {
216		l = m->m_len;
217		if (l == 0)
218			continue;
219		data = mtod(m, u_int8_t *);
220#ifdef DIAGNOSTIC
221		lim = data + l;
222#endif
223		while (l > 0) {
224			if (leftover) {
225				/*
226				 * Data left over (from mbuf or
227				 * realignment).  Buffer the next
228				 * byte, and write it and the leftover
229				 * data out.
230				 */
231				savebyte[1] = *data++;
232				l--;
233				bus_space_write_stream_2(asict, asich,
234				    NE2000_ASIC_DATA, *(u_int16_t *)savebyte);
235				dmalen -= 2;
236				leftover = 0;
237			} else if (BUS_SPACE_ALIGNED_POINTER(data,
238			    u_int16_t) == 0) {
239				/* Unaligned data; buffer the next byte. */
240				savebyte[0] = *data++;
241				l--;
242				leftover = 1;
243			} else {
244				/*
245				 * Aligned data; output contiguous
246				 * words as much as we can, then
247				 * buffer the remaining byte, if any.
248				 */
249				len = min(l, dmalen);
250				leftover = len & 1;
251				len &= ~1;
252				bus_space_write_multi_stream_2(asict,
253				    asich, NE2000_ASIC_DATA,
254				    (u_int16_t *)data, len >> 1);
255				dmalen -= len;
256				data += len;
257				if (leftover)
258					savebyte[0] = *data++;
259				l -= len + leftover;
260			}
261			if (dmalen == 0 && resid > 0) {
262				mx98905_write_wait(sc);
263				dmalen = min(resid, 254);
264
265				mx98905_write_setup(sc, dmalen, buf);
266
267				buf += dmalen;
268				resid -= dmalen;
269			}
270		}
271		if (l < 0)
272			panic("mx98905_write_mbuf: negative len");
273#ifdef DIAGNOSTIC
274		if (data != lim)
275			panic("mx98905_write_mbuf: data != lim");
276#endif
277	}
278	if (leftover) {
279		savebyte[1] = 0;
280		bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
281		    *(u_int16_t *)savebyte);
282	}
283	if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
284		for(i = 0; i < (ETHER_MIN_LEN - ETHER_CRC_LEN - savelen) >> 1;
285		    i++)
286			bus_space_write_stream_2(asict, asich,
287			    NE2000_ASIC_DATA, 0);
288		savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
289	}
290	NIC_BARRIER(nict, nich);
291
292	mx98905_write_wait(sc);
293
294	return (savelen);
295}
296
297/*
298 * Given a source and destination address, copy 'amout' of a packet from
299 * the ring buffer into a linear destination buffer.  Takes into account
300 * ring-wrap.
301 */
302int
303mx98905_ring_copy(sc, src, dst, amount)
304	struct dp8390_softc *sc;
305	int src;
306	void *dst;
307	u_short amount;
308{
309	struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
310	bus_space_tag_t nict = sc->sc_regt;
311	bus_space_handle_t nich = sc->sc_regh;
312	bus_space_tag_t asict = nsc->sc_asict;
313	bus_space_handle_t asich = nsc->sc_asich;
314	u_short tmp_amount;
315	int useword = nsc->sc_useword;
316
317	/* Does copy wrap to lower addr in ring buffer? */
318	if (src + amount > sc->mem_end) {
319		tmp_amount = sc->mem_end - src;
320
321		/* Copy amount up to end of NIC memory. */
322		mx98905_readmem(nict, nich, asict, asich, src,
323		    (u_int8_t *)dst, tmp_amount, useword);
324
325		amount -= tmp_amount;
326		src = sc->mem_ring;
327		dst += tmp_amount;
328	}
329
330	mx98905_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
331	    amount, useword);
332
333	return (src + amount);
334}
335
336void
337mx98905_read_hdr(sc, buf, hdr)
338	struct dp8390_softc *sc;
339	int buf;
340	struct dp8390_ring *hdr;
341{
342	struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
343
344	mx98905_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
345	    buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
346	    nsc->sc_useword);
347#if BYTE_ORDER == BIG_ENDIAN
348	hdr->count = bswap16(hdr->count);
349#endif
350}
351
352static inline void
353mx98905_read_setup(bus_space_tag_t nict, bus_space_handle_t nich,
354    int len, int buf)
355{
356
357	/* Select page 0 registers. */
358	NIC_BARRIER(nict, nich);
359	bus_space_write_1(nict, nich, ED_P0_CR,
360	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
361	NIC_BARRIER(nict, nich);
362
363	/* Set up DMA byte count. */
364	bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
365	bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
366
367	/* Set up source address in NIC mem. */
368	bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
369	bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
370
371	NIC_BARRIER(nict, nich);
372	bus_space_write_1(nict, nich, ED_P0_CR,
373	    ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
374
375	bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
376			  BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
377}
378
379/*
380 * Given a NIC memory source address and a host memory destination address,
381 * copy 'amount' from NIC to host using programmed i/o.  The 'amount' is
382 * rounded up to a word - ok as long as mbufs are word sized.
383 */
384void
385mx98905_readmem(nict, nich, asict, asich, src, dst, amount, useword)
386	bus_space_tag_t nict;
387	bus_space_handle_t nich;
388	bus_space_tag_t asict;
389	bus_space_handle_t asich;
390	int src;
391	u_int8_t *dst;
392	size_t amount;
393	int useword;
394{
395	int len, resid;
396
397	resid = amount;
398	/* Round up to a word. */
399	if (resid & 1)
400		++resid;
401
402	while (resid > 0) {
403		len = min(resid, 254);
404		mx98905_read_setup(nict, nich, len, src);
405		if (useword)
406			bus_space_read_multi_stream_2(asict, asich,
407			    NE2000_ASIC_DATA, (u_int16_t *)dst, len >> 1);
408		else
409			bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
410			    dst, len);
411		resid -= len;
412		src += len;
413		dst += len;
414	}
415}
416