ncr5380var.h revision 1.13
1 /* $NetBSD: ncr5380var.h,v 1.13 1998/11/19 21:53:00 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995 David Jones, Gordon W. Ross 5 * Copyright (c) 1994 Jarle Greipsland 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the authors may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by 21 * David Jones and Gordon Ross 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * This file defines the interface between the machine-dependent 37 * module and the machine-indepenedent ncr5380sbc.c module. 38 */ 39 40 /* 41 * Only the i386 uses real bus space: 42 * arm32: oak and csa drivers; easy to convert 43 * mac68k: sbc driver; easy to convert 44 * pc532: ncr driver; need bus.h first 45 * sparc: si and sw drivers; easy to convert 46 * sun3: si driver; need bus.h first 47 * vax: ncr driver; need bus.h first 48 */ 49 #ifdef __i386__ 50 # define NCR5380_USE_BUS_SPACE 51 #endif 52 53 /* 54 * Handy read/write macros 55 */ 56 #ifdef NCR5380_USE_BUS_SPACE 57 # include <machine/bus.h> 58 /* bus_space() variety */ 59 # define NCR5380_READ(sc, reg) bus_space_read_1(sc->sc_regt, \ 60 sc->sc_regh, sc->reg) 61 # define NCR5380_WRITE(sc, reg, val) bus_space_write_1(sc->sc_regt, \ 62 sc->sc_regh, sc->reg, val) 63 #else 64 /* legacy memory-mapped variety */ 65 # define NCR5380_READ(sc, reg) (*sc->reg) 66 # define NCR5380_WRITE(sc, reg, val) do { *(sc->reg) = val; } while (0) 67 #endif 68 69 #define SCI_CLR_INTR(sc) NCR5380_READ(sc, sci_iack) 70 #define SCI_BUSY(sc) (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY) 71 72 /* These are NOT artibtrary, but map to bits in sci_tcmd */ 73 #define PHASE_DATA_OUT 0x0 74 #define PHASE_DATA_IN 0x1 75 #define PHASE_COMMAND 0x2 76 #define PHASE_STATUS 0x3 77 #define PHASE_UNSPEC1 0x4 78 #define PHASE_UNSPEC2 0x5 79 #define PHASE_MSG_OUT 0x6 80 #define PHASE_MSG_IN 0x7 81 82 /* 83 * This illegal phase is used to prevent the 5380 from having 84 * a phase-match condition when we don't want one, such as 85 * when setting up the DMA engine or whatever... 86 */ 87 #define PHASE_INVALID PHASE_UNSPEC1 88 89 90 /* Per-request state. This is required in order to support reselection. */ 91 struct sci_req { 92 struct scsipi_xfer *sr_xs; /* Pointer to xfer struct, NULL=unused */ 93 int sr_target, sr_lun; /* For fast access */ 94 void *sr_dma_hand; /* Current DMA hnadle */ 95 u_char *sr_dataptr; /* Saved data pointer */ 96 int sr_datalen; 97 int sr_flags; /* Internal error code */ 98 #define SR_IMMED 1 /* Immediate command */ 99 #define SR_SENSE 2 /* We are getting sense */ 100 #define SR_OVERDUE 4 /* Timeout while not current */ 101 #define SR_ERROR 8 /* Error occurred */ 102 int sr_status; /* Status code from last cmd */ 103 }; 104 #define SCI_OPENINGS 16 /* How many commands we can enqueue. */ 105 106 107 struct ncr5380_softc { 108 struct device sc_dev; 109 struct scsipi_link sc_link; 110 struct scsipi_adapter sc_adapter; 111 112 #ifdef NCR5380_USE_BUS_SPACE 113 /* Pointers to bus_space */ 114 bus_space_tag_t sc_regt; 115 bus_space_handle_t sc_regh; 116 117 /* Pointers to 5380 registers. */ 118 bus_size_t sci_r0; 119 bus_size_t sci_r1; 120 bus_size_t sci_r2; 121 bus_size_t sci_r3; 122 bus_size_t sci_r4; 123 bus_size_t sci_r5; 124 bus_size_t sci_r6; 125 bus_size_t sci_r7; 126 #else 127 /* Pointers to 5380 registers. See ncr5380reg.h */ 128 volatile u_char *sci_r0; 129 volatile u_char *sci_r1; 130 volatile u_char *sci_r2; 131 volatile u_char *sci_r3; 132 volatile u_char *sci_r4; 133 volatile u_char *sci_r5; 134 volatile u_char *sci_r6; 135 volatile u_char *sci_r7; 136 #endif 137 138 /* Functions set from MD code */ 139 int (*sc_pio_out) __P((struct ncr5380_softc *, 140 int, int, u_char *)); 141 int (*sc_pio_in) __P((struct ncr5380_softc *, 142 int, int, u_char *)); 143 void (*sc_dma_alloc) __P((struct ncr5380_softc *)); 144 void (*sc_dma_free) __P((struct ncr5380_softc *)); 145 146 void (*sc_dma_setup) __P((struct ncr5380_softc *)); 147 void (*sc_dma_start) __P((struct ncr5380_softc *)); 148 void (*sc_dma_poll) __P((struct ncr5380_softc *)); 149 void (*sc_dma_eop) __P((struct ncr5380_softc *)); 150 void (*sc_dma_stop) __P((struct ncr5380_softc *)); 151 152 void (*sc_intr_on) __P((struct ncr5380_softc *)); 153 void (*sc_intr_off) __P((struct ncr5380_softc *)); 154 155 int sc_flags; /* Misc. flags and capabilities */ 156 #define NCR5380_FORCE_POLLING 1 /* Do not use interrupts. */ 157 158 /* Set bits in this to disable disconnect per-target. */ 159 int sc_no_disconnect; 160 161 /* Set bits in this to disable parity for some target. */ 162 int sc_parity_disable; 163 164 int sc_min_dma_len; /* Smaller than this is done with PIO */ 165 166 /* Begin MI shared data */ 167 168 int sc_state; 169 #define NCR_IDLE 0 /* Ready for new work. */ 170 #define NCR_WORKING 0x01 /* Some command is in progress. */ 171 #define NCR_ABORTING 0x02 /* Bailing out */ 172 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 173 #define NCR_DROP_MSGIN 0x10 /* Discard all msgs (parity err detected) */ 174 175 /* The request that has the bus now. */ 176 struct sci_req *sc_current; 177 178 /* Active data pointer for current SCSI command. */ 179 u_char *sc_dataptr; 180 int sc_datalen; 181 182 /* Begin MI private data */ 183 184 /* The number of operations in progress on the bus */ 185 volatile int sc_ncmds; 186 187 /* Ring buffer of pending/active requests */ 188 struct sci_req sc_ring[SCI_OPENINGS]; 189 int sc_rr; /* Round-robin scan pointer */ 190 191 /* Active requests, by target/LUN */ 192 struct sci_req *sc_matrix[8][8]; 193 194 /* Message stuff */ 195 int sc_prevphase; 196 197 u_int sc_msgpriq; /* Messages we want to send */ 198 u_int sc_msgoutq; /* Messages sent during last MESSAGE OUT */ 199 u_int sc_msgout; /* Message last transmitted */ 200 #define SEND_DEV_RESET 0x01 201 #define SEND_PARITY_ERROR 0x02 202 #define SEND_ABORT 0x04 203 #define SEND_REJECT 0x08 204 #define SEND_INIT_DET_ERR 0x10 205 #define SEND_IDENTIFY 0x20 206 #define SEND_SDTR 0x40 207 #define SEND_WDTR 0x80 208 #define NCR_MAX_MSG_LEN 8 209 u_char sc_omess[NCR_MAX_MSG_LEN]; 210 u_char *sc_omp; /* Outgoing message pointer */ 211 u_char sc_imess[NCR_MAX_MSG_LEN]; 212 u_char *sc_imp; /* Incoming message pointer */ 213 214 }; 215 216 void ncr5380_init __P((struct ncr5380_softc *)); 217 void ncr5380_reset_scsibus __P((struct ncr5380_softc *)); 218 int ncr5380_intr __P((struct ncr5380_softc *)); 219 int ncr5380_scsi_cmd __P((struct scsipi_xfer *)); 220 int ncr5380_pio_in __P((struct ncr5380_softc *, int, int, u_char *)); 221 int ncr5380_pio_out __P((struct ncr5380_softc *, int, int, u_char *)); 222 223 #ifdef NCR5380_DEBUG 224 struct ncr5380_softc *ncr5380_debug_sc; 225 void ncr5380_trace __P((char *msg, long val)); 226 #define NCR_TRACE(msg, val) ncr5380_trace(msg, val) 227 #else /* NCR5380_DEBUG */ 228 #define NCR_TRACE(msg, val) /* nada */ 229 #endif /* NCR5380_DEBUG */ 230
Indexes created Mon Sep 29 18:09:42 GMT 2025