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ncr5380var.h revision 1.15
      1 /*	$NetBSD: ncr5380var.h,v 1.15 2000/03/18 16:13:27 mycroft Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995 David Jones, Gordon W. Ross
      5  * Copyright (c) 1994 Jarle Greipsland
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of the authors may not be used to endorse or promote products
     17  *    derived from this software without specific prior written permission.
     18  * 4. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *      This product includes software developed by
     21  *      David Jones and Gordon Ross
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
     27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 /*
     36  * This file defines the interface between the machine-dependent
     37  * module and the machine-indepenedent ncr5380sbc.c module.
     38  */
     39 
     40 /*
     41  * Only the i386 uses real bus space:
     42  *	arm32: oak and csa drivers; easy to convert
     43  *	mac68k: sbc driver; easy to convert
     44  *	pc532: ncr driver; need bus.h first
     45  *	sparc: si and sw drivers; easy to convert
     46  *	sun3: si driver; need bus.h first
     47  */
     48 #if defined(__i386__) || defined(__vax__)
     49 # define NCR5380_USE_BUS_SPACE
     50 #endif
     51 
     52 /*
     53  * Handy read/write macros
     54  */
     55 #ifdef NCR5380_USE_BUS_SPACE
     56 # include <machine/bus.h>
     57 /* bus_space() variety */
     58 # define NCR5380_READ(sc, reg)		bus_space_read_1(sc->sc_regt, \
     59 					    sc->sc_regh, sc->reg)
     60 # define NCR5380_WRITE(sc, reg, val)	bus_space_write_1(sc->sc_regt, \
     61 					    sc->sc_regh, sc->reg, val)
     62 #else
     63 /* legacy memory-mapped variety */
     64 # define NCR5380_READ(sc, reg)		(*sc->reg)
     65 # define NCR5380_WRITE(sc, reg, val)	do { *(sc->reg) = val; } while (0)
     66 #endif
     67 
     68 #define SCI_CLR_INTR(sc)	NCR5380_READ(sc, sci_iack)
     69 #define	SCI_BUSY(sc)		(NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY)
     70 
     71 /* These are NOT artibtrary, but map to bits in sci_tcmd */
     72 #define PHASE_DATA_OUT	0x0
     73 #define PHASE_DATA_IN	0x1
     74 #define PHASE_COMMAND	0x2
     75 #define PHASE_STATUS	0x3
     76 #define PHASE_UNSPEC1	0x4
     77 #define PHASE_UNSPEC2	0x5
     78 #define PHASE_MSG_OUT	0x6
     79 #define PHASE_MSG_IN	0x7
     80 
     81 /*
     82  * This illegal phase is used to prevent the 5380 from having
     83  * a phase-match condition when we don't want one, such as
     84  * when setting up the DMA engine or whatever...
     85  */
     86 #define PHASE_INVALID	PHASE_UNSPEC1
     87 
     88 
     89 /* Per-request state.  This is required in order to support reselection. */
     90 struct sci_req {
     91 	struct		scsipi_xfer *sr_xs;	/* Pointer to xfer struct, NULL=unused */
     92 	int		sr_target, sr_lun;	/* For fast access */
     93 	void		*sr_dma_hand;		/* Current DMA hnadle */
     94 	u_char		*sr_dataptr;		/* Saved data pointer */
     95 	int		sr_datalen;
     96 	int		sr_flags;		/* Internal error code */
     97 #define	SR_IMMED			1	/* Immediate command */
     98 #define	SR_SENSE			2	/* We are getting sense */
     99 #define	SR_OVERDUE			4	/* Timeout while not current */
    100 #define	SR_ERROR			8	/* Error occurred */
    101 	int		sr_status;		/* Status code from last cmd */
    102 };
    103 #define	SCI_OPENINGS	16		/* How many commands we can enqueue. */
    104 
    105 
    106 struct ncr5380_softc {
    107 	struct device		sc_dev;
    108 	struct scsipi_link	sc_link;
    109 	struct scsipi_adapter	sc_adapter;
    110 
    111 #ifdef NCR5380_USE_BUS_SPACE
    112 	/* Pointers to bus_space */
    113 	bus_space_tag_t 	sc_regt;
    114 	bus_space_handle_t 	sc_regh;
    115 
    116 	/* Pointers to 5380 registers.  */
    117 	bus_size_t	sci_r0;
    118 	bus_size_t	sci_r1;
    119 	bus_size_t	sci_r2;
    120 	bus_size_t	sci_r3;
    121 	bus_size_t	sci_r4;
    122 	bus_size_t	sci_r5;
    123 	bus_size_t	sci_r6;
    124 	bus_size_t	sci_r7;
    125 #else
    126 	/* Pointers to 5380 registers.  See ncr5380reg.h */
    127 	volatile u_char *sci_r0;
    128 	volatile u_char *sci_r1;
    129 	volatile u_char *sci_r2;
    130 	volatile u_char *sci_r3;
    131 	volatile u_char *sci_r4;
    132 	volatile u_char *sci_r5;
    133 	volatile u_char *sci_r6;
    134 	volatile u_char *sci_r7;
    135 #endif
    136 
    137 	/* Functions set from MD code */
    138 	int		(*sc_pio_out) __P((struct ncr5380_softc *,
    139 					   int, int, u_char *));
    140 	int		(*sc_pio_in) __P((struct ncr5380_softc *,
    141 					  int, int, u_char *));
    142 	void		(*sc_dma_alloc) __P((struct ncr5380_softc *));
    143 	void		(*sc_dma_free) __P((struct ncr5380_softc *));
    144 
    145 	void		(*sc_dma_setup) __P((struct ncr5380_softc *));
    146 	void		(*sc_dma_start) __P((struct ncr5380_softc *));
    147 	void		(*sc_dma_poll) __P((struct ncr5380_softc *));
    148 	void		(*sc_dma_eop) __P((struct ncr5380_softc *));
    149 	void		(*sc_dma_stop) __P((struct ncr5380_softc *));
    150 
    151 	void		(*sc_intr_on) __P((struct ncr5380_softc *));
    152 	void		(*sc_intr_off) __P((struct ncr5380_softc *));
    153 
    154 	int		sc_flags;	/* Misc. flags and capabilities */
    155 #define	NCR5380_FORCE_POLLING	1	/* Do not use interrupts. */
    156 
    157 	/* Set bits in this to disable disconnect per-target. */
    158 	int 	sc_no_disconnect;
    159 
    160 	/* Set bits in this to disable parity for some target. */
    161 	int		sc_parity_disable;
    162 
    163 	int 	sc_min_dma_len;	/* Smaller than this is done with PIO */
    164 
    165 	/* Begin MI shared data */
    166 
    167 	int		sc_state;
    168 #define	NCR_IDLE		   0	/* Ready for new work. */
    169 #define NCR_WORKING 	0x01	/* Some command is in progress. */
    170 #define	NCR_ABORTING	0x02	/* Bailing out */
    171 #define NCR_DOINGDMA	0x04	/* The FIFO data path is active! */
    172 #define NCR_DROP_MSGIN	0x10	/* Discard all msgs (parity err detected) */
    173 
    174 	/* The request that has the bus now. */
    175 	struct		sci_req *sc_current;
    176 
    177 	/* Active data pointer for current SCSI command. */
    178 	u_char		*sc_dataptr;
    179 	int		sc_datalen;
    180 
    181 	/* Begin MI private data */
    182 
    183 	/* The number of operations in progress on the bus */
    184 	volatile int	sc_ncmds;
    185 
    186 	/* Ring buffer of pending/active requests */
    187 	struct		sci_req sc_ring[SCI_OPENINGS];
    188 	int		sc_rr;		/* Round-robin scan pointer */
    189 
    190 	/* Active requests, by target/LUN */
    191 	struct		sci_req *sc_matrix[8][8];
    192 
    193 	/* Message stuff */
    194 	int	sc_prevphase;
    195 
    196 	u_int	sc_msgpriq;	/* Messages we want to send */
    197 	u_int	sc_msgoutq;	/* Messages sent during last MESSAGE OUT */
    198 	u_int	sc_msgout;	/* Message last transmitted */
    199 #define SEND_DEV_RESET		0x01
    200 #define SEND_PARITY_ERROR	0x02
    201 #define SEND_ABORT		0x04
    202 #define SEND_REJECT		0x08
    203 #define SEND_INIT_DET_ERR	0x10
    204 #define SEND_IDENTIFY  		0x20
    205 #define SEND_SDTR		0x40
    206 #define	SEND_WDTR		0x80
    207 #define NCR_MAX_MSG_LEN 8
    208 	u_char  sc_omess[NCR_MAX_MSG_LEN];
    209 	u_char	*sc_omp;		/* Outgoing message pointer */
    210 	u_char	sc_imess[NCR_MAX_MSG_LEN];
    211 	u_char	*sc_imp;		/* Incoming message pointer */
    212 
    213 };
    214 
    215 void	ncr5380_attach __P((struct ncr5380_softc *));
    216 int	ncr5380_detach __P((struct ncr5380_softc *, int));
    217 int 	ncr5380_intr __P((struct ncr5380_softc *));
    218 int 	ncr5380_scsi_cmd __P((struct scsipi_xfer *));
    219 int 	ncr5380_pio_in __P((struct ncr5380_softc *, int, int, u_char *));
    220 int 	ncr5380_pio_out __P((struct ncr5380_softc *, int, int, u_char *));
    221 void	ncr5380_init __P((struct ncr5380_softc *));
    222 
    223 #ifdef	NCR5380_DEBUG
    224 struct ncr5380_softc *ncr5380_debug_sc;
    225 void ncr5380_trace __P((char *msg, long val));
    226 #define	NCR_TRACE(msg, val) ncr5380_trace(msg, val)
    227 #else	/* NCR5380_DEBUG */
    228 #define	NCR_TRACE(msg, val)	/* nada */
    229 #endif	/* NCR5380_DEBUG */
    230