ncr5380var.h revision 1.23.10.2
1 /* $NetBSD: ncr5380var.h,v 1.23.10.2 2004/08/12 11:41:25 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1995 David Jones, Gordon W. Ross 5 * Copyright (c) 1994 Jarle Greipsland 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the authors may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by 21 * David Jones and Gordon Ross 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * This file defines the interface between the machine-dependent 37 * module and the machine-independent ncr5380sbc.c module. 38 */ 39 40 /* 41 * Only acorn26, i386, vax, mips, sparc, and sun2 use real bus space: 42 * arm32: csa driver; easy to convert 43 * mac68k: sbc driver; easy to convert 44 * pc532: ncr driver; need bus.h first 45 * sparc: si and sw drivers; easy to convert 46 * sun3: si driver; need bus.h first 47 */ 48 #if defined(acorn26) || defined(__i386__) || defined(__vax__) || \ 49 defined(__mips__) || defined(__sparc__) || defined(sun2) || \ 50 defined(__alpha__) 51 # define NCR5380_USE_BUS_SPACE 52 #endif 53 54 /* 55 * Handy read/write macros 56 */ 57 #ifdef NCR5380_USE_BUS_SPACE 58 # include <machine/bus.h> 59 /* bus_space() variety */ 60 # define NCR5380_READ(sc, reg) bus_space_read_1(sc->sc_regt, \ 61 sc->sc_regh, sc->reg) 62 # define NCR5380_WRITE(sc, reg, val) bus_space_write_1(sc->sc_regt, \ 63 sc->sc_regh, sc->reg, val) 64 #else 65 /* legacy memory-mapped variety */ 66 # define NCR5380_READ(sc, reg) (*sc->reg) 67 # define NCR5380_WRITE(sc, reg, val) do { *(sc->reg) = val; } while (0) 68 #endif 69 70 #define SCI_CLR_INTR(sc) NCR5380_READ(sc, sci_iack) 71 #define SCI_BUSY(sc) (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY) 72 73 /* These are NOT artibtrary, but map to bits in sci_tcmd */ 74 #define PHASE_DATA_OUT 0x0 75 #define PHASE_DATA_IN 0x1 76 #define PHASE_COMMAND 0x2 77 #define PHASE_STATUS 0x3 78 #define PHASE_UNSPEC1 0x4 79 #define PHASE_UNSPEC2 0x5 80 #define PHASE_MSG_OUT 0x6 81 #define PHASE_MSG_IN 0x7 82 83 /* 84 * This illegal phase is used to prevent the 5380 from having 85 * a phase-match condition when we don't want one, such as 86 * when setting up the DMA engine or whatever... 87 */ 88 #define PHASE_INVALID PHASE_UNSPEC1 89 90 91 /* Per-request state. This is required in order to support reselection. */ 92 struct sci_req { 93 struct scsipi_xfer *sr_xs; /* Pointer to xfer struct, NULL=unused */ 94 int sr_target, sr_lun; /* For fast access */ 95 void *sr_dma_hand; /* Current DMA hnadle */ 96 u_char *sr_dataptr; /* Saved data pointer */ 97 int sr_datalen; 98 int sr_flags; /* Internal error code */ 99 #define SR_IMMED 1 /* Immediate command */ 100 #define SR_SENSE 2 /* We are getting sense */ 101 #define SR_OVERDUE 4 /* Timeout while not current */ 102 #define SR_ERROR 8 /* Error occurred */ 103 int sr_status; /* Status code from last cmd */ 104 }; 105 #define SCI_OPENINGS 16 /* How many commands we can enqueue. */ 106 107 108 struct ncr5380_softc { 109 struct device sc_dev; 110 struct scsipi_adapter sc_adapter; 111 struct scsipi_channel sc_channel; 112 113 #ifdef NCR5380_USE_BUS_SPACE 114 /* Pointers to bus_space */ 115 bus_space_tag_t sc_regt; 116 bus_space_handle_t sc_regh; 117 118 /* Pointers to 5380 registers. */ 119 bus_size_t sci_r0; 120 bus_size_t sci_r1; 121 bus_size_t sci_r2; 122 bus_size_t sci_r3; 123 bus_size_t sci_r4; 124 bus_size_t sci_r5; 125 bus_size_t sci_r6; 126 bus_size_t sci_r7; 127 #else 128 /* Pointers to 5380 registers. See ncr5380reg.h */ 129 volatile u_char *sci_r0; 130 volatile u_char *sci_r1; 131 volatile u_char *sci_r2; 132 volatile u_char *sci_r3; 133 volatile u_char *sci_r4; 134 volatile u_char *sci_r5; 135 volatile u_char *sci_r6; 136 volatile u_char *sci_r7; 137 #endif 138 139 /* Functions set from MD code */ 140 int (*sc_pio_out) __P((struct ncr5380_softc *, 141 int, int, u_char *)); 142 int (*sc_pio_in) __P((struct ncr5380_softc *, 143 int, int, u_char *)); 144 void (*sc_dma_alloc) __P((struct ncr5380_softc *)); 145 void (*sc_dma_free) __P((struct ncr5380_softc *)); 146 147 void (*sc_dma_setup) __P((struct ncr5380_softc *)); 148 void (*sc_dma_start) __P((struct ncr5380_softc *)); 149 void (*sc_dma_poll) __P((struct ncr5380_softc *)); 150 void (*sc_dma_eop) __P((struct ncr5380_softc *)); 151 void (*sc_dma_stop) __P((struct ncr5380_softc *)); 152 153 void (*sc_intr_on) __P((struct ncr5380_softc *)); 154 void (*sc_intr_off) __P((struct ncr5380_softc *)); 155 156 int sc_flags; /* Misc. flags and capabilities */ 157 #define NCR5380_FORCE_POLLING 1 /* Do not use interrupts. */ 158 159 /* Set bits in this to disable disconnect per-target. */ 160 int sc_no_disconnect; 161 162 /* Set bits in this to disable parity for some target. */ 163 int sc_parity_disable; 164 165 int sc_min_dma_len; /* Smaller than this is done with PIO */ 166 167 /* Begin MI shared data */ 168 169 int sc_state; 170 #define NCR_IDLE 0 /* Ready for new work. */ 171 #define NCR_WORKING 0x01 /* Some command is in progress. */ 172 #define NCR_ABORTING 0x02 /* Bailing out */ 173 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 174 #define NCR_DROP_MSGIN 0x10 /* Discard all msgs (parity err detected) */ 175 176 /* The request that has the bus now. */ 177 struct sci_req *sc_current; 178 179 /* Active data pointer for current SCSI command. */ 180 u_char *sc_dataptr; 181 int sc_datalen; 182 183 /* Begin MI private data */ 184 185 /* The number of operations in progress on the bus */ 186 volatile int sc_ncmds; 187 188 /* Ring buffer of pending/active requests */ 189 struct sci_req sc_ring[SCI_OPENINGS]; 190 int sc_rr; /* Round-robin scan pointer */ 191 192 /* Active requests, by target/LUN */ 193 struct sci_req *sc_matrix[8][8]; 194 195 /* Message stuff */ 196 int sc_prevphase; 197 198 u_int sc_msgpriq; /* Messages we want to send */ 199 u_int sc_msgoutq; /* Messages sent during last MESSAGE OUT */ 200 u_int sc_msgout; /* Message last transmitted */ 201 #define SEND_DEV_RESET 0x01 202 #define SEND_PARITY_ERROR 0x02 203 #define SEND_ABORT 0x04 204 #define SEND_REJECT 0x08 205 #define SEND_INIT_DET_ERR 0x10 206 #define SEND_IDENTIFY 0x20 207 #define SEND_SDTR 0x40 208 #define SEND_WDTR 0x80 209 #define NCR_MAX_MSG_LEN 8 210 u_char sc_omess[NCR_MAX_MSG_LEN]; 211 u_char *sc_omp; /* Outgoing message pointer */ 212 u_char sc_imess[NCR_MAX_MSG_LEN]; 213 u_char *sc_imp; /* Incoming message pointer */ 214 int sc_rev; /* Chip revision */ 215 #define NCR_VARIANT_NCR5380 0 216 #define NCR_VARIANT_DP8490 1 217 #define NCR_VARIANT_NCR53C400 2 218 #define NCR_VARIANT_PAS16 3 219 #define NCR_VARIANT_CXD1180 4 220 221 }; 222 223 void ncr5380_attach __P((struct ncr5380_softc *)); 224 int ncr5380_detach __P((struct ncr5380_softc *, int)); 225 int ncr5380_intr __P((void *)); 226 void ncr5380_scsipi_request __P((struct scsipi_channel *, 227 scsipi_adapter_req_t, void *)); 228 int ncr5380_pio_in __P((struct ncr5380_softc *, int, int, u_char *)); 229 int ncr5380_pio_out __P((struct ncr5380_softc *, int, int, u_char *)); 230 void ncr5380_init __P((struct ncr5380_softc *)); 231 232 #ifdef NCR5380_DEBUG 233 struct ncr5380_softc *ncr5380_debug_sc; 234 void ncr5380_trace __P((char *msg, long val)); 235 #define NCR_TRACE(msg, val) ncr5380_trace(msg, val) 236 #else /* NCR5380_DEBUG */ 237 #define NCR_TRACE(msg, val) /* nada */ 238 #endif /* NCR5380_DEBUG */ 239
Indexes created Thu Oct 23 22:10:10 GMT 2025