ncr5380var.h revision 1.9
1 /* $NetBSD: ncr5380var.h,v 1.9 1998/10/25 17:26:41 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1995 David Jones, Gordon W. Ross 5 * Copyright (c) 1994 Jarle Greipsland 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the authors may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by 21 * David Jones and Gordon Ross 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * This file defines the interface between the machine-dependent 37 * module and the machine-indepenedent ncr5380sbc.c module. 38 */ 39 40 /* 41 * Only the i386 uses real bus space: 42 * arm32: oak and csa drivers; easy to convert 43 * mac68k: sbc driver; easy to convert 44 * pc532: ncr driver; need bus.h first 45 * sparc: si and sw drivers; easy to convert 46 * sun3: si driver; need bus.h first 47 * vax: ncr driver; need bus.h first 48 */ 49 #ifdef __i386__ 50 # define NCR5380_USE_BUS_SPACE 51 #endif 52 53 /* 54 * Handy read/write macros 55 */ 56 #if NCR5380_USE_BUS_SPACE 57 # include <machine/bus.h> 58 /* bus_space() variety */ 59 # define NCR5380_READ(reg) bus_space_read_1(sc->iot,sc->ioh,sc->reg) 60 # define NCR5380_WRITE(reg,val) bus_space_write_1(sc->iot,sc->ioh,sc->reg,val) 61 #else 62 /* legacy memory-mapped variety */ 63 # define NCR5380_READ(reg) *sc->reg 64 # define NCR5380_WRITE(reg,val) *(sc->reg) = val 65 #endif 66 67 #define SCI_CLR_INTR(sc) NCR5380_READ(sci_iack) 68 #define SCI_BUSY(sc) (NCR5380_READ(sci_bus_csr) & SCI_BUS_BSY) 69 70 /* These are NOT artibtrary, but map to bits in sci_tcmd */ 71 #define PHASE_DATA_OUT 0x0 72 #define PHASE_DATA_IN 0x1 73 #define PHASE_COMMAND 0x2 74 #define PHASE_STATUS 0x3 75 #define PHASE_UNSPEC1 0x4 76 #define PHASE_UNSPEC2 0x5 77 #define PHASE_MSG_OUT 0x6 78 #define PHASE_MSG_IN 0x7 79 80 /* 81 * This illegal phase is used to prevent the 5380 from having 82 * a phase-match condition when we don't want one, such as 83 * when setting up the DMA engine or whatever... 84 */ 85 #define PHASE_INVALID PHASE_UNSPEC1 86 87 88 /* Per-request state. This is required in order to support reselection. */ 89 struct sci_req { 90 struct scsipi_xfer *sr_xs; /* Pointer to xfer struct, NULL=unused */ 91 int sr_target, sr_lun; /* For fast access */ 92 void *sr_dma_hand; /* Current DMA hnadle */ 93 u_char *sr_dataptr; /* Saved data pointer */ 94 int sr_datalen; 95 int sr_flags; /* Internal error code */ 96 #define SR_IMMED 1 /* Immediate command */ 97 #define SR_SENSE 2 /* We are getting sense */ 98 #define SR_OVERDUE 4 /* Timeout while not current */ 99 #define SR_ERROR 8 /* Error occurred */ 100 int sr_status; /* Status code from last cmd */ 101 }; 102 #define SCI_OPENINGS 16 /* How many commands we can enqueue. */ 103 104 105 struct ncr5380_softc { 106 struct device sc_dev; 107 struct scsipi_link sc_link; 108 109 #ifdef NCR5380_USE_BUS_SPACE 110 /* Pointers to bus_space */ 111 bus_space_tag_t iot; 112 bus_space_handle_t ioh; 113 114 /* Pointers to 5380 registers. */ 115 bus_size_t sci_r0; 116 bus_size_t sci_r1; 117 bus_size_t sci_r2; 118 bus_size_t sci_r3; 119 bus_size_t sci_r4; 120 bus_size_t sci_r5; 121 bus_size_t sci_r6; 122 bus_size_t sci_r7; 123 #else 124 /* Pointers to 5380 registers. See ncr5380reg.h */ 125 volatile u_char *sci_r0; 126 volatile u_char *sci_r1; 127 volatile u_char *sci_r2; 128 volatile u_char *sci_r3; 129 volatile u_char *sci_r4; 130 volatile u_char *sci_r5; 131 volatile u_char *sci_r6; 132 volatile u_char *sci_r7; 133 #endif 134 135 /* Functions set from MD code */ 136 int (*sc_pio_out) __P((struct ncr5380_softc *, 137 int, int, u_char *)); 138 int (*sc_pio_in) __P((struct ncr5380_softc *, 139 int, int, u_char *)); 140 void (*sc_dma_alloc) __P((struct ncr5380_softc *)); 141 void (*sc_dma_free) __P((struct ncr5380_softc *)); 142 143 void (*sc_dma_setup) __P((struct ncr5380_softc *)); 144 void (*sc_dma_start) __P((struct ncr5380_softc *)); 145 void (*sc_dma_poll) __P((struct ncr5380_softc *)); 146 void (*sc_dma_eop) __P((struct ncr5380_softc *)); 147 void (*sc_dma_stop) __P((struct ncr5380_softc *)); 148 149 void (*sc_intr_on) __P((struct ncr5380_softc *)); 150 void (*sc_intr_off) __P((struct ncr5380_softc *)); 151 152 int sc_flags; /* Misc. flags and capabilities */ 153 #define NCR5380_FORCE_POLLING 1 /* Do not use interrupts. */ 154 155 /* Set bits in this to disable disconnect per-target. */ 156 int sc_no_disconnect; 157 158 /* Set bits in this to disable parity for some target. */ 159 int sc_parity_disable; 160 161 int sc_min_dma_len; /* Smaller than this is done with PIO */ 162 163 /* Begin MI shared data */ 164 165 int sc_state; 166 #define NCR_IDLE 0 /* Ready for new work. */ 167 #define NCR_WORKING 0x01 /* Some command is in progress. */ 168 #define NCR_ABORTING 0x02 /* Bailing out */ 169 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 170 #define NCR_DROP_MSGIN 0x10 /* Discard all msgs (parity err detected) */ 171 172 /* The request that has the bus now. */ 173 struct sci_req *sc_current; 174 175 /* Active data pointer for current SCSI command. */ 176 u_char *sc_dataptr; 177 int sc_datalen; 178 179 /* Begin MI private data */ 180 181 /* The number of operations in progress on the bus */ 182 volatile int sc_ncmds; 183 184 /* Ring buffer of pending/active requests */ 185 struct sci_req sc_ring[SCI_OPENINGS]; 186 int sc_rr; /* Round-robin scan pointer */ 187 188 /* Active requests, by target/LUN */ 189 struct sci_req *sc_matrix[8][8]; 190 191 /* Message stuff */ 192 int sc_prevphase; 193 194 u_int sc_msgpriq; /* Messages we want to send */ 195 u_int sc_msgoutq; /* Messages sent during last MESSAGE OUT */ 196 u_int sc_msgout; /* Message last transmitted */ 197 #define SEND_DEV_RESET 0x01 198 #define SEND_PARITY_ERROR 0x02 199 #define SEND_ABORT 0x04 200 #define SEND_REJECT 0x08 201 #define SEND_INIT_DET_ERR 0x10 202 #define SEND_IDENTIFY 0x20 203 #define SEND_SDTR 0x40 204 #define SEND_WDTR 0x80 205 #define NCR_MAX_MSG_LEN 8 206 u_char sc_omess[NCR_MAX_MSG_LEN]; 207 u_char *sc_omp; /* Outgoing message pointer */ 208 u_char sc_imess[NCR_MAX_MSG_LEN]; 209 u_char *sc_imp; /* Incoming message pointer */ 210 211 }; 212 213 void ncr5380_init __P((struct ncr5380_softc *)); 214 void ncr5380_reset_scsibus __P((struct ncr5380_softc *)); 215 int ncr5380_intr __P((struct ncr5380_softc *)); 216 int ncr5380_scsi_cmd __P((struct scsipi_xfer *)); 217 int ncr5380_pio_in __P((struct ncr5380_softc *, int, int, u_char *)); 218 int ncr5380_pio_out __P((struct ncr5380_softc *, int, int, u_char *)); 219 220 #ifdef NCR5380_DEBUG 221 struct ncr5380_softc *ncr5380_debug_sc; 222 void ncr5380_trace __P((char *msg, long val)); 223 #define NCR_TRACE(msg, val) ncr5380_trace(msg, val) 224 #else /* NCR5380_DEBUG */ 225 #define NCR_TRACE(msg, val) /* nada */ 226 #endif /* NCR5380_DEBUG */ 227
Indexes created Sun Sep 28 07:09:56 GMT 2025