ncr53c9x.c revision 1.70.2.5 1 1.70.2.5 nathanw /* $NetBSD: ncr53c9x.c,v 1.70.2.5 2002/01/08 00:30:01 nathanw Exp $ */
2 1.1 thorpej
3 1.27 mycroft /*-
4 1.27 mycroft * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.27 mycroft * All rights reserved.
6 1.27 mycroft *
7 1.27 mycroft * This code is derived from software contributed to The NetBSD Foundation
8 1.27 mycroft * by Charles M. Hannum.
9 1.1 thorpej *
10 1.1 thorpej * Redistribution and use in source and binary forms, with or without
11 1.1 thorpej * modification, are permitted provided that the following conditions
12 1.1 thorpej * are met:
13 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
14 1.1 thorpej * notice, this list of conditions and the following disclaimer.
15 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
17 1.1 thorpej * documentation and/or other materials provided with the distribution.
18 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
19 1.1 thorpej * must display the following acknowledgement:
20 1.27 mycroft * This product includes software developed by the NetBSD
21 1.27 mycroft * Foundation, Inc. and its contributors.
22 1.27 mycroft * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.27 mycroft * contributors may be used to endorse or promote products derived
24 1.27 mycroft * from this software without specific prior written permission.
25 1.1 thorpej *
26 1.27 mycroft * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.27 mycroft * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.27 mycroft * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.27 mycroft * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.27 mycroft * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.27 mycroft * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.27 mycroft * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.27 mycroft * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.27 mycroft * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.27 mycroft * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.27 mycroft * POSSIBILITY OF SUCH DAMAGE.
37 1.1 thorpej */
38 1.1 thorpej
39 1.1 thorpej /*
40 1.1 thorpej * Copyright (c) 1994 Peter Galbavy
41 1.1 thorpej * Copyright (c) 1995 Paul Kranenburg
42 1.1 thorpej * All rights reserved.
43 1.1 thorpej *
44 1.1 thorpej * Redistribution and use in source and binary forms, with or without
45 1.1 thorpej * modification, are permitted provided that the following conditions
46 1.1 thorpej * are met:
47 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
48 1.1 thorpej * notice, this list of conditions and the following disclaimer.
49 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
51 1.1 thorpej * documentation and/or other materials provided with the distribution.
52 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
53 1.1 thorpej * must display the following acknowledgement:
54 1.1 thorpej * This product includes software developed by Peter Galbavy
55 1.1 thorpej * 4. The name of the author may not be used to endorse or promote products
56 1.1 thorpej * derived from this software without specific prior written permission.
57 1.1 thorpej *
58 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 1.1 thorpej * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 1.1 thorpej * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 1.1 thorpej * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 1.1 thorpej * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 1.1 thorpej * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 1.1 thorpej * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 1.1 thorpej * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 1.1 thorpej * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 1.1 thorpej * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
69 1.1 thorpej */
70 1.1 thorpej
71 1.1 thorpej /*
72 1.1 thorpej * Based on aic6360 by Jarle Greipsland
73 1.1 thorpej *
74 1.1 thorpej * Acknowledgements: Many of the algorithms used in this driver are
75 1.1 thorpej * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 1.1 thorpej * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 1.1 thorpej */
78 1.1 thorpej
79 1.70.2.4 nathanw #include <sys/cdefs.h>
80 1.70.2.5 nathanw __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.70.2.5 2002/01/08 00:30:01 nathanw Exp $");
81 1.70.2.4 nathanw
82 1.1 thorpej #include <sys/param.h>
83 1.1 thorpej #include <sys/systm.h>
84 1.48 thorpej #include <sys/callout.h>
85 1.1 thorpej #include <sys/kernel.h>
86 1.1 thorpej #include <sys/errno.h>
87 1.1 thorpej #include <sys/ioctl.h>
88 1.1 thorpej #include <sys/device.h>
89 1.1 thorpej #include <sys/buf.h>
90 1.24 pk #include <sys/malloc.h>
91 1.60 augustss #include <sys/proc.h>
92 1.1 thorpej #include <sys/queue.h>
93 1.54 eeh #include <sys/pool.h>
94 1.53 pk #include <sys/scsiio.h>
95 1.1 thorpej
96 1.18 bouyer #include <dev/scsipi/scsi_all.h>
97 1.18 bouyer #include <dev/scsipi/scsipi_all.h>
98 1.18 bouyer #include <dev/scsipi/scsiconf.h>
99 1.18 bouyer #include <dev/scsipi/scsi_message.h>
100 1.1 thorpej
101 1.1 thorpej #include <dev/ic/ncr53c9xreg.h>
102 1.1 thorpej #include <dev/ic/ncr53c9xvar.h>
103 1.1 thorpej
104 1.1 thorpej int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
105 1.54 eeh #ifdef DEBUG
106 1.54 eeh int ncr53c9x_notag = 0;
107 1.54 eeh #endif
108 1.1 thorpej
109 1.58 pk /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
110 1.58 pk /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
111 1.58 pk /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
112 1.58 pk /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
113 1.58 pk /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
114 1.58 pk struct scsipi_xfer *, int);
115 1.58 pk /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
116 1.58 pk /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
117 1.58 pk /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
118 1.58 pk /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
119 1.58 pk /*static*/ void ncr53c9x_timeout(void *arg);
120 1.58 pk /*static*/ void ncr53c9x_watch(void *arg);
121 1.58 pk /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
122 1.70.2.2 nathanw /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
123 1.70.2.2 nathanw struct ncr53c9x_ecb *);
124 1.70.2.2 nathanw /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
125 1.58 pk caddr_t, int, struct proc *);
126 1.58 pk
127 1.58 pk void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
128 1.70.2.2 nathanw void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
129 1.58 pk struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
130 1.58 pk
131 1.58 pk static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
132 1.58 pk static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
133 1.58 pk struct ncr53c9x_tinfo *);
134 1.70.2.2 nathanw void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
135 1.58 pk static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
136 1.58 pk int64_t lun);
137 1.58 pk
138 1.70.2.1 nathanw static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
139 1.70.2.1 nathanw
140 1.70.2.1 nathanw static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
141 1.70.2.1 nathanw #define NCR_RDFIFO_START 0
142 1.70.2.1 nathanw #define NCR_RDFIFO_CONTINUE 1
143 1.70.2.1 nathanw
144 1.70.2.1 nathanw
145 1.70.2.1 nathanw #define NCR_SET_COUNT(sc, size) do { \
146 1.70.2.2 nathanw NCR_WRITE_REG((sc), NCR_TCL, (size)); \
147 1.70.2.2 nathanw NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
148 1.70.2.2 nathanw if ((sc->sc_cfg2 & NCRCFG2_FE) || \
149 1.70.2.2 nathanw (sc->sc_rev == NCR_VARIANT_FAS366)) { \
150 1.70.2.2 nathanw NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
151 1.70.2.2 nathanw } \
152 1.70.2.2 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366) { \
153 1.70.2.2 nathanw NCR_WRITE_REG(sc, NCR_RCH, 0); \
154 1.70.2.2 nathanw } \
155 1.70.2.1 nathanw } while (0)
156 1.70.2.1 nathanw
157 1.54 eeh static int ecb_pool_initialized = 0;
158 1.54 eeh static struct pool ecb_pool;
159 1.1 thorpej
160 1.1 thorpej /*
161 1.1 thorpej * Names for the NCR53c9x variants, correspnding to the variant tags
162 1.1 thorpej * in ncr53c9xvar.h.
163 1.1 thorpej */
164 1.50 nisimura static const char *ncr53c9x_variant_names[] = {
165 1.1 thorpej "ESP100",
166 1.1 thorpej "ESP100A",
167 1.1 thorpej "ESP200",
168 1.1 thorpej "NCR53C94",
169 1.2 briggs "NCR53C96",
170 1.10 pk "ESP406",
171 1.10 pk "FAS408",
172 1.20 mhitch "FAS216",
173 1.33 thorpej "AM53C974",
174 1.70.2.1 nathanw "FAS366/HME",
175 1.70.2.5 nathanw "NCR53C90 (86C01)",
176 1.1 thorpej };
177 1.1 thorpej
178 1.1 thorpej /*
179 1.54 eeh * Search linked list for LUN info by LUN id.
180 1.54 eeh */
181 1.54 eeh static struct ncr53c9x_linfo *
182 1.54 eeh ncr53c9x_lunsearch(ti, lun)
183 1.54 eeh struct ncr53c9x_tinfo *ti;
184 1.54 eeh int64_t lun;
185 1.54 eeh {
186 1.54 eeh struct ncr53c9x_linfo *li;
187 1.70.2.2 nathanw LIST_FOREACH(li, &ti->luns, link)
188 1.54 eeh if (li->lun == lun)
189 1.54 eeh return (li);
190 1.54 eeh return (NULL);
191 1.54 eeh }
192 1.54 eeh
193 1.54 eeh /*
194 1.1 thorpej * Attach this instance, and then all the sub-devices
195 1.1 thorpej */
196 1.1 thorpej void
197 1.70.2.2 nathanw ncr53c9x_attach(sc)
198 1.1 thorpej struct ncr53c9x_softc *sc;
199 1.1 thorpej {
200 1.70.2.2 nathanw struct scsipi_adapter *adapt = &sc->sc_adapter;
201 1.70.2.2 nathanw struct scsipi_channel *chan = &sc->sc_channel;
202 1.1 thorpej
203 1.54 eeh callout_init(&sc->sc_watchdog);
204 1.1 thorpej /*
205 1.24 pk * Allocate SCSI message buffers.
206 1.24 pk * Front-ends can override allocation to avoid alignment
207 1.24 pk * handling in the DMA engines. Note that that ncr53c9x_msgout()
208 1.24 pk * can request a 1 byte DMA transfer.
209 1.24 pk */
210 1.24 pk if (sc->sc_omess == NULL)
211 1.24 pk sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
212 1.24 pk
213 1.24 pk if (sc->sc_imess == NULL)
214 1.70.2.2 nathanw sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
215 1.24 pk
216 1.24 pk if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
217 1.24 pk printf("out of memory\n");
218 1.24 pk return;
219 1.24 pk }
220 1.24 pk
221 1.24 pk /*
222 1.1 thorpej * Note, the front-end has set us up to print the chip variation.
223 1.1 thorpej */
224 1.1 thorpej if (sc->sc_rev >= NCR_VARIANT_MAX) {
225 1.1 thorpej printf("\n%s: unknown variant %d, devices not attached\n",
226 1.1 thorpej sc->sc_dev.dv_xname, sc->sc_rev);
227 1.1 thorpej return;
228 1.1 thorpej }
229 1.1 thorpej
230 1.1 thorpej printf(": %s, %dMHz, SCSI ID %d\n",
231 1.1 thorpej ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
232 1.1 thorpej
233 1.1 thorpej sc->sc_ccf = FREQTOCCF(sc->sc_freq);
234 1.1 thorpej
235 1.1 thorpej /* The value *must not* be == 1. Make it 2 */
236 1.1 thorpej if (sc->sc_ccf == 1)
237 1.1 thorpej sc->sc_ccf = 2;
238 1.1 thorpej
239 1.1 thorpej /*
240 1.1 thorpej * The recommended timeout is 250ms. This register is loaded
241 1.1 thorpej * with a value calculated as follows, from the docs:
242 1.1 thorpej *
243 1.1 thorpej * (timout period) x (CLK frequency)
244 1.1 thorpej * reg = -------------------------------------
245 1.1 thorpej * 8192 x (Clock Conversion Factor)
246 1.1 thorpej *
247 1.1 thorpej * Since CCF has a linear relation to CLK, this generally computes
248 1.1 thorpej * to the constant of 153.
249 1.1 thorpej */
250 1.1 thorpej sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
251 1.1 thorpej
252 1.1 thorpej /* CCF register only has 3 bits; 0 is actually 8 */
253 1.1 thorpej sc->sc_ccf &= 7;
254 1.1 thorpej
255 1.1 thorpej /*
256 1.70.2.2 nathanw * Fill in the scsipi_adapter.
257 1.1 thorpej */
258 1.70.2.2 nathanw adapt->adapt_dev = &sc->sc_dev;
259 1.70.2.2 nathanw adapt->adapt_nchannels = 1;
260 1.70.2.2 nathanw adapt->adapt_openings = 256;
261 1.70.2.2 nathanw adapt->adapt_max_periph = 256;
262 1.70.2.2 nathanw adapt->adapt_ioctl = ncr53c9x_ioctl;
263 1.70.2.2 nathanw /* adapt_request initialized by front-end */
264 1.70.2.2 nathanw /* adapt_minphys initialized by front-end */
265 1.70.2.2 nathanw
266 1.70.2.2 nathanw /*
267 1.70.2.2 nathanw * Fill in the scsipi_channel.
268 1.70.2.2 nathanw */
269 1.70.2.2 nathanw memset(chan, 0, sizeof(*chan));
270 1.70.2.2 nathanw chan->chan_adapter = adapt;
271 1.70.2.2 nathanw chan->chan_bustype = &scsi_bustype;
272 1.70.2.2 nathanw chan->chan_channel = 0;
273 1.70.2.2 nathanw chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */
274 1.70.2.2 nathanw chan->chan_nluns = 8;
275 1.70.2.2 nathanw chan->chan_id = sc->sc_id;
276 1.1 thorpej
277 1.1 thorpej /*
278 1.44 mycroft * Add reference to adapter so that we drop the reference after
279 1.44 mycroft * config_found() to make sure the adatper is disabled.
280 1.1 thorpej */
281 1.70.2.2 nathanw if (scsipi_adapter_addref(adapt) != 0) {
282 1.44 mycroft printf("%s: unable to enable controller\n",
283 1.44 mycroft sc->sc_dev.dv_xname);
284 1.44 mycroft return;
285 1.44 mycroft }
286 1.44 mycroft
287 1.44 mycroft /* Reset state & bus */
288 1.44 mycroft sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
289 1.44 mycroft sc->sc_state = 0;
290 1.44 mycroft ncr53c9x_init(sc, 1);
291 1.10 pk
292 1.10 pk /*
293 1.44 mycroft * Now try to attach all the sub-devices
294 1.10 pk */
295 1.70.2.2 nathanw sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
296 1.44 mycroft
297 1.70.2.2 nathanw scsipi_adapter_delref(adapt);
298 1.54 eeh callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
299 1.44 mycroft }
300 1.44 mycroft
301 1.44 mycroft int
302 1.44 mycroft ncr53c9x_detach(sc, flags)
303 1.44 mycroft struct ncr53c9x_softc *sc;
304 1.44 mycroft int flags;
305 1.44 mycroft {
306 1.44 mycroft int error;
307 1.44 mycroft
308 1.44 mycroft if (sc->sc_child) {
309 1.44 mycroft error = config_detach(sc->sc_child, flags);
310 1.44 mycroft if (error)
311 1.44 mycroft return (error);
312 1.44 mycroft }
313 1.44 mycroft
314 1.44 mycroft free(sc->sc_imess, M_DEVBUF);
315 1.44 mycroft free(sc->sc_omess, M_DEVBUF);
316 1.24 pk
317 1.44 mycroft return (0);
318 1.1 thorpej }
319 1.1 thorpej
320 1.1 thorpej /*
321 1.30 pk * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
322 1.30 pk * only this controller, but kills any on-going commands, and also stops
323 1.1 thorpej * and resets the DMA.
324 1.1 thorpej *
325 1.1 thorpej * After reset, registers are loaded with the defaults from the attach
326 1.1 thorpej * routine above.
327 1.1 thorpej */
328 1.1 thorpej void
329 1.1 thorpej ncr53c9x_reset(sc)
330 1.1 thorpej struct ncr53c9x_softc *sc;
331 1.1 thorpej {
332 1.1 thorpej
333 1.1 thorpej /* reset DMA first */
334 1.1 thorpej NCRDMA_RESET(sc);
335 1.1 thorpej
336 1.1 thorpej /* reset SCSI chip */
337 1.1 thorpej NCRCMD(sc, NCRCMD_RSTCHIP);
338 1.1 thorpej NCRCMD(sc, NCRCMD_NOP);
339 1.1 thorpej DELAY(500);
340 1.1 thorpej
341 1.1 thorpej /* do these backwards, and fall through */
342 1.1 thorpej switch (sc->sc_rev) {
343 1.10 pk case NCR_VARIANT_ESP406:
344 1.10 pk case NCR_VARIANT_FAS408:
345 1.45 mycroft NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
346 1.45 mycroft NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
347 1.33 thorpej case NCR_VARIANT_AM53C974:
348 1.20 mhitch case NCR_VARIANT_FAS216:
349 1.1 thorpej case NCR_VARIANT_NCR53C94:
350 1.2 briggs case NCR_VARIANT_NCR53C96:
351 1.1 thorpej case NCR_VARIANT_ESP200:
352 1.26 thorpej sc->sc_features |= NCR_F_HASCFG3;
353 1.1 thorpej NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
354 1.1 thorpej case NCR_VARIANT_ESP100A:
355 1.70.2.2 nathanw sc->sc_features |= NCR_F_SELATN3;
356 1.1 thorpej NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
357 1.70.2.5 nathanw case NCR_VARIANT_NCR53C90_86C01:
358 1.1 thorpej case NCR_VARIANT_ESP100:
359 1.1 thorpej NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
360 1.1 thorpej NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
361 1.1 thorpej NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
362 1.1 thorpej NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
363 1.1 thorpej break;
364 1.70.2.1 nathanw
365 1.70.2.1 nathanw case NCR_VARIANT_FAS366:
366 1.70.2.2 nathanw sc->sc_features |=
367 1.70.2.2 nathanw NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
368 1.70.2.2 nathanw sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
369 1.70.2.2 nathanw sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
370 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
371 1.70.2.1 nathanw sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
372 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
373 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
374 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
375 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
376 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
377 1.70.2.1 nathanw break;
378 1.70.2.1 nathanw
379 1.1 thorpej default:
380 1.1 thorpej printf("%s: unknown revision code, assuming ESP100\n",
381 1.1 thorpej sc->sc_dev.dv_xname);
382 1.1 thorpej NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
383 1.1 thorpej NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
384 1.1 thorpej NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
385 1.1 thorpej NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
386 1.1 thorpej }
387 1.33 thorpej
388 1.33 thorpej if (sc->sc_rev == NCR_VARIANT_AM53C974)
389 1.46 tsutsui NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
390 1.70.2.1 nathanw
391 1.70.2.1 nathanw #if 0
392 1.70.2.1 nathanw printf("%s: ncr53c9x_reset: revision %d\n",
393 1.70.2.1 nathanw sc->sc_dev.dv_xname, sc->sc_rev);
394 1.70.2.2 nathanw printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
395 1.70.2.2 nathanw "ccf 0x%x, timeout 0x%x\n",
396 1.70.2.2 nathanw sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
397 1.70.2.2 nathanw sc->sc_ccf, sc->sc_timeout);
398 1.70.2.1 nathanw #endif
399 1.1 thorpej }
400 1.1 thorpej
401 1.1 thorpej /*
402 1.1 thorpej * Reset the SCSI bus, but not the chip
403 1.1 thorpej */
404 1.1 thorpej void
405 1.1 thorpej ncr53c9x_scsi_reset(sc)
406 1.1 thorpej struct ncr53c9x_softc *sc;
407 1.1 thorpej {
408 1.1 thorpej
409 1.1 thorpej (*sc->sc_glue->gl_dma_stop)(sc);
410 1.1 thorpej
411 1.1 thorpej printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
412 1.1 thorpej NCRCMD(sc, NCRCMD_RSTSCSI);
413 1.1 thorpej }
414 1.1 thorpej
415 1.1 thorpej /*
416 1.30 pk * Initialize ncr53c9x state machine
417 1.1 thorpej */
418 1.1 thorpej void
419 1.1 thorpej ncr53c9x_init(sc, doreset)
420 1.1 thorpej struct ncr53c9x_softc *sc;
421 1.1 thorpej int doreset;
422 1.1 thorpej {
423 1.1 thorpej struct ncr53c9x_ecb *ecb;
424 1.54 eeh struct ncr53c9x_linfo *li;
425 1.54 eeh int i, r;
426 1.1 thorpej
427 1.70.2.1 nathanw NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
428 1.1 thorpej
429 1.54 eeh if (!ecb_pool_initialized) {
430 1.54 eeh /* All instances share this pool */
431 1.70.2.2 nathanw pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
432 1.70.2.2 nathanw "ncr53c9x_ecb", 0, NULL, NULL, 0);
433 1.54 eeh ecb_pool_initialized = 1;
434 1.54 eeh }
435 1.54 eeh
436 1.1 thorpej if (sc->sc_state == 0) {
437 1.1 thorpej /* First time through; initialize. */
438 1.54 eeh
439 1.1 thorpej TAILQ_INIT(&sc->ready_list);
440 1.1 thorpej sc->sc_nexus = NULL;
441 1.70.2.3 nathanw memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
442 1.57 pk for (r = 0; r < NCR_NTARG; r++) {
443 1.54 eeh LIST_INIT(&sc->sc_tinfo[r].luns);
444 1.1 thorpej }
445 1.1 thorpej } else {
446 1.1 thorpej /* Cancel any active commands. */
447 1.1 thorpej sc->sc_state = NCR_CLEANING;
448 1.54 eeh sc->sc_msgify = 0;
449 1.1 thorpej if ((ecb = sc->sc_nexus) != NULL) {
450 1.16 pk ecb->xs->error = XS_TIMEOUT;
451 1.1 thorpej ncr53c9x_done(sc, ecb);
452 1.1 thorpej }
453 1.54 eeh /* Cancel outstanding disconnected commands on each LUN */
454 1.57 pk for (r = 0; r < 8; r++) {
455 1.54 eeh LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
456 1.57 pk if ((ecb = li->untagged) != NULL) {
457 1.54 eeh li->untagged = NULL;
458 1.70.2.2 nathanw /*
459 1.54 eeh * XXXXXXX
460 1.54 eeh *
461 1.70.2.2 nathanw * Should we terminate a command
462 1.70.2.2 nathanw * that never reached the disk?
463 1.54 eeh */
464 1.54 eeh li->busy = 0;
465 1.54 eeh ecb->xs->error = XS_TIMEOUT;
466 1.54 eeh ncr53c9x_done(sc, ecb);
467 1.54 eeh }
468 1.57 pk for (i = 0; i < 256; i++)
469 1.54 eeh if ((ecb = li->queued[i])) {
470 1.54 eeh li->queued[i] = NULL;
471 1.54 eeh ecb->xs->error = XS_TIMEOUT;
472 1.54 eeh ncr53c9x_done(sc, ecb);
473 1.54 eeh }
474 1.54 eeh li->used = 0;
475 1.54 eeh }
476 1.1 thorpej }
477 1.1 thorpej }
478 1.1 thorpej
479 1.1 thorpej /*
480 1.1 thorpej * reset the chip to a known state
481 1.1 thorpej */
482 1.1 thorpej ncr53c9x_reset(sc);
483 1.1 thorpej
484 1.1 thorpej sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
485 1.1 thorpej for (r = 0; r < 8; r++) {
486 1.1 thorpej struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
487 1.1 thorpej /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
488 1.1 thorpej
489 1.70 eeh ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
490 1.70.2.2 nathanw ? 0 : T_SYNCHOFF) |
491 1.70.2.2 nathanw ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
492 1.70.2.2 nathanw T_NEED_TO_RESET;
493 1.54 eeh #ifdef DEBUG
494 1.55 pk if (ncr53c9x_notag)
495 1.70 eeh ti->flags &= ~T_TAG;
496 1.54 eeh #endif
497 1.1 thorpej ti->period = sc->sc_minsync;
498 1.1 thorpej ti->offset = 0;
499 1.70.2.1 nathanw ti->cfg3 = 0;
500 1.1 thorpej }
501 1.1 thorpej
502 1.1 thorpej if (doreset) {
503 1.1 thorpej sc->sc_state = NCR_SBR;
504 1.1 thorpej NCRCMD(sc, NCRCMD_RSTSCSI);
505 1.1 thorpej } else {
506 1.1 thorpej sc->sc_state = NCR_IDLE;
507 1.15 pk ncr53c9x_sched(sc);
508 1.1 thorpej }
509 1.1 thorpej }
510 1.1 thorpej
511 1.1 thorpej /*
512 1.1 thorpej * Read the NCR registers, and save their contents for later use.
513 1.1 thorpej * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
514 1.1 thorpej * NCR_INTR - so make sure it is the last read.
515 1.1 thorpej *
516 1.1 thorpej * I think that (from reading the docs) most bits in these registers
517 1.1 thorpej * only make sense when he DMA CSR has an interrupt showing. Call only
518 1.1 thorpej * if an interrupt is pending.
519 1.1 thorpej */
520 1.25 pk __inline__ void
521 1.1 thorpej ncr53c9x_readregs(sc)
522 1.1 thorpej struct ncr53c9x_softc *sc;
523 1.1 thorpej {
524 1.1 thorpej
525 1.1 thorpej sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
526 1.1 thorpej /* Only the stepo bits are of interest */
527 1.1 thorpej sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
528 1.70.2.1 nathanw
529 1.70.2.1 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366)
530 1.70.2.1 nathanw sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
531 1.70.2.1 nathanw
532 1.1 thorpej sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
533 1.1 thorpej
534 1.1 thorpej if (sc->sc_glue->gl_clear_latched_intr != NULL)
535 1.1 thorpej (*sc->sc_glue->gl_clear_latched_intr)(sc);
536 1.1 thorpej
537 1.1 thorpej /*
538 1.1 thorpej * Determine the SCSI bus phase, return either a real SCSI bus phase
539 1.1 thorpej * or some pseudo phase we use to detect certain exceptions.
540 1.1 thorpej */
541 1.1 thorpej
542 1.70.2.2 nathanw sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
543 1.70.2.2 nathanw /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
544 1.1 thorpej
545 1.70.2.1 nathanw NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
546 1.70.2.2 nathanw sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
547 1.1 thorpej }
548 1.1 thorpej
549 1.1 thorpej /*
550 1.1 thorpej * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
551 1.1 thorpej */
552 1.1 thorpej static inline int
553 1.1 thorpej ncr53c9x_stp2cpb(sc, period)
554 1.1 thorpej struct ncr53c9x_softc *sc;
555 1.1 thorpej int period;
556 1.1 thorpej {
557 1.1 thorpej int v;
558 1.1 thorpej v = (sc->sc_freq * period) / 250;
559 1.1 thorpej if (ncr53c9x_cpb2stp(sc, v) < period)
560 1.1 thorpej /* Correct round-down error */
561 1.1 thorpej v++;
562 1.25 pk return (v);
563 1.1 thorpej }
564 1.1 thorpej
565 1.1 thorpej static inline void
566 1.1 thorpej ncr53c9x_setsync(sc, ti)
567 1.1 thorpej struct ncr53c9x_softc *sc;
568 1.1 thorpej struct ncr53c9x_tinfo *ti;
569 1.1 thorpej {
570 1.70.2.1 nathanw u_char syncoff, synctp;
571 1.70.2.1 nathanw u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
572 1.1 thorpej
573 1.1 thorpej if (ti->flags & T_SYNCMODE) {
574 1.26 thorpej syncoff = ti->offset;
575 1.26 thorpej synctp = ncr53c9x_stp2cpb(sc, ti->period);
576 1.26 thorpej if (sc->sc_features & NCR_F_FASTSCSI) {
577 1.26 thorpej /*
578 1.26 thorpej * If the period is 200ns or less (ti->period <= 50),
579 1.26 thorpej * put the chip in Fast SCSI mode.
580 1.26 thorpej */
581 1.26 thorpej if (ti->period <= 50)
582 1.35 mhitch /*
583 1.35 mhitch * There are (at least) 4 variations of the
584 1.35 mhitch * configuration 3 register. The drive attach
585 1.35 mhitch * routine sets the appropriate bit to put the
586 1.35 mhitch * chip into Fast SCSI mode so that it doesn't
587 1.35 mhitch * have to be figured out here each time.
588 1.35 mhitch */
589 1.35 mhitch cfg3 |= sc->sc_cfg3_fscsi;
590 1.26 thorpej }
591 1.33 thorpej
592 1.33 thorpej /*
593 1.33 thorpej * Am53c974 requires different SYNCTP values when the
594 1.33 thorpej * FSCSI bit is off.
595 1.33 thorpej */
596 1.33 thorpej if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
597 1.33 thorpej (cfg3 & NCRAMDCFG3_FSCSI) == 0)
598 1.33 thorpej synctp--;
599 1.1 thorpej } else {
600 1.26 thorpej syncoff = 0;
601 1.26 thorpej synctp = 0;
602 1.1 thorpej }
603 1.26 thorpej
604 1.26 thorpej if (sc->sc_features & NCR_F_HASCFG3)
605 1.26 thorpej NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
606 1.26 thorpej
607 1.26 thorpej NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
608 1.26 thorpej NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
609 1.1 thorpej }
610 1.1 thorpej
611 1.1 thorpej /*
612 1.1 thorpej * Send a command to a target, set the driver state to NCR_SELECTING
613 1.1 thorpej * and let the caller take care of the rest.
614 1.1 thorpej *
615 1.1 thorpej * Keeping this as a function allows me to say that this may be done
616 1.1 thorpej * by DMA instead of programmed I/O soon.
617 1.1 thorpej */
618 1.1 thorpej void
619 1.1 thorpej ncr53c9x_select(sc, ecb)
620 1.1 thorpej struct ncr53c9x_softc *sc;
621 1.1 thorpej struct ncr53c9x_ecb *ecb;
622 1.1 thorpej {
623 1.70.2.2 nathanw struct scsipi_periph *periph = ecb->xs->xs_periph;
624 1.70.2.2 nathanw int target = periph->periph_target;
625 1.70.2.2 nathanw int lun = periph->periph_lun;
626 1.1 thorpej struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
627 1.22 pk int tiflags = ti->flags;
628 1.1 thorpej u_char *cmd;
629 1.1 thorpej int clen;
630 1.70.2.2 nathanw int selatn3, selatns;
631 1.39 mycroft size_t dmasize;
632 1.1 thorpej
633 1.54 eeh NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
634 1.70.2.2 nathanw target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
635 1.1 thorpej
636 1.1 thorpej sc->sc_state = NCR_SELECTING;
637 1.7 gwr /*
638 1.7 gwr * Schedule the timeout now, the first time we will go away
639 1.7 gwr * expecting to come back due to an interrupt, because it is
640 1.7 gwr * always possible that the interrupt may never happen.
641 1.7 gwr */
642 1.52 nisimura if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
643 1.52 nisimura int timeout = ecb->timeout;
644 1.52 nisimura
645 1.70.2.3 nathanw if (timeout > 1000000)
646 1.52 nisimura timeout = (timeout / 1000) * hz;
647 1.52 nisimura else
648 1.52 nisimura timeout = (timeout * hz) / 1000;
649 1.57 pk
650 1.52 nisimura callout_reset(&ecb->xs->xs_callout, timeout,
651 1.70.2.2 nathanw ncr53c9x_timeout, ecb);
652 1.52 nisimura }
653 1.7 gwr
654 1.1 thorpej /*
655 1.1 thorpej * The docs say the target register is never reset, and I
656 1.1 thorpej * can't think of a better place to set it
657 1.1 thorpej */
658 1.70.2.1 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366) {
659 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_FLUSH);
660 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
661 1.70.2.1 nathanw } else {
662 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_SELID, target);
663 1.70.2.1 nathanw }
664 1.1 thorpej ncr53c9x_setsync(sc, ti);
665 1.38 mycroft
666 1.57 pk if ((ecb->flags & ECB_SENSE) != 0) {
667 1.38 mycroft /*
668 1.38 mycroft * For REQUEST SENSE, we should not send an IDENTIFY or
669 1.38 mycroft * otherwise mangle the target. There should be no MESSAGE IN
670 1.38 mycroft * phase.
671 1.38 mycroft */
672 1.70.2.1 nathanw if (sc->sc_features & NCR_F_DMASELECT) {
673 1.39 mycroft /* setup DMA transfer for command */
674 1.39 mycroft dmasize = clen = ecb->clen;
675 1.39 mycroft sc->sc_cmdlen = clen;
676 1.54 eeh sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
677 1.70.2.2 nathanw
678 1.39 mycroft /* Program the SCSI counter */
679 1.70.2.1 nathanw NCR_SET_COUNT(sc, dmasize);
680 1.39 mycroft
681 1.70.2.1 nathanw if (sc->sc_rev != NCR_VARIANT_FAS366)
682 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
683 1.39 mycroft
684 1.39 mycroft /* And get the targets attention */
685 1.39 mycroft NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
686 1.70.2.2 nathanw NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
687 1.70.2.2 nathanw &dmasize);
688 1.39 mycroft NCRDMA_GO(sc);
689 1.39 mycroft } else {
690 1.70.2.1 nathanw ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
691 1.39 mycroft NCRCMD(sc, NCRCMD_SELNATN);
692 1.39 mycroft }
693 1.38 mycroft return;
694 1.38 mycroft }
695 1.1 thorpej
696 1.70.2.2 nathanw selatn3 = selatns = 0;
697 1.70.2.2 nathanw if (ecb->tag[0] != 0) {
698 1.70.2.2 nathanw if (sc->sc_features & NCR_F_SELATN3)
699 1.70.2.2 nathanw /* use SELATN3 to send tag messages */
700 1.70.2.2 nathanw selatn3 = 1;
701 1.70.2.2 nathanw else
702 1.70.2.2 nathanw /* We don't have SELATN3; use SELATNS to send tags */
703 1.70.2.2 nathanw selatns = 1;
704 1.70.2.2 nathanw }
705 1.70.2.2 nathanw
706 1.70.2.2 nathanw if (ti->flags & T_NEGOTIATE) {
707 1.70.2.2 nathanw /* We have to use SELATNS to send sync/wide messages */
708 1.70.2.2 nathanw selatn3 = 0;
709 1.70.2.2 nathanw selatns = 1;
710 1.70.2.2 nathanw }
711 1.69 briggs
712 1.70.2.2 nathanw cmd = (u_char *)&ecb->cmd.cmd;
713 1.69 briggs
714 1.70.2.2 nathanw if (selatn3) {
715 1.70.2.2 nathanw /* We'll use tags with SELATN3 */
716 1.54 eeh clen = ecb->clen + 3;
717 1.66 briggs cmd -= 3;
718 1.66 briggs cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
719 1.66 briggs cmd[1] = ecb->tag[0]; /* msg[1] */
720 1.66 briggs cmd[2] = ecb->tag[1]; /* msg[2] */
721 1.54 eeh } else {
722 1.70.2.2 nathanw /* We don't have tags, or will send messages with SELATNS */
723 1.54 eeh clen = ecb->clen + 1;
724 1.66 briggs cmd -= 1;
725 1.70.2.2 nathanw cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
726 1.54 eeh }
727 1.54 eeh
728 1.70.2.2 nathanw if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
729 1.8 pk
730 1.8 pk /* setup DMA transfer for command */
731 1.54 eeh dmasize = clen;
732 1.8 pk sc->sc_cmdlen = clen;
733 1.54 eeh sc->sc_cmdp = cmd;
734 1.22 pk
735 1.8 pk /* Program the SCSI counter */
736 1.70.2.1 nathanw NCR_SET_COUNT(sc, dmasize);
737 1.8 pk
738 1.22 pk /* load the count in */
739 1.70.2.1 nathanw /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
740 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
741 1.22 pk
742 1.8 pk /* And get the targets attention */
743 1.69 briggs if (selatn3) {
744 1.66 briggs sc->sc_msgout = SEND_TAG;
745 1.66 briggs sc->sc_flags |= NCR_ATN;
746 1.54 eeh NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
747 1.66 briggs } else
748 1.54 eeh NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
749 1.70.2.1 nathanw NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
750 1.8 pk NCRDMA_GO(sc);
751 1.8 pk return;
752 1.8 pk }
753 1.22 pk
754 1.1 thorpej /*
755 1.1 thorpej * Who am I. This is where we tell the target that we are
756 1.1 thorpej * happy for it to disconnect etc.
757 1.1 thorpej */
758 1.1 thorpej
759 1.54 eeh /* Now get the command into the FIFO */
760 1.70.2.1 nathanw ncr53c9x_wrfifo(sc, cmd, clen);
761 1.1 thorpej
762 1.1 thorpej /* And get the targets attention */
763 1.70.2.2 nathanw if (selatns) {
764 1.70.2.2 nathanw NCR_MISC(("SELATNS \n"));
765 1.70.2.2 nathanw /* Arbitrate, select and stop after IDENTIFY message */
766 1.70.2.2 nathanw NCRCMD(sc, NCRCMD_SELATNS);
767 1.70.2.2 nathanw } else if (selatn3) {
768 1.66 briggs sc->sc_msgout = SEND_TAG;
769 1.66 briggs sc->sc_flags |= NCR_ATN;
770 1.61 eeh NCRCMD(sc, NCRCMD_SELATN3);
771 1.66 briggs } else
772 1.61 eeh NCRCMD(sc, NCRCMD_SELATN);
773 1.1 thorpej }
774 1.1 thorpej
775 1.1 thorpej void
776 1.70.2.2 nathanw ncr53c9x_free_ecb(sc, ecb)
777 1.1 thorpej struct ncr53c9x_softc *sc;
778 1.1 thorpej struct ncr53c9x_ecb *ecb;
779 1.1 thorpej {
780 1.1 thorpej int s;
781 1.1 thorpej
782 1.1 thorpej s = splbio();
783 1.1 thorpej ecb->flags = 0;
784 1.54 eeh pool_put(&ecb_pool, (void *)ecb);
785 1.1 thorpej splx(s);
786 1.54 eeh return;
787 1.1 thorpej }
788 1.1 thorpej
789 1.1 thorpej struct ncr53c9x_ecb *
790 1.1 thorpej ncr53c9x_get_ecb(sc, flags)
791 1.1 thorpej struct ncr53c9x_softc *sc;
792 1.1 thorpej int flags;
793 1.1 thorpej {
794 1.1 thorpej struct ncr53c9x_ecb *ecb;
795 1.70.2.2 nathanw int s;
796 1.1 thorpej
797 1.1 thorpej s = splbio();
798 1.70.2.2 nathanw ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT);
799 1.54 eeh splx(s);
800 1.70.2.2 nathanw if (ecb) {
801 1.70.2.3 nathanw memset(ecb, 0, sizeof(*ecb));
802 1.1 thorpej ecb->flags |= ECB_ALLOC;
803 1.70.2.2 nathanw }
804 1.25 pk return (ecb);
805 1.1 thorpej }
806 1.1 thorpej
807 1.1 thorpej /*
808 1.1 thorpej * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
809 1.1 thorpej */
810 1.1 thorpej
811 1.1 thorpej /*
812 1.1 thorpej * Start a SCSI-command
813 1.1 thorpej * This function is called by the higher level SCSI-driver to queue/run
814 1.1 thorpej * SCSI-commands.
815 1.1 thorpej */
816 1.70.2.2 nathanw
817 1.70.2.2 nathanw void
818 1.70.2.2 nathanw ncr53c9x_scsipi_request(chan, req, arg)
819 1.70.2.2 nathanw struct scsipi_channel *chan;
820 1.70.2.2 nathanw scsipi_adapter_req_t req;
821 1.70.2.2 nathanw void *arg;
822 1.1 thorpej {
823 1.70.2.2 nathanw struct scsipi_xfer *xs;
824 1.70.2.2 nathanw struct scsipi_periph *periph;
825 1.70.2.2 nathanw struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
826 1.1 thorpej struct ncr53c9x_ecb *ecb;
827 1.1 thorpej int s, flags;
828 1.1 thorpej
829 1.70.2.2 nathanw NCR_TRACE(("[ncr53c9x_scsipi_request] "));
830 1.1 thorpej
831 1.70.2.2 nathanw switch (req) {
832 1.70.2.2 nathanw case ADAPTER_REQ_RUN_XFER:
833 1.70.2.2 nathanw xs = arg;
834 1.70.2.2 nathanw periph = xs->xs_periph;
835 1.70.2.2 nathanw flags = xs->xs_control;
836 1.70.2.2 nathanw
837 1.70.2.2 nathanw NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
838 1.70.2.2 nathanw periph->periph_target));
839 1.70.2.2 nathanw
840 1.70.2.2 nathanw /* Get an ECB to use. */
841 1.70.2.2 nathanw ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
842 1.70.2.2 nathanw /*
843 1.70.2.2 nathanw * This should never happen as we track resources
844 1.70.2.2 nathanw * in the mid-layer.
845 1.70.2.2 nathanw */
846 1.70.2.2 nathanw if (ecb == NULL) {
847 1.70.2.2 nathanw scsipi_printaddr(periph);
848 1.70.2.2 nathanw printf("unable to allocate ecb\n");
849 1.70.2.2 nathanw xs->error = XS_RESOURCE_SHORTAGE;
850 1.70.2.2 nathanw scsipi_done(xs);
851 1.70.2.2 nathanw return;
852 1.70.2.2 nathanw }
853 1.54 eeh
854 1.70.2.2 nathanw /* Initialize ecb */
855 1.70.2.2 nathanw ecb->xs = xs;
856 1.70.2.2 nathanw ecb->timeout = xs->timeout;
857 1.70.2.2 nathanw
858 1.70.2.2 nathanw if (flags & XS_CTL_RESET) {
859 1.70.2.2 nathanw ecb->flags |= ECB_RESET;
860 1.70.2.2 nathanw ecb->clen = 0;
861 1.70.2.2 nathanw ecb->dleft = 0;
862 1.70.2.2 nathanw } else {
863 1.70.2.3 nathanw memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen);
864 1.70.2.2 nathanw ecb->clen = xs->cmdlen;
865 1.70.2.2 nathanw ecb->daddr = xs->data;
866 1.70.2.2 nathanw ecb->dleft = xs->datalen;
867 1.54 eeh }
868 1.70.2.2 nathanw ecb->stat = 0;
869 1.70.2.2 nathanw
870 1.54 eeh s = splbio();
871 1.70.2.2 nathanw
872 1.70.2.2 nathanw TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
873 1.70.2.2 nathanw ecb->flags |= ECB_READY;
874 1.70.2.2 nathanw if (sc->sc_state == NCR_IDLE)
875 1.70.2.2 nathanw ncr53c9x_sched(sc);
876 1.70.2.2 nathanw
877 1.54 eeh splx(s);
878 1.54 eeh
879 1.70.2.2 nathanw if ((flags & XS_CTL_POLL) == 0)
880 1.70.2.2 nathanw return;
881 1.1 thorpej
882 1.70.2.2 nathanw /* Not allowed to use interrupts, use polling instead */
883 1.70.2.2 nathanw if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
884 1.70.2.2 nathanw ncr53c9x_timeout(ecb);
885 1.70.2.2 nathanw if (ncr53c9x_poll(sc, xs, ecb->timeout))
886 1.70.2.2 nathanw ncr53c9x_timeout(ecb);
887 1.70.2.2 nathanw }
888 1.70.2.2 nathanw return;
889 1.1 thorpej
890 1.70.2.2 nathanw case ADAPTER_REQ_GROW_RESOURCES:
891 1.70.2.2 nathanw /* XXX Not supported. */
892 1.70.2.2 nathanw return;
893 1.1 thorpej
894 1.70.2.2 nathanw case ADAPTER_REQ_SET_XFER_MODE:
895 1.70.2.2 nathanw {
896 1.70.2.2 nathanw struct ncr53c9x_tinfo *ti;
897 1.70.2.2 nathanw struct scsipi_xfer_mode *xm = arg;
898 1.1 thorpej
899 1.70.2.2 nathanw ti = &sc->sc_tinfo[xm->xm_target];
900 1.70.2.2 nathanw ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
901 1.70.2.2 nathanw ti->period = 0;
902 1.70.2.2 nathanw ti->offset = 0;
903 1.1 thorpej
904 1.70.2.2 nathanw if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 &&
905 1.70.2.2 nathanw (xm->xm_mode & PERIPH_CAP_TQING))
906 1.70.2.2 nathanw ti->flags |= T_TAG;
907 1.70.2.2 nathanw else
908 1.70.2.2 nathanw ti->flags &= ~T_TAG;
909 1.1 thorpej
910 1.70.2.2 nathanw if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
911 1.70.2.2 nathanw NCR_MISC(("%s: target %d: wide scsi negotiation\n",
912 1.70.2.2 nathanw sc->sc_dev.dv_xname, xm->xm_target));
913 1.70.2.2 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366) {
914 1.70.2.2 nathanw ti->flags |= T_WIDE;
915 1.70.2.2 nathanw ti->width = 1;
916 1.70.2.2 nathanw }
917 1.70.2.2 nathanw }
918 1.70.2.2 nathanw
919 1.70.2.2 nathanw if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
920 1.70.2.2 nathanw (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
921 1.70.2.2 nathanw NCR_MISC(("%s: target %d: sync negotiation\n",
922 1.70.2.2 nathanw sc->sc_dev.dv_xname, xm->xm_target));
923 1.70.2.2 nathanw ti->flags |= T_NEGOTIATE;
924 1.70.2.2 nathanw ti->period = sc->sc_minsync;
925 1.70.2.2 nathanw }
926 1.70.2.2 nathanw /*
927 1.70.2.2 nathanw * If we're not going to negotiate, send the notification
928 1.70.2.2 nathanw * now, since it won't happen later.
929 1.70.2.2 nathanw */
930 1.70.2.2 nathanw if ((ti->flags & T_NEGOTIATE) == 0)
931 1.70.2.2 nathanw ncr53c9x_update_xfer_mode(sc, xm->xm_target);
932 1.70.2.2 nathanw return;
933 1.70.2.2 nathanw }
934 1.70.2.2 nathanw }
935 1.70.2.2 nathanw }
936 1.70.2.2 nathanw
937 1.70.2.2 nathanw void
938 1.70.2.2 nathanw ncr53c9x_update_xfer_mode(sc, target)
939 1.70.2.2 nathanw struct ncr53c9x_softc *sc;
940 1.70.2.2 nathanw int target;
941 1.70.2.2 nathanw {
942 1.70.2.2 nathanw struct scsipi_xfer_mode xm;
943 1.70.2.2 nathanw struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
944 1.70.2.2 nathanw
945 1.70.2.2 nathanw xm.xm_target = target;
946 1.70.2.2 nathanw xm.xm_mode = 0;
947 1.70.2.2 nathanw xm.xm_period = 0;
948 1.70.2.2 nathanw xm.xm_offset = 0;
949 1.70.2.2 nathanw
950 1.70.2.2 nathanw if (ti->flags & T_SYNCMODE) {
951 1.70.2.2 nathanw xm.xm_mode |= PERIPH_CAP_SYNC;
952 1.70.2.2 nathanw xm.xm_period = ti->period;
953 1.70.2.2 nathanw xm.xm_offset = ti->offset;
954 1.1 thorpej }
955 1.70.2.2 nathanw if (ti->width)
956 1.70.2.2 nathanw xm.xm_mode |= PERIPH_CAP_WIDE16;
957 1.70.2.2 nathanw
958 1.70.2.2 nathanw if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
959 1.70.2.2 nathanw xm.xm_mode |= PERIPH_CAP_TQING;
960 1.70.2.2 nathanw
961 1.70.2.2 nathanw scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
962 1.1 thorpej }
963 1.1 thorpej
964 1.1 thorpej /*
965 1.1 thorpej * Used when interrupt driven I/O isn't allowed, e.g. during boot.
966 1.1 thorpej */
967 1.1 thorpej int
968 1.1 thorpej ncr53c9x_poll(sc, xs, count)
969 1.1 thorpej struct ncr53c9x_softc *sc;
970 1.18 bouyer struct scsipi_xfer *xs;
971 1.1 thorpej int count;
972 1.1 thorpej {
973 1.1 thorpej
974 1.1 thorpej NCR_TRACE(("[ncr53c9x_poll] "));
975 1.1 thorpej while (count) {
976 1.1 thorpej if (NCRDMA_ISINTR(sc)) {
977 1.1 thorpej ncr53c9x_intr(sc);
978 1.1 thorpej }
979 1.1 thorpej #if alternatively
980 1.1 thorpej if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
981 1.1 thorpej ncr53c9x_intr(sc);
982 1.1 thorpej #endif
983 1.36 thorpej if ((xs->xs_status & XS_STS_DONE) != 0)
984 1.25 pk return (0);
985 1.1 thorpej if (sc->sc_state == NCR_IDLE) {
986 1.1 thorpej NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
987 1.1 thorpej ncr53c9x_sched(sc);
988 1.1 thorpej }
989 1.1 thorpej DELAY(1000);
990 1.1 thorpej count--;
991 1.1 thorpej }
992 1.25 pk return (1);
993 1.1 thorpej }
994 1.1 thorpej
995 1.53 pk int
996 1.70.2.2 nathanw ncr53c9x_ioctl(chan, cmd, arg, flag, p)
997 1.70.2.2 nathanw struct scsipi_channel *chan;
998 1.53 pk u_long cmd;
999 1.53 pk caddr_t arg;
1000 1.53 pk int flag;
1001 1.53 pk struct proc *p;
1002 1.53 pk {
1003 1.70.2.2 nathanw /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */
1004 1.62 fvdl int s, error = 0;
1005 1.53 pk
1006 1.53 pk s = splbio();
1007 1.53 pk
1008 1.53 pk switch (cmd) {
1009 1.53 pk default:
1010 1.53 pk error = ENOTTY;
1011 1.53 pk break;
1012 1.53 pk }
1013 1.53 pk splx(s);
1014 1.53 pk return (error);
1015 1.53 pk }
1016 1.53 pk
1017 1.1 thorpej
1018 1.1 thorpej /*
1019 1.1 thorpej * LOW LEVEL SCSI UTILITIES
1020 1.1 thorpej */
1021 1.1 thorpej
1022 1.1 thorpej /*
1023 1.1 thorpej * Schedule a scsi operation. This has now been pulled out of the interrupt
1024 1.70.2.2 nathanw * handler so that we may call it from ncr53c9x_scsipi_request and
1025 1.70.2.2 nathanw * ncr53c9x_done. This may save us an unecessary interrupt just to get
1026 1.70.2.2 nathanw * things going. Should only be called when state == NCR_IDLE and at bio pl.
1027 1.1 thorpej */
1028 1.1 thorpej void
1029 1.1 thorpej ncr53c9x_sched(sc)
1030 1.1 thorpej struct ncr53c9x_softc *sc;
1031 1.1 thorpej {
1032 1.1 thorpej struct ncr53c9x_ecb *ecb;
1033 1.70.2.2 nathanw struct scsipi_periph *periph;
1034 1.1 thorpej struct ncr53c9x_tinfo *ti;
1035 1.54 eeh int lun;
1036 1.54 eeh struct ncr53c9x_linfo *li;
1037 1.54 eeh int s, tag;
1038 1.1 thorpej
1039 1.1 thorpej NCR_TRACE(("[ncr53c9x_sched] "));
1040 1.1 thorpej if (sc->sc_state != NCR_IDLE)
1041 1.1 thorpej panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1042 1.1 thorpej
1043 1.1 thorpej /*
1044 1.1 thorpej * Find first ecb in ready queue that is for a target/lunit
1045 1.1 thorpej * combinations that is not busy.
1046 1.1 thorpej */
1047 1.57 pk for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1048 1.70.2.2 nathanw ecb = TAILQ_NEXT(ecb, chain)) {
1049 1.70.2.2 nathanw periph = ecb->xs->xs_periph;
1050 1.70.2.2 nathanw ti = &sc->sc_tinfo[periph->periph_target];
1051 1.70.2.2 nathanw lun = periph->periph_lun;
1052 1.54 eeh
1053 1.54 eeh /* Select type of tag for this command */
1054 1.70.2.2 nathanw if ((ti->flags & (T_RSELECTOFF)) != 0)
1055 1.70 eeh tag = 0;
1056 1.70 eeh else if ((ti->flags & (T_TAG)) == 0)
1057 1.57 pk tag = 0;
1058 1.57 pk else if ((ecb->flags & ECB_SENSE) != 0)
1059 1.57 pk tag = 0;
1060 1.54 eeh else
1061 1.70.2.2 nathanw tag = ecb->xs->xs_tag_type;
1062 1.54 eeh #if 0
1063 1.54 eeh /* XXXX Use tags for polled commands? */
1064 1.54 eeh if (ecb->xs->xs_control & XS_CTL_POLL)
1065 1.54 eeh tag = 0;
1066 1.54 eeh #endif
1067 1.57 pk
1068 1.54 eeh s = splbio();
1069 1.54 eeh li = TINFO_LUN(ti, lun);
1070 1.57 pk if (li == NULL) {
1071 1.54 eeh /* Initialize LUN info and add to list. */
1072 1.70.2.2 nathanw if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT))
1073 1.70.2.2 nathanw == NULL) {
1074 1.54 eeh splx(s);
1075 1.54 eeh continue;
1076 1.54 eeh }
1077 1.70.2.3 nathanw memset(li, 0, sizeof(*li));
1078 1.54 eeh li->lun = lun;
1079 1.54 eeh
1080 1.54 eeh LIST_INSERT_HEAD(&ti->luns, li, link);
1081 1.54 eeh if (lun < NCR_NLUN)
1082 1.54 eeh ti->lun[lun] = li;
1083 1.54 eeh }
1084 1.54 eeh li->last_used = time.tv_sec;
1085 1.57 pk if (tag == 0) {
1086 1.54 eeh /* Try to issue this as an un-tagged command */
1087 1.57 pk if (li->untagged == NULL)
1088 1.54 eeh li->untagged = ecb;
1089 1.54 eeh }
1090 1.57 pk if (li->untagged != NULL) {
1091 1.54 eeh tag = 0;
1092 1.57 pk if ((li->busy != 1) && li->used == 0) {
1093 1.54 eeh /* We need to issue this untagged command now */
1094 1.54 eeh ecb = li->untagged;
1095 1.70.2.2 nathanw periph = ecb->xs->xs_periph;
1096 1.70.2.2 nathanw } else {
1097 1.54 eeh /* Not ready yet */
1098 1.54 eeh splx(s);
1099 1.54 eeh continue;
1100 1.54 eeh }
1101 1.54 eeh }
1102 1.54 eeh ecb->tag[0] = tag;
1103 1.57 pk if (tag != 0) {
1104 1.70.2.2 nathanw li->queued[ecb->xs->xs_tag_id] = ecb;
1105 1.70.2.2 nathanw ecb->tag[1] = ecb->xs->xs_tag_id;
1106 1.70.2.2 nathanw li->used++;
1107 1.54 eeh }
1108 1.54 eeh splx(s);
1109 1.57 pk if (li->untagged != NULL && (li->busy != 1)) {
1110 1.54 eeh li->busy = 1;
1111 1.1 thorpej TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1112 1.54 eeh ecb->flags &= ~ECB_READY;
1113 1.54 eeh sc->sc_nexus = ecb;
1114 1.54 eeh ncr53c9x_select(sc, ecb);
1115 1.54 eeh break;
1116 1.54 eeh }
1117 1.57 pk if (li->untagged == NULL && tag != 0) {
1118 1.54 eeh TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1119 1.54 eeh ecb->flags &= ~ECB_READY;
1120 1.1 thorpej sc->sc_nexus = ecb;
1121 1.1 thorpej ncr53c9x_select(sc, ecb);
1122 1.1 thorpej break;
1123 1.1 thorpej } else
1124 1.1 thorpej NCR_MISC(("%d:%d busy\n",
1125 1.70.2.2 nathanw periph->periph_target,
1126 1.70.2.2 nathanw periph->periph_lun));
1127 1.1 thorpej }
1128 1.1 thorpej }
1129 1.1 thorpej
1130 1.1 thorpej void
1131 1.1 thorpej ncr53c9x_sense(sc, ecb)
1132 1.1 thorpej struct ncr53c9x_softc *sc;
1133 1.1 thorpej struct ncr53c9x_ecb *ecb;
1134 1.1 thorpej {
1135 1.18 bouyer struct scsipi_xfer *xs = ecb->xs;
1136 1.70.2.2 nathanw struct scsipi_periph *periph = xs->xs_periph;
1137 1.70.2.2 nathanw struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1138 1.18 bouyer struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1139 1.54 eeh struct ncr53c9x_linfo *li;
1140 1.70.2.2 nathanw int lun = periph->periph_lun;
1141 1.1 thorpej
1142 1.1 thorpej NCR_MISC(("requesting sense "));
1143 1.1 thorpej /* Next, setup a request sense command block */
1144 1.70.2.3 nathanw memset(ss, 0, sizeof(*ss));
1145 1.1 thorpej ss->opcode = REQUEST_SENSE;
1146 1.70.2.2 nathanw ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1147 1.18 bouyer ss->length = sizeof(struct scsipi_sense_data);
1148 1.1 thorpej ecb->clen = sizeof(*ss);
1149 1.18 bouyer ecb->daddr = (char *)&xs->sense.scsi_sense;
1150 1.18 bouyer ecb->dleft = sizeof(struct scsipi_sense_data);
1151 1.1 thorpej ecb->flags |= ECB_SENSE;
1152 1.7 gwr ecb->timeout = NCR_SENSE_TIMEOUT;
1153 1.1 thorpej ti->senses++;
1154 1.54 eeh li = TINFO_LUN(ti, lun);
1155 1.70.2.2 nathanw if (li->busy)
1156 1.70.2.2 nathanw li->busy = 0;
1157 1.54 eeh ncr53c9x_dequeue(sc, ecb);
1158 1.54 eeh li->untagged = ecb; /* must be executed first to fix C/A */
1159 1.54 eeh li->busy = 2;
1160 1.1 thorpej if (ecb == sc->sc_nexus) {
1161 1.1 thorpej ncr53c9x_select(sc, ecb);
1162 1.1 thorpej } else {
1163 1.1 thorpej TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1164 1.54 eeh ecb->flags |= ECB_READY;
1165 1.1 thorpej if (sc->sc_state == NCR_IDLE)
1166 1.1 thorpej ncr53c9x_sched(sc);
1167 1.1 thorpej }
1168 1.1 thorpej }
1169 1.1 thorpej
1170 1.1 thorpej /*
1171 1.1 thorpej * POST PROCESSING OF SCSI_CMD (usually current)
1172 1.1 thorpej */
1173 1.1 thorpej void
1174 1.1 thorpej ncr53c9x_done(sc, ecb)
1175 1.1 thorpej struct ncr53c9x_softc *sc;
1176 1.1 thorpej struct ncr53c9x_ecb *ecb;
1177 1.1 thorpej {
1178 1.18 bouyer struct scsipi_xfer *xs = ecb->xs;
1179 1.70.2.2 nathanw struct scsipi_periph *periph = xs->xs_periph;
1180 1.70.2.2 nathanw struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1181 1.70.2.2 nathanw int lun = periph->periph_lun;
1182 1.54 eeh struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1183 1.1 thorpej
1184 1.1 thorpej NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1185 1.1 thorpej
1186 1.48 thorpej callout_stop(&ecb->xs->xs_callout);
1187 1.7 gwr
1188 1.1 thorpej /*
1189 1.1 thorpej * Now, if we've come here with no error code, i.e. we've kept the
1190 1.1 thorpej * initial XS_NOERROR, and the status code signals that we should
1191 1.1 thorpej * check sense, we'll need to set up a request sense cmd block and
1192 1.1 thorpej * push the command back into the ready queue *before* any other
1193 1.1 thorpej * commands for this target/lunit, else we lose the sense info.
1194 1.1 thorpej * We don't support chk sense conditions for the request sense cmd.
1195 1.1 thorpej */
1196 1.1 thorpej if (xs->error == XS_NOERROR) {
1197 1.12 pk xs->status = ecb->stat;
1198 1.1 thorpej if ((ecb->flags & ECB_ABORT) != 0) {
1199 1.16 pk xs->error = XS_TIMEOUT;
1200 1.1 thorpej } else if ((ecb->flags & ECB_SENSE) != 0) {
1201 1.1 thorpej xs->error = XS_SENSE;
1202 1.1 thorpej } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1203 1.1 thorpej /* First, save the return values */
1204 1.1 thorpej xs->resid = ecb->dleft;
1205 1.1 thorpej ncr53c9x_sense(sc, ecb);
1206 1.1 thorpej return;
1207 1.1 thorpej } else {
1208 1.1 thorpej xs->resid = ecb->dleft;
1209 1.1 thorpej }
1210 1.70.2.2 nathanw if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY)
1211 1.70.2.2 nathanw xs->error = XS_BUSY;
1212 1.1 thorpej }
1213 1.1 thorpej
1214 1.1 thorpej #ifdef NCR53C9X_DEBUG
1215 1.1 thorpej if (ncr53c9x_debug & NCR_SHOWMISC) {
1216 1.1 thorpej if (xs->resid != 0)
1217 1.1 thorpej printf("resid=%d ", xs->resid);
1218 1.1 thorpej if (xs->error == XS_SENSE)
1219 1.70.2.2 nathanw printf("sense=0x%02x\n",
1220 1.70.2.2 nathanw xs->sense.scsi_sense.error_code);
1221 1.1 thorpej else
1222 1.1 thorpej printf("error=%d\n", xs->error);
1223 1.1 thorpej }
1224 1.1 thorpej #endif
1225 1.1 thorpej
1226 1.1 thorpej /*
1227 1.1 thorpej * Remove the ECB from whatever queue it's on.
1228 1.1 thorpej */
1229 1.54 eeh ncr53c9x_dequeue(sc, ecb);
1230 1.1 thorpej if (ecb == sc->sc_nexus) {
1231 1.1 thorpej sc->sc_nexus = NULL;
1232 1.15 pk if (sc->sc_state != NCR_CLEANING) {
1233 1.15 pk sc->sc_state = NCR_IDLE;
1234 1.15 pk ncr53c9x_sched(sc);
1235 1.15 pk }
1236 1.54 eeh }
1237 1.54 eeh
1238 1.54 eeh if (xs->error == XS_SELTIMEOUT) {
1239 1.54 eeh /* Selection timeout -- discard this LUN if empty */
1240 1.57 pk if (li->untagged == NULL && li->used == 0) {
1241 1.54 eeh if (lun < NCR_NLUN)
1242 1.54 eeh ti->lun[lun] = NULL;
1243 1.54 eeh LIST_REMOVE(li, link);
1244 1.54 eeh free(li, M_DEVBUF);
1245 1.54 eeh }
1246 1.54 eeh }
1247 1.54 eeh
1248 1.70.2.2 nathanw ncr53c9x_free_ecb(sc, ecb);
1249 1.1 thorpej ti->cmds++;
1250 1.18 bouyer scsipi_done(xs);
1251 1.1 thorpej }
1252 1.1 thorpej
1253 1.1 thorpej void
1254 1.1 thorpej ncr53c9x_dequeue(sc, ecb)
1255 1.1 thorpej struct ncr53c9x_softc *sc;
1256 1.1 thorpej struct ncr53c9x_ecb *ecb;
1257 1.1 thorpej {
1258 1.54 eeh struct ncr53c9x_tinfo *ti =
1259 1.70.2.2 nathanw &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1260 1.54 eeh struct ncr53c9x_linfo *li;
1261 1.70.2.2 nathanw int64_t lun = ecb->xs->xs_periph->periph_lun;
1262 1.54 eeh
1263 1.54 eeh li = TINFO_LUN(ti, lun);
1264 1.54 eeh #ifdef DIAGNOSTIC
1265 1.57 pk if (li == NULL || li->lun != lun)
1266 1.54 eeh panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1267 1.56 thorpej (long long) lun, ecb);
1268 1.54 eeh #endif
1269 1.54 eeh if (li->untagged == ecb) {
1270 1.54 eeh li->busy = 0;
1271 1.54 eeh li->untagged = NULL;
1272 1.54 eeh }
1273 1.57 pk if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1274 1.54 eeh #ifdef DIAGNOSTIC
1275 1.57 pk if (li->queued[ecb->tag[1]] != NULL &&
1276 1.57 pk (li->queued[ecb->tag[1]] != ecb))
1277 1.54 eeh panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1278 1.70.2.2 nathanw "instead of ecb %p\n", ecb->tag[1],
1279 1.70.2.2 nathanw (long long) lun,
1280 1.70.2.2 nathanw li->queued[ecb->tag[1]], ecb);
1281 1.54 eeh #endif
1282 1.54 eeh li->queued[ecb->tag[1]] = NULL;
1283 1.70.2.2 nathanw li->used--;
1284 1.70.2.2 nathanw }
1285 1.1 thorpej
1286 1.57 pk if ((ecb->flags & ECB_READY) != 0) {
1287 1.54 eeh ecb->flags &= ~ECB_READY;
1288 1.1 thorpej TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1289 1.1 thorpej }
1290 1.1 thorpej }
1291 1.1 thorpej
1292 1.1 thorpej /*
1293 1.1 thorpej * INTERRUPT/PROTOCOL ENGINE
1294 1.1 thorpej */
1295 1.1 thorpej
1296 1.1 thorpej /*
1297 1.1 thorpej * Schedule an outgoing message by prioritizing it, and asserting
1298 1.1 thorpej * attention on the bus. We can only do this when we are the initiator
1299 1.1 thorpej * else there will be an illegal command interrupt.
1300 1.1 thorpej */
1301 1.1 thorpej #define ncr53c9x_sched_msgout(m) \
1302 1.1 thorpej do { \
1303 1.54 eeh NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1304 1.1 thorpej NCRCMD(sc, NCRCMD_SETATN); \
1305 1.1 thorpej sc->sc_flags |= NCR_ATN; \
1306 1.1 thorpej sc->sc_msgpriq |= (m); \
1307 1.1 thorpej } while (0)
1308 1.1 thorpej
1309 1.70.2.1 nathanw static void
1310 1.70.2.1 nathanw ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1311 1.70.2.1 nathanw {
1312 1.70.2.1 nathanw NCR_MISC(("[flushfifo] "));
1313 1.70.2.1 nathanw
1314 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_FLUSH);
1315 1.70.2.1 nathanw
1316 1.70.2.1 nathanw if (sc->sc_phase == COMMAND_PHASE ||
1317 1.70.2.1 nathanw sc->sc_phase == MESSAGE_OUT_PHASE)
1318 1.70.2.1 nathanw DELAY(2);
1319 1.70.2.1 nathanw }
1320 1.70.2.1 nathanw
1321 1.70.2.1 nathanw static int
1322 1.70.2.1 nathanw ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1323 1.70.2.1 nathanw {
1324 1.70.2.1 nathanw int i, n;
1325 1.70.2.1 nathanw u_char *buf;
1326 1.70.2.1 nathanw
1327 1.70.2.1 nathanw switch(how) {
1328 1.70.2.1 nathanw case NCR_RDFIFO_START:
1329 1.70.2.1 nathanw buf = sc->sc_imess;
1330 1.70.2.1 nathanw sc->sc_imlen = 0;
1331 1.70.2.1 nathanw break;
1332 1.70.2.1 nathanw case NCR_RDFIFO_CONTINUE:
1333 1.70.2.1 nathanw buf = sc->sc_imess + sc->sc_imlen;
1334 1.70.2.1 nathanw break;
1335 1.70.2.1 nathanw default:
1336 1.70.2.1 nathanw panic("ncr53c9x_rdfifo: bad flag\n");
1337 1.70.2.1 nathanw break;
1338 1.70.2.1 nathanw }
1339 1.70.2.1 nathanw
1340 1.70.2.1 nathanw /*
1341 1.70.2.1 nathanw * XXX buffer (sc_imess) size for message
1342 1.70.2.1 nathanw */
1343 1.70.2.1 nathanw
1344 1.70.2.1 nathanw n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1345 1.70.2.1 nathanw
1346 1.70.2.1 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366) {
1347 1.70.2.1 nathanw n *= 2;
1348 1.70.2.1 nathanw
1349 1.70.2.1 nathanw for (i = 0; i < n; i++)
1350 1.70.2.1 nathanw buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1351 1.70.2.1 nathanw
1352 1.70.2.2 nathanw if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) {
1353 1.70.2.1 nathanw
1354 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_FIFO, 0);
1355 1.70.2.1 nathanw buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1356 1.70.2.1 nathanw
1357 1.70.2.1 nathanw NCR_READ_REG(sc, NCR_FIFO);
1358 1.70.2.1 nathanw
1359 1.70.2.1 nathanw ncr53c9x_flushfifo(sc);
1360 1.70.2.1 nathanw }
1361 1.70.2.1 nathanw } else {
1362 1.70.2.1 nathanw for (i = 0; i < n; i++)
1363 1.70.2.1 nathanw buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1364 1.70.2.1 nathanw }
1365 1.70.2.1 nathanw
1366 1.70.2.1 nathanw sc->sc_imlen += i;
1367 1.70.2.1 nathanw
1368 1.70.2.1 nathanw #ifdef NCR53C9X_DEBUG
1369 1.70.2.1 nathanw {
1370 1.70.2.1 nathanw int j;
1371 1.70.2.1 nathanw
1372 1.70.2.1 nathanw NCR_TRACE(("\n[rdfifo %s (%d):",
1373 1.70.2.1 nathanw (how == NCR_RDFIFO_START) ? "start" : "cont",
1374 1.70.2.1 nathanw (int)sc->sc_imlen));
1375 1.70.2.1 nathanw if (ncr53c9x_debug & NCR_SHOWTRAC) {
1376 1.70.2.1 nathanw for (j = 0; j < sc->sc_imlen; j++)
1377 1.70.2.1 nathanw printf(" %02x", sc->sc_imess[j]);
1378 1.70.2.1 nathanw printf("]\n");
1379 1.70.2.1 nathanw }
1380 1.70.2.1 nathanw }
1381 1.70.2.1 nathanw #endif
1382 1.70.2.1 nathanw return sc->sc_imlen;
1383 1.70.2.1 nathanw }
1384 1.70.2.1 nathanw
1385 1.70.2.1 nathanw static void
1386 1.70.2.1 nathanw ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1387 1.70.2.1 nathanw {
1388 1.70.2.1 nathanw int i;
1389 1.70.2.1 nathanw
1390 1.70.2.1 nathanw #ifdef NCR53C9X_DEBUG
1391 1.70.2.1 nathanw NCR_MISC(("[wrfifo(%d):", len));
1392 1.70.2.1 nathanw if (ncr53c9x_debug & NCR_SHOWTRAC) {
1393 1.70.2.1 nathanw for (i = 0; i < len; i++)
1394 1.70.2.1 nathanw printf(" %02x", p[i]);
1395 1.70.2.1 nathanw printf("]\n");
1396 1.70.2.1 nathanw }
1397 1.70.2.1 nathanw #endif
1398 1.70.2.1 nathanw
1399 1.70.2.1 nathanw for (i = 0; i < len; i++) {
1400 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1401 1.70.2.1 nathanw
1402 1.70.2.1 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366)
1403 1.70.2.1 nathanw NCR_WRITE_REG(sc, NCR_FIFO, 0);
1404 1.70.2.1 nathanw }
1405 1.70.2.1 nathanw }
1406 1.70.2.1 nathanw
1407 1.1 thorpej int
1408 1.54 eeh ncr53c9x_reselect(sc, message, tagtype, tagid)
1409 1.1 thorpej struct ncr53c9x_softc *sc;
1410 1.1 thorpej int message;
1411 1.54 eeh int tagtype, tagid;
1412 1.1 thorpej {
1413 1.1 thorpej u_char selid, target, lun;
1414 1.54 eeh struct ncr53c9x_ecb *ecb = NULL;
1415 1.1 thorpej struct ncr53c9x_tinfo *ti;
1416 1.54 eeh struct ncr53c9x_linfo *li;
1417 1.1 thorpej
1418 1.70.2.1 nathanw
1419 1.70.2.1 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366) {
1420 1.70.2.1 nathanw target = sc->sc_selid;
1421 1.70.2.1 nathanw } else {
1422 1.70.2.1 nathanw /*
1423 1.70.2.2 nathanw * The SCSI chip made a snapshot of the data bus
1424 1.70.2.2 nathanw * while the reselection was being negotiated.
1425 1.70.2.2 nathanw * This enables us to determine which target did
1426 1.70.2.1 nathanw * the reselect.
1427 1.70.2.1 nathanw */
1428 1.70.2.1 nathanw selid = sc->sc_selid & ~(1 << sc->sc_id);
1429 1.70.2.1 nathanw if (selid & (selid - 1)) {
1430 1.70.2.1 nathanw printf("%s: reselect with invalid selid %02x;"
1431 1.70.2.2 nathanw " sending DEVICE RESET\n",
1432 1.70.2.2 nathanw sc->sc_dev.dv_xname, selid);
1433 1.70.2.1 nathanw goto reset;
1434 1.70.2.1 nathanw }
1435 1.70.2.1 nathanw
1436 1.70.2.1 nathanw target = ffs(selid) - 1;
1437 1.1 thorpej }
1438 1.70.2.1 nathanw lun = message & 0x07;
1439 1.1 thorpej
1440 1.1 thorpej /*
1441 1.1 thorpej * Search wait queue for disconnected cmd
1442 1.1 thorpej * The list should be short, so I haven't bothered with
1443 1.1 thorpej * any more sophisticated structures than a simple
1444 1.1 thorpej * singly linked list.
1445 1.1 thorpej */
1446 1.54 eeh ti = &sc->sc_tinfo[target];
1447 1.54 eeh li = TINFO_LUN(ti, lun);
1448 1.54 eeh
1449 1.54 eeh /*
1450 1.54 eeh * We can get as far as the LUN with the IDENTIFY
1451 1.70.2.2 nathanw * message. Check to see if we're running an
1452 1.54 eeh * un-tagged command. Otherwise ack the IDENTIFY
1453 1.54 eeh * and wait for a tag message.
1454 1.54 eeh */
1455 1.57 pk if (li != NULL) {
1456 1.57 pk if (li->untagged != NULL && li->busy)
1457 1.57 pk ecb = li->untagged;
1458 1.54 eeh else if (tagtype != MSG_SIMPLE_Q_TAG) {
1459 1.54 eeh /* Wait for tag to come by */
1460 1.54 eeh sc->sc_state = NCR_IDENTIFIED;
1461 1.54 eeh return (0);
1462 1.57 pk } else if (tagtype)
1463 1.57 pk ecb = li->queued[tagid];
1464 1.1 thorpej }
1465 1.1 thorpej if (ecb == NULL) {
1466 1.70.2.2 nathanw printf("%s: reselect from target %d lun %d tag %x:%x "
1467 1.70.2.2 nathanw "with no nexus; sending ABORT\n",
1468 1.70.2.2 nathanw sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1469 1.1 thorpej goto abort;
1470 1.1 thorpej }
1471 1.1 thorpej
1472 1.1 thorpej /* Make this nexus active again. */
1473 1.1 thorpej sc->sc_state = NCR_CONNECTED;
1474 1.1 thorpej sc->sc_nexus = ecb;
1475 1.1 thorpej ncr53c9x_setsync(sc, ti);
1476 1.1 thorpej
1477 1.1 thorpej if (ecb->flags & ECB_RESET)
1478 1.1 thorpej ncr53c9x_sched_msgout(SEND_DEV_RESET);
1479 1.1 thorpej else if (ecb->flags & ECB_ABORT)
1480 1.1 thorpej ncr53c9x_sched_msgout(SEND_ABORT);
1481 1.1 thorpej
1482 1.1 thorpej /* Do an implicit RESTORE POINTERS. */
1483 1.1 thorpej sc->sc_dp = ecb->daddr;
1484 1.1 thorpej sc->sc_dleft = ecb->dleft;
1485 1.1 thorpej
1486 1.1 thorpej return (0);
1487 1.1 thorpej
1488 1.1 thorpej reset:
1489 1.1 thorpej ncr53c9x_sched_msgout(SEND_DEV_RESET);
1490 1.1 thorpej return (1);
1491 1.1 thorpej
1492 1.1 thorpej abort:
1493 1.1 thorpej ncr53c9x_sched_msgout(SEND_ABORT);
1494 1.1 thorpej return (1);
1495 1.1 thorpej }
1496 1.1 thorpej
1497 1.70.2.1 nathanw static inline int
1498 1.70.2.1 nathanw __verify_msg_format(u_char *p, int len)
1499 1.70.2.1 nathanw {
1500 1.70.2.1 nathanw
1501 1.70.2.4 nathanw if (len == 1 && MSG_IS1BYTE(p[0]))
1502 1.70.2.1 nathanw return 1;
1503 1.70.2.4 nathanw if (len == 2 && MSG_IS2BYTE(p[0]))
1504 1.70.2.1 nathanw return 1;
1505 1.70.2.4 nathanw if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
1506 1.70.2.1 nathanw len == p[1] + 2)
1507 1.70.2.1 nathanw return 1;
1508 1.70.2.1 nathanw
1509 1.70.2.1 nathanw return 0;
1510 1.70.2.1 nathanw }
1511 1.70.2.1 nathanw
1512 1.1 thorpej /*
1513 1.1 thorpej * Get an incoming message as initiator.
1514 1.1 thorpej *
1515 1.1 thorpej * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1516 1.1 thorpej * byte in the FIFO
1517 1.1 thorpej */
1518 1.1 thorpej void
1519 1.1 thorpej ncr53c9x_msgin(sc)
1520 1.49 tsutsui struct ncr53c9x_softc *sc;
1521 1.1 thorpej {
1522 1.1 thorpej
1523 1.70.2.1 nathanw NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1524 1.1 thorpej
1525 1.70.2.1 nathanw if (sc->sc_imlen == 0) {
1526 1.70.2.2 nathanw printf("%s: msgin: no msg byte available\n",
1527 1.70.2.2 nathanw sc->sc_dev.dv_xname);
1528 1.1 thorpej return;
1529 1.1 thorpej }
1530 1.1 thorpej
1531 1.1 thorpej /*
1532 1.1 thorpej * Prepare for a new message. A message should (according
1533 1.1 thorpej * to the SCSI standard) be transmitted in one single
1534 1.1 thorpej * MESSAGE_IN_PHASE. If we have been in some other phase,
1535 1.1 thorpej * then this is a new message.
1536 1.1 thorpej */
1537 1.70.2.2 nathanw if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1538 1.70.2.2 nathanw sc->sc_state != NCR_RESELECTED) {
1539 1.70.2.2 nathanw printf("%s: phase change, dropping message, "
1540 1.70.2.2 nathanw "prev %d, state %d\n",
1541 1.70.2.1 nathanw sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1542 1.1 thorpej sc->sc_flags &= ~NCR_DROP_MSGI;
1543 1.1 thorpej sc->sc_imlen = 0;
1544 1.1 thorpej }
1545 1.1 thorpej
1546 1.70.2.1 nathanw NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1547 1.1 thorpej
1548 1.1 thorpej /*
1549 1.1 thorpej * If we're going to reject the message, don't bother storing
1550 1.1 thorpej * the incoming bytes. But still, we need to ACK them.
1551 1.1 thorpej */
1552 1.57 pk if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1553 1.1 thorpej NCRCMD(sc, NCRCMD_MSGOK);
1554 1.70.2.2 nathanw printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1555 1.1 thorpej return;
1556 1.1 thorpej }
1557 1.1 thorpej
1558 1.1 thorpej if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1559 1.1 thorpej ncr53c9x_sched_msgout(SEND_REJECT);
1560 1.1 thorpej sc->sc_flags |= NCR_DROP_MSGI;
1561 1.1 thorpej } else {
1562 1.70.2.1 nathanw u_char *pb;
1563 1.70.2.2 nathanw int plen;
1564 1.70.2.1 nathanw
1565 1.70.2.1 nathanw switch (sc->sc_state) {
1566 1.1 thorpej /*
1567 1.70.2.1 nathanw * if received message is the first of reselection
1568 1.70.2.1 nathanw * then first byte is selid, and then message
1569 1.1 thorpej */
1570 1.70.2.1 nathanw case NCR_RESELECTED:
1571 1.70.2.1 nathanw pb = sc->sc_imess + 1;
1572 1.70.2.1 nathanw plen = sc->sc_imlen - 1;
1573 1.70.2.1 nathanw break;
1574 1.70.2.1 nathanw default:
1575 1.70.2.1 nathanw pb = sc->sc_imess;
1576 1.70.2.1 nathanw plen = sc->sc_imlen;
1577 1.70.2.1 nathanw break;
1578 1.70.2.1 nathanw }
1579 1.70.2.1 nathanw
1580 1.70.2.1 nathanw if (__verify_msg_format(pb, plen))
1581 1.1 thorpej goto gotit;
1582 1.1 thorpej }
1583 1.70.2.1 nathanw
1584 1.1 thorpej /* Ack what we have so far */
1585 1.1 thorpej NCRCMD(sc, NCRCMD_MSGOK);
1586 1.1 thorpej return;
1587 1.1 thorpej
1588 1.1 thorpej gotit:
1589 1.70.2.1 nathanw NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1590 1.70.2.2 nathanw /* we got complete message, flush the imess, */
1591 1.70.2.2 nathanw /* XXX nobody uses imlen below */
1592 1.70.2.1 nathanw sc->sc_imlen = 0;
1593 1.1 thorpej /*
1594 1.1 thorpej * Now we should have a complete message (1 byte, 2 byte
1595 1.1 thorpej * and moderately long extended messages). We only handle
1596 1.1 thorpej * extended messages which total length is shorter than
1597 1.1 thorpej * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1598 1.1 thorpej */
1599 1.1 thorpej switch (sc->sc_state) {
1600 1.1 thorpej struct ncr53c9x_ecb *ecb;
1601 1.1 thorpej struct ncr53c9x_tinfo *ti;
1602 1.66 briggs struct ncr53c9x_linfo *li;
1603 1.66 briggs int lun;
1604 1.1 thorpej
1605 1.1 thorpej case NCR_CONNECTED:
1606 1.1 thorpej ecb = sc->sc_nexus;
1607 1.70.2.2 nathanw ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1608 1.1 thorpej
1609 1.1 thorpej switch (sc->sc_imess[0]) {
1610 1.1 thorpej case MSG_CMDCOMPLETE:
1611 1.1 thorpej NCR_MSGS(("cmdcomplete "));
1612 1.1 thorpej if (sc->sc_dleft < 0) {
1613 1.70.2.2 nathanw scsipi_printaddr(ecb->xs->xs_periph);
1614 1.30 pk printf("got %ld extra bytes\n",
1615 1.70.2.2 nathanw -(long)sc->sc_dleft);
1616 1.1 thorpej sc->sc_dleft = 0;
1617 1.1 thorpej }
1618 1.70.2.2 nathanw ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1619 1.70.2.2 nathanw 0 : sc->sc_dleft;
1620 1.13 pk if ((ecb->flags & ECB_SENSE) == 0)
1621 1.13 pk ecb->xs->resid = ecb->dleft;
1622 1.1 thorpej sc->sc_state = NCR_CMDCOMPLETE;
1623 1.1 thorpej break;
1624 1.1 thorpej
1625 1.1 thorpej case MSG_MESSAGE_REJECT:
1626 1.23 pk NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1627 1.1 thorpej switch (sc->sc_msgout) {
1628 1.66 briggs case SEND_TAG:
1629 1.66 briggs /*
1630 1.66 briggs * Target does not like tagged queuing.
1631 1.66 briggs * - Flush the command queue
1632 1.66 briggs * - Disable tagged queuing for the target
1633 1.66 briggs * - Dequeue ecb from the queued array.
1634 1.66 briggs */
1635 1.70.2.2 nathanw printf("%s: tagged queuing rejected: "
1636 1.70.2.2 nathanw "target %d\n",
1637 1.70.2.1 nathanw sc->sc_dev.dv_xname,
1638 1.70.2.2 nathanw ecb->xs->xs_periph->periph_target);
1639 1.70.2.1 nathanw
1640 1.66 briggs NCR_MSGS(("(rejected sent tag)"));
1641 1.66 briggs NCRCMD(sc, NCRCMD_FLUSH);
1642 1.66 briggs DELAY(1);
1643 1.70 eeh ti->flags &= ~T_TAG;
1644 1.70.2.2 nathanw lun = ecb->xs->xs_periph->periph_lun;
1645 1.66 briggs li = TINFO_LUN(ti, lun);
1646 1.66 briggs if (ecb->tag[0] &&
1647 1.66 briggs li->queued[ecb->tag[1]] != NULL) {
1648 1.66 briggs li->queued[ecb->tag[1]] = NULL;
1649 1.70.2.2 nathanw li->used--;
1650 1.66 briggs }
1651 1.66 briggs ecb->tag[0] = ecb->tag[1] = 0;
1652 1.66 briggs li->untagged = ecb;
1653 1.66 briggs li->busy = 1;
1654 1.66 briggs break;
1655 1.66 briggs
1656 1.1 thorpej case SEND_SDTR:
1657 1.70.2.2 nathanw printf("%s: sync transfer rejected: "
1658 1.70.2.2 nathanw "target %d\n",
1659 1.70.2.1 nathanw sc->sc_dev.dv_xname,
1660 1.70.2.2 nathanw ecb->xs->xs_periph->periph_target);
1661 1.70.2.1 nathanw
1662 1.1 thorpej sc->sc_flags &= ~NCR_SYNCHNEGO;
1663 1.1 thorpej ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1664 1.1 thorpej ncr53c9x_setsync(sc, ti);
1665 1.70.2.2 nathanw ncr53c9x_update_xfer_mode(sc,
1666 1.70.2.2 nathanw ecb->xs->xs_periph->periph_target);
1667 1.1 thorpej break;
1668 1.66 briggs
1669 1.70.2.1 nathanw case SEND_WDTR:
1670 1.70.2.2 nathanw printf("%s: wide transfer rejected: "
1671 1.70.2.2 nathanw "target %d\n",
1672 1.70.2.1 nathanw sc->sc_dev.dv_xname,
1673 1.70.2.2 nathanw ecb->xs->xs_periph->periph_target);
1674 1.70.2.1 nathanw ti->flags &= ~T_WIDE;
1675 1.70.2.2 nathanw ti->width = 0;
1676 1.70.2.1 nathanw break;
1677 1.70.2.1 nathanw
1678 1.1 thorpej case SEND_INIT_DET_ERR:
1679 1.1 thorpej goto abort;
1680 1.1 thorpej }
1681 1.1 thorpej break;
1682 1.1 thorpej
1683 1.1 thorpej case MSG_NOOP:
1684 1.1 thorpej NCR_MSGS(("noop "));
1685 1.1 thorpej break;
1686 1.1 thorpej
1687 1.54 eeh case MSG_HEAD_OF_Q_TAG:
1688 1.54 eeh case MSG_SIMPLE_Q_TAG:
1689 1.54 eeh case MSG_ORDERED_Q_TAG:
1690 1.70.2.2 nathanw NCR_MSGS(("TAG %x:%x",
1691 1.70.2.2 nathanw sc->sc_imess[0], sc->sc_imess[1]));
1692 1.54 eeh break;
1693 1.54 eeh
1694 1.1 thorpej case MSG_DISCONNECT:
1695 1.1 thorpej NCR_MSGS(("disconnect "));
1696 1.1 thorpej ti->dconns++;
1697 1.1 thorpej sc->sc_state = NCR_DISCONNECT;
1698 1.8 pk
1699 1.13 pk /*
1700 1.13 pk * Mark the fact that all bytes have moved. The
1701 1.13 pk * target may not bother to do a SAVE POINTERS
1702 1.13 pk * at this stage. This flag will set the residual
1703 1.13 pk * count to zero on MSG COMPLETE.
1704 1.13 pk */
1705 1.13 pk if (sc->sc_dleft == 0)
1706 1.13 pk ecb->flags |= ECB_TENTATIVE_DONE;
1707 1.13 pk
1708 1.13 pk break;
1709 1.1 thorpej
1710 1.1 thorpej case MSG_SAVEDATAPOINTER:
1711 1.1 thorpej NCR_MSGS(("save datapointer "));
1712 1.1 thorpej ecb->daddr = sc->sc_dp;
1713 1.1 thorpej ecb->dleft = sc->sc_dleft;
1714 1.1 thorpej break;
1715 1.1 thorpej
1716 1.1 thorpej case MSG_RESTOREPOINTERS:
1717 1.1 thorpej NCR_MSGS(("restore datapointer "));
1718 1.1 thorpej sc->sc_dp = ecb->daddr;
1719 1.1 thorpej sc->sc_dleft = ecb->dleft;
1720 1.1 thorpej break;
1721 1.1 thorpej
1722 1.1 thorpej case MSG_EXTENDED:
1723 1.1 thorpej NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1724 1.1 thorpej switch (sc->sc_imess[2]) {
1725 1.1 thorpej case MSG_EXT_SDTR:
1726 1.1 thorpej NCR_MSGS(("SDTR period %d, offset %d ",
1727 1.70.2.2 nathanw sc->sc_imess[3], sc->sc_imess[4]));
1728 1.1 thorpej if (sc->sc_imess[1] != 3)
1729 1.1 thorpej goto reject;
1730 1.1 thorpej ti->period = sc->sc_imess[3];
1731 1.1 thorpej ti->offset = sc->sc_imess[4];
1732 1.1 thorpej ti->flags &= ~T_NEGOTIATE;
1733 1.1 thorpej if (sc->sc_minsync == 0 ||
1734 1.1 thorpej ti->offset == 0 ||
1735 1.1 thorpej ti->period > 124) {
1736 1.70.2.2 nathanw #if 0
1737 1.29 pk #ifdef NCR53C9X_DEBUG
1738 1.70.2.2 nathanw scsipi_printaddr(ecb->xs->xs_periph);
1739 1.29 pk printf("async mode\n");
1740 1.29 pk #endif
1741 1.70.2.2 nathanw #endif
1742 1.70.2.2 nathanw ti->flags &= ~T_SYNCMODE;
1743 1.57 pk if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1744 1.1 thorpej /*
1745 1.1 thorpej * target initiated negotiation
1746 1.1 thorpej */
1747 1.1 thorpej ti->offset = 0;
1748 1.1 thorpej ncr53c9x_sched_msgout(
1749 1.1 thorpej SEND_SDTR);
1750 1.1 thorpej }
1751 1.1 thorpej } else {
1752 1.70.2.2 nathanw #if 0
1753 1.1 thorpej int r = 250/ti->period;
1754 1.1 thorpej int s = (100*250)/ti->period - 100*r;
1755 1.70.2.2 nathanw #endif
1756 1.1 thorpej int p;
1757 1.1 thorpej
1758 1.1 thorpej p = ncr53c9x_stp2cpb(sc, ti->period);
1759 1.1 thorpej ti->period = ncr53c9x_cpb2stp(sc, p);
1760 1.70.2.2 nathanw #if 0
1761 1.1 thorpej #ifdef NCR53C9X_DEBUG
1762 1.70.2.2 nathanw scsipi_printaddr(ecb->xs->xs_periph);
1763 1.41 matt printf("max sync rate %d.%02dMB/s\n",
1764 1.70.2.2 nathanw r, s);
1765 1.70.2.2 nathanw #endif
1766 1.1 thorpej #endif
1767 1.22 pk if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1768 1.1 thorpej /*
1769 1.1 thorpej * target initiated negotiation
1770 1.1 thorpej */
1771 1.1 thorpej if (ti->period <
1772 1.1 thorpej sc->sc_minsync)
1773 1.1 thorpej ti->period =
1774 1.1 thorpej sc->sc_minsync;
1775 1.1 thorpej if (ti->offset > 15)
1776 1.1 thorpej ti->offset = 15;
1777 1.1 thorpej ti->flags &= ~T_SYNCMODE;
1778 1.1 thorpej ncr53c9x_sched_msgout(
1779 1.1 thorpej SEND_SDTR);
1780 1.1 thorpej } else {
1781 1.1 thorpej /* we are sync */
1782 1.1 thorpej ti->flags |= T_SYNCMODE;
1783 1.1 thorpej }
1784 1.1 thorpej }
1785 1.70.2.2 nathanw ncr53c9x_update_xfer_mode(sc,
1786 1.70.2.2 nathanw ecb->xs->xs_periph->periph_target);
1787 1.1 thorpej sc->sc_flags &= ~NCR_SYNCHNEGO;
1788 1.1 thorpej ncr53c9x_setsync(sc, ti);
1789 1.1 thorpej break;
1790 1.1 thorpej
1791 1.70.2.1 nathanw case MSG_EXT_WDTR:
1792 1.70.2.1 nathanw printf("%s: wide mode %d\n",
1793 1.70.2.1 nathanw sc->sc_dev.dv_xname, sc->sc_imess[3]);
1794 1.70.2.1 nathanw if (sc->sc_imess[3] == 1) {
1795 1.70.2.1 nathanw ti->cfg3 |= NCRFASCFG3_EWIDE;
1796 1.70.2.1 nathanw ncr53c9x_setsync(sc, ti);
1797 1.70.2.2 nathanw } else
1798 1.70.2.2 nathanw ti->width = 0;
1799 1.70.2.1 nathanw ti->flags &= ~T_WIDE;
1800 1.70.2.1 nathanw break;
1801 1.1 thorpej default:
1802 1.70.2.2 nathanw scsipi_printaddr(ecb->xs->xs_periph);
1803 1.30 pk printf("unrecognized MESSAGE EXTENDED;"
1804 1.70.2.2 nathanw " sending REJECT\n");
1805 1.1 thorpej goto reject;
1806 1.1 thorpej }
1807 1.1 thorpej break;
1808 1.1 thorpej
1809 1.1 thorpej default:
1810 1.1 thorpej NCR_MSGS(("ident "));
1811 1.70.2.2 nathanw scsipi_printaddr(ecb->xs->xs_periph);
1812 1.30 pk printf("unrecognized MESSAGE; sending REJECT\n");
1813 1.1 thorpej reject:
1814 1.1 thorpej ncr53c9x_sched_msgout(SEND_REJECT);
1815 1.1 thorpej break;
1816 1.1 thorpej }
1817 1.1 thorpej break;
1818 1.1 thorpej
1819 1.54 eeh case NCR_IDENTIFIED:
1820 1.70.2.1 nathanw /*
1821 1.70.2.1 nathanw * IDENTIFY message was received and queue tag is expected now
1822 1.70.2.1 nathanw */
1823 1.70.2.1 nathanw if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1824 1.70.2.1 nathanw (sc->sc_msgify == 0)) {
1825 1.70.2.1 nathanw printf("%s: TAG reselect without IDENTIFY;"
1826 1.70.2.1 nathanw " MSG %x;"
1827 1.70.2.1 nathanw " sending DEVICE RESET\n",
1828 1.70.2.1 nathanw sc->sc_dev.dv_xname,
1829 1.70.2.1 nathanw sc->sc_imess[0]);
1830 1.70.2.1 nathanw goto reset;
1831 1.70.2.1 nathanw }
1832 1.70.2.1 nathanw (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1833 1.70.2.1 nathanw sc->sc_imess[0], sc->sc_imess[1]);
1834 1.70.2.1 nathanw break;
1835 1.70.2.1 nathanw
1836 1.70.2.1 nathanw case NCR_RESELECTED:
1837 1.70.2.1 nathanw if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1838 1.70.2.1 nathanw sc->sc_msgify = sc->sc_imess[1];
1839 1.54 eeh } else {
1840 1.31 pk printf("%s: reselect without IDENTIFY;"
1841 1.70.2.2 nathanw " MSG %x;"
1842 1.70.2.2 nathanw " sending DEVICE RESET\n",
1843 1.70.2.2 nathanw sc->sc_dev.dv_xname,
1844 1.70.2.2 nathanw sc->sc_imess[1]);
1845 1.1 thorpej goto reset;
1846 1.1 thorpej }
1847 1.70.2.1 nathanw (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1848 1.1 thorpej break;
1849 1.1 thorpej
1850 1.1 thorpej default:
1851 1.31 pk printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1852 1.70.2.2 nathanw sc->sc_dev.dv_xname);
1853 1.1 thorpej reset:
1854 1.1 thorpej ncr53c9x_sched_msgout(SEND_DEV_RESET);
1855 1.1 thorpej break;
1856 1.1 thorpej
1857 1.1 thorpej abort:
1858 1.1 thorpej ncr53c9x_sched_msgout(SEND_ABORT);
1859 1.1 thorpej break;
1860 1.1 thorpej }
1861 1.1 thorpej
1862 1.68 eeh /* if we have more messages to send set ATN */
1863 1.70.2.1 nathanw if (sc->sc_msgpriq)
1864 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_SETATN);
1865 1.68 eeh
1866 1.1 thorpej /* Ack last message byte */
1867 1.1 thorpej NCRCMD(sc, NCRCMD_MSGOK);
1868 1.1 thorpej
1869 1.1 thorpej /* Done, reset message pointer. */
1870 1.1 thorpej sc->sc_flags &= ~NCR_DROP_MSGI;
1871 1.1 thorpej sc->sc_imlen = 0;
1872 1.1 thorpej }
1873 1.1 thorpej
1874 1.1 thorpej
1875 1.1 thorpej /*
1876 1.1 thorpej * Send the highest priority, scheduled message
1877 1.1 thorpej */
1878 1.1 thorpej void
1879 1.1 thorpej ncr53c9x_msgout(sc)
1880 1.49 tsutsui struct ncr53c9x_softc *sc;
1881 1.1 thorpej {
1882 1.1 thorpej struct ncr53c9x_tinfo *ti;
1883 1.1 thorpej struct ncr53c9x_ecb *ecb;
1884 1.1 thorpej size_t size;
1885 1.1 thorpej
1886 1.1 thorpej NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1887 1.1 thorpej sc->sc_msgpriq, sc->sc_prevphase));
1888 1.1 thorpej
1889 1.22 pk /*
1890 1.22 pk * XXX - the NCR_ATN flag is not in sync with the actual ATN
1891 1.22 pk * condition on the SCSI bus. The 53c9x chip
1892 1.22 pk * automatically turns off ATN before sending the
1893 1.22 pk * message byte. (see also the comment below in the
1894 1.22 pk * default case when picking out a message to send)
1895 1.22 pk */
1896 1.1 thorpej if (sc->sc_flags & NCR_ATN) {
1897 1.1 thorpej if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1898 1.1 thorpej new:
1899 1.1 thorpej NCRCMD(sc, NCRCMD_FLUSH);
1900 1.68 eeh /* DELAY(1); */
1901 1.1 thorpej sc->sc_msgoutq = 0;
1902 1.1 thorpej sc->sc_omlen = 0;
1903 1.1 thorpej }
1904 1.1 thorpej } else {
1905 1.1 thorpej if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1906 1.1 thorpej ncr53c9x_sched_msgout(sc->sc_msgoutq);
1907 1.1 thorpej goto new;
1908 1.1 thorpej } else {
1909 1.1 thorpej printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1910 1.1 thorpej sc->sc_dev.dv_xname, __LINE__);
1911 1.1 thorpej }
1912 1.1 thorpej }
1913 1.70.2.2 nathanw
1914 1.1 thorpej if (sc->sc_omlen == 0) {
1915 1.1 thorpej /* Pick up highest priority message */
1916 1.1 thorpej sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1917 1.1 thorpej sc->sc_msgoutq |= sc->sc_msgout;
1918 1.1 thorpej sc->sc_msgpriq &= ~sc->sc_msgout;
1919 1.1 thorpej sc->sc_omlen = 1; /* "Default" message len */
1920 1.1 thorpej switch (sc->sc_msgout) {
1921 1.1 thorpej case SEND_SDTR:
1922 1.1 thorpej ecb = sc->sc_nexus;
1923 1.70.2.2 nathanw ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1924 1.1 thorpej sc->sc_omess[0] = MSG_EXTENDED;
1925 1.70.2.2 nathanw sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1926 1.1 thorpej sc->sc_omess[2] = MSG_EXT_SDTR;
1927 1.1 thorpej sc->sc_omess[3] = ti->period;
1928 1.1 thorpej sc->sc_omess[4] = ti->offset;
1929 1.1 thorpej sc->sc_omlen = 5;
1930 1.1 thorpej if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1931 1.1 thorpej ti->flags |= T_SYNCMODE;
1932 1.1 thorpej ncr53c9x_setsync(sc, ti);
1933 1.1 thorpej }
1934 1.1 thorpej break;
1935 1.70.2.1 nathanw case SEND_WDTR:
1936 1.70.2.1 nathanw ecb = sc->sc_nexus;
1937 1.70.2.2 nathanw ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1938 1.70.2.1 nathanw sc->sc_omess[0] = MSG_EXTENDED;
1939 1.70.2.2 nathanw sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1940 1.70.2.1 nathanw sc->sc_omess[2] = MSG_EXT_WDTR;
1941 1.70.2.1 nathanw sc->sc_omess[3] = ti->width;
1942 1.70.2.1 nathanw sc->sc_omlen = 4;
1943 1.70.2.1 nathanw break;
1944 1.54 eeh case SEND_IDENTIFY:
1945 1.54 eeh if (sc->sc_state != NCR_CONNECTED) {
1946 1.54 eeh printf("%s at line %d: no nexus\n",
1947 1.54 eeh sc->sc_dev.dv_xname, __LINE__);
1948 1.54 eeh }
1949 1.54 eeh ecb = sc->sc_nexus;
1950 1.54 eeh sc->sc_omess[0] =
1951 1.70.2.2 nathanw MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1952 1.54 eeh break;
1953 1.54 eeh case SEND_TAG:
1954 1.1 thorpej if (sc->sc_state != NCR_CONNECTED) {
1955 1.1 thorpej printf("%s at line %d: no nexus\n",
1956 1.1 thorpej sc->sc_dev.dv_xname, __LINE__);
1957 1.1 thorpej }
1958 1.1 thorpej ecb = sc->sc_nexus;
1959 1.54 eeh sc->sc_omess[0] = ecb->tag[0];
1960 1.54 eeh sc->sc_omess[1] = ecb->tag[1];
1961 1.54 eeh sc->sc_omlen = 2;
1962 1.1 thorpej break;
1963 1.1 thorpej case SEND_DEV_RESET:
1964 1.1 thorpej sc->sc_flags |= NCR_ABORTING;
1965 1.1 thorpej sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1966 1.1 thorpej ecb = sc->sc_nexus;
1967 1.70.2.2 nathanw ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1968 1.1 thorpej ti->flags &= ~T_SYNCMODE;
1969 1.70.2.2 nathanw ncr53c9x_update_xfer_mode(sc,
1970 1.70.2.2 nathanw ecb->xs->xs_periph->periph_target);
1971 1.53 pk if ((ti->flags & T_SYNCHOFF) == 0)
1972 1.53 pk /* We can re-start sync negotiation */
1973 1.53 pk ti->flags |= T_NEGOTIATE;
1974 1.1 thorpej break;
1975 1.1 thorpej case SEND_PARITY_ERROR:
1976 1.1 thorpej sc->sc_omess[0] = MSG_PARITY_ERROR;
1977 1.1 thorpej break;
1978 1.1 thorpej case SEND_ABORT:
1979 1.1 thorpej sc->sc_flags |= NCR_ABORTING;
1980 1.1 thorpej sc->sc_omess[0] = MSG_ABORT;
1981 1.1 thorpej break;
1982 1.1 thorpej case SEND_INIT_DET_ERR:
1983 1.1 thorpej sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1984 1.1 thorpej break;
1985 1.1 thorpej case SEND_REJECT:
1986 1.1 thorpej sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1987 1.1 thorpej break;
1988 1.1 thorpej default:
1989 1.22 pk /*
1990 1.22 pk * We normally do not get here, since the chip
1991 1.22 pk * automatically turns off ATN before the last
1992 1.22 pk * byte of a message is sent to the target.
1993 1.22 pk * However, if the target rejects our (multi-byte)
1994 1.22 pk * message early by switching to MSG IN phase
1995 1.22 pk * ATN remains on, so the target may return to
1996 1.22 pk * MSG OUT phase. If there are no scheduled messages
1997 1.22 pk * left we send a NO-OP.
1998 1.22 pk *
1999 1.22 pk * XXX - Note that this leaves no useful purpose for
2000 1.22 pk * the NCR_ATN flag.
2001 1.22 pk */
2002 1.1 thorpej sc->sc_flags &= ~NCR_ATN;
2003 1.1 thorpej sc->sc_omess[0] = MSG_NOOP;
2004 1.1 thorpej break;
2005 1.1 thorpej }
2006 1.1 thorpej sc->sc_omp = sc->sc_omess;
2007 1.1 thorpej }
2008 1.1 thorpej
2009 1.54 eeh #ifdef DEBUG
2010 1.54 eeh {
2011 1.54 eeh int i;
2012 1.54 eeh
2013 1.70.2.1 nathanw NCR_MISC(("<msgout:"));
2014 1.57 pk for (i = 0; i < sc->sc_omlen; i++)
2015 1.70.2.1 nathanw NCR_MISC((" %02x", sc->sc_omess[i]));
2016 1.70.2.1 nathanw NCR_MISC(("> "));
2017 1.54 eeh }
2018 1.54 eeh #endif
2019 1.70.2.1 nathanw if (sc->sc_rev == NCR_VARIANT_FAS366) {
2020 1.70.2.1 nathanw /*
2021 1.70.2.1 nathanw * XXX fifo size
2022 1.70.2.1 nathanw */
2023 1.70.2.1 nathanw ncr53c9x_flushfifo(sc);
2024 1.70.2.1 nathanw ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2025 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_TRANS);
2026 1.70.2.1 nathanw } else {
2027 1.70.2.1 nathanw /* (re)send the message */
2028 1.70.2.1 nathanw size = min(sc->sc_omlen, sc->sc_maxxfer);
2029 1.70.2.1 nathanw NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2030 1.70.2.1 nathanw /* Program the SCSI counter */
2031 1.70.2.1 nathanw NCR_SET_COUNT(sc, size);
2032 1.70.2.1 nathanw
2033 1.70.2.1 nathanw /* Load the count in and start the message-out transfer */
2034 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2035 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2036 1.70.2.1 nathanw NCRDMA_GO(sc);
2037 1.70.2.1 nathanw }
2038 1.1 thorpej }
2039 1.1 thorpej
2040 1.1 thorpej /*
2041 1.1 thorpej * This is the most critical part of the driver, and has to know
2042 1.1 thorpej * how to deal with *all* error conditions and phases from the SCSI
2043 1.1 thorpej * bus. If there are no errors and the DMA was active, then call the
2044 1.1 thorpej * DMA pseudo-interrupt handler. If this returns 1, then that was it
2045 1.1 thorpej * and we can return from here without further processing.
2046 1.1 thorpej *
2047 1.1 thorpej * Most of this needs verifying.
2048 1.1 thorpej */
2049 1.1 thorpej int
2050 1.42 mycroft ncr53c9x_intr(arg)
2051 1.42 mycroft void *arg;
2052 1.1 thorpej {
2053 1.49 tsutsui struct ncr53c9x_softc *sc = arg;
2054 1.49 tsutsui struct ncr53c9x_ecb *ecb;
2055 1.70.2.2 nathanw struct scsipi_periph *periph;
2056 1.1 thorpej struct ncr53c9x_tinfo *ti;
2057 1.1 thorpej size_t size;
2058 1.5 pk int nfifo;
2059 1.1 thorpej
2060 1.70.2.1 nathanw NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2061 1.1 thorpej
2062 1.25 pk if (!NCRDMA_ISINTR(sc))
2063 1.25 pk return (0);
2064 1.25 pk
2065 1.25 pk again:
2066 1.25 pk /* and what do the registers say... */
2067 1.25 pk ncr53c9x_readregs(sc);
2068 1.25 pk
2069 1.25 pk sc->sc_intrcnt.ev_count++;
2070 1.25 pk
2071 1.1 thorpej /*
2072 1.25 pk * At the moment, only a SCSI Bus Reset or Illegal
2073 1.25 pk * Command are classed as errors. A disconnect is a
2074 1.25 pk * valid condition, and we let the code check is the
2075 1.25 pk * "NCR_BUSFREE_OK" flag was set before declaring it
2076 1.25 pk * and error.
2077 1.1 thorpej *
2078 1.25 pk * Also, the status register tells us about "Gross
2079 1.25 pk * Errors" and "Parity errors". Only the Gross Error
2080 1.25 pk * is really bad, and the parity errors are dealt
2081 1.25 pk * with later
2082 1.1 thorpej *
2083 1.25 pk * TODO
2084 1.25 pk * If there are too many parity error, go to slow
2085 1.25 pk * cable mode ?
2086 1.1 thorpej */
2087 1.25 pk
2088 1.25 pk /* SCSI Reset */
2089 1.57 pk if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2090 1.57 pk if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2091 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2092 1.25 pk DELAY(1);
2093 1.25 pk }
2094 1.25 pk if (sc->sc_state != NCR_SBR) {
2095 1.70.2.2 nathanw printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2096 1.25 pk ncr53c9x_init(sc, 0); /* Restart everything */
2097 1.25 pk return (1);
2098 1.25 pk }
2099 1.1 thorpej #if 0
2100 1.25 pk /*XXX*/ printf("<expected bus reset: "
2101 1.70.2.2 nathanw "[intr %x, stat %x, step %d]>\n",
2102 1.70.2.2 nathanw sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2103 1.1 thorpej #endif
2104 1.57 pk if (sc->sc_nexus != NULL)
2105 1.25 pk panic("%s: nexus in reset state",
2106 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2107 1.25 pk goto sched;
2108 1.25 pk }
2109 1.1 thorpej
2110 1.25 pk ecb = sc->sc_nexus;
2111 1.1 thorpej
2112 1.25 pk #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2113 1.25 pk if (sc->sc_espintr & NCRINTR_ERR ||
2114 1.25 pk sc->sc_espstat & NCRSTAT_GE) {
2115 1.1 thorpej
2116 1.57 pk if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2117 1.25 pk /* Gross Error; no target ? */
2118 1.1 thorpej if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2119 1.1 thorpej NCRCMD(sc, NCRCMD_FLUSH);
2120 1.1 thorpej DELAY(1);
2121 1.1 thorpej }
2122 1.25 pk if (sc->sc_state == NCR_CONNECTED ||
2123 1.25 pk sc->sc_state == NCR_SELECTING) {
2124 1.25 pk ecb->xs->error = XS_TIMEOUT;
2125 1.25 pk ncr53c9x_done(sc, ecb);
2126 1.1 thorpej }
2127 1.25 pk return (1);
2128 1.1 thorpej }
2129 1.1 thorpej
2130 1.57 pk if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2131 1.57 pk if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2132 1.25 pk /*
2133 1.25 pk * Eat away "Illegal command" interrupt
2134 1.25 pk * on a ESP100 caused by a re-selection
2135 1.25 pk * while we were trying to select
2136 1.25 pk * another target.
2137 1.25 pk */
2138 1.19 pk #ifdef DEBUG
2139 1.25 pk printf("%s: ESP100 work-around activated\n",
2140 1.25 pk sc->sc_dev.dv_xname);
2141 1.19 pk #endif
2142 1.25 pk sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2143 1.25 pk return (1);
2144 1.25 pk }
2145 1.25 pk /* illegal command, out of sync ? */
2146 1.25 pk printf("%s: illegal command: 0x%x "
2147 1.25 pk "(state %d, phase %x, prevphase %x)\n",
2148 1.70.2.2 nathanw sc->sc_dev.dv_xname, sc->sc_lastcmd,
2149 1.70.2.2 nathanw sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2150 1.25 pk if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2151 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2152 1.25 pk DELAY(1);
2153 1.1 thorpej }
2154 1.25 pk ncr53c9x_init(sc, 1); /* Restart everything */
2155 1.25 pk return (1);
2156 1.1 thorpej }
2157 1.25 pk }
2158 1.25 pk sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2159 1.1 thorpej
2160 1.25 pk /*
2161 1.25 pk * Call if DMA is active.
2162 1.25 pk *
2163 1.25 pk * If DMA_INTR returns true, then maybe go 'round the loop
2164 1.25 pk * again in case there is no more DMA queued, but a phase
2165 1.25 pk * change is expected.
2166 1.25 pk */
2167 1.25 pk if (NCRDMA_ISACTIVE(sc)) {
2168 1.25 pk int r = NCRDMA_INTR(sc);
2169 1.25 pk if (r == -1) {
2170 1.25 pk printf("%s: DMA error; resetting\n",
2171 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2172 1.25 pk ncr53c9x_init(sc, 1);
2173 1.25 pk }
2174 1.25 pk /* If DMA active here, then go back to work... */
2175 1.25 pk if (NCRDMA_ISACTIVE(sc))
2176 1.25 pk return (1);
2177 1.1 thorpej
2178 1.25 pk if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2179 1.25 pk /*
2180 1.25 pk * DMA not completed. If we can not find a
2181 1.25 pk * acceptable explanation, print a diagnostic.
2182 1.25 pk */
2183 1.25 pk if (sc->sc_state == NCR_SELECTING)
2184 1.25 pk /*
2185 1.25 pk * This can happen if we are reselected
2186 1.25 pk * while using DMA to select a target.
2187 1.25 pk */
2188 1.25 pk /*void*/;
2189 1.25 pk else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2190 1.25 pk /*
2191 1.25 pk * Our (multi-byte) message (eg SDTR) was
2192 1.25 pk * interrupted by the target to send
2193 1.25 pk * a MSG REJECT.
2194 1.25 pk * Print diagnostic if current phase
2195 1.25 pk * is not MESSAGE IN.
2196 1.25 pk */
2197 1.25 pk if (sc->sc_phase != MESSAGE_IN_PHASE)
2198 1.70.2.2 nathanw printf("%s: !TC on MSG OUT"
2199 1.70.2.2 nathanw " [intr %x, stat %x, step %d]"
2200 1.70.2.2 nathanw " prevphase %x, resid %lx\n",
2201 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2202 1.70.2.2 nathanw sc->sc_espintr,
2203 1.70.2.2 nathanw sc->sc_espstat,
2204 1.70.2.2 nathanw sc->sc_espstep,
2205 1.70.2.2 nathanw sc->sc_prevphase,
2206 1.70.2.2 nathanw (u_long)sc->sc_omlen);
2207 1.25 pk } else if (sc->sc_dleft == 0) {
2208 1.22 pk /*
2209 1.25 pk * The DMA operation was started for
2210 1.25 pk * a DATA transfer. Print a diagnostic
2211 1.25 pk * if the DMA counter and TC bit
2212 1.25 pk * appear to be out of sync.
2213 1.22 pk */
2214 1.25 pk printf("%s: !TC on DATA XFER"
2215 1.70.2.2 nathanw " [intr %x, stat %x, step %d]"
2216 1.70.2.2 nathanw " prevphase %x, resid %x\n",
2217 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2218 1.70.2.2 nathanw sc->sc_espintr,
2219 1.70.2.2 nathanw sc->sc_espstat,
2220 1.70.2.2 nathanw sc->sc_espstep,
2221 1.70.2.2 nathanw sc->sc_prevphase,
2222 1.70.2.2 nathanw ecb ? ecb->dleft : -1);
2223 1.22 pk }
2224 1.1 thorpej }
2225 1.25 pk }
2226 1.25 pk
2227 1.25 pk /*
2228 1.25 pk * Check for less serious errors.
2229 1.25 pk */
2230 1.57 pk if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2231 1.25 pk printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2232 1.25 pk if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2233 1.25 pk ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2234 1.25 pk else
2235 1.25 pk ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2236 1.25 pk }
2237 1.1 thorpej
2238 1.57 pk if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2239 1.54 eeh sc->sc_msgify = 0;
2240 1.25 pk NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2241 1.70.2.2 nathanw sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2242 1.25 pk if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2243 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2244 1.68 eeh /* DELAY(1); */
2245 1.1 thorpej }
2246 1.1 thorpej /*
2247 1.25 pk * This command must (apparently) be issued within
2248 1.25 pk * 250mS of a disconnect. So here you are...
2249 1.1 thorpej */
2250 1.25 pk NCRCMD(sc, NCRCMD_ENSEL);
2251 1.1 thorpej
2252 1.25 pk switch (sc->sc_state) {
2253 1.25 pk case NCR_RESELECTED:
2254 1.25 pk goto sched;
2255 1.22 pk
2256 1.70.2.2 nathanw case NCR_SELECTING:
2257 1.54 eeh {
2258 1.54 eeh struct ncr53c9x_linfo *li;
2259 1.54 eeh
2260 1.25 pk ecb->xs->error = XS_SELTIMEOUT;
2261 1.54 eeh
2262 1.54 eeh /* Selection timeout -- discard all LUNs if empty */
2263 1.70.2.2 nathanw periph = ecb->xs->xs_periph;
2264 1.70.2.2 nathanw ti = &sc->sc_tinfo[periph->periph_target];
2265 1.57 pk li = LIST_FIRST(&ti->luns);
2266 1.57 pk while (li != NULL) {
2267 1.57 pk if (li->untagged == NULL && li->used == 0) {
2268 1.54 eeh if (li->lun < NCR_NLUN)
2269 1.54 eeh ti->lun[li->lun] = NULL;
2270 1.54 eeh LIST_REMOVE(li, link);
2271 1.54 eeh free(li, M_DEVBUF);
2272 1.70.2.2 nathanw /*
2273 1.70.2.2 nathanw * Restart the search at the beginning
2274 1.70.2.2 nathanw */
2275 1.57 pk li = LIST_FIRST(&ti->luns);
2276 1.54 eeh continue;
2277 1.54 eeh }
2278 1.57 pk li = LIST_NEXT(li, link);
2279 1.54 eeh }
2280 1.25 pk goto finish;
2281 1.54 eeh }
2282 1.25 pk case NCR_CONNECTED:
2283 1.57 pk if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2284 1.1 thorpej #ifdef NCR53C9X_DEBUG
2285 1.57 pk if (ecb != NULL)
2286 1.70.2.2 nathanw scsipi_printaddr(ecb->xs->xs_periph);
2287 1.25 pk printf("sync nego not completed!\n");
2288 1.1 thorpej #endif
2289 1.70.2.2 nathanw ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2290 1.25 pk sc->sc_flags &= ~NCR_SYNCHNEGO;
2291 1.25 pk ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2292 1.25 pk }
2293 1.1 thorpej
2294 1.25 pk /* it may be OK to disconnect */
2295 1.25 pk if ((sc->sc_flags & NCR_ABORTING) == 0) {
2296 1.70.2.2 nathanw /*
2297 1.25 pk * Section 5.1.1 of the SCSI 2 spec
2298 1.25 pk * suggests issuing a REQUEST SENSE
2299 1.25 pk * following an unexpected disconnect.
2300 1.25 pk * Some devices go into a contingent
2301 1.25 pk * allegiance condition when
2302 1.25 pk * disconnecting, and this is necessary
2303 1.25 pk * to clean up their state.
2304 1.70.2.2 nathanw */
2305 1.25 pk printf("%s: unexpected disconnect; ",
2306 1.25 pk sc->sc_dev.dv_xname);
2307 1.57 pk if ((ecb->flags & ECB_SENSE) != 0) {
2308 1.25 pk printf("resetting\n");
2309 1.25 pk goto reset;
2310 1.1 thorpej }
2311 1.25 pk printf("sending REQUEST SENSE\n");
2312 1.48 thorpej callout_stop(&ecb->xs->xs_callout);
2313 1.25 pk ncr53c9x_sense(sc, ecb);
2314 1.25 pk goto out;
2315 1.25 pk }
2316 1.1 thorpej
2317 1.25 pk ecb->xs->error = XS_TIMEOUT;
2318 1.25 pk goto finish;
2319 1.1 thorpej
2320 1.25 pk case NCR_DISCONNECT:
2321 1.25 pk sc->sc_nexus = NULL;
2322 1.25 pk goto sched;
2323 1.1 thorpej
2324 1.25 pk case NCR_CMDCOMPLETE:
2325 1.25 pk goto finish;
2326 1.1 thorpej }
2327 1.25 pk }
2328 1.1 thorpej
2329 1.25 pk switch (sc->sc_state) {
2330 1.25 pk
2331 1.25 pk case NCR_SBR:
2332 1.25 pk printf("%s: waiting for SCSI Bus Reset to happen\n",
2333 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2334 1.25 pk return (1);
2335 1.1 thorpej
2336 1.25 pk case NCR_RESELECTED:
2337 1.25 pk /*
2338 1.25 pk * we must be continuing a message ?
2339 1.25 pk */
2340 1.25 pk if (sc->sc_phase != MESSAGE_IN_PHASE) {
2341 1.25 pk printf("%s: target didn't identify\n",
2342 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2343 1.25 pk ncr53c9x_init(sc, 1);
2344 1.25 pk return (1);
2345 1.25 pk }
2346 1.25 pk printf("<<RESELECT CONT'd>>");
2347 1.25 pk #if XXXX
2348 1.25 pk ncr53c9x_msgin(sc);
2349 1.25 pk if (sc->sc_state != NCR_CONNECTED) {
2350 1.25 pk /* IDENTIFY fail?! */
2351 1.25 pk printf("%s: identify failed\n",
2352 1.70.2.2 nathanw sc->sc_dev.dv_xname, sc->sc_state);
2353 1.25 pk ncr53c9x_init(sc, 1);
2354 1.25 pk return (1);
2355 1.25 pk }
2356 1.25 pk #endif
2357 1.25 pk break;
2358 1.25 pk
2359 1.54 eeh case NCR_IDENTIFIED:
2360 1.54 eeh ecb = sc->sc_nexus;
2361 1.54 eeh if (sc->sc_phase != MESSAGE_IN_PHASE) {
2362 1.70.2.2 nathanw int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2363 1.54 eeh /*
2364 1.54 eeh * Things are seriously fucked up.
2365 1.54 eeh * Pull the brakes, i.e. reset
2366 1.54 eeh */
2367 1.54 eeh printf("%s: target didn't send tag: %d bytes in fifo\n",
2368 1.70.2.2 nathanw sc->sc_dev.dv_xname, i);
2369 1.54 eeh /* Drain and display fifo */
2370 1.54 eeh while (i-- > 0)
2371 1.54 eeh printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2372 1.70.2.2 nathanw
2373 1.54 eeh ncr53c9x_init(sc, 1);
2374 1.54 eeh return (1);
2375 1.70.2.2 nathanw } else
2376 1.54 eeh goto msgin;
2377 1.54 eeh
2378 1.54 eeh break;
2379 1.57 pk
2380 1.25 pk case NCR_IDLE:
2381 1.25 pk case NCR_SELECTING:
2382 1.25 pk ecb = sc->sc_nexus;
2383 1.25 pk if (sc->sc_espintr & NCRINTR_RESEL) {
2384 1.66 briggs sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2385 1.66 briggs sc->sc_flags = 0;
2386 1.1 thorpej /*
2387 1.25 pk * If we're trying to select a
2388 1.25 pk * target ourselves, push our command
2389 1.25 pk * back into the ready list.
2390 1.1 thorpej */
2391 1.25 pk if (sc->sc_state == NCR_SELECTING) {
2392 1.25 pk NCR_MISC(("backoff selector "));
2393 1.48 thorpej callout_stop(&ecb->xs->xs_callout);
2394 1.54 eeh ncr53c9x_dequeue(sc, ecb);
2395 1.25 pk TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2396 1.54 eeh ecb->flags |= ECB_READY;
2397 1.25 pk ecb = sc->sc_nexus = NULL;
2398 1.25 pk }
2399 1.25 pk sc->sc_state = NCR_RESELECTED;
2400 1.1 thorpej if (sc->sc_phase != MESSAGE_IN_PHASE) {
2401 1.25 pk /*
2402 1.25 pk * Things are seriously fucked up.
2403 1.25 pk * Pull the brakes, i.e. reset
2404 1.25 pk */
2405 1.1 thorpej printf("%s: target didn't identify\n",
2406 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2407 1.1 thorpej ncr53c9x_init(sc, 1);
2408 1.25 pk return (1);
2409 1.1 thorpej }
2410 1.25 pk /*
2411 1.25 pk * The C90 only inhibits FIFO writes until
2412 1.25 pk * reselection is complete, instead of
2413 1.25 pk * waiting until the interrupt status register
2414 1.25 pk * has been read. So, if the reselect happens
2415 1.25 pk * while we were entering a command bytes (for
2416 1.25 pk * another target) some of those bytes can
2417 1.25 pk * appear in the FIFO here, after the
2418 1.25 pk * interrupt is taken.
2419 1.25 pk */
2420 1.70.2.1 nathanw nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2421 1.70.2.1 nathanw
2422 1.25 pk if (nfifo < 2 ||
2423 1.70.2.2 nathanw (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) {
2424 1.25 pk printf("%s: RESELECT: %d bytes in FIFO! "
2425 1.70.2.2 nathanw "[intr %x, stat %x, step %d, "
2426 1.70.2.2 nathanw "prevphase %x]\n",
2427 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2428 1.70.2.2 nathanw nfifo,
2429 1.70.2.2 nathanw sc->sc_espintr,
2430 1.70.2.2 nathanw sc->sc_espstat,
2431 1.70.2.2 nathanw sc->sc_espstep,
2432 1.70.2.2 nathanw sc->sc_prevphase);
2433 1.25 pk ncr53c9x_init(sc, 1);
2434 1.25 pk return (1);
2435 1.25 pk }
2436 1.70.2.1 nathanw sc->sc_selid = sc->sc_imess[0];
2437 1.70.2.1 nathanw NCR_MISC(("selid=%02x ", sc->sc_selid));
2438 1.25 pk
2439 1.25 pk /* Handle identify message */
2440 1.1 thorpej ncr53c9x_msgin(sc);
2441 1.25 pk if (nfifo != 2) {
2442 1.25 pk /*
2443 1.25 pk * Note: this should not happen
2444 1.25 pk * with `dmaselect' on.
2445 1.25 pk */
2446 1.25 pk sc->sc_flags |= NCR_EXPECT_ILLCMD;
2447 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2448 1.70.2.1 nathanw } else if (sc->sc_features & NCR_F_DMASELECT &&
2449 1.70.2.2 nathanw sc->sc_rev == NCR_VARIANT_ESP100) {
2450 1.25 pk sc->sc_flags |= NCR_EXPECT_ILLCMD;
2451 1.25 pk }
2452 1.25 pk
2453 1.54 eeh if (sc->sc_state != NCR_CONNECTED &&
2454 1.54 eeh sc->sc_state != NCR_IDENTIFIED) {
2455 1.1 thorpej /* IDENTIFY fail?! */
2456 1.70.2.2 nathanw printf("%s: identify failed, "
2457 1.70.2.2 nathanw "state %d, intr %02x\n",
2458 1.70.2.1 nathanw sc->sc_dev.dv_xname, sc->sc_state,
2459 1.70.2.1 nathanw sc->sc_espintr);
2460 1.1 thorpej ncr53c9x_init(sc, 1);
2461 1.25 pk return (1);
2462 1.1 thorpej }
2463 1.25 pk goto shortcut; /* ie. next phase expected soon */
2464 1.25 pk }
2465 1.1 thorpej
2466 1.25 pk #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2467 1.25 pk if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2468 1.25 pk /*
2469 1.25 pk * Arbitration won; examine the `step' register
2470 1.25 pk * to determine how far the selection could progress.
2471 1.25 pk */
2472 1.7 gwr ecb = sc->sc_nexus;
2473 1.57 pk if (ecb == NULL)
2474 1.30 pk panic("ncr53c9x: no nexus");
2475 1.25 pk
2476 1.70.2.2 nathanw periph = ecb->xs->xs_periph;
2477 1.70.2.2 nathanw ti = &sc->sc_tinfo[periph->periph_target];
2478 1.1 thorpej
2479 1.25 pk switch (sc->sc_espstep) {
2480 1.25 pk case 0:
2481 1.1 thorpej /*
2482 1.25 pk * The target did not respond with a
2483 1.25 pk * message out phase - probably an old
2484 1.25 pk * device that doesn't recognize ATN.
2485 1.25 pk * Clear ATN and just continue, the
2486 1.25 pk * target should be in the command
2487 1.25 pk * phase.
2488 1.25 pk * XXXX check for command phase?
2489 1.1 thorpej */
2490 1.25 pk NCRCMD(sc, NCRCMD_RSTATN);
2491 1.25 pk break;
2492 1.25 pk case 1:
2493 1.70.2.2 nathanw if ((ti->flags & T_NEGOTIATE) == 0 &&
2494 1.63 eeh ecb->tag[0] == 0) {
2495 1.25 pk printf("%s: step 1 & !NEG\n",
2496 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2497 1.25 pk goto reset;
2498 1.1 thorpej }
2499 1.25 pk if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2500 1.25 pk printf("%s: !MSGOUT\n",
2501 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2502 1.25 pk goto reset;
2503 1.1 thorpej }
2504 1.70.2.1 nathanw if (ti->flags & T_WIDE) {
2505 1.70.2.1 nathanw ncr53c9x_sched_msgout(SEND_WDTR);
2506 1.70.2.1 nathanw }
2507 1.63 eeh if (ti->flags & T_NEGOTIATE) {
2508 1.63 eeh /* Start negotiating */
2509 1.63 eeh ti->period = sc->sc_minsync;
2510 1.63 eeh ti->offset = 15;
2511 1.63 eeh sc->sc_flags |= NCR_SYNCHNEGO;
2512 1.63 eeh if (ecb->tag[0])
2513 1.70.2.2 nathanw ncr53c9x_sched_msgout(
2514 1.70.2.2 nathanw SEND_TAG|SEND_SDTR);
2515 1.63 eeh else
2516 1.70.2.2 nathanw ncr53c9x_sched_msgout(
2517 1.70.2.2 nathanw SEND_SDTR);
2518 1.63 eeh } else {
2519 1.63 eeh /* Could not do ATN3 so send TAG */
2520 1.63 eeh ncr53c9x_sched_msgout(SEND_TAG);
2521 1.63 eeh }
2522 1.54 eeh sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2523 1.25 pk break;
2524 1.25 pk case 3:
2525 1.5 pk /*
2526 1.25 pk * Grr, this is supposed to mean
2527 1.25 pk * "target left command phase prematurely".
2528 1.25 pk * It seems to happen regularly when
2529 1.25 pk * sync mode is on.
2530 1.25 pk * Look at FIFO to see if command went out.
2531 1.25 pk * (Timing problems?)
2532 1.5 pk */
2533 1.70.2.1 nathanw if (sc->sc_features & NCR_F_DMASELECT) {
2534 1.25 pk if (sc->sc_cmdlen == 0)
2535 1.8 pk /* Hope for the best.. */
2536 1.8 pk break;
2537 1.25 pk } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2538 1.70.2.2 nathanw & NCRFIFO_FF) == 0) {
2539 1.25 pk /* Hope for the best.. */
2540 1.1 thorpej break;
2541 1.1 thorpej }
2542 1.25 pk printf("(%s:%d:%d): selection failed;"
2543 1.70.2.2 nathanw " %d left in FIFO "
2544 1.70.2.2 nathanw "[intr %x, stat %x, step %d]\n",
2545 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2546 1.70.2.2 nathanw periph->periph_target,
2547 1.70.2.2 nathanw periph->periph_lun,
2548 1.70.2.2 nathanw NCR_READ_REG(sc, NCR_FFLAG)
2549 1.70.2.2 nathanw & NCRFIFO_FF,
2550 1.70.2.2 nathanw sc->sc_espintr, sc->sc_espstat,
2551 1.70.2.2 nathanw sc->sc_espstep);
2552 1.1 thorpej NCRCMD(sc, NCRCMD_FLUSH);
2553 1.25 pk ncr53c9x_sched_msgout(SEND_ABORT);
2554 1.25 pk return (1);
2555 1.25 pk case 2:
2556 1.25 pk /* Select stuck at Command Phase */
2557 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2558 1.37 mycroft break;
2559 1.25 pk case 4:
2560 1.70.2.1 nathanw if (sc->sc_features & NCR_F_DMASELECT &&
2561 1.25 pk sc->sc_cmdlen != 0)
2562 1.25 pk printf("(%s:%d:%d): select; "
2563 1.70.2.2 nathanw "%lu left in DMA buffer "
2564 1.70.2.2 nathanw "[intr %x, stat %x, step %d]\n",
2565 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2566 1.70.2.2 nathanw periph->periph_target,
2567 1.70.2.2 nathanw periph->periph_lun,
2568 1.70.2.2 nathanw (u_long)sc->sc_cmdlen,
2569 1.70.2.2 nathanw sc->sc_espintr,
2570 1.70.2.2 nathanw sc->sc_espstat,
2571 1.70.2.2 nathanw sc->sc_espstep);
2572 1.25 pk /* So far, everything went fine */
2573 1.25 pk break;
2574 1.1 thorpej }
2575 1.25 pk
2576 1.25 pk sc->sc_prevphase = INVALID_PHASE; /* ?? */
2577 1.25 pk /* Do an implicit RESTORE POINTERS. */
2578 1.25 pk sc->sc_dp = ecb->daddr;
2579 1.25 pk sc->sc_dleft = ecb->dleft;
2580 1.25 pk sc->sc_state = NCR_CONNECTED;
2581 1.1 thorpej break;
2582 1.1 thorpej
2583 1.25 pk } else {
2584 1.1 thorpej
2585 1.25 pk printf("%s: unexpected status after select"
2586 1.70.2.2 nathanw ": [intr %x, stat %x, step %x]\n",
2587 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2588 1.70.2.2 nathanw sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2589 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2590 1.25 pk DELAY(1);
2591 1.25 pk goto reset;
2592 1.1 thorpej }
2593 1.25 pk if (sc->sc_state == NCR_IDLE) {
2594 1.57 pk printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2595 1.57 pk return (0);
2596 1.1 thorpej }
2597 1.25 pk break;
2598 1.1 thorpej
2599 1.25 pk case NCR_CONNECTED:
2600 1.57 pk if ((sc->sc_flags & NCR_ICCS) != 0) {
2601 1.25 pk /* "Initiate Command Complete Steps" in progress */
2602 1.25 pk u_char msg;
2603 1.25 pk
2604 1.25 pk sc->sc_flags &= ~NCR_ICCS;
2605 1.25 pk
2606 1.25 pk if (!(sc->sc_espintr & NCRINTR_DONE)) {
2607 1.25 pk printf("%s: ICCS: "
2608 1.70.2.2 nathanw ": [intr %x, stat %x, step %x]\n",
2609 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2610 1.70.2.2 nathanw sc->sc_espintr, sc->sc_espstat,
2611 1.70.2.2 nathanw sc->sc_espstep);
2612 1.1 thorpej }
2613 1.70.2.1 nathanw ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2614 1.70.2.1 nathanw if (sc->sc_imlen < 2)
2615 1.70.2.1 nathanw printf("%s: can't get status, only %d bytes\n",
2616 1.70.2.2 nathanw sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2617 1.70.2.1 nathanw ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2618 1.70.2.1 nathanw msg = sc->sc_imess[sc->sc_imlen - 1];
2619 1.25 pk NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2620 1.25 pk if (msg == MSG_CMDCOMPLETE) {
2621 1.25 pk ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2622 1.70.2.2 nathanw ? 0 : sc->sc_dleft;
2623 1.25 pk if ((ecb->flags & ECB_SENSE) == 0)
2624 1.25 pk ecb->xs->resid = ecb->dleft;
2625 1.25 pk sc->sc_state = NCR_CMDCOMPLETE;
2626 1.25 pk } else
2627 1.25 pk printf("%s: STATUS_PHASE: msg %d\n",
2628 1.70.2.2 nathanw sc->sc_dev.dv_xname, msg);
2629 1.70.2.1 nathanw sc->sc_imlen = 0;
2630 1.25 pk NCRCMD(sc, NCRCMD_MSGOK);
2631 1.25 pk goto shortcut; /* ie. wait for disconnect */
2632 1.25 pk }
2633 1.25 pk break;
2634 1.57 pk
2635 1.25 pk default:
2636 1.70.2.1 nathanw /* Don't panic: reset. */
2637 1.70.2.3 nathanw printf("%s: invalid state: %d\n",
2638 1.70.2.2 nathanw sc->sc_dev.dv_xname, sc->sc_state);
2639 1.70.2.1 nathanw ncr53c9x_scsi_reset(sc);
2640 1.70.2.1 nathanw goto out;
2641 1.25 pk }
2642 1.8 pk
2643 1.25 pk /*
2644 1.25 pk * Driver is now in state NCR_CONNECTED, i.e. we
2645 1.25 pk * have a current command working the SCSI bus.
2646 1.25 pk */
2647 1.25 pk if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2648 1.30 pk panic("ncr53c9x: no nexus");
2649 1.25 pk }
2650 1.22 pk
2651 1.25 pk switch (sc->sc_phase) {
2652 1.25 pk case MESSAGE_OUT_PHASE:
2653 1.25 pk NCR_PHASE(("MESSAGE_OUT_PHASE "));
2654 1.25 pk ncr53c9x_msgout(sc);
2655 1.25 pk sc->sc_prevphase = MESSAGE_OUT_PHASE;
2656 1.25 pk break;
2657 1.57 pk
2658 1.25 pk case MESSAGE_IN_PHASE:
2659 1.54 eeh msgin:
2660 1.25 pk NCR_PHASE(("MESSAGE_IN_PHASE "));
2661 1.57 pk if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2662 1.70.2.1 nathanw if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2663 1.70.2.2 nathanw !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
2664 1.70.2.1 nathanw NCRCMD(sc, NCRCMD_FLUSH);
2665 1.70.2.1 nathanw }
2666 1.25 pk sc->sc_flags |= NCR_WAITI;
2667 1.25 pk NCRCMD(sc, NCRCMD_TRANS);
2668 1.57 pk } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2669 1.25 pk if ((sc->sc_flags & NCR_WAITI) == 0) {
2670 1.25 pk printf("%s: MSGIN: unexpected FC bit: "
2671 1.70.2.2 nathanw "[intr %x, stat %x, step %x]\n",
2672 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2673 1.70.2.2 nathanw sc->sc_espintr, sc->sc_espstat,
2674 1.70.2.2 nathanw sc->sc_espstep);
2675 1.8 pk }
2676 1.25 pk sc->sc_flags &= ~NCR_WAITI;
2677 1.70.2.1 nathanw ncr53c9x_rdfifo(sc,
2678 1.70.2.1 nathanw (sc->sc_prevphase == sc->sc_phase) ?
2679 1.70.2.1 nathanw NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2680 1.25 pk ncr53c9x_msgin(sc);
2681 1.25 pk } else {
2682 1.25 pk printf("%s: MSGIN: weird bits: "
2683 1.70.2.2 nathanw "[intr %x, stat %x, step %x]\n",
2684 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2685 1.70.2.2 nathanw sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2686 1.25 pk }
2687 1.70.2.1 nathanw sc->sc_prevphase = MESSAGE_IN_PHASE;
2688 1.25 pk goto shortcut; /* i.e. expect data to be ready */
2689 1.25 pk break;
2690 1.57 pk
2691 1.25 pk case COMMAND_PHASE:
2692 1.25 pk /*
2693 1.25 pk * Send the command block. Normally we don't see this
2694 1.25 pk * phase because the SEL_ATN command takes care of
2695 1.25 pk * all this. However, we end up here if either the
2696 1.25 pk * target or we wanted to exchange some more messages
2697 1.25 pk * first (e.g. to start negotiations).
2698 1.25 pk */
2699 1.25 pk
2700 1.25 pk NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2701 1.70.2.2 nathanw ecb->cmd.cmd.opcode, ecb->clen));
2702 1.25 pk if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2703 1.1 thorpej NCRCMD(sc, NCRCMD_FLUSH);
2704 1.68 eeh /* DELAY(1);*/
2705 1.25 pk }
2706 1.70.2.1 nathanw if (sc->sc_features & NCR_F_DMASELECT) {
2707 1.25 pk size_t size;
2708 1.25 pk /* setup DMA transfer for command */
2709 1.25 pk size = ecb->clen;
2710 1.25 pk sc->sc_cmdlen = size;
2711 1.25 pk sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2712 1.25 pk NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2713 1.70.2.2 nathanw 0, &size);
2714 1.1 thorpej /* Program the SCSI counter */
2715 1.70.2.1 nathanw NCR_SET_COUNT(sc, size);
2716 1.25 pk
2717 1.1 thorpej /* load the count in */
2718 1.1 thorpej NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2719 1.1 thorpej
2720 1.25 pk /* start the command transfer */
2721 1.25 pk NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2722 1.1 thorpej NCRDMA_GO(sc);
2723 1.25 pk } else {
2724 1.70.2.1 nathanw ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2725 1.25 pk NCRCMD(sc, NCRCMD_TRANS);
2726 1.25 pk }
2727 1.25 pk sc->sc_prevphase = COMMAND_PHASE;
2728 1.25 pk break;
2729 1.57 pk
2730 1.25 pk case DATA_OUT_PHASE:
2731 1.25 pk NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2732 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2733 1.25 pk size = min(sc->sc_dleft, sc->sc_maxxfer);
2734 1.70.2.2 nathanw NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2735 1.25 pk sc->sc_prevphase = DATA_OUT_PHASE;
2736 1.25 pk goto setup_xfer;
2737 1.57 pk
2738 1.25 pk case DATA_IN_PHASE:
2739 1.25 pk NCR_PHASE(("DATA_IN_PHASE "));
2740 1.25 pk if (sc->sc_rev == NCR_VARIANT_ESP100)
2741 1.25 pk NCRCMD(sc, NCRCMD_FLUSH);
2742 1.25 pk size = min(sc->sc_dleft, sc->sc_maxxfer);
2743 1.70.2.2 nathanw NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2744 1.25 pk sc->sc_prevphase = DATA_IN_PHASE;
2745 1.25 pk setup_xfer:
2746 1.25 pk /* Target returned to data phase: wipe "done" memory */
2747 1.25 pk ecb->flags &= ~ECB_TENTATIVE_DONE;
2748 1.25 pk
2749 1.25 pk /* Program the SCSI counter */
2750 1.70.2.1 nathanw NCR_SET_COUNT(sc, size);
2751 1.70.2.1 nathanw
2752 1.25 pk /* load the count in */
2753 1.25 pk NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2754 1.25 pk
2755 1.25 pk /*
2756 1.25 pk * Note that if `size' is 0, we've already transceived
2757 1.25 pk * all the bytes we want but we're still in DATA PHASE.
2758 1.25 pk * Apparently, the device needs padding. Also, a
2759 1.25 pk * transfer size of 0 means "maximum" to the chip
2760 1.25 pk * DMA logic.
2761 1.25 pk */
2762 1.25 pk NCRCMD(sc,
2763 1.70.2.2 nathanw (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2764 1.25 pk NCRDMA_GO(sc);
2765 1.25 pk return (1);
2766 1.57 pk
2767 1.25 pk case STATUS_PHASE:
2768 1.25 pk NCR_PHASE(("STATUS_PHASE "));
2769 1.25 pk sc->sc_flags |= NCR_ICCS;
2770 1.25 pk NCRCMD(sc, NCRCMD_ICCS);
2771 1.25 pk sc->sc_prevphase = STATUS_PHASE;
2772 1.25 pk goto shortcut; /* i.e. expect status results soon */
2773 1.25 pk break;
2774 1.57 pk
2775 1.25 pk case INVALID_PHASE:
2776 1.25 pk break;
2777 1.57 pk
2778 1.25 pk default:
2779 1.25 pk printf("%s: unexpected bus phase; resetting\n",
2780 1.70.2.2 nathanw sc->sc_dev.dv_xname);
2781 1.25 pk goto reset;
2782 1.1 thorpej }
2783 1.25 pk
2784 1.25 pk out:
2785 1.25 pk return (1);
2786 1.1 thorpej
2787 1.1 thorpej reset:
2788 1.1 thorpej ncr53c9x_init(sc, 1);
2789 1.25 pk goto out;
2790 1.1 thorpej
2791 1.1 thorpej finish:
2792 1.1 thorpej ncr53c9x_done(sc, ecb);
2793 1.1 thorpej goto out;
2794 1.1 thorpej
2795 1.1 thorpej sched:
2796 1.1 thorpej sc->sc_state = NCR_IDLE;
2797 1.1 thorpej ncr53c9x_sched(sc);
2798 1.1 thorpej goto out;
2799 1.1 thorpej
2800 1.25 pk shortcut:
2801 1.25 pk /*
2802 1.25 pk * The idea is that many of the SCSI operations take very little
2803 1.25 pk * time, and going away and getting interrupted is too high an
2804 1.25 pk * overhead to pay. For example, selecting, sending a message
2805 1.25 pk * and command and then doing some work can be done in one "pass".
2806 1.25 pk *
2807 1.70.2.2 nathanw * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2808 1.70.2.2 nathanw * at 40MHz. This needs testing.
2809 1.25 pk */
2810 1.70.2.2 nathanw {
2811 1.68 eeh struct timeval wait, cur;
2812 1.68 eeh
2813 1.68 eeh microtime(&wait);
2814 1.70.2.2 nathanw wait.tv_usec += 50 / sc->sc_freq;
2815 1.68 eeh if (wait.tv_usec > 1000000) {
2816 1.68 eeh wait.tv_sec++;
2817 1.68 eeh wait.tv_usec -= 1000000;
2818 1.68 eeh }
2819 1.68 eeh do {
2820 1.68 eeh if (NCRDMA_ISINTR(sc))
2821 1.68 eeh goto again;
2822 1.68 eeh microtime(&cur);
2823 1.70.2.2 nathanw } while (cur.tv_sec <= wait.tv_sec &&
2824 1.68 eeh cur.tv_usec <= wait.tv_usec);
2825 1.68 eeh }
2826 1.25 pk goto out;
2827 1.1 thorpej }
2828 1.1 thorpej
2829 1.1 thorpej void
2830 1.1 thorpej ncr53c9x_abort(sc, ecb)
2831 1.1 thorpej struct ncr53c9x_softc *sc;
2832 1.1 thorpej struct ncr53c9x_ecb *ecb;
2833 1.1 thorpej {
2834 1.1 thorpej
2835 1.1 thorpej /* 2 secs for the abort */
2836 1.1 thorpej ecb->timeout = NCR_ABORT_TIMEOUT;
2837 1.1 thorpej ecb->flags |= ECB_ABORT;
2838 1.1 thorpej
2839 1.1 thorpej if (ecb == sc->sc_nexus) {
2840 1.52 nisimura int timeout;
2841 1.52 nisimura
2842 1.1 thorpej /*
2843 1.1 thorpej * If we're still selecting, the message will be scheduled
2844 1.1 thorpej * after selection is complete.
2845 1.1 thorpej */
2846 1.1 thorpej if (sc->sc_state == NCR_CONNECTED)
2847 1.1 thorpej ncr53c9x_sched_msgout(SEND_ABORT);
2848 1.1 thorpej
2849 1.1 thorpej /*
2850 1.48 thorpej * Reschedule timeout.
2851 1.1 thorpej */
2852 1.52 nisimura timeout = ecb->timeout;
2853 1.70.2.3 nathanw if (timeout > 1000000)
2854 1.52 nisimura timeout = (timeout / 1000) * hz;
2855 1.52 nisimura else
2856 1.52 nisimura timeout = (timeout * hz) / 1000;
2857 1.52 nisimura callout_reset(&ecb->xs->xs_callout, timeout,
2858 1.48 thorpej ncr53c9x_timeout, ecb);
2859 1.1 thorpej } else {
2860 1.23 pk /*
2861 1.54 eeh * Just leave the command where it is.
2862 1.23 pk * XXX - what choice do we have but to reset the SCSI
2863 1.23 pk * eventually?
2864 1.23 pk */
2865 1.1 thorpej if (sc->sc_state == NCR_IDLE)
2866 1.1 thorpej ncr53c9x_sched(sc);
2867 1.1 thorpej }
2868 1.1 thorpej }
2869 1.1 thorpej
2870 1.1 thorpej void
2871 1.1 thorpej ncr53c9x_timeout(arg)
2872 1.1 thorpej void *arg;
2873 1.1 thorpej {
2874 1.1 thorpej struct ncr53c9x_ecb *ecb = arg;
2875 1.18 bouyer struct scsipi_xfer *xs = ecb->xs;
2876 1.70.2.2 nathanw struct scsipi_periph *periph = xs->xs_periph;
2877 1.70.2.2 nathanw struct ncr53c9x_softc *sc =
2878 1.70.2.2 nathanw (void *)periph->periph_channel->chan_adapter->adapt_dev;
2879 1.70.2.2 nathanw struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2880 1.1 thorpej int s;
2881 1.1 thorpej
2882 1.70.2.2 nathanw scsipi_printaddr(periph);
2883 1.1 thorpej printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2884 1.70.2.2 nathanw "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2885 1.70.2.2 nathanw "msg(q %x,o %x) %s>",
2886 1.70.2.2 nathanw sc->sc_dev.dv_xname,
2887 1.70.2.2 nathanw ecb, ecb->flags, ecb->dleft, ecb->stat,
2888 1.70.2.2 nathanw sc->sc_state, sc->sc_nexus,
2889 1.70.2.2 nathanw NCR_READ_REG(sc, NCR_STAT),
2890 1.70.2.2 nathanw sc->sc_phase, sc->sc_prevphase,
2891 1.70.2.2 nathanw (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2892 1.70.2.2 nathanw NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2893 1.7 gwr #if NCR53C9X_DEBUG > 1
2894 1.1 thorpej printf("TRACE: %s.", ecb->trace);
2895 1.1 thorpej #endif
2896 1.1 thorpej
2897 1.1 thorpej s = splbio();
2898 1.1 thorpej
2899 1.1 thorpej if (ecb->flags & ECB_ABORT) {
2900 1.1 thorpej /* abort timed out */
2901 1.1 thorpej printf(" AGAIN\n");
2902 1.16 pk
2903 1.1 thorpej ncr53c9x_init(sc, 1);
2904 1.1 thorpej } else {
2905 1.1 thorpej /* abort the operation that has timed out */
2906 1.1 thorpej printf("\n");
2907 1.1 thorpej xs->error = XS_TIMEOUT;
2908 1.1 thorpej ncr53c9x_abort(sc, ecb);
2909 1.16 pk
2910 1.16 pk /* Disable sync mode if stuck in a data phase */
2911 1.16 pk if (ecb == sc->sc_nexus &&
2912 1.16 pk (ti->flags & T_SYNCMODE) != 0 &&
2913 1.16 pk (sc->sc_phase & (MSGI|CDI)) == 0) {
2914 1.70.2.2 nathanw /* XXX ASYNC CALLBACK! */
2915 1.70.2.2 nathanw scsipi_printaddr(periph);
2916 1.16 pk printf("sync negotiation disabled\n");
2917 1.70.2.2 nathanw sc->sc_cfflags |= (1 << (periph->periph_target + 8));
2918 1.70.2.2 nathanw ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2919 1.16 pk }
2920 1.1 thorpej }
2921 1.1 thorpej
2922 1.1 thorpej splx(s);
2923 1.1 thorpej }
2924 1.54 eeh
2925 1.54 eeh void
2926 1.54 eeh ncr53c9x_watch(arg)
2927 1.54 eeh void *arg;
2928 1.54 eeh {
2929 1.54 eeh struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2930 1.54 eeh struct ncr53c9x_tinfo *ti;
2931 1.54 eeh struct ncr53c9x_linfo *li;
2932 1.54 eeh int t, s;
2933 1.54 eeh /* Delete any structures that have not been used in 10min. */
2934 1.70.2.2 nathanw time_t old = time.tv_sec - (10 * 60);
2935 1.54 eeh
2936 1.54 eeh s = splbio();
2937 1.70.2.2 nathanw for (t = 0; t < NCR_NTARG; t++) {
2938 1.54 eeh ti = &sc->sc_tinfo[t];
2939 1.57 pk li = LIST_FIRST(&ti->luns);
2940 1.54 eeh while (li) {
2941 1.70.2.2 nathanw if (li->last_used < old &&
2942 1.70.2.2 nathanw li->untagged == NULL &&
2943 1.57 pk li->used == 0) {
2944 1.54 eeh if (li->lun < NCR_NLUN)
2945 1.54 eeh ti->lun[li->lun] = NULL;
2946 1.54 eeh LIST_REMOVE(li, link);
2947 1.54 eeh free(li, M_DEVBUF);
2948 1.54 eeh /* Restart the search at the beginning */
2949 1.57 pk li = LIST_FIRST(&ti->luns);
2950 1.70.2.2 nathanw continue;
2951 1.54 eeh }
2952 1.57 pk li = LIST_NEXT(li, link);
2953 1.54 eeh }
2954 1.54 eeh }
2955 1.54 eeh splx(s);
2956 1.70.2.2 nathanw callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2957 1.54 eeh }
2958 1.61 eeh
2959