ncr53c9x.c revision 1.104 1 /* $NetBSD: ncr53c9x.c,v 1.104 2003/01/30 11:03:45 pk Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/cdefs.h>
80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.104 2003/01/30 11:03:45 pk Exp $");
81
82 #include <sys/param.h>
83 #include <sys/systm.h>
84 #include <sys/callout.h>
85 #include <sys/kernel.h>
86 #include <sys/errno.h>
87 #include <sys/ioctl.h>
88 #include <sys/device.h>
89 #include <sys/buf.h>
90 #include <sys/malloc.h>
91 #include <sys/proc.h>
92 #include <sys/queue.h>
93 #include <sys/pool.h>
94 #include <sys/scsiio.h>
95
96 #include <dev/scsipi/scsi_all.h>
97 #include <dev/scsipi/scsipi_all.h>
98 #include <dev/scsipi/scsiconf.h>
99 #include <dev/scsipi/scsi_message.h>
100
101 #include <dev/ic/ncr53c9xreg.h>
102 #include <dev/ic/ncr53c9xvar.h>
103
104 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
105 #ifdef DEBUG
106 int ncr53c9x_notag = 0;
107 #endif
108
109 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
110 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
111 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
112 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
113 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
114 struct scsipi_xfer *, int);
115 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
117 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
118 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
119 /*static*/ void ncr53c9x_timeout(void *arg);
120 /*static*/ void ncr53c9x_watch(void *arg);
121 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
122 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
123 struct ncr53c9x_ecb *);
124 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
125 caddr_t, int, struct proc *);
126
127 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
128 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
129 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
130
131 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
132 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
133 struct ncr53c9x_tinfo *);
134 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
135 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
136 int64_t lun);
137
138 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
139
140 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
141 #define NCR_RDFIFO_START 0
142 #define NCR_RDFIFO_CONTINUE 1
143
144
145 #define NCR_SET_COUNT(sc, size) do { \
146 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
147 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
148 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
149 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
150 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
151 } \
152 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
153 NCR_WRITE_REG(sc, NCR_RCH, 0); \
154 } \
155 } while (0)
156
157 static int ecb_pool_initialized = 0;
158 static struct pool ecb_pool;
159
160 /*
161 * Names for the NCR53c9x variants, correspnding to the variant tags
162 * in ncr53c9xvar.h.
163 */
164 static const char *ncr53c9x_variant_names[] = {
165 "ESP100",
166 "ESP100A",
167 "ESP200",
168 "NCR53C94",
169 "NCR53C96",
170 "ESP406",
171 "FAS408",
172 "FAS216",
173 "AM53C974",
174 "FAS366/HME",
175 "NCR53C90 (86C01)",
176 };
177
178 /*
179 * Search linked list for LUN info by LUN id.
180 */
181 static struct ncr53c9x_linfo *
182 ncr53c9x_lunsearch(ti, lun)
183 struct ncr53c9x_tinfo *ti;
184 int64_t lun;
185 {
186 struct ncr53c9x_linfo *li;
187 LIST_FOREACH(li, &ti->luns, link)
188 if (li->lun == lun)
189 return (li);
190 return (NULL);
191 }
192
193 /*
194 * Attach this instance, and then all the sub-devices
195 */
196 void
197 ncr53c9x_attach(sc)
198 struct ncr53c9x_softc *sc;
199 {
200 struct scsipi_adapter *adapt = &sc->sc_adapter;
201 struct scsipi_channel *chan = &sc->sc_channel;
202
203 /*
204 * Note, the front-end has set us up to print the chip variation.
205 */
206 if (sc->sc_rev >= NCR_VARIANT_MAX) {
207 printf("\n%s: unknown variant %d, devices not attached\n",
208 sc->sc_dev.dv_xname, sc->sc_rev);
209 return;
210 }
211
212 printf(": %s, %dMHz, SCSI ID %d\n",
213 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
214
215 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8;
216
217 /*
218 * Allocate SCSI message buffers.
219 * Front-ends can override allocation to avoid alignment
220 * handling in the DMA engines. Note that that ncr53c9x_msgout()
221 * can request a 1 byte DMA transfer.
222 */
223 if (sc->sc_omess == NULL)
224 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
225
226 if (sc->sc_imess == NULL)
227 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
228
229 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]),
230 M_DEVBUF, M_NOWAIT | M_ZERO);
231
232 if (!sc->sc_omess || !sc->sc_imess || !sc->sc_tinfo) {
233 printf("out of memory\n");
234 return;
235 }
236
237 callout_init(&sc->sc_watchdog);
238
239 /*
240 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100
241 * from now on.
242 */
243 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01)
244 sc->sc_rev = NCR_VARIANT_ESP100;
245
246 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
247
248 /* The value *must not* be == 1. Make it 2 */
249 if (sc->sc_ccf == 1)
250 sc->sc_ccf = 2;
251
252 /*
253 * The recommended timeout is 250ms. This register is loaded
254 * with a value calculated as follows, from the docs:
255 *
256 * (timout period) x (CLK frequency)
257 * reg = -------------------------------------
258 * 8192 x (Clock Conversion Factor)
259 *
260 * Since CCF has a linear relation to CLK, this generally computes
261 * to the constant of 153.
262 */
263 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
264
265 /* CCF register only has 3 bits; 0 is actually 8 */
266 sc->sc_ccf &= 7;
267
268 /*
269 * Fill in the scsipi_adapter.
270 */
271 adapt->adapt_dev = &sc->sc_dev;
272 adapt->adapt_nchannels = 1;
273 adapt->adapt_openings = 256;
274 adapt->adapt_max_periph = 256;
275 adapt->adapt_ioctl = ncr53c9x_ioctl;
276 /* adapt_request initialized by front-end */
277 /* adapt_minphys initialized by front-end */
278
279 /*
280 * Fill in the scsipi_channel.
281 */
282 memset(chan, 0, sizeof(*chan));
283 chan->chan_adapter = adapt;
284 chan->chan_bustype = &scsi_bustype;
285 chan->chan_channel = 0;
286 chan->chan_ntargets = sc->sc_ntarg;
287 chan->chan_nluns = 8;
288 chan->chan_id = sc->sc_id;
289
290 /*
291 * Add reference to adapter so that we drop the reference after
292 * config_found() to make sure the adatper is disabled.
293 */
294 if (scsipi_adapter_addref(adapt) != 0) {
295 printf("%s: unable to enable controller\n",
296 sc->sc_dev.dv_xname);
297 return;
298 }
299
300 /* Reset state & bus */
301 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
302 sc->sc_state = 0;
303 ncr53c9x_init(sc, 1);
304
305 /*
306 * Now try to attach all the sub-devices
307 */
308 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
309
310 scsipi_adapter_delref(adapt);
311 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
312 }
313
314 int
315 ncr53c9x_detach(sc, flags)
316 struct ncr53c9x_softc *sc;
317 int flags;
318 {
319 int error;
320
321 if (sc->sc_child) {
322 error = config_detach(sc->sc_child, flags);
323 if (error)
324 return (error);
325 }
326
327 free(sc->sc_imess, M_DEVBUF);
328 free(sc->sc_omess, M_DEVBUF);
329
330 return (0);
331 }
332
333 /*
334 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
335 * only this controller, but kills any on-going commands, and also stops
336 * and resets the DMA.
337 *
338 * After reset, registers are loaded with the defaults from the attach
339 * routine above.
340 */
341 void
342 ncr53c9x_reset(sc)
343 struct ncr53c9x_softc *sc;
344 {
345
346 /* reset DMA first */
347 NCRDMA_RESET(sc);
348
349 /* reset SCSI chip */
350 NCRCMD(sc, NCRCMD_RSTCHIP);
351 NCRCMD(sc, NCRCMD_NOP);
352 DELAY(500);
353
354 /* do these backwards, and fall through */
355 switch (sc->sc_rev) {
356 case NCR_VARIANT_ESP406:
357 case NCR_VARIANT_FAS408:
358 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
359 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
360 case NCR_VARIANT_AM53C974:
361 case NCR_VARIANT_FAS216:
362 case NCR_VARIANT_NCR53C94:
363 case NCR_VARIANT_NCR53C96:
364 case NCR_VARIANT_ESP200:
365 sc->sc_features |= NCR_F_HASCFG3;
366 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
367 case NCR_VARIANT_ESP100A:
368 sc->sc_features |= NCR_F_SELATN3;
369 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
370 case NCR_VARIANT_ESP100:
371 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
372 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
373 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
374 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
375 break;
376
377 case NCR_VARIANT_FAS366:
378 sc->sc_features |=
379 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
380 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
381 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
382 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
383 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
384 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
385 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
386 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
387 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
388 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
389 break;
390
391 default:
392 printf("%s: unknown revision code, assuming ESP100\n",
393 sc->sc_dev.dv_xname);
394 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
395 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
396 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
397 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
398 }
399
400 if (sc->sc_rev == NCR_VARIANT_AM53C974)
401 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
402
403 #if 0
404 printf("%s: ncr53c9x_reset: revision %d\n",
405 sc->sc_dev.dv_xname, sc->sc_rev);
406 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
407 "ccf 0x%x, timeout 0x%x\n",
408 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
409 sc->sc_ccf, sc->sc_timeout);
410 #endif
411 }
412
413 /*
414 * Reset the SCSI bus, but not the chip
415 */
416 void
417 ncr53c9x_scsi_reset(sc)
418 struct ncr53c9x_softc *sc;
419 {
420
421 (*sc->sc_glue->gl_dma_stop)(sc);
422
423 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
424 NCRCMD(sc, NCRCMD_RSTSCSI);
425 }
426
427 /*
428 * Initialize ncr53c9x state machine
429 */
430 void
431 ncr53c9x_init(sc, doreset)
432 struct ncr53c9x_softc *sc;
433 int doreset;
434 {
435 struct ncr53c9x_ecb *ecb;
436 struct ncr53c9x_linfo *li;
437 int i, r;
438
439 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
440
441 if (!ecb_pool_initialized) {
442 /* All instances share this pool */
443 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
444 "ncr53c9x_ecb", NULL);
445 ecb_pool_initialized = 1;
446 }
447
448 if (sc->sc_state == 0) {
449 /* First time through; initialize. */
450
451 TAILQ_INIT(&sc->ready_list);
452 sc->sc_nexus = NULL;
453 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
454 for (r = 0; r < sc->sc_ntarg; r++) {
455 LIST_INIT(&sc->sc_tinfo[r].luns);
456 }
457 } else {
458 /* Cancel any active commands. */
459 sc->sc_state = NCR_CLEANING;
460 sc->sc_msgify = 0;
461 if ((ecb = sc->sc_nexus) != NULL) {
462 ecb->xs->error = XS_TIMEOUT;
463 ncr53c9x_done(sc, ecb);
464 }
465 /* Cancel outstanding disconnected commands on each LUN */
466 for (r = 0; r < sc->sc_ntarg; r++) {
467 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
468 if ((ecb = li->untagged) != NULL) {
469 li->untagged = NULL;
470 /*
471 * XXXXXXX
472 *
473 * Should we terminate a command
474 * that never reached the disk?
475 */
476 li->busy = 0;
477 ecb->xs->error = XS_TIMEOUT;
478 ncr53c9x_done(sc, ecb);
479 }
480 for (i = 0; i < 256; i++)
481 if ((ecb = li->queued[i])) {
482 li->queued[i] = NULL;
483 ecb->xs->error = XS_TIMEOUT;
484 ncr53c9x_done(sc, ecb);
485 }
486 li->used = 0;
487 }
488 }
489 }
490
491 /*
492 * reset the chip to a known state
493 */
494 ncr53c9x_reset(sc);
495
496 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
497 for (r = 0; r < sc->sc_ntarg; r++) {
498 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
499 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
500
501 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<((r&7)+8))))
502 ? 0 : T_SYNCHOFF) |
503 ((sc->sc_cfflags & (1<<(r&7))) ? T_RSELECTOFF : 0);
504 #ifdef DEBUG
505 if (ncr53c9x_notag)
506 ti->flags &= ~T_TAG;
507 #endif
508 ti->period = sc->sc_minsync;
509 ti->offset = 0;
510 ti->cfg3 = 0;
511
512 ncr53c9x_update_xfer_mode(sc, r);
513 }
514
515 if (doreset) {
516 sc->sc_state = NCR_SBR;
517 NCRCMD(sc, NCRCMD_RSTSCSI);
518 } else {
519 sc->sc_state = NCR_IDLE;
520 ncr53c9x_sched(sc);
521 }
522 }
523
524 /*
525 * Read the NCR registers, and save their contents for later use.
526 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
527 * NCR_INTR - so make sure it is the last read.
528 *
529 * I think that (from reading the docs) most bits in these registers
530 * only make sense when he DMA CSR has an interrupt showing. Call only
531 * if an interrupt is pending.
532 */
533 __inline__ void
534 ncr53c9x_readregs(sc)
535 struct ncr53c9x_softc *sc;
536 {
537
538 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
539 /* Only the stepo bits are of interest */
540 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
541
542 if (sc->sc_rev == NCR_VARIANT_FAS366)
543 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
544
545 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
546
547 if (sc->sc_glue->gl_clear_latched_intr != NULL)
548 (*sc->sc_glue->gl_clear_latched_intr)(sc);
549
550 /*
551 * Determine the SCSI bus phase, return either a real SCSI bus phase
552 * or some pseudo phase we use to detect certain exceptions.
553 */
554
555 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
556 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
557
558 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
559 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
560 }
561
562 /*
563 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
564 */
565 static inline int
566 ncr53c9x_stp2cpb(sc, period)
567 struct ncr53c9x_softc *sc;
568 int period;
569 {
570 int v;
571 v = (sc->sc_freq * period) / 250;
572 if (ncr53c9x_cpb2stp(sc, v) < period)
573 /* Correct round-down error */
574 v++;
575 return (v);
576 }
577
578 static inline void
579 ncr53c9x_setsync(sc, ti)
580 struct ncr53c9x_softc *sc;
581 struct ncr53c9x_tinfo *ti;
582 {
583 u_char syncoff, synctp;
584 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
585
586 if (ti->flags & T_SYNCMODE) {
587 syncoff = ti->offset;
588 synctp = ncr53c9x_stp2cpb(sc, ti->period);
589 if (sc->sc_features & NCR_F_FASTSCSI) {
590 /*
591 * If the period is 200ns or less (ti->period <= 50),
592 * put the chip in Fast SCSI mode.
593 */
594 if (ti->period <= 50)
595 /*
596 * There are (at least) 4 variations of the
597 * configuration 3 register. The drive attach
598 * routine sets the appropriate bit to put the
599 * chip into Fast SCSI mode so that it doesn't
600 * have to be figured out here each time.
601 */
602 cfg3 |= sc->sc_cfg3_fscsi;
603 }
604
605 /*
606 * Am53c974 requires different SYNCTP values when the
607 * FSCSI bit is off.
608 */
609 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
610 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
611 synctp--;
612 } else {
613 syncoff = 0;
614 synctp = 0;
615 }
616
617 if (sc->sc_features & NCR_F_HASCFG3)
618 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
619
620 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
621 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
622 }
623
624 /*
625 * Send a command to a target, set the driver state to NCR_SELECTING
626 * and let the caller take care of the rest.
627 *
628 * Keeping this as a function allows me to say that this may be done
629 * by DMA instead of programmed I/O soon.
630 */
631 void
632 ncr53c9x_select(sc, ecb)
633 struct ncr53c9x_softc *sc;
634 struct ncr53c9x_ecb *ecb;
635 {
636 struct scsipi_periph *periph = ecb->xs->xs_periph;
637 int target = periph->periph_target;
638 int lun = periph->periph_lun;
639 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
640 int tiflags = ti->flags;
641 u_char *cmd;
642 int clen;
643 int selatn3, selatns;
644 size_t dmasize;
645
646 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
647 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
648
649 sc->sc_state = NCR_SELECTING;
650 /*
651 * Schedule the timeout now, the first time we will go away
652 * expecting to come back due to an interrupt, because it is
653 * always possible that the interrupt may never happen.
654 */
655 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
656 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout),
657 ncr53c9x_timeout, ecb);
658 }
659
660 /*
661 * The docs say the target register is never reset, and I
662 * can't think of a better place to set it
663 */
664 if (sc->sc_rev == NCR_VARIANT_FAS366) {
665 NCRCMD(sc, NCRCMD_FLUSH);
666 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
667 } else {
668 NCR_WRITE_REG(sc, NCR_SELID, target);
669 }
670 ncr53c9x_setsync(sc, ti);
671
672 if ((ecb->flags & ECB_SENSE) != 0) {
673 /*
674 * For REQUEST SENSE, we should not send an IDENTIFY or
675 * otherwise mangle the target. There should be no MESSAGE IN
676 * phase.
677 */
678 if (sc->sc_features & NCR_F_DMASELECT) {
679 /* setup DMA transfer for command */
680 dmasize = clen = ecb->clen;
681 sc->sc_cmdlen = clen;
682 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
683
684 /* Program the SCSI counter */
685 NCR_SET_COUNT(sc, dmasize);
686
687 if (sc->sc_rev != NCR_VARIANT_FAS366)
688 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
689
690 /* And get the targets attention */
691 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
692 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
693 &dmasize);
694 NCRDMA_GO(sc);
695 } else {
696 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
697 NCRCMD(sc, NCRCMD_SELNATN);
698 }
699 return;
700 }
701
702 selatn3 = selatns = 0;
703 if (ecb->tag[0] != 0) {
704 if (sc->sc_features & NCR_F_SELATN3)
705 /* use SELATN3 to send tag messages */
706 selatn3 = 1;
707 else
708 /* We don't have SELATN3; use SELATNS to send tags */
709 selatns = 1;
710 }
711
712 if (ti->flags & T_NEGOTIATE) {
713 /* We have to use SELATNS to send sync/wide messages */
714 selatn3 = 0;
715 selatns = 1;
716 }
717
718 cmd = (u_char *)&ecb->cmd.cmd;
719
720 if (selatn3) {
721 /* We'll use tags with SELATN3 */
722 clen = ecb->clen + 3;
723 cmd -= 3;
724 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
725 cmd[1] = ecb->tag[0]; /* msg[1] */
726 cmd[2] = ecb->tag[1]; /* msg[2] */
727 } else {
728 /* We don't have tags, or will send messages with SELATNS */
729 clen = ecb->clen + 1;
730 cmd -= 1;
731 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
732 }
733
734 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
735
736 /* setup DMA transfer for command */
737 dmasize = clen;
738 sc->sc_cmdlen = clen;
739 sc->sc_cmdp = cmd;
740
741 /* Program the SCSI counter */
742 NCR_SET_COUNT(sc, dmasize);
743
744 /* load the count in */
745 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
746 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
747
748 /* And get the targets attention */
749 if (selatn3) {
750 sc->sc_msgout = SEND_TAG;
751 sc->sc_flags |= NCR_ATN;
752 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
753 } else
754 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
755 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
756 NCRDMA_GO(sc);
757 return;
758 }
759
760 /*
761 * Who am I. This is where we tell the target that we are
762 * happy for it to disconnect etc.
763 */
764
765 /* Now get the command into the FIFO */
766 ncr53c9x_wrfifo(sc, cmd, clen);
767
768 /* And get the targets attention */
769 if (selatns) {
770 NCR_MSGS(("SELATNS \n"));
771 /* Arbitrate, select and stop after IDENTIFY message */
772 NCRCMD(sc, NCRCMD_SELATNS);
773 } else if (selatn3) {
774 sc->sc_msgout = SEND_TAG;
775 sc->sc_flags |= NCR_ATN;
776 NCRCMD(sc, NCRCMD_SELATN3);
777 } else
778 NCRCMD(sc, NCRCMD_SELATN);
779 }
780
781 void
782 ncr53c9x_free_ecb(sc, ecb)
783 struct ncr53c9x_softc *sc;
784 struct ncr53c9x_ecb *ecb;
785 {
786 int s;
787
788 s = splbio();
789 ecb->flags = 0;
790 pool_put(&ecb_pool, (void *)ecb);
791 splx(s);
792 return;
793 }
794
795 struct ncr53c9x_ecb *
796 ncr53c9x_get_ecb(sc, flags)
797 struct ncr53c9x_softc *sc;
798 int flags;
799 {
800 struct ncr53c9x_ecb *ecb;
801 int s;
802
803 s = splbio();
804 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT);
805 splx(s);
806 if (ecb) {
807 memset(ecb, 0, sizeof(*ecb));
808 ecb->flags |= ECB_ALLOC;
809 }
810 return (ecb);
811 }
812
813 /*
814 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
815 */
816
817 /*
818 * Start a SCSI-command
819 * This function is called by the higher level SCSI-driver to queue/run
820 * SCSI-commands.
821 */
822
823 void
824 ncr53c9x_scsipi_request(chan, req, arg)
825 struct scsipi_channel *chan;
826 scsipi_adapter_req_t req;
827 void *arg;
828 {
829 struct scsipi_xfer *xs;
830 struct scsipi_periph *periph;
831 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
832 struct ncr53c9x_ecb *ecb;
833 int s, flags;
834
835 NCR_TRACE(("[ncr53c9x_scsipi_request] "));
836
837 switch (req) {
838 case ADAPTER_REQ_RUN_XFER:
839 xs = arg;
840 periph = xs->xs_periph;
841 flags = xs->xs_control;
842
843 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
844 periph->periph_target));
845
846 /* Get an ECB to use. */
847 ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
848 /*
849 * This should never happen as we track resources
850 * in the mid-layer.
851 */
852 if (ecb == NULL) {
853 scsipi_printaddr(periph);
854 printf("unable to allocate ecb\n");
855 xs->error = XS_RESOURCE_SHORTAGE;
856 scsipi_done(xs);
857 return;
858 }
859
860 /* Initialize ecb */
861 ecb->xs = xs;
862 ecb->timeout = xs->timeout;
863
864 if (flags & XS_CTL_RESET) {
865 ecb->flags |= ECB_RESET;
866 ecb->clen = 0;
867 ecb->dleft = 0;
868 } else {
869 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen);
870 ecb->clen = xs->cmdlen;
871 ecb->daddr = xs->data;
872 ecb->dleft = xs->datalen;
873 }
874 ecb->stat = 0;
875
876 s = splbio();
877
878 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
879 ecb->flags |= ECB_READY;
880 if (sc->sc_state == NCR_IDLE)
881 ncr53c9x_sched(sc);
882
883 splx(s);
884
885 if ((flags & XS_CTL_POLL) == 0)
886 return;
887
888 /* Not allowed to use interrupts, use polling instead */
889 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
890 ncr53c9x_timeout(ecb);
891 if (ncr53c9x_poll(sc, xs, ecb->timeout))
892 ncr53c9x_timeout(ecb);
893 }
894 return;
895
896 case ADAPTER_REQ_GROW_RESOURCES:
897 /* XXX Not supported. */
898 return;
899
900 case ADAPTER_REQ_SET_XFER_MODE:
901 {
902 struct ncr53c9x_tinfo *ti;
903 struct scsipi_xfer_mode *xm = arg;
904
905 ti = &sc->sc_tinfo[xm->xm_target];
906 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
907 ti->period = 0;
908 ti->offset = 0;
909
910 if ((sc->sc_cfflags & (1<<((xm->xm_target&7)+16))) == 0 &&
911 (xm->xm_mode & PERIPH_CAP_TQING)) {
912 NCR_MISC(("%s: target %d: tagged queuing\n",
913 sc->sc_dev.dv_xname, xm->xm_target));
914 ti->flags |= T_TAG;
915 } else
916 ti->flags &= ~T_TAG;
917
918 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
919 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
920 sc->sc_dev.dv_xname, xm->xm_target));
921 if (sc->sc_rev == NCR_VARIANT_FAS366) {
922 ti->flags |= T_WIDE;
923 ti->width = 1;
924 }
925 }
926
927 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
928 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
929 NCR_MISC(("%s: target %d: sync negotiation\n",
930 sc->sc_dev.dv_xname, xm->xm_target));
931 ti->flags |= T_NEGOTIATE;
932 ti->period = sc->sc_minsync;
933 }
934 /*
935 * If we're not going to negotiate, send the notification
936 * now, since it won't happen later.
937 */
938 if ((ti->flags & T_NEGOTIATE) == 0)
939 ncr53c9x_update_xfer_mode(sc, xm->xm_target);
940 return;
941 }
942 }
943 }
944
945 void
946 ncr53c9x_update_xfer_mode(sc, target)
947 struct ncr53c9x_softc *sc;
948 int target;
949 {
950 struct scsipi_xfer_mode xm;
951 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
952
953 xm.xm_target = target;
954 xm.xm_mode = 0;
955 xm.xm_period = 0;
956 xm.xm_offset = 0;
957
958 if (ti->flags & T_SYNCMODE) {
959 xm.xm_mode |= PERIPH_CAP_SYNC;
960 xm.xm_period = ti->period;
961 xm.xm_offset = ti->offset;
962 }
963 if (ti->width)
964 xm.xm_mode |= PERIPH_CAP_WIDE16;
965
966 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
967 xm.xm_mode |= PERIPH_CAP_TQING;
968
969 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
970 }
971
972 /*
973 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
974 */
975 int
976 ncr53c9x_poll(sc, xs, count)
977 struct ncr53c9x_softc *sc;
978 struct scsipi_xfer *xs;
979 int count;
980 {
981
982 NCR_TRACE(("[ncr53c9x_poll] "));
983 while (count) {
984 if (NCRDMA_ISINTR(sc)) {
985 ncr53c9x_intr(sc);
986 }
987 #if alternatively
988 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
989 ncr53c9x_intr(sc);
990 #endif
991 if ((xs->xs_status & XS_STS_DONE) != 0)
992 return (0);
993 if (sc->sc_state == NCR_IDLE) {
994 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
995 ncr53c9x_sched(sc);
996 }
997 DELAY(1000);
998 count--;
999 }
1000 return (1);
1001 }
1002
1003 int
1004 ncr53c9x_ioctl(chan, cmd, arg, flag, p)
1005 struct scsipi_channel *chan;
1006 u_long cmd;
1007 caddr_t arg;
1008 int flag;
1009 struct proc *p;
1010 {
1011 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
1012 int s, error = 0;
1013
1014 switch (cmd) {
1015 case SCBUSIORESET:
1016 s = splbio();
1017 ncr53c9x_init(sc, 1);
1018 splx(s);
1019 break;
1020 default:
1021 error = ENOTTY;
1022 break;
1023 }
1024 return (error);
1025 }
1026
1027
1028 /*
1029 * LOW LEVEL SCSI UTILITIES
1030 */
1031
1032 /*
1033 * Schedule a scsi operation. This has now been pulled out of the interrupt
1034 * handler so that we may call it from ncr53c9x_scsipi_request and
1035 * ncr53c9x_done. This may save us an unecessary interrupt just to get
1036 * things going. Should only be called when state == NCR_IDLE and at bio pl.
1037 */
1038 void
1039 ncr53c9x_sched(sc)
1040 struct ncr53c9x_softc *sc;
1041 {
1042 struct ncr53c9x_ecb *ecb;
1043 struct scsipi_periph *periph;
1044 struct ncr53c9x_tinfo *ti;
1045 int lun;
1046 struct ncr53c9x_linfo *li;
1047 int s, tag;
1048
1049 NCR_TRACE(("[ncr53c9x_sched] "));
1050 if (sc->sc_state != NCR_IDLE)
1051 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1052
1053 /*
1054 * Find first ecb in ready queue that is for a target/lunit
1055 * combinations that is not busy.
1056 */
1057 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1058 ecb = TAILQ_NEXT(ecb, chain)) {
1059 periph = ecb->xs->xs_periph;
1060 ti = &sc->sc_tinfo[periph->periph_target];
1061 lun = periph->periph_lun;
1062
1063 /* Select type of tag for this command */
1064 if ((ti->flags & (T_RSELECTOFF)) != 0)
1065 tag = 0;
1066 else if ((ti->flags & (T_TAG)) == 0)
1067 tag = 0;
1068 else if ((ecb->flags & ECB_SENSE) != 0)
1069 tag = 0;
1070 else
1071 tag = ecb->xs->xs_tag_type;
1072 #if 0
1073 /* XXXX Use tags for polled commands? */
1074 if (ecb->xs->xs_control & XS_CTL_POLL)
1075 tag = 0;
1076 #endif
1077
1078 s = splbio();
1079 li = TINFO_LUN(ti, lun);
1080 if (li == NULL) {
1081 /* Initialize LUN info and add to list. */
1082 if ((li = malloc(sizeof(*li),
1083 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) {
1084 splx(s);
1085 continue;
1086 }
1087 li->lun = lun;
1088
1089 LIST_INSERT_HEAD(&ti->luns, li, link);
1090 if (lun < NCR_NLUN)
1091 ti->lun[lun] = li;
1092 }
1093 li->last_used = time.tv_sec;
1094 if (tag == 0) {
1095 /* Try to issue this as an un-tagged command */
1096 if (li->untagged == NULL)
1097 li->untagged = ecb;
1098 }
1099 if (li->untagged != NULL) {
1100 tag = 0;
1101 if ((li->busy != 1) && li->used == 0) {
1102 /* We need to issue this untagged command now */
1103 ecb = li->untagged;
1104 periph = ecb->xs->xs_periph;
1105 } else {
1106 /* Not ready yet */
1107 splx(s);
1108 continue;
1109 }
1110 }
1111 ecb->tag[0] = tag;
1112 if (tag != 0) {
1113 li->queued[ecb->xs->xs_tag_id] = ecb;
1114 ecb->tag[1] = ecb->xs->xs_tag_id;
1115 li->used++;
1116 }
1117 splx(s);
1118 if (li->untagged != NULL && (li->busy != 1)) {
1119 li->busy = 1;
1120 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1121 ecb->flags &= ~ECB_READY;
1122 sc->sc_nexus = ecb;
1123 ncr53c9x_select(sc, ecb);
1124 break;
1125 }
1126 if (li->untagged == NULL && tag != 0) {
1127 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1128 ecb->flags &= ~ECB_READY;
1129 sc->sc_nexus = ecb;
1130 ncr53c9x_select(sc, ecb);
1131 break;
1132 } else
1133 NCR_TRACE(("%d:%d busy\n",
1134 periph->periph_target,
1135 periph->periph_lun));
1136 }
1137 }
1138
1139 void
1140 ncr53c9x_sense(sc, ecb)
1141 struct ncr53c9x_softc *sc;
1142 struct ncr53c9x_ecb *ecb;
1143 {
1144 struct scsipi_xfer *xs = ecb->xs;
1145 struct scsipi_periph *periph = xs->xs_periph;
1146 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1147 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1148 struct ncr53c9x_linfo *li;
1149 int lun = periph->periph_lun;
1150
1151 NCR_TRACE(("requesting sense "));
1152 /* Next, setup a request sense command block */
1153 memset(ss, 0, sizeof(*ss));
1154 ss->opcode = REQUEST_SENSE;
1155 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1156 ss->length = sizeof(struct scsipi_sense_data);
1157 ecb->clen = sizeof(*ss);
1158 ecb->daddr = (char *)&xs->sense.scsi_sense;
1159 ecb->dleft = sizeof(struct scsipi_sense_data);
1160 ecb->flags |= ECB_SENSE;
1161 ecb->timeout = NCR_SENSE_TIMEOUT;
1162 ti->senses++;
1163 li = TINFO_LUN(ti, lun);
1164 if (li->busy)
1165 li->busy = 0;
1166 ncr53c9x_dequeue(sc, ecb);
1167 li->untagged = ecb; /* must be executed first to fix C/A */
1168 li->busy = 2;
1169 if (ecb == sc->sc_nexus) {
1170 ncr53c9x_select(sc, ecb);
1171 } else {
1172 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1173 ecb->flags |= ECB_READY;
1174 if (sc->sc_state == NCR_IDLE)
1175 ncr53c9x_sched(sc);
1176 }
1177 }
1178
1179 /*
1180 * POST PROCESSING OF SCSI_CMD (usually current)
1181 */
1182 void
1183 ncr53c9x_done(sc, ecb)
1184 struct ncr53c9x_softc *sc;
1185 struct ncr53c9x_ecb *ecb;
1186 {
1187 struct scsipi_xfer *xs = ecb->xs;
1188 struct scsipi_periph *periph = xs->xs_periph;
1189 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1190 int lun = periph->periph_lun;
1191 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1192
1193 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1194
1195 callout_stop(&ecb->xs->xs_callout);
1196
1197 /*
1198 * Now, if we've come here with no error code, i.e. we've kept the
1199 * initial XS_NOERROR, and the status code signals that we should
1200 * check sense, we'll need to set up a request sense cmd block and
1201 * push the command back into the ready queue *before* any other
1202 * commands for this target/lunit, else we lose the sense info.
1203 * We don't support chk sense conditions for the request sense cmd.
1204 */
1205 if (xs->error == XS_NOERROR) {
1206 xs->status = ecb->stat;
1207 if ((ecb->flags & ECB_ABORT) != 0) {
1208 xs->error = XS_TIMEOUT;
1209 } else if ((ecb->flags & ECB_SENSE) != 0) {
1210 xs->error = XS_SENSE;
1211 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1212 /* First, save the return values */
1213 xs->resid = ecb->dleft;
1214 ncr53c9x_sense(sc, ecb);
1215 return;
1216 } else {
1217 xs->resid = ecb->dleft;
1218 }
1219 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY)
1220 xs->error = XS_BUSY;
1221 }
1222
1223 #ifdef NCR53C9X_DEBUG
1224 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1225 if (xs->resid != 0)
1226 printf("resid=%d ", xs->resid);
1227 if (xs->error == XS_SENSE)
1228 printf("sense=0x%02x\n",
1229 xs->sense.scsi_sense.error_code);
1230 else
1231 printf("error=%d\n", xs->error);
1232 }
1233 #endif
1234
1235 /*
1236 * Remove the ECB from whatever queue it's on.
1237 */
1238 ncr53c9x_dequeue(sc, ecb);
1239 if (ecb == sc->sc_nexus) {
1240 sc->sc_nexus = NULL;
1241 if (sc->sc_state != NCR_CLEANING) {
1242 sc->sc_state = NCR_IDLE;
1243 ncr53c9x_sched(sc);
1244 }
1245 }
1246
1247 if (xs->error == XS_SELTIMEOUT) {
1248 /* Selection timeout -- discard this LUN if empty */
1249 if (li->untagged == NULL && li->used == 0) {
1250 if (lun < NCR_NLUN)
1251 ti->lun[lun] = NULL;
1252 LIST_REMOVE(li, link);
1253 free(li, M_DEVBUF);
1254 }
1255 }
1256
1257 ncr53c9x_free_ecb(sc, ecb);
1258 ti->cmds++;
1259 scsipi_done(xs);
1260 }
1261
1262 void
1263 ncr53c9x_dequeue(sc, ecb)
1264 struct ncr53c9x_softc *sc;
1265 struct ncr53c9x_ecb *ecb;
1266 {
1267 struct ncr53c9x_tinfo *ti =
1268 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1269 struct ncr53c9x_linfo *li;
1270 int64_t lun = ecb->xs->xs_periph->periph_lun;
1271
1272 li = TINFO_LUN(ti, lun);
1273 #ifdef DIAGNOSTIC
1274 if (li == NULL || li->lun != lun)
1275 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist",
1276 (long long) lun, ecb);
1277 #endif
1278 if (li->untagged == ecb) {
1279 li->busy = 0;
1280 li->untagged = NULL;
1281 }
1282 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1283 #ifdef DIAGNOSTIC
1284 if (li->queued[ecb->tag[1]] != NULL &&
1285 (li->queued[ecb->tag[1]] != ecb))
1286 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1287 "instead of ecb %p\n", ecb->tag[1],
1288 (long long) lun,
1289 li->queued[ecb->tag[1]], ecb);
1290 #endif
1291 li->queued[ecb->tag[1]] = NULL;
1292 li->used--;
1293 }
1294
1295 if ((ecb->flags & ECB_READY) != 0) {
1296 ecb->flags &= ~ECB_READY;
1297 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1298 }
1299 }
1300
1301 /*
1302 * INTERRUPT/PROTOCOL ENGINE
1303 */
1304
1305 /*
1306 * Schedule an outgoing message by prioritizing it, and asserting
1307 * attention on the bus. We can only do this when we are the initiator
1308 * else there will be an illegal command interrupt.
1309 */
1310 #define ncr53c9x_sched_msgout(m) \
1311 do { \
1312 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1313 NCRCMD(sc, NCRCMD_SETATN); \
1314 sc->sc_flags |= NCR_ATN; \
1315 sc->sc_msgpriq |= (m); \
1316 } while (0)
1317
1318 static void
1319 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1320 {
1321 NCR_TRACE(("[flushfifo] "));
1322
1323 NCRCMD(sc, NCRCMD_FLUSH);
1324
1325 if (sc->sc_phase == COMMAND_PHASE ||
1326 sc->sc_phase == MESSAGE_OUT_PHASE)
1327 DELAY(2);
1328 }
1329
1330 static int
1331 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1332 {
1333 int i, n;
1334 u_char *buf;
1335
1336 switch(how) {
1337 case NCR_RDFIFO_START:
1338 buf = sc->sc_imess;
1339 sc->sc_imlen = 0;
1340 break;
1341 case NCR_RDFIFO_CONTINUE:
1342 buf = sc->sc_imess + sc->sc_imlen;
1343 break;
1344 default:
1345 panic("ncr53c9x_rdfifo: bad flag");
1346 break;
1347 }
1348
1349 /*
1350 * XXX buffer (sc_imess) size for message
1351 */
1352
1353 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1354
1355 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1356 n *= 2;
1357
1358 for (i = 0; i < n; i++)
1359 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1360
1361 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) {
1362
1363 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1364 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1365
1366 NCR_READ_REG(sc, NCR_FIFO);
1367
1368 ncr53c9x_flushfifo(sc);
1369 }
1370 } else {
1371 for (i = 0; i < n; i++)
1372 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1373 }
1374
1375 sc->sc_imlen += i;
1376
1377 #if 0
1378 #ifdef NCR53C9X_DEBUG
1379 {
1380 int j;
1381
1382 NCR_TRACE(("\n[rdfifo %s (%d):",
1383 (how == NCR_RDFIFO_START) ? "start" : "cont",
1384 (int)sc->sc_imlen));
1385 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1386 for (j = 0; j < sc->sc_imlen; j++)
1387 printf(" %02x", sc->sc_imess[j]);
1388 printf("]\n");
1389 }
1390 }
1391 #endif
1392 #endif
1393 return sc->sc_imlen;
1394 }
1395
1396 static void
1397 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1398 {
1399 int i;
1400
1401 #ifdef NCR53C9X_DEBUG
1402 NCR_MSGS(("[wrfifo(%d):", len));
1403 if (ncr53c9x_debug & NCR_SHOWMSGS) {
1404 for (i = 0; i < len; i++)
1405 printf(" %02x", p[i]);
1406 printf("]\n");
1407 }
1408 #endif
1409
1410 for (i = 0; i < len; i++) {
1411 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1412
1413 if (sc->sc_rev == NCR_VARIANT_FAS366)
1414 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1415 }
1416 }
1417
1418 int
1419 ncr53c9x_reselect(sc, message, tagtype, tagid)
1420 struct ncr53c9x_softc *sc;
1421 int message;
1422 int tagtype, tagid;
1423 {
1424 u_char selid, target, lun;
1425 struct ncr53c9x_ecb *ecb = NULL;
1426 struct ncr53c9x_tinfo *ti;
1427 struct ncr53c9x_linfo *li;
1428
1429
1430 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1431 target = sc->sc_selid;
1432 } else {
1433 /*
1434 * The SCSI chip made a snapshot of the data bus
1435 * while the reselection was being negotiated.
1436 * This enables us to determine which target did
1437 * the reselect.
1438 */
1439 selid = sc->sc_selid & ~(1 << sc->sc_id);
1440 if (selid & (selid - 1)) {
1441 printf("%s: reselect with invalid selid %02x;"
1442 " sending DEVICE RESET\n",
1443 sc->sc_dev.dv_xname, selid);
1444 goto reset;
1445 }
1446
1447 target = ffs(selid) - 1;
1448 }
1449 lun = message & 0x07;
1450
1451 /*
1452 * Search wait queue for disconnected cmd
1453 * The list should be short, so I haven't bothered with
1454 * any more sophisticated structures than a simple
1455 * singly linked list.
1456 */
1457 ti = &sc->sc_tinfo[target];
1458 li = TINFO_LUN(ti, lun);
1459
1460 /*
1461 * We can get as far as the LUN with the IDENTIFY
1462 * message. Check to see if we're running an
1463 * un-tagged command. Otherwise ack the IDENTIFY
1464 * and wait for a tag message.
1465 */
1466 if (li != NULL) {
1467 if (li->untagged != NULL && li->busy)
1468 ecb = li->untagged;
1469 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1470 /* Wait for tag to come by */
1471 sc->sc_state = NCR_IDENTIFIED;
1472 return (0);
1473 } else if (tagtype)
1474 ecb = li->queued[tagid];
1475 }
1476 if (ecb == NULL) {
1477 printf("%s: reselect from target %d lun %d tag %x:%x "
1478 "with no nexus; sending ABORT\n",
1479 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1480 goto abort;
1481 }
1482
1483 /* Make this nexus active again. */
1484 sc->sc_state = NCR_CONNECTED;
1485 sc->sc_nexus = ecb;
1486 ncr53c9x_setsync(sc, ti);
1487
1488 if (ecb->flags & ECB_RESET)
1489 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1490 else if (ecb->flags & ECB_ABORT)
1491 ncr53c9x_sched_msgout(SEND_ABORT);
1492
1493 /* Do an implicit RESTORE POINTERS. */
1494 sc->sc_dp = ecb->daddr;
1495 sc->sc_dleft = ecb->dleft;
1496
1497 return (0);
1498
1499 reset:
1500 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1501 return (1);
1502
1503 abort:
1504 ncr53c9x_sched_msgout(SEND_ABORT);
1505 return (1);
1506 }
1507
1508 static inline int
1509 __verify_msg_format(u_char *p, int len)
1510 {
1511
1512 if (len == 1 && MSG_IS1BYTE(p[0]))
1513 return 1;
1514 if (len == 2 && MSG_IS2BYTE(p[0]))
1515 return 1;
1516 if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
1517 len == p[1] + 2)
1518 return 1;
1519
1520 return 0;
1521 }
1522
1523 /*
1524 * Get an incoming message as initiator.
1525 *
1526 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1527 * byte in the FIFO
1528 */
1529 void
1530 ncr53c9x_msgin(sc)
1531 struct ncr53c9x_softc *sc;
1532 {
1533
1534 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1535
1536 if (sc->sc_imlen == 0) {
1537 printf("%s: msgin: no msg byte available\n",
1538 sc->sc_dev.dv_xname);
1539 return;
1540 }
1541
1542 /*
1543 * Prepare for a new message. A message should (according
1544 * to the SCSI standard) be transmitted in one single
1545 * MESSAGE_IN_PHASE. If we have been in some other phase,
1546 * then this is a new message.
1547 */
1548 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1549 sc->sc_state != NCR_RESELECTED) {
1550 printf("%s: phase change, dropping message, "
1551 "prev %d, state %d\n",
1552 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1553 sc->sc_flags &= ~NCR_DROP_MSGI;
1554 sc->sc_imlen = 0;
1555 }
1556
1557 /*
1558 * If we're going to reject the message, don't bother storing
1559 * the incoming bytes. But still, we need to ACK them.
1560 */
1561 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1562 NCRCMD(sc, NCRCMD_MSGOK);
1563 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1564 return;
1565 }
1566
1567 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1568 ncr53c9x_sched_msgout(SEND_REJECT);
1569 sc->sc_flags |= NCR_DROP_MSGI;
1570 } else {
1571 u_char *pb;
1572 int plen;
1573
1574 switch (sc->sc_state) {
1575 /*
1576 * if received message is the first of reselection
1577 * then first byte is selid, and then message
1578 */
1579 case NCR_RESELECTED:
1580 pb = sc->sc_imess + 1;
1581 plen = sc->sc_imlen - 1;
1582 break;
1583 default:
1584 pb = sc->sc_imess;
1585 plen = sc->sc_imlen;
1586 break;
1587 }
1588
1589 if (__verify_msg_format(pb, plen))
1590 goto gotit;
1591 }
1592
1593 /* Ack what we have so far */
1594 NCRCMD(sc, NCRCMD_MSGOK);
1595 return;
1596
1597 gotit:
1598 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1599 /* we got complete message, flush the imess, */
1600 /* XXX nobody uses imlen below */
1601 sc->sc_imlen = 0;
1602 /*
1603 * Now we should have a complete message (1 byte, 2 byte
1604 * and moderately long extended messages). We only handle
1605 * extended messages which total length is shorter than
1606 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1607 */
1608 switch (sc->sc_state) {
1609 struct ncr53c9x_ecb *ecb;
1610 struct ncr53c9x_tinfo *ti;
1611 struct ncr53c9x_linfo *li;
1612 int lun;
1613
1614 case NCR_CONNECTED:
1615 ecb = sc->sc_nexus;
1616 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1617
1618 switch (sc->sc_imess[0]) {
1619 case MSG_CMDCOMPLETE:
1620 NCR_MSGS(("cmdcomplete "));
1621 if (sc->sc_dleft < 0) {
1622 scsipi_printaddr(ecb->xs->xs_periph);
1623 printf("got %ld extra bytes\n",
1624 -(long)sc->sc_dleft);
1625 sc->sc_dleft = 0;
1626 }
1627 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1628 0 : sc->sc_dleft;
1629 if ((ecb->flags & ECB_SENSE) == 0)
1630 ecb->xs->resid = ecb->dleft;
1631 sc->sc_state = NCR_CMDCOMPLETE;
1632 break;
1633
1634 case MSG_MESSAGE_REJECT:
1635 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1636 switch (sc->sc_msgout) {
1637 case SEND_TAG:
1638 /*
1639 * Target does not like tagged queuing.
1640 * - Flush the command queue
1641 * - Disable tagged queuing for the target
1642 * - Dequeue ecb from the queued array.
1643 */
1644 printf("%s: tagged queuing rejected: "
1645 "target %d\n",
1646 sc->sc_dev.dv_xname,
1647 ecb->xs->xs_periph->periph_target);
1648
1649 NCR_MSGS(("(rejected sent tag)"));
1650 NCRCMD(sc, NCRCMD_FLUSH);
1651 DELAY(1);
1652 ti->flags &= ~T_TAG;
1653 lun = ecb->xs->xs_periph->periph_lun;
1654 li = TINFO_LUN(ti, lun);
1655 if (ecb->tag[0] &&
1656 li->queued[ecb->tag[1]] != NULL) {
1657 li->queued[ecb->tag[1]] = NULL;
1658 li->used--;
1659 }
1660 ecb->tag[0] = ecb->tag[1] = 0;
1661 li->untagged = ecb;
1662 li->busy = 1;
1663 break;
1664
1665 case SEND_SDTR:
1666 printf("%s: sync transfer rejected: "
1667 "target %d\n",
1668 sc->sc_dev.dv_xname,
1669 ecb->xs->xs_periph->periph_target);
1670
1671 sc->sc_flags &= ~NCR_SYNCHNEGO;
1672 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1673 ncr53c9x_setsync(sc, ti);
1674 ncr53c9x_update_xfer_mode(sc,
1675 ecb->xs->xs_periph->periph_target);
1676 break;
1677
1678 case SEND_WDTR:
1679 printf("%s: wide transfer rejected: "
1680 "target %d\n",
1681 sc->sc_dev.dv_xname,
1682 ecb->xs->xs_periph->periph_target);
1683 ti->flags &= ~(T_WIDE | T_WDTRSENT);
1684 ti->width = 0;
1685 break;
1686
1687 case SEND_INIT_DET_ERR:
1688 goto abort;
1689 }
1690 break;
1691
1692 case MSG_NOOP:
1693 NCR_MSGS(("noop "));
1694 break;
1695
1696 case MSG_HEAD_OF_Q_TAG:
1697 case MSG_SIMPLE_Q_TAG:
1698 case MSG_ORDERED_Q_TAG:
1699 NCR_MSGS(("TAG %x:%x",
1700 sc->sc_imess[0], sc->sc_imess[1]));
1701 break;
1702
1703 case MSG_DISCONNECT:
1704 NCR_MSGS(("disconnect "));
1705 ti->dconns++;
1706 sc->sc_state = NCR_DISCONNECT;
1707
1708 /*
1709 * Mark the fact that all bytes have moved. The
1710 * target may not bother to do a SAVE POINTERS
1711 * at this stage. This flag will set the residual
1712 * count to zero on MSG COMPLETE.
1713 */
1714 if (sc->sc_dleft == 0)
1715 ecb->flags |= ECB_TENTATIVE_DONE;
1716
1717 break;
1718
1719 case MSG_SAVEDATAPOINTER:
1720 NCR_MSGS(("save datapointer "));
1721 ecb->daddr = sc->sc_dp;
1722 ecb->dleft = sc->sc_dleft;
1723 break;
1724
1725 case MSG_RESTOREPOINTERS:
1726 NCR_MSGS(("restore datapointer "));
1727 sc->sc_dp = ecb->daddr;
1728 sc->sc_dleft = ecb->dleft;
1729 break;
1730
1731 case MSG_EXTENDED:
1732 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1733 switch (sc->sc_imess[2]) {
1734 case MSG_EXT_SDTR:
1735 NCR_MSGS(("SDTR period %d, offset %d ",
1736 sc->sc_imess[3], sc->sc_imess[4]));
1737 if (sc->sc_imess[1] != 3)
1738 goto reject;
1739 ti->period = sc->sc_imess[3];
1740 ti->offset = sc->sc_imess[4];
1741 ti->flags &= ~T_NEGOTIATE;
1742 if (sc->sc_minsync == 0 ||
1743 ti->offset == 0 ||
1744 ti->period > 124) {
1745 #if 0
1746 #ifdef NCR53C9X_DEBUG
1747 scsipi_printaddr(ecb->xs->xs_periph);
1748 printf("async mode\n");
1749 #endif
1750 #endif
1751 ti->flags &= ~T_SYNCMODE;
1752 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1753 /*
1754 * target initiated negotiation
1755 */
1756 ti->offset = 0;
1757 ncr53c9x_sched_msgout(
1758 SEND_SDTR);
1759 }
1760 } else {
1761 int p;
1762
1763 p = ncr53c9x_stp2cpb(sc, ti->period);
1764 ti->period = ncr53c9x_cpb2stp(sc, p);
1765 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1766 /*
1767 * target initiated negotiation
1768 */
1769 if (ti->period <
1770 sc->sc_minsync)
1771 ti->period =
1772 sc->sc_minsync;
1773 if (ti->offset > 15)
1774 ti->offset = 15;
1775 ti->flags &= ~T_SYNCMODE;
1776 ncr53c9x_sched_msgout(
1777 SEND_SDTR);
1778 } else {
1779 /* we are sync */
1780 ti->flags |= T_SYNCMODE;
1781 }
1782 }
1783 ncr53c9x_update_xfer_mode(sc,
1784 ecb->xs->xs_periph->periph_target);
1785 sc->sc_flags &= ~NCR_SYNCHNEGO;
1786 ncr53c9x_setsync(sc, ti);
1787 break;
1788
1789 case MSG_EXT_WDTR:
1790 printf("%s: wide mode %d\n",
1791 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1792 if (sc->sc_imess[3] == 1) {
1793 ti->cfg3 |= NCRFASCFG3_EWIDE;
1794 ncr53c9x_setsync(sc, ti);
1795 } else
1796 ti->width = 0;
1797 /*
1798 * Device started width negotiation.
1799 */
1800 if (!(ti->flags & T_WDTRSENT))
1801 ncr53c9x_sched_msgout(SEND_WDTR);
1802 ti->flags &= ~(T_WIDE | T_WDTRSENT);
1803 break;
1804 default:
1805 scsipi_printaddr(ecb->xs->xs_periph);
1806 printf("unrecognized MESSAGE EXTENDED;"
1807 " sending REJECT\n");
1808 goto reject;
1809 }
1810 break;
1811
1812 default:
1813 NCR_MSGS(("ident "));
1814 scsipi_printaddr(ecb->xs->xs_periph);
1815 printf("unrecognized MESSAGE; sending REJECT\n");
1816 reject:
1817 ncr53c9x_sched_msgout(SEND_REJECT);
1818 break;
1819 }
1820 break;
1821
1822 case NCR_IDENTIFIED:
1823 /*
1824 * IDENTIFY message was received and queue tag is expected now
1825 */
1826 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1827 (sc->sc_msgify == 0)) {
1828 printf("%s: TAG reselect without IDENTIFY;"
1829 " MSG %x;"
1830 " sending DEVICE RESET\n",
1831 sc->sc_dev.dv_xname,
1832 sc->sc_imess[0]);
1833 goto reset;
1834 }
1835 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1836 sc->sc_imess[0], sc->sc_imess[1]);
1837 break;
1838
1839 case NCR_RESELECTED:
1840 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1841 sc->sc_msgify = sc->sc_imess[1];
1842 } else {
1843 printf("%s: reselect without IDENTIFY;"
1844 " MSG %x;"
1845 " sending DEVICE RESET\n",
1846 sc->sc_dev.dv_xname,
1847 sc->sc_imess[1]);
1848 goto reset;
1849 }
1850 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1851 break;
1852
1853 default:
1854 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1855 sc->sc_dev.dv_xname);
1856 reset:
1857 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1858 break;
1859
1860 abort:
1861 ncr53c9x_sched_msgout(SEND_ABORT);
1862 break;
1863 }
1864
1865 /* if we have more messages to send set ATN */
1866 if (sc->sc_msgpriq)
1867 NCRCMD(sc, NCRCMD_SETATN);
1868
1869 /* Ack last message byte */
1870 NCRCMD(sc, NCRCMD_MSGOK);
1871
1872 /* Done, reset message pointer. */
1873 sc->sc_flags &= ~NCR_DROP_MSGI;
1874 sc->sc_imlen = 0;
1875 }
1876
1877
1878 /*
1879 * Send the highest priority, scheduled message
1880 */
1881 void
1882 ncr53c9x_msgout(sc)
1883 struct ncr53c9x_softc *sc;
1884 {
1885 struct ncr53c9x_tinfo *ti;
1886 struct ncr53c9x_ecb *ecb;
1887 size_t size;
1888
1889 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1890 sc->sc_msgpriq, sc->sc_prevphase));
1891
1892 /*
1893 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1894 * condition on the SCSI bus. The 53c9x chip
1895 * automatically turns off ATN before sending the
1896 * message byte. (see also the comment below in the
1897 * default case when picking out a message to send)
1898 */
1899 if (sc->sc_flags & NCR_ATN) {
1900 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1901 new:
1902 NCRCMD(sc, NCRCMD_FLUSH);
1903 /* DELAY(1); */
1904 sc->sc_msgoutq = 0;
1905 sc->sc_omlen = 0;
1906 }
1907 } else {
1908 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1909 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1910 goto new;
1911 } else {
1912 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1913 sc->sc_dev.dv_xname, __LINE__);
1914 }
1915 }
1916
1917 if (sc->sc_omlen == 0) {
1918 /* Pick up highest priority message */
1919 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1920 sc->sc_msgoutq |= sc->sc_msgout;
1921 sc->sc_msgpriq &= ~sc->sc_msgout;
1922 sc->sc_omlen = 1; /* "Default" message len */
1923 switch (sc->sc_msgout) {
1924 case SEND_SDTR:
1925 ecb = sc->sc_nexus;
1926 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1927 sc->sc_omess[0] = MSG_EXTENDED;
1928 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1929 sc->sc_omess[2] = MSG_EXT_SDTR;
1930 sc->sc_omess[3] = ti->period;
1931 sc->sc_omess[4] = ti->offset;
1932 sc->sc_omlen = 5;
1933 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1934 ti->flags |= T_SYNCMODE;
1935 ncr53c9x_setsync(sc, ti);
1936 }
1937 break;
1938 case SEND_WDTR:
1939 ecb = sc->sc_nexus;
1940 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1941 sc->sc_omess[0] = MSG_EXTENDED;
1942 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1943 sc->sc_omess[2] = MSG_EXT_WDTR;
1944 sc->sc_omess[3] = ti->width;
1945 sc->sc_omlen = 4;
1946 break;
1947 case SEND_IDENTIFY:
1948 if (sc->sc_state != NCR_CONNECTED) {
1949 printf("%s at line %d: no nexus\n",
1950 sc->sc_dev.dv_xname, __LINE__);
1951 }
1952 ecb = sc->sc_nexus;
1953 sc->sc_omess[0] =
1954 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1955 break;
1956 case SEND_TAG:
1957 if (sc->sc_state != NCR_CONNECTED) {
1958 printf("%s at line %d: no nexus\n",
1959 sc->sc_dev.dv_xname, __LINE__);
1960 }
1961 ecb = sc->sc_nexus;
1962 sc->sc_omess[0] = ecb->tag[0];
1963 sc->sc_omess[1] = ecb->tag[1];
1964 sc->sc_omlen = 2;
1965 break;
1966 case SEND_DEV_RESET:
1967 sc->sc_flags |= NCR_ABORTING;
1968 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1969 ecb = sc->sc_nexus;
1970 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1971 ti->flags &= ~T_SYNCMODE;
1972 ncr53c9x_update_xfer_mode(sc,
1973 ecb->xs->xs_periph->periph_target);
1974 if ((ti->flags & T_SYNCHOFF) == 0)
1975 /* We can re-start sync negotiation */
1976 ti->flags |= T_NEGOTIATE;
1977 break;
1978 case SEND_PARITY_ERROR:
1979 sc->sc_omess[0] = MSG_PARITY_ERROR;
1980 break;
1981 case SEND_ABORT:
1982 sc->sc_flags |= NCR_ABORTING;
1983 sc->sc_omess[0] = MSG_ABORT;
1984 break;
1985 case SEND_INIT_DET_ERR:
1986 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1987 break;
1988 case SEND_REJECT:
1989 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1990 break;
1991 default:
1992 /*
1993 * We normally do not get here, since the chip
1994 * automatically turns off ATN before the last
1995 * byte of a message is sent to the target.
1996 * However, if the target rejects our (multi-byte)
1997 * message early by switching to MSG IN phase
1998 * ATN remains on, so the target may return to
1999 * MSG OUT phase. If there are no scheduled messages
2000 * left we send a NO-OP.
2001 *
2002 * XXX - Note that this leaves no useful purpose for
2003 * the NCR_ATN flag.
2004 */
2005 sc->sc_flags &= ~NCR_ATN;
2006 sc->sc_omess[0] = MSG_NOOP;
2007 break;
2008 }
2009 sc->sc_omp = sc->sc_omess;
2010 }
2011
2012 #ifdef DEBUG
2013 if (ncr53c9x_debug & NCR_SHOWMSGS) {
2014 int i;
2015
2016 NCR_MSGS(("<msgout:"));
2017 for (i = 0; i < sc->sc_omlen; i++)
2018 NCR_MSGS((" %02x", sc->sc_omess[i]));
2019 NCR_MSGS(("> "));
2020 }
2021 #endif
2022 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2023 /*
2024 * XXX fifo size
2025 */
2026 ncr53c9x_flushfifo(sc);
2027 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2028 NCRCMD(sc, NCRCMD_TRANS);
2029 } else {
2030 /* (re)send the message */
2031 size = min(sc->sc_omlen, sc->sc_maxxfer);
2032 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2033 /* Program the SCSI counter */
2034 NCR_SET_COUNT(sc, size);
2035
2036 /* Load the count in and start the message-out transfer */
2037 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2038 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2039 NCRDMA_GO(sc);
2040 }
2041 }
2042
2043 /*
2044 * This is the most critical part of the driver, and has to know
2045 * how to deal with *all* error conditions and phases from the SCSI
2046 * bus. If there are no errors and the DMA was active, then call the
2047 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2048 * and we can return from here without further processing.
2049 *
2050 * Most of this needs verifying.
2051 */
2052 int
2053 ncr53c9x_intr(arg)
2054 void *arg;
2055 {
2056 struct ncr53c9x_softc *sc = arg;
2057 struct ncr53c9x_ecb *ecb;
2058 struct scsipi_periph *periph;
2059 struct ncr53c9x_tinfo *ti;
2060 size_t size;
2061 int nfifo;
2062
2063 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state));
2064
2065 if (!NCRDMA_ISINTR(sc))
2066 return (0);
2067
2068 again:
2069 /* and what do the registers say... */
2070 ncr53c9x_readregs(sc);
2071
2072 sc->sc_intrcnt.ev_count++;
2073
2074 /*
2075 * At the moment, only a SCSI Bus Reset or Illegal
2076 * Command are classed as errors. A disconnect is a
2077 * valid condition, and we let the code check is the
2078 * "NCR_BUSFREE_OK" flag was set before declaring it
2079 * and error.
2080 *
2081 * Also, the status register tells us about "Gross
2082 * Errors" and "Parity errors". Only the Gross Error
2083 * is really bad, and the parity errors are dealt
2084 * with later
2085 *
2086 * TODO
2087 * If there are too many parity error, go to slow
2088 * cable mode ?
2089 */
2090
2091 /* SCSI Reset */
2092 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2093 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2094 NCRCMD(sc, NCRCMD_FLUSH);
2095 DELAY(1);
2096 }
2097 if (sc->sc_state != NCR_SBR) {
2098 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2099 ncr53c9x_init(sc, 0); /* Restart everything */
2100 return (1);
2101 }
2102 #if 0
2103 /*XXX*/ printf("<expected bus reset: "
2104 "[intr %x, stat %x, step %d]>\n",
2105 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2106 #endif
2107 if (sc->sc_nexus != NULL)
2108 panic("%s: nexus in reset state",
2109 sc->sc_dev.dv_xname);
2110 goto sched;
2111 }
2112
2113 ecb = sc->sc_nexus;
2114
2115 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2116 if (sc->sc_espintr & NCRINTR_ERR ||
2117 sc->sc_espstat & NCRSTAT_GE) {
2118
2119 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2120 /* Gross Error; no target ? */
2121 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2122 NCRCMD(sc, NCRCMD_FLUSH);
2123 DELAY(1);
2124 }
2125 if (sc->sc_state == NCR_CONNECTED ||
2126 sc->sc_state == NCR_SELECTING) {
2127 ecb->xs->error = XS_TIMEOUT;
2128 ncr53c9x_done(sc, ecb);
2129 }
2130 return (1);
2131 }
2132
2133 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2134 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2135 /*
2136 * Eat away "Illegal command" interrupt
2137 * on a ESP100 caused by a re-selection
2138 * while we were trying to select
2139 * another target.
2140 */
2141 #ifdef DEBUG
2142 printf("%s: ESP100 work-around activated\n",
2143 sc->sc_dev.dv_xname);
2144 #endif
2145 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2146 return (1);
2147 }
2148 /* illegal command, out of sync ? */
2149 printf("%s: illegal command: 0x%x "
2150 "(state %d, phase %x, prevphase %x)\n",
2151 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2152 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2153 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2154 NCRCMD(sc, NCRCMD_FLUSH);
2155 DELAY(1);
2156 }
2157 ncr53c9x_init(sc, 1); /* Restart everything */
2158 return (1);
2159 }
2160 }
2161 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2162
2163 /*
2164 * Call if DMA is active.
2165 *
2166 * If DMA_INTR returns true, then maybe go 'round the loop
2167 * again in case there is no more DMA queued, but a phase
2168 * change is expected.
2169 */
2170 if (NCRDMA_ISACTIVE(sc)) {
2171 int r = NCRDMA_INTR(sc);
2172 if (r == -1) {
2173 printf("%s: DMA error; resetting\n",
2174 sc->sc_dev.dv_xname);
2175 ncr53c9x_init(sc, 1);
2176 return 1;
2177 }
2178 /* If DMA active here, then go back to work... */
2179 if (NCRDMA_ISACTIVE(sc))
2180 return (1);
2181
2182 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2183 /*
2184 * DMA not completed. If we can not find a
2185 * acceptable explanation, print a diagnostic.
2186 */
2187 if (sc->sc_state == NCR_SELECTING)
2188 /*
2189 * This can happen if we are reselected
2190 * while using DMA to select a target.
2191 */
2192 /*void*/;
2193 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2194 /*
2195 * Our (multi-byte) message (eg SDTR) was
2196 * interrupted by the target to send
2197 * a MSG REJECT.
2198 * Print diagnostic if current phase
2199 * is not MESSAGE IN.
2200 */
2201 if (sc->sc_phase != MESSAGE_IN_PHASE)
2202 printf("%s: !TC on MSG OUT"
2203 " [intr %x, stat %x, step %d]"
2204 " prevphase %x, resid %lx\n",
2205 sc->sc_dev.dv_xname,
2206 sc->sc_espintr,
2207 sc->sc_espstat,
2208 sc->sc_espstep,
2209 sc->sc_prevphase,
2210 (u_long)sc->sc_omlen);
2211 } else if (sc->sc_dleft == 0) {
2212 /*
2213 * The DMA operation was started for
2214 * a DATA transfer. Print a diagnostic
2215 * if the DMA counter and TC bit
2216 * appear to be out of sync.
2217 */
2218 printf("%s: !TC on DATA XFER"
2219 " [intr %x, stat %x, step %d]"
2220 " prevphase %x, resid %x\n",
2221 sc->sc_dev.dv_xname,
2222 sc->sc_espintr,
2223 sc->sc_espstat,
2224 sc->sc_espstep,
2225 sc->sc_prevphase,
2226 ecb ? ecb->dleft : -1);
2227 }
2228 }
2229 }
2230
2231 /*
2232 * Check for less serious errors.
2233 */
2234 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2235 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2236 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2237 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2238 else
2239 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2240 }
2241
2242 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2243 sc->sc_msgify = 0;
2244 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>",
2245 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2246 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2247 NCRCMD(sc, NCRCMD_FLUSH);
2248 /* DELAY(1); */
2249 }
2250 /*
2251 * This command must (apparently) be issued within
2252 * 250mS of a disconnect. So here you are...
2253 */
2254 NCRCMD(sc, NCRCMD_ENSEL);
2255
2256 switch (sc->sc_state) {
2257 case NCR_RESELECTED:
2258 goto sched;
2259
2260 case NCR_SELECTING:
2261 {
2262 struct ncr53c9x_linfo *li;
2263
2264 ecb->xs->error = XS_SELTIMEOUT;
2265
2266 /* Selection timeout -- discard all LUNs if empty */
2267 periph = ecb->xs->xs_periph;
2268 ti = &sc->sc_tinfo[periph->periph_target];
2269 li = LIST_FIRST(&ti->luns);
2270 while (li != NULL) {
2271 if (li->untagged == NULL && li->used == 0) {
2272 if (li->lun < NCR_NLUN)
2273 ti->lun[li->lun] = NULL;
2274 LIST_REMOVE(li, link);
2275 free(li, M_DEVBUF);
2276 /*
2277 * Restart the search at the beginning
2278 */
2279 li = LIST_FIRST(&ti->luns);
2280 continue;
2281 }
2282 li = LIST_NEXT(li, link);
2283 }
2284 goto finish;
2285 }
2286 case NCR_CONNECTED:
2287 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2288 #ifdef NCR53C9X_DEBUG
2289 if (ecb != NULL)
2290 scsipi_printaddr(ecb->xs->xs_periph);
2291 printf("sync nego not completed!\n");
2292 #endif
2293 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2294 sc->sc_flags &= ~NCR_SYNCHNEGO;
2295 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2296 }
2297
2298 /* it may be OK to disconnect */
2299 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2300 /*
2301 * Section 5.1.1 of the SCSI 2 spec
2302 * suggests issuing a REQUEST SENSE
2303 * following an unexpected disconnect.
2304 * Some devices go into a contingent
2305 * allegiance condition when
2306 * disconnecting, and this is necessary
2307 * to clean up their state.
2308 */
2309 printf("%s: unexpected disconnect; ",
2310 sc->sc_dev.dv_xname);
2311 if ((ecb->flags & ECB_SENSE) != 0) {
2312 printf("resetting\n");
2313 goto reset;
2314 }
2315 printf("sending REQUEST SENSE\n");
2316 callout_stop(&ecb->xs->xs_callout);
2317 ncr53c9x_sense(sc, ecb);
2318 goto out;
2319 }
2320
2321 ecb->xs->error = XS_TIMEOUT;
2322 goto finish;
2323
2324 case NCR_DISCONNECT:
2325 sc->sc_nexus = NULL;
2326 goto sched;
2327
2328 case NCR_CMDCOMPLETE:
2329 goto finish;
2330 }
2331 }
2332
2333 switch (sc->sc_state) {
2334
2335 case NCR_SBR:
2336 printf("%s: waiting for SCSI Bus Reset to happen\n",
2337 sc->sc_dev.dv_xname);
2338 return (1);
2339
2340 case NCR_RESELECTED:
2341 /*
2342 * we must be continuing a message ?
2343 */
2344 printf("%s: unhandled reselect continuation, "
2345 "state %d, intr %02x\n",
2346 sc->sc_dev.dv_xname, sc->sc_state, sc->sc_espintr);
2347 ncr53c9x_init(sc, 1);
2348 return (1);
2349 break;
2350
2351 case NCR_IDENTIFIED:
2352 ecb = sc->sc_nexus;
2353 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2354 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2355 /*
2356 * Things are seriously fucked up.
2357 * Pull the brakes, i.e. reset
2358 */
2359 printf("%s: target didn't send tag: %d bytes in fifo\n",
2360 sc->sc_dev.dv_xname, i);
2361 /* Drain and display fifo */
2362 while (i-- > 0)
2363 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2364
2365 ncr53c9x_init(sc, 1);
2366 return (1);
2367 } else
2368 goto msgin;
2369
2370 break;
2371
2372 case NCR_IDLE:
2373 case NCR_SELECTING:
2374 ecb = sc->sc_nexus;
2375 if (sc->sc_espintr & NCRINTR_RESEL) {
2376 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2377 sc->sc_flags = 0;
2378 /*
2379 * If we're trying to select a
2380 * target ourselves, push our command
2381 * back into the ready list.
2382 */
2383 if (sc->sc_state == NCR_SELECTING) {
2384 NCR_INTS(("backoff selector "));
2385 callout_stop(&ecb->xs->xs_callout);
2386 ncr53c9x_dequeue(sc, ecb);
2387 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2388 ecb->flags |= ECB_READY;
2389 ecb = sc->sc_nexus = NULL;
2390 }
2391 sc->sc_state = NCR_RESELECTED;
2392 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2393 /*
2394 * Things are seriously fucked up.
2395 * Pull the brakes, i.e. reset
2396 */
2397 printf("%s: target didn't identify\n",
2398 sc->sc_dev.dv_xname);
2399 ncr53c9x_init(sc, 1);
2400 return (1);
2401 }
2402 /*
2403 * The C90 only inhibits FIFO writes until reselection
2404 * is complete, instead of waiting until the interrupt
2405 * status register has been read. So, if the reselect
2406 * happens while we were entering command bytes (for
2407 * another target) some of those bytes can appear in
2408 * the FIFO here, after the interrupt is taken.
2409 *
2410 * To remedy this situation, pull the Selection ID
2411 * and Identify message from the FIFO directly, and
2412 * ignore any extraneous fifo contents. Also, set
2413 * a flag that allows one Illegal Command Interrupt
2414 * to occur which the chip also generates as a result
2415 * of writing to the FIFO during a reselect.
2416 */
2417 if (sc->sc_rev == NCR_VARIANT_ESP100) {
2418 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
2419 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO);
2420 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO);
2421 sc->sc_imlen = 2;
2422 if (nfifo != 2) {
2423 /* Flush the rest */
2424 NCRCMD(sc, NCRCMD_FLUSH);
2425 }
2426 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2427 if (nfifo > 2)
2428 nfifo = 2; /* We fixed it.. */
2429 } else
2430 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2431
2432 if (nfifo != 2) {
2433 printf("%s: RESELECT: %d bytes in FIFO! "
2434 "[intr %x, stat %x, step %d, "
2435 "prevphase %x]\n",
2436 sc->sc_dev.dv_xname,
2437 nfifo,
2438 sc->sc_espintr,
2439 sc->sc_espstat,
2440 sc->sc_espstep,
2441 sc->sc_prevphase);
2442 ncr53c9x_init(sc, 1);
2443 return (1);
2444 }
2445 sc->sc_selid = sc->sc_imess[0];
2446 NCR_INTS(("selid=%02x ", sc->sc_selid));
2447
2448 /* Handle identify message */
2449 ncr53c9x_msgin(sc);
2450
2451 if (sc->sc_state != NCR_CONNECTED &&
2452 sc->sc_state != NCR_IDENTIFIED) {
2453 /* IDENTIFY fail?! */
2454 printf("%s: identify failed, "
2455 "state %d, intr %02x\n",
2456 sc->sc_dev.dv_xname, sc->sc_state,
2457 sc->sc_espintr);
2458 ncr53c9x_init(sc, 1);
2459 return (1);
2460 }
2461 goto shortcut; /* ie. next phase expected soon */
2462 }
2463
2464 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2465 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2466 /*
2467 * Arbitration won; examine the `step' register
2468 * to determine how far the selection could progress.
2469 */
2470 ecb = sc->sc_nexus;
2471 if (ecb == NULL)
2472 panic("ncr53c9x: no nexus");
2473
2474 periph = ecb->xs->xs_periph;
2475 ti = &sc->sc_tinfo[periph->periph_target];
2476
2477 switch (sc->sc_espstep) {
2478 case 0:
2479 /*
2480 * The target did not respond with a
2481 * message out phase - probably an old
2482 * device that doesn't recognize ATN.
2483 * Clear ATN and just continue, the
2484 * target should be in the command
2485 * phase.
2486 * XXXX check for command phase?
2487 */
2488 NCRCMD(sc, NCRCMD_RSTATN);
2489 break;
2490 case 1:
2491 if ((ti->flags & T_NEGOTIATE) == 0 &&
2492 ecb->tag[0] == 0) {
2493 printf("%s: step 1 & !NEG\n",
2494 sc->sc_dev.dv_xname);
2495 goto reset;
2496 }
2497 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2498 printf("%s: !MSGOUT\n",
2499 sc->sc_dev.dv_xname);
2500 goto reset;
2501 }
2502 if (ti->flags & T_WIDE) {
2503 ti->flags |= T_WDTRSENT;
2504 ncr53c9x_sched_msgout(SEND_WDTR);
2505 }
2506 if (ti->flags & T_NEGOTIATE) {
2507 /* Start negotiating */
2508 ti->period = sc->sc_minsync;
2509 ti->offset = 15;
2510 sc->sc_flags |= NCR_SYNCHNEGO;
2511 if (ecb->tag[0])
2512 ncr53c9x_sched_msgout(
2513 SEND_TAG|SEND_SDTR);
2514 else
2515 ncr53c9x_sched_msgout(
2516 SEND_SDTR);
2517 } else {
2518 /* Could not do ATN3 so send TAG */
2519 ncr53c9x_sched_msgout(SEND_TAG);
2520 }
2521 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2522 break;
2523 case 3:
2524 /*
2525 * Grr, this is supposed to mean
2526 * "target left command phase prematurely".
2527 * It seems to happen regularly when
2528 * sync mode is on.
2529 * Look at FIFO to see if command went out.
2530 * (Timing problems?)
2531 */
2532 if (sc->sc_features & NCR_F_DMASELECT) {
2533 if (sc->sc_cmdlen == 0)
2534 /* Hope for the best.. */
2535 break;
2536 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2537 & NCRFIFO_FF) == 0) {
2538 /* Hope for the best.. */
2539 break;
2540 }
2541 printf("(%s:%d:%d): selection failed;"
2542 " %d left in FIFO "
2543 "[intr %x, stat %x, step %d]\n",
2544 sc->sc_dev.dv_xname,
2545 periph->periph_target,
2546 periph->periph_lun,
2547 NCR_READ_REG(sc, NCR_FFLAG)
2548 & NCRFIFO_FF,
2549 sc->sc_espintr, sc->sc_espstat,
2550 sc->sc_espstep);
2551 NCRCMD(sc, NCRCMD_FLUSH);
2552 ncr53c9x_sched_msgout(SEND_ABORT);
2553 return (1);
2554 case 2:
2555 /* Select stuck at Command Phase */
2556 NCRCMD(sc, NCRCMD_FLUSH);
2557 break;
2558 case 4:
2559 if (sc->sc_features & NCR_F_DMASELECT &&
2560 sc->sc_cmdlen != 0)
2561 printf("(%s:%d:%d): select; "
2562 "%lu left in DMA buffer "
2563 "[intr %x, stat %x, step %d]\n",
2564 sc->sc_dev.dv_xname,
2565 periph->periph_target,
2566 periph->periph_lun,
2567 (u_long)sc->sc_cmdlen,
2568 sc->sc_espintr,
2569 sc->sc_espstat,
2570 sc->sc_espstep);
2571 /* So far, everything went fine */
2572 break;
2573 }
2574
2575 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2576 /* Do an implicit RESTORE POINTERS. */
2577 sc->sc_dp = ecb->daddr;
2578 sc->sc_dleft = ecb->dleft;
2579 sc->sc_state = NCR_CONNECTED;
2580 break;
2581
2582 } else {
2583
2584 printf("%s: unexpected status after select"
2585 ": [intr %x, stat %x, step %x]\n",
2586 sc->sc_dev.dv_xname,
2587 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2588 NCRCMD(sc, NCRCMD_FLUSH);
2589 DELAY(1);
2590 goto reset;
2591 }
2592 if (sc->sc_state == NCR_IDLE) {
2593 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2594 return (0);
2595 }
2596 break;
2597
2598 case NCR_CONNECTED:
2599 if ((sc->sc_flags & NCR_ICCS) != 0) {
2600 /* "Initiate Command Complete Steps" in progress */
2601 u_char msg;
2602
2603 sc->sc_flags &= ~NCR_ICCS;
2604
2605 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2606 printf("%s: ICCS: "
2607 ": [intr %x, stat %x, step %x]\n",
2608 sc->sc_dev.dv_xname,
2609 sc->sc_espintr, sc->sc_espstat,
2610 sc->sc_espstep);
2611 }
2612 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2613 if (sc->sc_imlen < 2)
2614 printf("%s: can't get status, only %d bytes\n",
2615 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2616 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2617 msg = sc->sc_imess[sc->sc_imlen - 1];
2618 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2619 if (msg == MSG_CMDCOMPLETE) {
2620 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2621 ? 0 : sc->sc_dleft;
2622 if ((ecb->flags & ECB_SENSE) == 0)
2623 ecb->xs->resid = ecb->dleft;
2624 sc->sc_state = NCR_CMDCOMPLETE;
2625 } else
2626 printf("%s: STATUS_PHASE: msg %d\n",
2627 sc->sc_dev.dv_xname, msg);
2628 sc->sc_imlen = 0;
2629 NCRCMD(sc, NCRCMD_MSGOK);
2630 goto shortcut; /* ie. wait for disconnect */
2631 }
2632 break;
2633
2634 default:
2635 printf("%s: invalid state: %d\n",
2636 sc->sc_dev.dv_xname, sc->sc_state);
2637 goto reset;
2638 }
2639
2640 /*
2641 * Driver is now in state NCR_CONNECTED, i.e. we
2642 * have a current command working the SCSI bus.
2643 */
2644 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2645 panic("ncr53c9x: no nexus");
2646 }
2647
2648 switch (sc->sc_phase) {
2649 case MESSAGE_OUT_PHASE:
2650 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2651 ncr53c9x_msgout(sc);
2652 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2653 break;
2654
2655 case MESSAGE_IN_PHASE:
2656 msgin:
2657 NCR_PHASE(("MESSAGE_IN_PHASE "));
2658 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2659 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2660 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
2661 NCRCMD(sc, NCRCMD_FLUSH);
2662 }
2663 sc->sc_flags |= NCR_WAITI;
2664 NCRCMD(sc, NCRCMD_TRANS);
2665 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2666 if ((sc->sc_flags & NCR_WAITI) == 0) {
2667 printf("%s: MSGIN: unexpected FC bit: "
2668 "[intr %x, stat %x, step %x]\n",
2669 sc->sc_dev.dv_xname,
2670 sc->sc_espintr, sc->sc_espstat,
2671 sc->sc_espstep);
2672 }
2673 sc->sc_flags &= ~NCR_WAITI;
2674 ncr53c9x_rdfifo(sc,
2675 (sc->sc_prevphase == sc->sc_phase) ?
2676 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2677 ncr53c9x_msgin(sc);
2678 } else {
2679 printf("%s: MSGIN: weird bits: "
2680 "[intr %x, stat %x, step %x]\n",
2681 sc->sc_dev.dv_xname,
2682 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2683 }
2684 sc->sc_prevphase = MESSAGE_IN_PHASE;
2685 goto shortcut; /* i.e. expect data to be ready */
2686 break;
2687
2688 case COMMAND_PHASE:
2689 /*
2690 * Send the command block. Normally we don't see this
2691 * phase because the SEL_ATN command takes care of
2692 * all this. However, we end up here if either the
2693 * target or we wanted to exchange some more messages
2694 * first (e.g. to start negotiations).
2695 */
2696
2697 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2698 ecb->cmd.cmd.opcode, ecb->clen));
2699 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2700 NCRCMD(sc, NCRCMD_FLUSH);
2701 /* DELAY(1);*/
2702 }
2703 if (sc->sc_features & NCR_F_DMASELECT) {
2704 /* setup DMA transfer for command */
2705 size = ecb->clen;
2706 sc->sc_cmdlen = size;
2707 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2708 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2709 0, &size);
2710 /* Program the SCSI counter */
2711 NCR_SET_COUNT(sc, size);
2712
2713 /* load the count in */
2714 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2715
2716 /* start the command transfer */
2717 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2718 NCRDMA_GO(sc);
2719 } else {
2720 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2721 NCRCMD(sc, NCRCMD_TRANS);
2722 }
2723 sc->sc_prevphase = COMMAND_PHASE;
2724 break;
2725
2726 case DATA_OUT_PHASE:
2727 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2728 NCRCMD(sc, NCRCMD_FLUSH);
2729 size = min(sc->sc_dleft, sc->sc_maxxfer);
2730 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2731 sc->sc_prevphase = DATA_OUT_PHASE;
2732 goto setup_xfer;
2733
2734 case DATA_IN_PHASE:
2735 NCR_PHASE(("DATA_IN_PHASE "));
2736 if (sc->sc_rev == NCR_VARIANT_ESP100)
2737 NCRCMD(sc, NCRCMD_FLUSH);
2738 size = min(sc->sc_dleft, sc->sc_maxxfer);
2739 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2740 sc->sc_prevphase = DATA_IN_PHASE;
2741 setup_xfer:
2742 /* Target returned to data phase: wipe "done" memory */
2743 ecb->flags &= ~ECB_TENTATIVE_DONE;
2744
2745 /* Program the SCSI counter */
2746 NCR_SET_COUNT(sc, size);
2747
2748 /* load the count in */
2749 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2750
2751 /*
2752 * Note that if `size' is 0, we've already transceived
2753 * all the bytes we want but we're still in DATA PHASE.
2754 * Apparently, the device needs padding. Also, a
2755 * transfer size of 0 means "maximum" to the chip
2756 * DMA logic.
2757 */
2758 NCRCMD(sc,
2759 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2760 NCRDMA_GO(sc);
2761 return (1);
2762
2763 case STATUS_PHASE:
2764 NCR_PHASE(("STATUS_PHASE "));
2765 sc->sc_flags |= NCR_ICCS;
2766 NCRCMD(sc, NCRCMD_ICCS);
2767 sc->sc_prevphase = STATUS_PHASE;
2768 goto shortcut; /* i.e. expect status results soon */
2769 break;
2770
2771 case INVALID_PHASE:
2772 break;
2773
2774 default:
2775 printf("%s: unexpected bus phase; resetting\n",
2776 sc->sc_dev.dv_xname);
2777 goto reset;
2778 }
2779
2780 out:
2781 return (1);
2782
2783 reset:
2784 ncr53c9x_init(sc, 1);
2785 goto out;
2786
2787 finish:
2788 ncr53c9x_done(sc, ecb);
2789 goto out;
2790
2791 sched:
2792 sc->sc_state = NCR_IDLE;
2793 ncr53c9x_sched(sc);
2794 goto out;
2795
2796 shortcut:
2797 /*
2798 * The idea is that many of the SCSI operations take very little
2799 * time, and going away and getting interrupted is too high an
2800 * overhead to pay. For example, selecting, sending a message
2801 * and command and then doing some work can be done in one "pass".
2802 *
2803 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2804 * at 40MHz. This needs testing.
2805 */
2806 {
2807 struct timeval wait, cur;
2808
2809 microtime(&wait);
2810 wait.tv_usec += 50 / sc->sc_freq;
2811 if (wait.tv_usec > 1000000) {
2812 wait.tv_sec++;
2813 wait.tv_usec -= 1000000;
2814 }
2815 do {
2816 if (NCRDMA_ISINTR(sc))
2817 goto again;
2818 microtime(&cur);
2819 } while (cur.tv_sec <= wait.tv_sec &&
2820 cur.tv_usec <= wait.tv_usec);
2821 }
2822 goto out;
2823 }
2824
2825 void
2826 ncr53c9x_abort(sc, ecb)
2827 struct ncr53c9x_softc *sc;
2828 struct ncr53c9x_ecb *ecb;
2829 {
2830
2831 /* 2 secs for the abort */
2832 ecb->timeout = NCR_ABORT_TIMEOUT;
2833 ecb->flags |= ECB_ABORT;
2834
2835 if (ecb == sc->sc_nexus) {
2836 /*
2837 * If we're still selecting, the message will be scheduled
2838 * after selection is complete.
2839 */
2840 if (sc->sc_state == NCR_CONNECTED)
2841 ncr53c9x_sched_msgout(SEND_ABORT);
2842
2843 /*
2844 * Reschedule timeout.
2845 */
2846 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout),
2847 ncr53c9x_timeout, ecb);
2848 } else {
2849 /*
2850 * Just leave the command where it is.
2851 * XXX - what choice do we have but to reset the SCSI
2852 * eventually?
2853 */
2854 if (sc->sc_state == NCR_IDLE)
2855 ncr53c9x_sched(sc);
2856 }
2857 }
2858
2859 void
2860 ncr53c9x_timeout(arg)
2861 void *arg;
2862 {
2863 struct ncr53c9x_ecb *ecb = arg;
2864 struct scsipi_xfer *xs = ecb->xs;
2865 struct scsipi_periph *periph = xs->xs_periph;
2866 struct ncr53c9x_softc *sc =
2867 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2868 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2869 int s;
2870
2871 scsipi_printaddr(periph);
2872 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2873 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2874 "msg(q %x,o %x) %s>",
2875 sc->sc_dev.dv_xname,
2876 ecb, ecb->flags, ecb->dleft, ecb->stat,
2877 sc->sc_state, sc->sc_nexus,
2878 NCR_READ_REG(sc, NCR_STAT),
2879 sc->sc_phase, sc->sc_prevphase,
2880 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2881 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2882 #if NCR53C9X_DEBUG > 1
2883 printf("TRACE: %s.", ecb->trace);
2884 #endif
2885
2886 s = splbio();
2887
2888 if (ecb->flags & ECB_ABORT) {
2889 /* abort timed out */
2890 printf(" AGAIN\n");
2891
2892 ncr53c9x_init(sc, 1);
2893 } else {
2894 /* abort the operation that has timed out */
2895 printf("\n");
2896 xs->error = XS_TIMEOUT;
2897 ncr53c9x_abort(sc, ecb);
2898
2899 /* Disable sync mode if stuck in a data phase */
2900 if (ecb == sc->sc_nexus &&
2901 (ti->flags & T_SYNCMODE) != 0 &&
2902 (sc->sc_phase & (MSGI|CDI)) == 0) {
2903 /* XXX ASYNC CALLBACK! */
2904 scsipi_printaddr(periph);
2905 printf("sync negotiation disabled\n");
2906 sc->sc_cfflags |=
2907 (1 << ((periph->periph_target & 7) + 8));
2908 ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2909 }
2910 }
2911
2912 splx(s);
2913 }
2914
2915 void
2916 ncr53c9x_watch(arg)
2917 void *arg;
2918 {
2919 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2920 struct ncr53c9x_tinfo *ti;
2921 struct ncr53c9x_linfo *li;
2922 int t, s;
2923 /* Delete any structures that have not been used in 10min. */
2924 time_t old = time.tv_sec - (10 * 60);
2925
2926 s = splbio();
2927 for (t = 0; t < sc->sc_ntarg; t++) {
2928 ti = &sc->sc_tinfo[t];
2929 li = LIST_FIRST(&ti->luns);
2930 while (li) {
2931 if (li->last_used < old &&
2932 li->untagged == NULL &&
2933 li->used == 0) {
2934 if (li->lun < NCR_NLUN)
2935 ti->lun[li->lun] = NULL;
2936 LIST_REMOVE(li, link);
2937 free(li, M_DEVBUF);
2938 /* Restart the search at the beginning */
2939 li = LIST_FIRST(&ti->luns);
2940 continue;
2941 }
2942 li = LIST_NEXT(li, link);
2943 }
2944 }
2945 splx(s);
2946 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2947 }
2948
2949