ncr53c9x.c revision 1.121
1 /* $NetBSD: ncr53c9x.c,v 1.121 2006/10/04 15:59:08 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.121 2006/10/04 15:59:08 christos Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/callout.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/malloc.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 #include <sys/pool.h> 94 #include <sys/scsiio.h> 95 96 #include <dev/scsipi/scsi_spc.h> 97 #include <dev/scsipi/scsi_all.h> 98 #include <dev/scsipi/scsipi_all.h> 99 #include <dev/scsipi/scsiconf.h> 100 #include <dev/scsipi/scsi_message.h> 101 102 #include <dev/ic/ncr53c9xreg.h> 103 #include <dev/ic/ncr53c9xvar.h> 104 105 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 106 #ifdef DEBUG 107 int ncr53c9x_notag = 0; 108 #endif 109 110 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 111 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 112 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 113 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 114 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 115 struct scsipi_xfer *, int); 116 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 117 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 118 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 119 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 120 /*static*/ void ncr53c9x_timeout(void *arg); 121 /*static*/ void ncr53c9x_watch(void *arg); 122 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 123 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 124 struct ncr53c9x_ecb *); 125 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 126 caddr_t, int, struct proc *); 127 128 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 129 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 130 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 131 132 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 133 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 134 struct ncr53c9x_tinfo *); 135 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 136 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 137 int64_t lun); 138 139 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 140 141 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 142 #define NCR_RDFIFO_START 0 143 #define NCR_RDFIFO_CONTINUE 1 144 145 146 #define NCR_SET_COUNT(sc, size) do { \ 147 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 148 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 149 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 150 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 151 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 152 } \ 153 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 154 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 155 } \ 156 } while (0) 157 158 static int ecb_pool_initialized = 0; 159 static struct pool ecb_pool; 160 161 /* 162 * Names for the NCR53c9x variants, corresponding to the variant tags 163 * in ncr53c9xvar.h. 164 */ 165 static const char *ncr53c9x_variant_names[] = { 166 "ESP100", 167 "ESP100A", 168 "ESP200", 169 "NCR53C94", 170 "NCR53C96", 171 "ESP406", 172 "FAS408", 173 "FAS216", 174 "AM53C974", 175 "FAS366/HME", 176 "NCR53C90 (86C01)", 177 }; 178 179 /* 180 * Search linked list for LUN info by LUN id. 181 */ 182 static struct ncr53c9x_linfo * 183 ncr53c9x_lunsearch(ti, lun) 184 struct ncr53c9x_tinfo *ti; 185 int64_t lun; 186 { 187 struct ncr53c9x_linfo *li; 188 LIST_FOREACH(li, &ti->luns, link) 189 if (li->lun == lun) 190 return (li); 191 return (NULL); 192 } 193 194 /* 195 * Attach this instance, and then all the sub-devices 196 */ 197 void 198 ncr53c9x_attach(sc) 199 struct ncr53c9x_softc *sc; 200 { 201 struct scsipi_adapter *adapt = &sc->sc_adapter; 202 struct scsipi_channel *chan = &sc->sc_channel; 203 204 simple_lock_init(&sc->sc_lock); 205 206 /* 207 * Note, the front-end has set us up to print the chip variation. 208 */ 209 if (sc->sc_rev >= NCR_VARIANT_MAX) { 210 printf("\n%s: unknown variant %d, devices not attached\n", 211 sc->sc_dev.dv_xname, sc->sc_rev); 212 return; 213 } 214 215 printf(": %s, %dMHz, SCSI ID %d\n", 216 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 217 218 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8; 219 220 /* 221 * Allocate SCSI message buffers. 222 * Front-ends can override allocation to avoid alignment 223 * handling in the DMA engines. Note that that ncr53c9x_msgout() 224 * can request a 1 byte DMA transfer. 225 */ 226 if (sc->sc_omess == NULL) 227 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 228 229 if (sc->sc_imess == NULL) 230 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 231 232 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]), 233 M_DEVBUF, M_NOWAIT | M_ZERO); 234 235 if (!sc->sc_omess || !sc->sc_imess || !sc->sc_tinfo) { 236 printf("out of memory\n"); 237 return; 238 } 239 240 callout_init(&sc->sc_watchdog); 241 242 /* 243 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 244 * from now on. 245 */ 246 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 247 sc->sc_rev = NCR_VARIANT_ESP100; 248 249 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 250 251 /* The value *must not* be == 1. Make it 2 */ 252 if (sc->sc_ccf == 1) 253 sc->sc_ccf = 2; 254 255 /* 256 * The recommended timeout is 250ms. This register is loaded 257 * with a value calculated as follows, from the docs: 258 * 259 * (timout period) x (CLK frequency) 260 * reg = ------------------------------------- 261 * 8192 x (Clock Conversion Factor) 262 * 263 * Since CCF has a linear relation to CLK, this generally computes 264 * to the constant of 153. 265 */ 266 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 267 268 /* CCF register only has 3 bits; 0 is actually 8 */ 269 sc->sc_ccf &= 7; 270 271 /* 272 * Fill in the scsipi_adapter. 273 */ 274 adapt->adapt_dev = &sc->sc_dev; 275 adapt->adapt_nchannels = 1; 276 adapt->adapt_openings = 256; 277 adapt->adapt_max_periph = 256; 278 adapt->adapt_ioctl = ncr53c9x_ioctl; 279 /* adapt_request initialized by front-end */ 280 /* adapt_minphys initialized by front-end */ 281 282 /* 283 * Fill in the scsipi_channel. 284 */ 285 memset(chan, 0, sizeof(*chan)); 286 chan->chan_adapter = adapt; 287 chan->chan_bustype = &scsi_bustype; 288 chan->chan_channel = 0; 289 chan->chan_ntargets = sc->sc_ntarg; 290 chan->chan_nluns = 8; 291 chan->chan_id = sc->sc_id; 292 293 /* 294 * Add reference to adapter so that we drop the reference after 295 * config_found() to make sure the adatper is disabled. 296 */ 297 if (scsipi_adapter_addref(adapt) != 0) { 298 printf("%s: unable to enable controller\n", 299 sc->sc_dev.dv_xname); 300 return; 301 } 302 303 /* Reset state & bus */ 304 sc->sc_cfflags = device_cfdata(&sc->sc_dev)->cf_flags; 305 sc->sc_state = 0; 306 ncr53c9x_init(sc, 1); 307 308 /* 309 * Now try to attach all the sub-devices 310 */ 311 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 312 313 scsipi_adapter_delref(adapt); 314 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc); 315 } 316 317 int 318 ncr53c9x_detach(sc, flags) 319 struct ncr53c9x_softc *sc; 320 int flags; 321 { 322 int error; 323 324 if (sc->sc_child) { 325 error = config_detach(sc->sc_child, flags); 326 if (error) 327 return (error); 328 } 329 330 free(sc->sc_imess, M_DEVBUF); 331 free(sc->sc_omess, M_DEVBUF); 332 333 return (0); 334 } 335 336 /* 337 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 338 * only this controller, but kills any on-going commands, and also stops 339 * and resets the DMA. 340 * 341 * After reset, registers are loaded with the defaults from the attach 342 * routine above. 343 */ 344 void 345 ncr53c9x_reset(sc) 346 struct ncr53c9x_softc *sc; 347 { 348 349 /* reset DMA first */ 350 NCRDMA_RESET(sc); 351 352 /* reset SCSI chip */ 353 NCRCMD(sc, NCRCMD_RSTCHIP); 354 NCRCMD(sc, NCRCMD_NOP); 355 DELAY(500); 356 357 /* do these backwards, and fall through */ 358 switch (sc->sc_rev) { 359 case NCR_VARIANT_ESP406: 360 case NCR_VARIANT_FAS408: 361 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 362 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 363 case NCR_VARIANT_AM53C974: 364 case NCR_VARIANT_FAS216: 365 case NCR_VARIANT_NCR53C94: 366 case NCR_VARIANT_NCR53C96: 367 case NCR_VARIANT_ESP200: 368 sc->sc_features |= NCR_F_HASCFG3; 369 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 370 case NCR_VARIANT_ESP100A: 371 sc->sc_features |= NCR_F_SELATN3; 372 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 373 case NCR_VARIANT_ESP100: 374 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 375 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 376 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 377 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 378 break; 379 380 case NCR_VARIANT_FAS366: 381 sc->sc_features |= 382 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 383 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 384 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 385 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 386 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 387 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 388 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 389 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 390 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 391 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 392 break; 393 394 default: 395 printf("%s: unknown revision code, assuming ESP100\n", 396 sc->sc_dev.dv_xname); 397 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 398 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 399 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 400 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 401 } 402 403 if (sc->sc_rev == NCR_VARIANT_AM53C974) 404 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 405 406 #if 0 407 printf("%s: ncr53c9x_reset: revision %d\n", 408 sc->sc_dev.dv_xname, sc->sc_rev); 409 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 410 "ccf 0x%x, timeout 0x%x\n", 411 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 412 sc->sc_ccf, sc->sc_timeout); 413 #endif 414 } 415 416 /* 417 * Reset the SCSI bus, but not the chip 418 */ 419 void 420 ncr53c9x_scsi_reset(sc) 421 struct ncr53c9x_softc *sc; 422 { 423 424 (*sc->sc_glue->gl_dma_stop)(sc); 425 426 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 427 NCRCMD(sc, NCRCMD_RSTSCSI); 428 } 429 430 /* 431 * Initialize ncr53c9x state machine 432 */ 433 void 434 ncr53c9x_init(sc, doreset) 435 struct ncr53c9x_softc *sc; 436 int doreset; 437 { 438 struct ncr53c9x_ecb *ecb; 439 struct ncr53c9x_linfo *li; 440 int i, r; 441 442 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 443 444 if (!ecb_pool_initialized) { 445 /* All instances share this pool */ 446 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 447 "ncr53c9x_ecb", NULL); 448 /* make sure to always have some items to play with */ 449 if (pool_prime(&ecb_pool, 1) == ENOMEM) { 450 printf("WARNING: not enough memory for ncr53c9x_ecb\n"); 451 } 452 ecb_pool_initialized = 1; 453 } 454 455 if (sc->sc_state == 0) { 456 /* First time through; initialize. */ 457 458 TAILQ_INIT(&sc->ready_list); 459 sc->sc_nexus = NULL; 460 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 461 for (r = 0; r < sc->sc_ntarg; r++) { 462 LIST_INIT(&sc->sc_tinfo[r].luns); 463 } 464 } else { 465 /* Cancel any active commands. */ 466 sc->sc_state = NCR_CLEANING; 467 sc->sc_msgify = 0; 468 if ((ecb = sc->sc_nexus) != NULL) { 469 ecb->xs->error = XS_TIMEOUT; 470 ncr53c9x_done(sc, ecb); 471 } 472 /* Cancel outstanding disconnected commands on each LUN */ 473 for (r = 0; r < sc->sc_ntarg; r++) { 474 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 475 if ((ecb = li->untagged) != NULL) { 476 li->untagged = NULL; 477 /* 478 * XXXXXXX 479 * 480 * Should we terminate a command 481 * that never reached the disk? 482 */ 483 li->busy = 0; 484 ecb->xs->error = XS_TIMEOUT; 485 ncr53c9x_done(sc, ecb); 486 } 487 for (i = 0; i < 256; i++) 488 if ((ecb = li->queued[i])) { 489 li->queued[i] = NULL; 490 ecb->xs->error = XS_TIMEOUT; 491 ncr53c9x_done(sc, ecb); 492 } 493 li->used = 0; 494 } 495 } 496 } 497 498 /* 499 * reset the chip to a known state 500 */ 501 ncr53c9x_reset(sc); 502 503 sc->sc_flags = 0; 504 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 505 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 506 507 for (r = 0; r < sc->sc_ntarg; r++) { 508 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 509 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 510 511 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<((r&7)+8)))) 512 ? 0 : T_SYNCHOFF) | 513 ((sc->sc_cfflags & (1<<(r&7))) ? T_RSELECTOFF : 0); 514 #ifdef DEBUG 515 if (ncr53c9x_notag) 516 ti->flags &= ~T_TAG; 517 #endif 518 ti->period = sc->sc_minsync; 519 ti->offset = 0; 520 ti->cfg3 = 0; 521 522 ncr53c9x_update_xfer_mode(sc, r); 523 } 524 525 if (doreset) { 526 sc->sc_state = NCR_SBR; 527 NCRCMD(sc, NCRCMD_RSTSCSI); 528 } else { 529 sc->sc_state = NCR_IDLE; 530 ncr53c9x_sched(sc); 531 } 532 533 /* Notify upper layer */ 534 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_RESET, NULL); 535 } 536 537 /* 538 * Read the NCR registers, and save their contents for later use. 539 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 540 * NCR_INTR - so make sure it is the last read. 541 * 542 * I think that (from reading the docs) most bits in these registers 543 * only make sense when he DMA CSR has an interrupt showing. Call only 544 * if an interrupt is pending. 545 */ 546 inline void 547 ncr53c9x_readregs(sc) 548 struct ncr53c9x_softc *sc; 549 { 550 551 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 552 /* Only the stepo bits are of interest */ 553 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 554 555 if (sc->sc_rev == NCR_VARIANT_FAS366) 556 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 557 558 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 559 560 if (sc->sc_glue->gl_clear_latched_intr != NULL) 561 (*sc->sc_glue->gl_clear_latched_intr)(sc); 562 563 /* 564 * Determine the SCSI bus phase, return either a real SCSI bus phase 565 * or some pseudo phase we use to detect certain exceptions. 566 */ 567 568 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 569 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 570 571 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 572 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 573 } 574 575 /* 576 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 577 */ 578 static inline int 579 ncr53c9x_stp2cpb(sc, period) 580 struct ncr53c9x_softc *sc; 581 int period; 582 { 583 int v; 584 v = (sc->sc_freq * period) / 250; 585 if (ncr53c9x_cpb2stp(sc, v) < period) 586 /* Correct round-down error */ 587 v++; 588 return (v); 589 } 590 591 static inline void 592 ncr53c9x_setsync(sc, ti) 593 struct ncr53c9x_softc *sc; 594 struct ncr53c9x_tinfo *ti; 595 { 596 u_char syncoff, synctp; 597 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 598 599 if (ti->flags & T_SYNCMODE) { 600 syncoff = ti->offset; 601 synctp = ncr53c9x_stp2cpb(sc, ti->period); 602 if (sc->sc_features & NCR_F_FASTSCSI) { 603 /* 604 * If the period is 200ns or less (ti->period <= 50), 605 * put the chip in Fast SCSI mode. 606 */ 607 if (ti->period <= 50) 608 /* 609 * There are (at least) 4 variations of the 610 * configuration 3 register. The drive attach 611 * routine sets the appropriate bit to put the 612 * chip into Fast SCSI mode so that it doesn't 613 * have to be figured out here each time. 614 */ 615 cfg3 |= sc->sc_cfg3_fscsi; 616 } 617 618 /* 619 * Am53c974 requires different SYNCTP values when the 620 * FSCSI bit is off. 621 */ 622 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 623 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 624 synctp--; 625 } else { 626 syncoff = 0; 627 synctp = 0; 628 } 629 630 if (sc->sc_features & NCR_F_HASCFG3) 631 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 632 633 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 634 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 635 } 636 637 /* 638 * Send a command to a target, set the driver state to NCR_SELECTING 639 * and let the caller take care of the rest. 640 * 641 * Keeping this as a function allows me to say that this may be done 642 * by DMA instead of programmed I/O soon. 643 */ 644 void 645 ncr53c9x_select(sc, ecb) 646 struct ncr53c9x_softc *sc; 647 struct ncr53c9x_ecb *ecb; 648 { 649 struct scsipi_periph *periph = ecb->xs->xs_periph; 650 int target = periph->periph_target; 651 int lun = periph->periph_lun; 652 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 653 int tiflags = ti->flags; 654 u_char *cmd; 655 int clen; 656 int selatn3, selatns; 657 size_t dmasize; 658 659 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 660 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 661 662 sc->sc_state = NCR_SELECTING; 663 /* 664 * Schedule the timeout now, the first time we will go away 665 * expecting to come back due to an interrupt, because it is 666 * always possible that the interrupt may never happen. 667 */ 668 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 669 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 670 ncr53c9x_timeout, ecb); 671 } 672 673 /* 674 * The docs say the target register is never reset, and I 675 * can't think of a better place to set it 676 */ 677 if (sc->sc_rev == NCR_VARIANT_FAS366) { 678 NCRCMD(sc, NCRCMD_FLUSH); 679 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 680 } else { 681 NCR_WRITE_REG(sc, NCR_SELID, target); 682 } 683 ncr53c9x_setsync(sc, ti); 684 685 if ((ecb->flags & ECB_SENSE) != 0) { 686 /* 687 * For REQUEST SENSE, we should not send an IDENTIFY or 688 * otherwise mangle the target. There should be no MESSAGE IN 689 * phase. 690 */ 691 if (sc->sc_features & NCR_F_DMASELECT) { 692 /* setup DMA transfer for command */ 693 dmasize = clen = ecb->clen; 694 sc->sc_cmdlen = clen; 695 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 696 697 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 698 &dmasize); 699 /* Program the SCSI counter */ 700 NCR_SET_COUNT(sc, dmasize); 701 702 if (sc->sc_rev != NCR_VARIANT_FAS366) 703 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 704 705 /* And get the targets attention */ 706 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 707 NCRDMA_GO(sc); 708 } else { 709 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 710 NCRCMD(sc, NCRCMD_SELNATN); 711 } 712 return; 713 } 714 715 selatn3 = selatns = 0; 716 if (ecb->tag[0] != 0) { 717 if (sc->sc_features & NCR_F_SELATN3) 718 /* use SELATN3 to send tag messages */ 719 selatn3 = 1; 720 else 721 /* We don't have SELATN3; use SELATNS to send tags */ 722 selatns = 1; 723 } 724 725 if (ti->flags & T_NEGOTIATE) { 726 /* We have to use SELATNS to send sync/wide messages */ 727 selatn3 = 0; 728 selatns = 1; 729 } 730 731 cmd = (u_char *)&ecb->cmd.cmd; 732 733 if (selatn3) { 734 /* We'll use tags with SELATN3 */ 735 clen = ecb->clen + 3; 736 cmd -= 3; 737 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 738 cmd[1] = ecb->tag[0]; /* msg[1] */ 739 cmd[2] = ecb->tag[1]; /* msg[2] */ 740 } else { 741 /* We don't have tags, or will send messages with SELATNS */ 742 clen = ecb->clen + 1; 743 cmd -= 1; 744 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 745 } 746 747 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 748 749 /* setup DMA transfer for command */ 750 dmasize = clen; 751 sc->sc_cmdlen = clen; 752 sc->sc_cmdp = cmd; 753 754 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 755 /* Program the SCSI counter */ 756 NCR_SET_COUNT(sc, dmasize); 757 758 /* load the count in */ 759 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 760 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 761 762 /* And get the targets attention */ 763 if (selatn3) { 764 sc->sc_msgout = SEND_TAG; 765 sc->sc_flags |= NCR_ATN; 766 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 767 } else 768 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 769 NCRDMA_GO(sc); 770 return; 771 } 772 773 /* 774 * Who am I. This is where we tell the target that we are 775 * happy for it to disconnect etc. 776 */ 777 778 /* Now get the command into the FIFO */ 779 ncr53c9x_wrfifo(sc, cmd, clen); 780 781 /* And get the targets attention */ 782 if (selatns) { 783 NCR_MSGS(("SELATNS \n")); 784 /* Arbitrate, select and stop after IDENTIFY message */ 785 NCRCMD(sc, NCRCMD_SELATNS); 786 } else if (selatn3) { 787 sc->sc_msgout = SEND_TAG; 788 sc->sc_flags |= NCR_ATN; 789 NCRCMD(sc, NCRCMD_SELATN3); 790 } else 791 NCRCMD(sc, NCRCMD_SELATN); 792 } 793 794 void 795 ncr53c9x_free_ecb(sc, ecb) 796 struct ncr53c9x_softc *sc; 797 struct ncr53c9x_ecb *ecb; 798 { 799 int s; 800 801 s = splbio(); 802 ecb->flags = 0; 803 pool_put(&ecb_pool, (void *)ecb); 804 splx(s); 805 return; 806 } 807 808 struct ncr53c9x_ecb * 809 ncr53c9x_get_ecb(sc, flags) 810 struct ncr53c9x_softc *sc; 811 int flags; 812 { 813 struct ncr53c9x_ecb *ecb; 814 int s; 815 816 s = splbio(); 817 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 818 splx(s); 819 if (ecb) { 820 memset(ecb, 0, sizeof(*ecb)); 821 ecb->flags |= ECB_ALLOC; 822 } 823 return (ecb); 824 } 825 826 /* 827 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 828 */ 829 830 /* 831 * Start a SCSI-command 832 * This function is called by the higher level SCSI-driver to queue/run 833 * SCSI-commands. 834 */ 835 836 void 837 ncr53c9x_scsipi_request(chan, req, arg) 838 struct scsipi_channel *chan; 839 scsipi_adapter_req_t req; 840 void *arg; 841 { 842 struct scsipi_xfer *xs; 843 struct scsipi_periph *periph; 844 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 845 struct ncr53c9x_ecb *ecb; 846 int s, flags; 847 848 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 849 850 s = splbio(); 851 simple_lock(&sc->sc_lock); 852 853 switch (req) { 854 case ADAPTER_REQ_RUN_XFER: 855 xs = arg; 856 periph = xs->xs_periph; 857 flags = xs->xs_control; 858 859 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 860 periph->periph_target)); 861 862 /* Get an ECB to use. */ 863 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 864 /* 865 * This should never happen as we track resources 866 * in the mid-layer, but for now it can as pool_get() 867 * can fail. 868 */ 869 if (ecb == NULL) { 870 scsipi_printaddr(periph); 871 printf("unable to allocate ecb\n"); 872 xs->error = XS_RESOURCE_SHORTAGE; 873 simple_unlock(&sc->sc_lock); 874 splx(s); 875 scsipi_done(xs); 876 return; 877 } 878 879 /* Initialize ecb */ 880 ecb->xs = xs; 881 ecb->timeout = xs->timeout; 882 883 if (flags & XS_CTL_RESET) { 884 ecb->flags |= ECB_RESET; 885 ecb->clen = 0; 886 ecb->dleft = 0; 887 } else { 888 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 889 ecb->clen = xs->cmdlen; 890 ecb->daddr = xs->data; 891 ecb->dleft = xs->datalen; 892 } 893 ecb->stat = 0; 894 895 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 896 ecb->flags |= ECB_READY; 897 if (sc->sc_state == NCR_IDLE) 898 ncr53c9x_sched(sc); 899 900 if ((flags & XS_CTL_POLL) == 0) 901 break; 902 903 /* Not allowed to use interrupts, use polling instead */ 904 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 905 ncr53c9x_timeout(ecb); 906 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 907 ncr53c9x_timeout(ecb); 908 } 909 break; 910 911 case ADAPTER_REQ_GROW_RESOURCES: 912 /* XXX Not supported. */ 913 break; 914 915 case ADAPTER_REQ_SET_XFER_MODE: 916 { 917 struct ncr53c9x_tinfo *ti; 918 struct scsipi_xfer_mode *xm = arg; 919 920 ti = &sc->sc_tinfo[xm->xm_target]; 921 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 922 ti->period = 0; 923 ti->offset = 0; 924 925 if ((sc->sc_cfflags & (1<<((xm->xm_target&7)+16))) == 0 && 926 (xm->xm_mode & PERIPH_CAP_TQING)) { 927 NCR_MISC(("%s: target %d: tagged queuing\n", 928 sc->sc_dev.dv_xname, xm->xm_target)); 929 ti->flags |= T_TAG; 930 } else 931 ti->flags &= ~T_TAG; 932 933 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 934 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 935 sc->sc_dev.dv_xname, xm->xm_target)); 936 if (sc->sc_rev == NCR_VARIANT_FAS366) { 937 ti->flags |= T_WIDE; 938 ti->width = 1; 939 } 940 } 941 942 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 943 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 944 NCR_MISC(("%s: target %d: sync negotiation\n", 945 sc->sc_dev.dv_xname, xm->xm_target)); 946 ti->flags |= T_NEGOTIATE; 947 ti->period = sc->sc_minsync; 948 } 949 /* 950 * If we're not going to negotiate, send the notification 951 * now, since it won't happen later. 952 */ 953 if ((ti->flags & T_NEGOTIATE) == 0) 954 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 955 } 956 break; 957 } 958 959 simple_unlock(&sc->sc_lock); 960 splx(s); 961 } 962 963 void 964 ncr53c9x_update_xfer_mode(sc, target) 965 struct ncr53c9x_softc *sc; 966 int target; 967 { 968 struct scsipi_xfer_mode xm; 969 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 970 971 xm.xm_target = target; 972 xm.xm_mode = 0; 973 xm.xm_period = 0; 974 xm.xm_offset = 0; 975 976 if (ti->flags & T_SYNCMODE) { 977 xm.xm_mode |= PERIPH_CAP_SYNC; 978 xm.xm_period = ti->period; 979 xm.xm_offset = ti->offset; 980 } 981 if (ti->width) 982 xm.xm_mode |= PERIPH_CAP_WIDE16; 983 984 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 985 xm.xm_mode |= PERIPH_CAP_TQING; 986 987 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 988 } 989 990 /* 991 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 992 */ 993 int 994 ncr53c9x_poll(sc, xs, count) 995 struct ncr53c9x_softc *sc; 996 struct scsipi_xfer *xs; 997 int count; 998 { 999 1000 NCR_TRACE(("[ncr53c9x_poll] ")); 1001 while (count) { 1002 if (NCRDMA_ISINTR(sc)) { 1003 simple_unlock(&sc->sc_lock); 1004 ncr53c9x_intr(sc); 1005 simple_lock(&sc->sc_lock); 1006 } 1007 #if alternatively 1008 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 1009 ncr53c9x_intr(sc); 1010 #endif 1011 if ((xs->xs_status & XS_STS_DONE) != 0) 1012 return (0); 1013 if (sc->sc_state == NCR_IDLE) { 1014 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 1015 ncr53c9x_sched(sc); 1016 } 1017 DELAY(1000); 1018 count--; 1019 } 1020 return (1); 1021 } 1022 1023 int 1024 ncr53c9x_ioctl(chan, cmd, arg, flag, p) 1025 struct scsipi_channel *chan; 1026 u_long cmd; 1027 caddr_t arg; 1028 int flag; 1029 struct proc *p; 1030 { 1031 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1032 int s, error = 0; 1033 1034 switch (cmd) { 1035 case SCBUSIORESET: 1036 s = splbio(); 1037 simple_lock(&sc->sc_lock); 1038 ncr53c9x_init(sc, 1); 1039 simple_unlock(&sc->sc_lock); 1040 splx(s); 1041 break; 1042 default: 1043 error = ENOTTY; 1044 break; 1045 } 1046 return (error); 1047 } 1048 1049 1050 /* 1051 * LOW LEVEL SCSI UTILITIES 1052 */ 1053 1054 /* 1055 * Schedule a scsi operation. This has now been pulled out of the interrupt 1056 * handler so that we may call it from ncr53c9x_scsipi_request and 1057 * ncr53c9x_done. This may save us an unnecessary interrupt just to get 1058 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1059 */ 1060 void 1061 ncr53c9x_sched(sc) 1062 struct ncr53c9x_softc *sc; 1063 { 1064 struct ncr53c9x_ecb *ecb; 1065 struct scsipi_periph *periph; 1066 struct ncr53c9x_tinfo *ti; 1067 struct ncr53c9x_linfo *li; 1068 int lun; 1069 int tag; 1070 1071 NCR_TRACE(("[ncr53c9x_sched] ")); 1072 if (sc->sc_state != NCR_IDLE) 1073 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1074 1075 /* 1076 * Find first ecb in ready queue that is for a target/lunit 1077 * combinations that is not busy. 1078 */ 1079 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1080 ecb = TAILQ_NEXT(ecb, chain)) { 1081 periph = ecb->xs->xs_periph; 1082 ti = &sc->sc_tinfo[periph->periph_target]; 1083 lun = periph->periph_lun; 1084 1085 /* Select type of tag for this command */ 1086 if ((ti->flags & (T_RSELECTOFF)) != 0) 1087 tag = 0; 1088 else if ((ti->flags & (T_TAG)) == 0) 1089 tag = 0; 1090 else if ((ecb->flags & ECB_SENSE) != 0) 1091 tag = 0; 1092 else 1093 tag = ecb->xs->xs_tag_type; 1094 #if 0 1095 /* XXXX Use tags for polled commands? */ 1096 if (ecb->xs->xs_control & XS_CTL_POLL) 1097 tag = 0; 1098 #endif 1099 1100 li = TINFO_LUN(ti, lun); 1101 if (li == NULL) { 1102 /* Initialize LUN info and add to list. */ 1103 if ((li = malloc(sizeof(*li), 1104 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) { 1105 continue; 1106 } 1107 li->lun = lun; 1108 1109 LIST_INSERT_HEAD(&ti->luns, li, link); 1110 if (lun < NCR_NLUN) 1111 ti->lun[lun] = li; 1112 } 1113 li->last_used = time_second; 1114 if (tag == 0) { 1115 /* Try to issue this as an un-tagged command */ 1116 if (li->untagged == NULL) 1117 li->untagged = ecb; 1118 } 1119 if (li->untagged != NULL) { 1120 tag = 0; 1121 if ((li->busy != 1) && li->used == 0) { 1122 /* We need to issue this untagged command now */ 1123 ecb = li->untagged; 1124 periph = ecb->xs->xs_periph; 1125 } else { 1126 /* Not ready yet */ 1127 continue; 1128 } 1129 } 1130 ecb->tag[0] = tag; 1131 if (tag != 0) { 1132 li->queued[ecb->xs->xs_tag_id] = ecb; 1133 ecb->tag[1] = ecb->xs->xs_tag_id; 1134 li->used++; 1135 } 1136 if (li->untagged != NULL && (li->busy != 1)) { 1137 li->busy = 1; 1138 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1139 ecb->flags &= ~ECB_READY; 1140 sc->sc_nexus = ecb; 1141 ncr53c9x_select(sc, ecb); 1142 break; 1143 } 1144 if (li->untagged == NULL && tag != 0) { 1145 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1146 ecb->flags &= ~ECB_READY; 1147 sc->sc_nexus = ecb; 1148 ncr53c9x_select(sc, ecb); 1149 break; 1150 } else { 1151 NCR_TRACE(("%d:%d busy\n", 1152 periph->periph_target, 1153 periph->periph_lun)); 1154 } 1155 } 1156 } 1157 1158 void 1159 ncr53c9x_sense(sc, ecb) 1160 struct ncr53c9x_softc *sc; 1161 struct ncr53c9x_ecb *ecb; 1162 { 1163 struct scsipi_xfer *xs = ecb->xs; 1164 struct scsipi_periph *periph = xs->xs_periph; 1165 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1166 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd; 1167 struct ncr53c9x_linfo *li; 1168 int lun = periph->periph_lun; 1169 1170 NCR_TRACE(("requesting sense ")); 1171 /* Next, setup a request sense command block */ 1172 memset(ss, 0, sizeof(*ss)); 1173 ss->opcode = SCSI_REQUEST_SENSE; 1174 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1175 ss->length = sizeof(struct scsi_sense_data); 1176 ecb->clen = sizeof(*ss); 1177 ecb->daddr = (char *)&xs->sense.scsi_sense; 1178 ecb->dleft = sizeof(struct scsi_sense_data); 1179 ecb->flags |= ECB_SENSE; 1180 ecb->timeout = NCR_SENSE_TIMEOUT; 1181 ti->senses++; 1182 li = TINFO_LUN(ti, lun); 1183 if (li->busy) 1184 li->busy = 0; 1185 ncr53c9x_dequeue(sc, ecb); 1186 li->untagged = ecb; /* must be executed first to fix C/A */ 1187 li->busy = 2; 1188 if (ecb == sc->sc_nexus) { 1189 ncr53c9x_select(sc, ecb); 1190 } else { 1191 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1192 ecb->flags |= ECB_READY; 1193 if (sc->sc_state == NCR_IDLE) 1194 ncr53c9x_sched(sc); 1195 } 1196 } 1197 1198 /* 1199 * POST PROCESSING OF SCSI_CMD (usually current) 1200 */ 1201 void 1202 ncr53c9x_done(sc, ecb) 1203 struct ncr53c9x_softc *sc; 1204 struct ncr53c9x_ecb *ecb; 1205 { 1206 struct scsipi_xfer *xs = ecb->xs; 1207 struct scsipi_periph *periph = xs->xs_periph; 1208 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1209 int lun = periph->periph_lun; 1210 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1211 1212 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1213 1214 callout_stop(&ecb->xs->xs_callout); 1215 1216 /* 1217 * Now, if we've come here with no error code, i.e. we've kept the 1218 * initial XS_NOERROR, and the status code signals that we should 1219 * check sense, we'll need to set up a request sense cmd block and 1220 * push the command back into the ready queue *before* any other 1221 * commands for this target/lunit, else we lose the sense info. 1222 * We don't support chk sense conditions for the request sense cmd. 1223 */ 1224 if (xs->error == XS_NOERROR) { 1225 xs->status = ecb->stat; 1226 if ((ecb->flags & ECB_ABORT) != 0) { 1227 xs->error = XS_TIMEOUT; 1228 } else if ((ecb->flags & ECB_SENSE) != 0) { 1229 xs->error = XS_SENSE; 1230 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1231 /* First, save the return values */ 1232 xs->resid = ecb->dleft; 1233 ncr53c9x_sense(sc, ecb); 1234 return; 1235 } else { 1236 xs->resid = ecb->dleft; 1237 } 1238 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1239 xs->error = XS_BUSY; 1240 } 1241 1242 #ifdef NCR53C9X_DEBUG 1243 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1244 if (xs->resid != 0) 1245 printf("resid=%d ", xs->resid); 1246 if (xs->error == XS_SENSE) 1247 printf("sense=0x%02x\n", 1248 xs->sense.scsi_sense.response_code); 1249 else 1250 printf("error=%d\n", xs->error); 1251 } 1252 #endif 1253 1254 /* 1255 * Remove the ECB from whatever queue it's on. 1256 */ 1257 ncr53c9x_dequeue(sc, ecb); 1258 if (ecb == sc->sc_nexus) { 1259 sc->sc_nexus = NULL; 1260 if (sc->sc_state != NCR_CLEANING) { 1261 sc->sc_state = NCR_IDLE; 1262 ncr53c9x_sched(sc); 1263 } 1264 } 1265 1266 if (xs->error == XS_SELTIMEOUT) { 1267 /* Selection timeout -- discard this LUN if empty */ 1268 if (li->untagged == NULL && li->used == 0) { 1269 if (lun < NCR_NLUN) 1270 ti->lun[lun] = NULL; 1271 LIST_REMOVE(li, link); 1272 free(li, M_DEVBUF); 1273 } 1274 } 1275 1276 ncr53c9x_free_ecb(sc, ecb); 1277 ti->cmds++; 1278 simple_unlock(&sc->sc_lock); 1279 scsipi_done(xs); 1280 simple_lock(&sc->sc_lock); 1281 } 1282 1283 void 1284 ncr53c9x_dequeue(sc, ecb) 1285 struct ncr53c9x_softc *sc; 1286 struct ncr53c9x_ecb *ecb; 1287 { 1288 struct ncr53c9x_tinfo *ti = 1289 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1290 struct ncr53c9x_linfo *li; 1291 int64_t lun = ecb->xs->xs_periph->periph_lun; 1292 1293 li = TINFO_LUN(ti, lun); 1294 #ifdef DIAGNOSTIC 1295 if (li == NULL || li->lun != lun) 1296 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist", 1297 (long long) lun, ecb); 1298 #endif 1299 if (li->untagged == ecb) { 1300 li->busy = 0; 1301 li->untagged = NULL; 1302 } 1303 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1304 #ifdef DIAGNOSTIC 1305 if (li->queued[ecb->tag[1]] != NULL && 1306 (li->queued[ecb->tag[1]] != ecb)) 1307 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1308 "instead of ecb %p\n", ecb->tag[1], 1309 (long long) lun, 1310 li->queued[ecb->tag[1]], ecb); 1311 #endif 1312 li->queued[ecb->tag[1]] = NULL; 1313 li->used--; 1314 } 1315 1316 if ((ecb->flags & ECB_READY) != 0) { 1317 ecb->flags &= ~ECB_READY; 1318 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1319 } 1320 } 1321 1322 /* 1323 * INTERRUPT/PROTOCOL ENGINE 1324 */ 1325 1326 /* 1327 * Schedule an outgoing message by prioritizing it, and asserting 1328 * attention on the bus. We can only do this when we are the initiator 1329 * else there will be an illegal command interrupt. 1330 */ 1331 #define ncr53c9x_sched_msgout(m) \ 1332 do { \ 1333 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1334 NCRCMD(sc, NCRCMD_SETATN); \ 1335 sc->sc_flags |= NCR_ATN; \ 1336 sc->sc_msgpriq |= (m); \ 1337 } while (0) 1338 1339 static void 1340 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1341 { 1342 NCR_TRACE(("[flushfifo] ")); 1343 1344 NCRCMD(sc, NCRCMD_FLUSH); 1345 1346 if (sc->sc_phase == COMMAND_PHASE || 1347 sc->sc_phase == MESSAGE_OUT_PHASE) 1348 DELAY(2); 1349 } 1350 1351 static int 1352 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1353 { 1354 int i, n; 1355 u_char *ibuf; 1356 1357 switch(how) { 1358 case NCR_RDFIFO_START: 1359 ibuf = sc->sc_imess; 1360 sc->sc_imlen = 0; 1361 break; 1362 case NCR_RDFIFO_CONTINUE: 1363 ibuf = sc->sc_imess + sc->sc_imlen; 1364 break; 1365 default: 1366 panic("ncr53c9x_rdfifo: bad flag"); 1367 break; 1368 } 1369 1370 /* 1371 * XXX buffer (sc_imess) size for message 1372 */ 1373 1374 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1375 1376 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1377 n *= 2; 1378 1379 for (i = 0; i < n; i++) 1380 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1381 1382 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1383 1384 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1385 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1386 1387 NCR_READ_REG(sc, NCR_FIFO); 1388 1389 ncr53c9x_flushfifo(sc); 1390 } 1391 } else { 1392 for (i = 0; i < n; i++) 1393 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1394 } 1395 1396 sc->sc_imlen += i; 1397 1398 #if 0 1399 #ifdef NCR53C9X_DEBUG 1400 { 1401 int j; 1402 1403 NCR_TRACE(("\n[rdfifo %s (%d):", 1404 (how == NCR_RDFIFO_START) ? "start" : "cont", 1405 (int)sc->sc_imlen)); 1406 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1407 for (j = 0; j < sc->sc_imlen; j++) 1408 printf(" %02x", sc->sc_imess[j]); 1409 printf("]\n"); 1410 } 1411 } 1412 #endif 1413 #endif 1414 return sc->sc_imlen; 1415 } 1416 1417 static void 1418 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1419 { 1420 int i; 1421 1422 #ifdef NCR53C9X_DEBUG 1423 NCR_MSGS(("[wrfifo(%d):", len)); 1424 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1425 for (i = 0; i < len; i++) 1426 printf(" %02x", p[i]); 1427 printf("]\n"); 1428 } 1429 #endif 1430 1431 for (i = 0; i < len; i++) { 1432 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1433 1434 if (sc->sc_rev == NCR_VARIANT_FAS366) 1435 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1436 } 1437 } 1438 1439 int 1440 ncr53c9x_reselect(sc, message, tagtype, tagid) 1441 struct ncr53c9x_softc *sc; 1442 int message; 1443 int tagtype, tagid; 1444 { 1445 u_char selid, target, lun; 1446 struct ncr53c9x_ecb *ecb = NULL; 1447 struct ncr53c9x_tinfo *ti; 1448 struct ncr53c9x_linfo *li; 1449 1450 1451 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1452 target = sc->sc_selid; 1453 } else { 1454 /* 1455 * The SCSI chip made a snapshot of the data bus 1456 * while the reselection was being negotiated. 1457 * This enables us to determine which target did 1458 * the reselect. 1459 */ 1460 selid = sc->sc_selid & ~(1 << sc->sc_id); 1461 if (selid & (selid - 1)) { 1462 printf("%s: reselect with invalid selid %02x;" 1463 " sending DEVICE RESET\n", 1464 sc->sc_dev.dv_xname, selid); 1465 goto reset; 1466 } 1467 1468 target = ffs(selid) - 1; 1469 } 1470 lun = message & 0x07; 1471 1472 /* 1473 * Search wait queue for disconnected cmd 1474 * The list should be short, so I haven't bothered with 1475 * any more sophisticated structures than a simple 1476 * singly linked list. 1477 */ 1478 ti = &sc->sc_tinfo[target]; 1479 li = TINFO_LUN(ti, lun); 1480 1481 /* 1482 * We can get as far as the LUN with the IDENTIFY 1483 * message. Check to see if we're running an 1484 * un-tagged command. Otherwise ack the IDENTIFY 1485 * and wait for a tag message. 1486 */ 1487 if (li != NULL) { 1488 if (li->untagged != NULL && li->busy) 1489 ecb = li->untagged; 1490 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1491 /* Wait for tag to come by */ 1492 sc->sc_state = NCR_IDENTIFIED; 1493 return (0); 1494 } else if (tagtype) 1495 ecb = li->queued[tagid]; 1496 } 1497 if (ecb == NULL) { 1498 printf("%s: reselect from target %d lun %d tag %x:%x " 1499 "with no nexus; sending ABORT\n", 1500 sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1501 goto abort; 1502 } 1503 1504 /* Make this nexus active again. */ 1505 sc->sc_state = NCR_CONNECTED; 1506 sc->sc_nexus = ecb; 1507 ncr53c9x_setsync(sc, ti); 1508 1509 if (ecb->flags & ECB_RESET) 1510 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1511 else if (ecb->flags & ECB_ABORT) 1512 ncr53c9x_sched_msgout(SEND_ABORT); 1513 1514 /* Do an implicit RESTORE POINTERS. */ 1515 sc->sc_dp = ecb->daddr; 1516 sc->sc_dleft = ecb->dleft; 1517 1518 return (0); 1519 1520 reset: 1521 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1522 return (1); 1523 1524 abort: 1525 ncr53c9x_sched_msgout(SEND_ABORT); 1526 return (1); 1527 } 1528 1529 static inline int 1530 __verify_msg_format(u_char *p, int len) 1531 { 1532 1533 if (len == 1 && MSG_IS1BYTE(p[0])) 1534 return 1; 1535 if (len == 2 && MSG_IS2BYTE(p[0])) 1536 return 1; 1537 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1538 len == p[1] + 2) 1539 return 1; 1540 1541 return 0; 1542 } 1543 1544 /* 1545 * Get an incoming message as initiator. 1546 * 1547 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1548 * byte in the FIFO 1549 */ 1550 void 1551 ncr53c9x_msgin(sc) 1552 struct ncr53c9x_softc *sc; 1553 { 1554 1555 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1556 1557 if (sc->sc_imlen == 0) { 1558 printf("%s: msgin: no msg byte available\n", 1559 sc->sc_dev.dv_xname); 1560 return; 1561 } 1562 1563 /* 1564 * Prepare for a new message. A message should (according 1565 * to the SCSI standard) be transmitted in one single 1566 * MESSAGE_IN_PHASE. If we have been in some other phase, 1567 * then this is a new message. 1568 */ 1569 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1570 sc->sc_state != NCR_RESELECTED) { 1571 printf("%s: phase change, dropping message, " 1572 "prev %d, state %d\n", 1573 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1574 sc->sc_flags &= ~NCR_DROP_MSGI; 1575 sc->sc_imlen = 0; 1576 } 1577 1578 /* 1579 * If we're going to reject the message, don't bother storing 1580 * the incoming bytes. But still, we need to ACK them. 1581 */ 1582 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1583 NCRCMD(sc, NCRCMD_MSGOK); 1584 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1585 return; 1586 } 1587 1588 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1589 ncr53c9x_sched_msgout(SEND_REJECT); 1590 sc->sc_flags |= NCR_DROP_MSGI; 1591 } else { 1592 u_char *pb; 1593 int plen; 1594 1595 switch (sc->sc_state) { 1596 /* 1597 * if received message is the first of reselection 1598 * then first byte is selid, and then message 1599 */ 1600 case NCR_RESELECTED: 1601 pb = sc->sc_imess + 1; 1602 plen = sc->sc_imlen - 1; 1603 break; 1604 default: 1605 pb = sc->sc_imess; 1606 plen = sc->sc_imlen; 1607 break; 1608 } 1609 1610 if (__verify_msg_format(pb, plen)) 1611 goto gotit; 1612 } 1613 1614 /* Ack what we have so far */ 1615 NCRCMD(sc, NCRCMD_MSGOK); 1616 return; 1617 1618 gotit: 1619 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1620 /* we got complete message, flush the imess, */ 1621 /* XXX nobody uses imlen below */ 1622 sc->sc_imlen = 0; 1623 /* 1624 * Now we should have a complete message (1 byte, 2 byte 1625 * and moderately long extended messages). We only handle 1626 * extended messages which total length is shorter than 1627 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1628 */ 1629 switch (sc->sc_state) { 1630 struct ncr53c9x_ecb *ecb; 1631 struct ncr53c9x_tinfo *ti; 1632 struct ncr53c9x_linfo *li; 1633 int lun; 1634 1635 case NCR_CONNECTED: 1636 ecb = sc->sc_nexus; 1637 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1638 1639 switch (sc->sc_imess[0]) { 1640 case MSG_CMDCOMPLETE: 1641 NCR_MSGS(("cmdcomplete ")); 1642 if (sc->sc_dleft < 0) { 1643 scsipi_printaddr(ecb->xs->xs_periph); 1644 printf("got %ld extra bytes\n", 1645 -(long)sc->sc_dleft); 1646 sc->sc_dleft = 0; 1647 } 1648 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1649 0 : sc->sc_dleft; 1650 if ((ecb->flags & ECB_SENSE) == 0) 1651 ecb->xs->resid = ecb->dleft; 1652 sc->sc_state = NCR_CMDCOMPLETE; 1653 break; 1654 1655 case MSG_MESSAGE_REJECT: 1656 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1657 switch (sc->sc_msgout) { 1658 case SEND_TAG: 1659 /* 1660 * Target does not like tagged queuing. 1661 * - Flush the command queue 1662 * - Disable tagged queuing for the target 1663 * - Dequeue ecb from the queued array. 1664 */ 1665 printf("%s: tagged queuing rejected: " 1666 "target %d\n", 1667 sc->sc_dev.dv_xname, 1668 ecb->xs->xs_periph->periph_target); 1669 1670 NCR_MSGS(("(rejected sent tag)")); 1671 NCRCMD(sc, NCRCMD_FLUSH); 1672 DELAY(1); 1673 ti->flags &= ~T_TAG; 1674 lun = ecb->xs->xs_periph->periph_lun; 1675 li = TINFO_LUN(ti, lun); 1676 if (ecb->tag[0] && 1677 li->queued[ecb->tag[1]] != NULL) { 1678 li->queued[ecb->tag[1]] = NULL; 1679 li->used--; 1680 } 1681 ecb->tag[0] = ecb->tag[1] = 0; 1682 li->untagged = ecb; 1683 li->busy = 1; 1684 break; 1685 1686 case SEND_SDTR: 1687 printf("%s: sync transfer rejected: " 1688 "target %d\n", 1689 sc->sc_dev.dv_xname, 1690 ecb->xs->xs_periph->periph_target); 1691 1692 sc->sc_flags &= ~NCR_SYNCHNEGO; 1693 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1694 ncr53c9x_setsync(sc, ti); 1695 ncr53c9x_update_xfer_mode(sc, 1696 ecb->xs->xs_periph->periph_target); 1697 break; 1698 1699 case SEND_WDTR: 1700 printf("%s: wide transfer rejected: " 1701 "target %d\n", 1702 sc->sc_dev.dv_xname, 1703 ecb->xs->xs_periph->periph_target); 1704 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1705 ti->width = 0; 1706 break; 1707 1708 case SEND_INIT_DET_ERR: 1709 goto abort; 1710 } 1711 break; 1712 1713 case MSG_NOOP: 1714 NCR_MSGS(("noop ")); 1715 break; 1716 1717 case MSG_HEAD_OF_Q_TAG: 1718 case MSG_SIMPLE_Q_TAG: 1719 case MSG_ORDERED_Q_TAG: 1720 NCR_MSGS(("TAG %x:%x", 1721 sc->sc_imess[0], sc->sc_imess[1])); 1722 break; 1723 1724 case MSG_DISCONNECT: 1725 NCR_MSGS(("disconnect ")); 1726 ti->dconns++; 1727 sc->sc_state = NCR_DISCONNECT; 1728 1729 /* 1730 * Mark the fact that all bytes have moved. The 1731 * target may not bother to do a SAVE POINTERS 1732 * at this stage. This flag will set the residual 1733 * count to zero on MSG COMPLETE. 1734 */ 1735 if (sc->sc_dleft == 0) 1736 ecb->flags |= ECB_TENTATIVE_DONE; 1737 1738 break; 1739 1740 case MSG_SAVEDATAPOINTER: 1741 NCR_MSGS(("save datapointer ")); 1742 ecb->daddr = sc->sc_dp; 1743 ecb->dleft = sc->sc_dleft; 1744 break; 1745 1746 case MSG_RESTOREPOINTERS: 1747 NCR_MSGS(("restore datapointer ")); 1748 sc->sc_dp = ecb->daddr; 1749 sc->sc_dleft = ecb->dleft; 1750 break; 1751 1752 case MSG_EXTENDED: 1753 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1754 switch (sc->sc_imess[2]) { 1755 case MSG_EXT_SDTR: 1756 NCR_MSGS(("SDTR period %d, offset %d ", 1757 sc->sc_imess[3], sc->sc_imess[4])); 1758 if (sc->sc_imess[1] != 3) 1759 goto reject; 1760 ti->period = sc->sc_imess[3]; 1761 ti->offset = sc->sc_imess[4]; 1762 ti->flags &= ~T_NEGOTIATE; 1763 if (sc->sc_minsync == 0 || 1764 ti->offset == 0 || 1765 ti->period > 124) { 1766 #if 0 1767 #ifdef NCR53C9X_DEBUG 1768 scsipi_printaddr(ecb->xs->xs_periph); 1769 printf("async mode\n"); 1770 #endif 1771 #endif 1772 ti->flags &= ~T_SYNCMODE; 1773 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1774 /* 1775 * target initiated negotiation 1776 */ 1777 ti->offset = 0; 1778 ncr53c9x_sched_msgout( 1779 SEND_SDTR); 1780 } 1781 } else { 1782 int p; 1783 1784 p = ncr53c9x_stp2cpb(sc, ti->period); 1785 ti->period = ncr53c9x_cpb2stp(sc, p); 1786 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1787 /* 1788 * target initiated negotiation 1789 */ 1790 if (ti->period < 1791 sc->sc_minsync) 1792 ti->period = 1793 sc->sc_minsync; 1794 if (ti->offset > 15) 1795 ti->offset = 15; 1796 ti->flags &= ~T_SYNCMODE; 1797 ncr53c9x_sched_msgout( 1798 SEND_SDTR); 1799 } else { 1800 /* we are sync */ 1801 ti->flags |= T_SYNCMODE; 1802 } 1803 } 1804 ncr53c9x_update_xfer_mode(sc, 1805 ecb->xs->xs_periph->periph_target); 1806 sc->sc_flags &= ~NCR_SYNCHNEGO; 1807 ncr53c9x_setsync(sc, ti); 1808 break; 1809 1810 case MSG_EXT_WDTR: 1811 #ifdef NCR53C9X_DEBUG 1812 printf("%s: wide mode %d\n", 1813 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1814 #endif 1815 if (sc->sc_imess[3] == 1) { 1816 ti->cfg3 |= NCRFASCFG3_EWIDE; 1817 ncr53c9x_setsync(sc, ti); 1818 } else 1819 ti->width = 0; 1820 /* 1821 * Device started width negotiation. 1822 */ 1823 if (!(ti->flags & T_WDTRSENT)) 1824 ncr53c9x_sched_msgout(SEND_WDTR); 1825 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1826 break; 1827 default: 1828 scsipi_printaddr(ecb->xs->xs_periph); 1829 printf("unrecognized MESSAGE EXTENDED;" 1830 " sending REJECT\n"); 1831 goto reject; 1832 } 1833 break; 1834 1835 default: 1836 NCR_MSGS(("ident ")); 1837 scsipi_printaddr(ecb->xs->xs_periph); 1838 printf("unrecognized MESSAGE; sending REJECT\n"); 1839 reject: 1840 ncr53c9x_sched_msgout(SEND_REJECT); 1841 break; 1842 } 1843 break; 1844 1845 case NCR_IDENTIFIED: 1846 /* 1847 * IDENTIFY message was received and queue tag is expected now 1848 */ 1849 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1850 (sc->sc_msgify == 0)) { 1851 printf("%s: TAG reselect without IDENTIFY;" 1852 " MSG %x;" 1853 " sending DEVICE RESET\n", 1854 sc->sc_dev.dv_xname, 1855 sc->sc_imess[0]); 1856 goto reset; 1857 } 1858 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 1859 sc->sc_imess[0], sc->sc_imess[1]); 1860 break; 1861 1862 case NCR_RESELECTED: 1863 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1864 sc->sc_msgify = sc->sc_imess[1]; 1865 } else { 1866 printf("%s: reselect without IDENTIFY;" 1867 " MSG %x;" 1868 " sending DEVICE RESET\n", 1869 sc->sc_dev.dv_xname, 1870 sc->sc_imess[1]); 1871 goto reset; 1872 } 1873 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1874 break; 1875 1876 default: 1877 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1878 sc->sc_dev.dv_xname); 1879 reset: 1880 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1881 break; 1882 1883 abort: 1884 ncr53c9x_sched_msgout(SEND_ABORT); 1885 break; 1886 } 1887 1888 /* if we have more messages to send set ATN */ 1889 if (sc->sc_msgpriq) 1890 NCRCMD(sc, NCRCMD_SETATN); 1891 1892 /* Ack last message byte */ 1893 NCRCMD(sc, NCRCMD_MSGOK); 1894 1895 /* Done, reset message pointer. */ 1896 sc->sc_flags &= ~NCR_DROP_MSGI; 1897 sc->sc_imlen = 0; 1898 } 1899 1900 1901 /* 1902 * Send the highest priority, scheduled message 1903 */ 1904 void 1905 ncr53c9x_msgout(sc) 1906 struct ncr53c9x_softc *sc; 1907 { 1908 struct ncr53c9x_tinfo *ti; 1909 struct ncr53c9x_ecb *ecb; 1910 size_t size; 1911 1912 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1913 sc->sc_msgpriq, sc->sc_prevphase)); 1914 1915 /* 1916 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1917 * condition on the SCSI bus. The 53c9x chip 1918 * automatically turns off ATN before sending the 1919 * message byte. (see also the comment below in the 1920 * default case when picking out a message to send) 1921 */ 1922 if (sc->sc_flags & NCR_ATN) { 1923 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1924 new: 1925 NCRCMD(sc, NCRCMD_FLUSH); 1926 /* DELAY(1); */ 1927 sc->sc_msgoutq = 0; 1928 sc->sc_omlen = 0; 1929 } 1930 } else { 1931 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1932 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1933 goto new; 1934 } else { 1935 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1936 sc->sc_dev.dv_xname, __LINE__); 1937 } 1938 } 1939 1940 if (sc->sc_omlen == 0) { 1941 /* Pick up highest priority message */ 1942 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1943 sc->sc_msgoutq |= sc->sc_msgout; 1944 sc->sc_msgpriq &= ~sc->sc_msgout; 1945 sc->sc_omlen = 1; /* "Default" message len */ 1946 switch (sc->sc_msgout) { 1947 case SEND_SDTR: 1948 ecb = sc->sc_nexus; 1949 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1950 sc->sc_omess[0] = MSG_EXTENDED; 1951 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1952 sc->sc_omess[2] = MSG_EXT_SDTR; 1953 sc->sc_omess[3] = ti->period; 1954 sc->sc_omess[4] = ti->offset; 1955 sc->sc_omlen = 5; 1956 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1957 ti->flags |= T_SYNCMODE; 1958 ncr53c9x_setsync(sc, ti); 1959 } 1960 break; 1961 case SEND_WDTR: 1962 ecb = sc->sc_nexus; 1963 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1964 sc->sc_omess[0] = MSG_EXTENDED; 1965 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1966 sc->sc_omess[2] = MSG_EXT_WDTR; 1967 sc->sc_omess[3] = ti->width; 1968 sc->sc_omlen = 4; 1969 break; 1970 case SEND_IDENTIFY: 1971 if (sc->sc_state != NCR_CONNECTED) { 1972 printf("%s at line %d: no nexus\n", 1973 sc->sc_dev.dv_xname, __LINE__); 1974 } 1975 ecb = sc->sc_nexus; 1976 sc->sc_omess[0] = 1977 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1978 break; 1979 case SEND_TAG: 1980 if (sc->sc_state != NCR_CONNECTED) { 1981 printf("%s at line %d: no nexus\n", 1982 sc->sc_dev.dv_xname, __LINE__); 1983 } 1984 ecb = sc->sc_nexus; 1985 sc->sc_omess[0] = ecb->tag[0]; 1986 sc->sc_omess[1] = ecb->tag[1]; 1987 sc->sc_omlen = 2; 1988 break; 1989 case SEND_DEV_RESET: 1990 sc->sc_flags |= NCR_ABORTING; 1991 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1992 ecb = sc->sc_nexus; 1993 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1994 ti->flags &= ~T_SYNCMODE; 1995 ncr53c9x_update_xfer_mode(sc, 1996 ecb->xs->xs_periph->periph_target); 1997 if ((ti->flags & T_SYNCHOFF) == 0) 1998 /* We can re-start sync negotiation */ 1999 ti->flags |= T_NEGOTIATE; 2000 break; 2001 case SEND_PARITY_ERROR: 2002 sc->sc_omess[0] = MSG_PARITY_ERROR; 2003 break; 2004 case SEND_ABORT: 2005 sc->sc_flags |= NCR_ABORTING; 2006 sc->sc_omess[0] = MSG_ABORT; 2007 break; 2008 case SEND_INIT_DET_ERR: 2009 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 2010 break; 2011 case SEND_REJECT: 2012 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 2013 break; 2014 default: 2015 /* 2016 * We normally do not get here, since the chip 2017 * automatically turns off ATN before the last 2018 * byte of a message is sent to the target. 2019 * However, if the target rejects our (multi-byte) 2020 * message early by switching to MSG IN phase 2021 * ATN remains on, so the target may return to 2022 * MSG OUT phase. If there are no scheduled messages 2023 * left we send a NO-OP. 2024 * 2025 * XXX - Note that this leaves no useful purpose for 2026 * the NCR_ATN flag. 2027 */ 2028 sc->sc_flags &= ~NCR_ATN; 2029 sc->sc_omess[0] = MSG_NOOP; 2030 break; 2031 } 2032 sc->sc_omp = sc->sc_omess; 2033 } 2034 2035 #ifdef DEBUG 2036 if (ncr53c9x_debug & NCR_SHOWMSGS) { 2037 int i; 2038 2039 NCR_MSGS(("<msgout:")); 2040 for (i = 0; i < sc->sc_omlen; i++) 2041 NCR_MSGS((" %02x", sc->sc_omess[i])); 2042 NCR_MSGS(("> ")); 2043 } 2044 #endif 2045 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2046 /* 2047 * XXX fifo size 2048 */ 2049 ncr53c9x_flushfifo(sc); 2050 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2051 NCRCMD(sc, NCRCMD_TRANS); 2052 } else { 2053 /* (re)send the message */ 2054 size = min(sc->sc_omlen, sc->sc_maxxfer); 2055 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2056 /* Program the SCSI counter */ 2057 NCR_SET_COUNT(sc, size); 2058 2059 /* Load the count in and start the message-out transfer */ 2060 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2061 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2062 NCRDMA_GO(sc); 2063 } 2064 } 2065 2066 /* 2067 * This is the most critical part of the driver, and has to know 2068 * how to deal with *all* error conditions and phases from the SCSI 2069 * bus. If there are no errors and the DMA was active, then call the 2070 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2071 * and we can return from here without further processing. 2072 * 2073 * Most of this needs verifying. 2074 */ 2075 int 2076 ncr53c9x_intr(arg) 2077 void *arg; 2078 { 2079 struct ncr53c9x_softc *sc = arg; 2080 struct ncr53c9x_ecb *ecb; 2081 struct scsipi_periph *periph; 2082 struct ncr53c9x_tinfo *ti; 2083 size_t size; 2084 int nfifo; 2085 2086 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2087 2088 if (!NCRDMA_ISINTR(sc)) 2089 return (0); 2090 2091 simple_lock(&sc->sc_lock); 2092 again: 2093 /* and what do the registers say... */ 2094 ncr53c9x_readregs(sc); 2095 2096 sc->sc_intrcnt.ev_count++; 2097 2098 /* 2099 * At the moment, only a SCSI Bus Reset or Illegal 2100 * Command are classed as errors. A disconnect is a 2101 * valid condition, and we let the code check is the 2102 * "NCR_BUSFREE_OK" flag was set before declaring it 2103 * and error. 2104 * 2105 * Also, the status register tells us about "Gross 2106 * Errors" and "Parity errors". Only the Gross Error 2107 * is really bad, and the parity errors are dealt 2108 * with later 2109 * 2110 * TODO 2111 * If there are too many parity error, go to slow 2112 * cable mode ? 2113 */ 2114 2115 /* SCSI Reset */ 2116 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2117 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2118 NCRCMD(sc, NCRCMD_FLUSH); 2119 DELAY(1); 2120 } 2121 if (sc->sc_state != NCR_SBR) { 2122 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 2123 ncr53c9x_init(sc, 0); /* Restart everything */ 2124 goto out; 2125 } 2126 #if 0 2127 /*XXX*/ printf("<expected bus reset: " 2128 "[intr %x, stat %x, step %d]>\n", 2129 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2130 #endif 2131 if (sc->sc_nexus != NULL) 2132 panic("%s: nexus in reset state", 2133 sc->sc_dev.dv_xname); 2134 goto sched; 2135 } 2136 2137 ecb = sc->sc_nexus; 2138 2139 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2140 if (sc->sc_espintr & NCRINTR_ERR || 2141 sc->sc_espstat & NCRSTAT_GE) { 2142 2143 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2144 /* Gross Error; no target ? */ 2145 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2146 NCRCMD(sc, NCRCMD_FLUSH); 2147 DELAY(1); 2148 } 2149 if (sc->sc_state == NCR_CONNECTED || 2150 sc->sc_state == NCR_SELECTING) { 2151 ecb->xs->error = XS_TIMEOUT; 2152 ncr53c9x_done(sc, ecb); 2153 } 2154 goto out; 2155 } 2156 2157 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2158 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2159 /* 2160 * Eat away "Illegal command" interrupt 2161 * on a ESP100 caused by a re-selection 2162 * while we were trying to select 2163 * another target. 2164 */ 2165 #ifdef DEBUG 2166 printf("%s: ESP100 work-around activated\n", 2167 sc->sc_dev.dv_xname); 2168 #endif 2169 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2170 goto out; 2171 } 2172 /* illegal command, out of sync ? */ 2173 printf("%s: illegal command: 0x%x " 2174 "(state %d, phase %x, prevphase %x)\n", 2175 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2176 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2177 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2178 NCRCMD(sc, NCRCMD_FLUSH); 2179 DELAY(1); 2180 } 2181 ncr53c9x_init(sc, 1); /* Restart everything */ 2182 goto out; 2183 } 2184 } 2185 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2186 2187 /* 2188 * Call if DMA is active. 2189 * 2190 * If DMA_INTR returns true, then maybe go 'round the loop 2191 * again in case there is no more DMA queued, but a phase 2192 * change is expected. 2193 */ 2194 if (NCRDMA_ISACTIVE(sc)) { 2195 int r = NCRDMA_INTR(sc); 2196 if (r == -1) { 2197 printf("%s: DMA error; resetting\n", 2198 sc->sc_dev.dv_xname); 2199 ncr53c9x_init(sc, 1); 2200 goto out; 2201 } 2202 /* If DMA active here, then go back to work... */ 2203 if (NCRDMA_ISACTIVE(sc)) 2204 goto out; 2205 2206 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2207 /* 2208 * DMA not completed. If we can not find a 2209 * acceptable explanation, print a diagnostic. 2210 */ 2211 if (sc->sc_state == NCR_SELECTING) 2212 /* 2213 * This can happen if we are reselected 2214 * while using DMA to select a target. 2215 */ 2216 /*void*/; 2217 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2218 /* 2219 * Our (multi-byte) message (eg SDTR) was 2220 * interrupted by the target to send 2221 * a MSG REJECT. 2222 * Print diagnostic if current phase 2223 * is not MESSAGE IN. 2224 */ 2225 if (sc->sc_phase != MESSAGE_IN_PHASE) 2226 printf("%s: !TC on MSG OUT" 2227 " [intr %x, stat %x, step %d]" 2228 " prevphase %x, resid %lx\n", 2229 sc->sc_dev.dv_xname, 2230 sc->sc_espintr, 2231 sc->sc_espstat, 2232 sc->sc_espstep, 2233 sc->sc_prevphase, 2234 (u_long)sc->sc_omlen); 2235 } else if (sc->sc_dleft == 0) { 2236 /* 2237 * The DMA operation was started for 2238 * a DATA transfer. Print a diagnostic 2239 * if the DMA counter and TC bit 2240 * appear to be out of sync. 2241 */ 2242 printf("%s: !TC on DATA XFER" 2243 " [intr %x, stat %x, step %d]" 2244 " prevphase %x, resid %x\n", 2245 sc->sc_dev.dv_xname, 2246 sc->sc_espintr, 2247 sc->sc_espstat, 2248 sc->sc_espstep, 2249 sc->sc_prevphase, 2250 ecb ? ecb->dleft : -1); 2251 } 2252 } 2253 } 2254 2255 /* 2256 * Check for less serious errors. 2257 */ 2258 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2259 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2260 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2261 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2262 else 2263 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2264 } 2265 2266 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2267 sc->sc_msgify = 0; 2268 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2269 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2270 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2271 NCRCMD(sc, NCRCMD_FLUSH); 2272 /* DELAY(1); */ 2273 } 2274 /* 2275 * This command must (apparently) be issued within 2276 * 250mS of a disconnect. So here you are... 2277 */ 2278 NCRCMD(sc, NCRCMD_ENSEL); 2279 2280 switch (sc->sc_state) { 2281 case NCR_RESELECTED: 2282 goto sched; 2283 2284 case NCR_SELECTING: 2285 { 2286 struct ncr53c9x_linfo *li; 2287 2288 ecb->xs->error = XS_SELTIMEOUT; 2289 2290 /* Selection timeout -- discard all LUNs if empty */ 2291 periph = ecb->xs->xs_periph; 2292 ti = &sc->sc_tinfo[periph->periph_target]; 2293 li = LIST_FIRST(&ti->luns); 2294 while (li != NULL) { 2295 if (li->untagged == NULL && li->used == 0) { 2296 if (li->lun < NCR_NLUN) 2297 ti->lun[li->lun] = NULL; 2298 LIST_REMOVE(li, link); 2299 free(li, M_DEVBUF); 2300 /* 2301 * Restart the search at the beginning 2302 */ 2303 li = LIST_FIRST(&ti->luns); 2304 continue; 2305 } 2306 li = LIST_NEXT(li, link); 2307 } 2308 goto finish; 2309 } 2310 case NCR_CONNECTED: 2311 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2312 #ifdef NCR53C9X_DEBUG 2313 if (ecb != NULL) 2314 scsipi_printaddr(ecb->xs->xs_periph); 2315 printf("sync nego not completed!\n"); 2316 #endif 2317 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 2318 sc->sc_flags &= ~NCR_SYNCHNEGO; 2319 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2320 } 2321 2322 /* it may be OK to disconnect */ 2323 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2324 /* 2325 * Section 5.1.1 of the SCSI 2 spec 2326 * suggests issuing a REQUEST SENSE 2327 * following an unexpected disconnect. 2328 * Some devices go into a contingent 2329 * allegiance condition when 2330 * disconnecting, and this is necessary 2331 * to clean up their state. 2332 */ 2333 printf("%s: unexpected disconnect " 2334 "[state %d, intr %x, stat %x, phase(c %x, p %x)]; ", 2335 sc->sc_dev.dv_xname, sc->sc_state, 2336 sc->sc_espintr, sc->sc_espstat, 2337 sc->sc_phase, sc->sc_prevphase); 2338 2339 if ((ecb->flags & ECB_SENSE) != 0) { 2340 printf("resetting\n"); 2341 goto reset; 2342 } 2343 printf("sending REQUEST SENSE\n"); 2344 callout_stop(&ecb->xs->xs_callout); 2345 ncr53c9x_sense(sc, ecb); 2346 goto out; 2347 } 2348 2349 ecb->xs->error = XS_TIMEOUT; 2350 goto finish; 2351 2352 case NCR_DISCONNECT: 2353 sc->sc_nexus = NULL; 2354 goto sched; 2355 2356 case NCR_CMDCOMPLETE: 2357 goto finish; 2358 } 2359 } 2360 2361 switch (sc->sc_state) { 2362 2363 case NCR_SBR: 2364 printf("%s: waiting for SCSI Bus Reset to happen\n", 2365 sc->sc_dev.dv_xname); 2366 goto out; 2367 2368 case NCR_RESELECTED: 2369 /* 2370 * we must be continuing a message ? 2371 */ 2372 printf("%s: unhandled reselect continuation, " 2373 "state %d, intr %02x\n", 2374 sc->sc_dev.dv_xname, sc->sc_state, sc->sc_espintr); 2375 ncr53c9x_init(sc, 1); 2376 goto out; 2377 2378 case NCR_IDENTIFIED: 2379 ecb = sc->sc_nexus; 2380 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2381 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2382 /* 2383 * Things are seriously screwed up. 2384 * Pull the brakes, i.e. reset 2385 */ 2386 printf("%s: target didn't send tag: %d bytes in fifo\n", 2387 sc->sc_dev.dv_xname, i); 2388 /* Drain and display fifo */ 2389 while (i-- > 0) 2390 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2391 2392 ncr53c9x_init(sc, 1); 2393 goto out; 2394 } else 2395 goto msgin; 2396 2397 case NCR_IDLE: 2398 case NCR_SELECTING: 2399 ecb = sc->sc_nexus; 2400 if (sc->sc_espintr & NCRINTR_RESEL) { 2401 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2402 sc->sc_flags = 0; 2403 /* 2404 * If we're trying to select a 2405 * target ourselves, push our command 2406 * back into the ready list. 2407 */ 2408 if (sc->sc_state == NCR_SELECTING) { 2409 NCR_INTS(("backoff selector ")); 2410 callout_stop(&ecb->xs->xs_callout); 2411 ncr53c9x_dequeue(sc, ecb); 2412 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2413 ecb->flags |= ECB_READY; 2414 ecb = sc->sc_nexus = NULL; 2415 } 2416 sc->sc_state = NCR_RESELECTED; 2417 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2418 /* 2419 * Things are seriously screwed up. 2420 * Pull the brakes, i.e. reset 2421 */ 2422 printf("%s: target didn't identify\n", 2423 sc->sc_dev.dv_xname); 2424 ncr53c9x_init(sc, 1); 2425 goto out; 2426 } 2427 /* 2428 * The C90 only inhibits FIFO writes until reselection 2429 * is complete, instead of waiting until the interrupt 2430 * status register has been read. So, if the reselect 2431 * happens while we were entering command bytes (for 2432 * another target) some of those bytes can appear in 2433 * the FIFO here, after the interrupt is taken. 2434 * 2435 * To remedy this situation, pull the Selection ID 2436 * and Identify message from the FIFO directly, and 2437 * ignore any extraneous fifo contents. Also, set 2438 * a flag that allows one Illegal Command Interrupt 2439 * to occur which the chip also generates as a result 2440 * of writing to the FIFO during a reselect. 2441 */ 2442 if (sc->sc_rev == NCR_VARIANT_ESP100) { 2443 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 2444 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO); 2445 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO); 2446 sc->sc_imlen = 2; 2447 if (nfifo != 2) { 2448 /* Flush the rest */ 2449 NCRCMD(sc, NCRCMD_FLUSH); 2450 } 2451 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2452 if (nfifo > 2) 2453 nfifo = 2; /* We fixed it.. */ 2454 } else 2455 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2456 2457 if (nfifo != 2) { 2458 printf("%s: RESELECT: %d bytes in FIFO! " 2459 "[intr %x, stat %x, step %d, " 2460 "prevphase %x]\n", 2461 sc->sc_dev.dv_xname, 2462 nfifo, 2463 sc->sc_espintr, 2464 sc->sc_espstat, 2465 sc->sc_espstep, 2466 sc->sc_prevphase); 2467 ncr53c9x_init(sc, 1); 2468 goto out; 2469 } 2470 sc->sc_selid = sc->sc_imess[0]; 2471 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2472 2473 /* Handle identify message */ 2474 ncr53c9x_msgin(sc); 2475 2476 if (sc->sc_state != NCR_CONNECTED && 2477 sc->sc_state != NCR_IDENTIFIED) { 2478 /* IDENTIFY fail?! */ 2479 printf("%s: identify failed, " 2480 "state %d, intr %02x\n", 2481 sc->sc_dev.dv_xname, sc->sc_state, 2482 sc->sc_espintr); 2483 ncr53c9x_init(sc, 1); 2484 goto out; 2485 } 2486 goto shortcut; /* ie. next phase expected soon */ 2487 } 2488 2489 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2490 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2491 /* 2492 * Arbitration won; examine the `step' register 2493 * to determine how far the selection could progress. 2494 */ 2495 ecb = sc->sc_nexus; 2496 if (ecb == NULL) 2497 panic("ncr53c9x: no nexus"); 2498 2499 periph = ecb->xs->xs_periph; 2500 ti = &sc->sc_tinfo[periph->periph_target]; 2501 2502 switch (sc->sc_espstep) { 2503 case 0: 2504 /* 2505 * The target did not respond with a 2506 * message out phase - probably an old 2507 * device that doesn't recognize ATN. 2508 * Clear ATN and just continue, the 2509 * target should be in the command 2510 * phase. 2511 * XXXX check for command phase? 2512 */ 2513 NCRCMD(sc, NCRCMD_RSTATN); 2514 break; 2515 case 1: 2516 if ((ti->flags & T_NEGOTIATE) == 0 && 2517 ecb->tag[0] == 0) { 2518 printf("%s: step 1 & !NEG\n", 2519 sc->sc_dev.dv_xname); 2520 goto reset; 2521 } 2522 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2523 printf("%s: !MSGOUT\n", 2524 sc->sc_dev.dv_xname); 2525 goto reset; 2526 } 2527 if (ti->flags & T_WIDE) { 2528 ti->flags |= T_WDTRSENT; 2529 ncr53c9x_sched_msgout(SEND_WDTR); 2530 } 2531 if (ti->flags & T_NEGOTIATE) { 2532 /* Start negotiating */ 2533 ti->period = sc->sc_minsync; 2534 ti->offset = 15; 2535 sc->sc_flags |= NCR_SYNCHNEGO; 2536 if (ecb->tag[0]) 2537 ncr53c9x_sched_msgout( 2538 SEND_TAG|SEND_SDTR); 2539 else 2540 ncr53c9x_sched_msgout( 2541 SEND_SDTR); 2542 } else { 2543 /* Could not do ATN3 so send TAG */ 2544 ncr53c9x_sched_msgout(SEND_TAG); 2545 } 2546 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2547 break; 2548 case 3: 2549 /* 2550 * Grr, this is supposed to mean 2551 * "target left command phase prematurely". 2552 * It seems to happen regularly when 2553 * sync mode is on. 2554 * Look at FIFO to see if command went out. 2555 * (Timing problems?) 2556 */ 2557 if (sc->sc_features & NCR_F_DMASELECT) { 2558 if (sc->sc_cmdlen == 0) 2559 /* Hope for the best.. */ 2560 break; 2561 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2562 & NCRFIFO_FF) == 0) { 2563 /* Hope for the best.. */ 2564 break; 2565 } 2566 printf("(%s:%d:%d): selection failed;" 2567 " %d left in FIFO " 2568 "[intr %x, stat %x, step %d]\n", 2569 sc->sc_dev.dv_xname, 2570 periph->periph_target, 2571 periph->periph_lun, 2572 NCR_READ_REG(sc, NCR_FFLAG) 2573 & NCRFIFO_FF, 2574 sc->sc_espintr, sc->sc_espstat, 2575 sc->sc_espstep); 2576 NCRCMD(sc, NCRCMD_FLUSH); 2577 ncr53c9x_sched_msgout(SEND_ABORT); 2578 goto out; 2579 case 2: 2580 /* Select stuck at Command Phase */ 2581 NCRCMD(sc, NCRCMD_FLUSH); 2582 break; 2583 case 4: 2584 if (sc->sc_features & NCR_F_DMASELECT && 2585 sc->sc_cmdlen != 0) 2586 printf("(%s:%d:%d): select; " 2587 "%lu left in DMA buffer " 2588 "[intr %x, stat %x, step %d]\n", 2589 sc->sc_dev.dv_xname, 2590 periph->periph_target, 2591 periph->periph_lun, 2592 (u_long)sc->sc_cmdlen, 2593 sc->sc_espintr, 2594 sc->sc_espstat, 2595 sc->sc_espstep); 2596 /* So far, everything went fine */ 2597 break; 2598 } 2599 2600 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2601 /* Do an implicit RESTORE POINTERS. */ 2602 sc->sc_dp = ecb->daddr; 2603 sc->sc_dleft = ecb->dleft; 2604 sc->sc_state = NCR_CONNECTED; 2605 break; 2606 2607 } else { 2608 2609 printf("%s: unexpected status after select" 2610 ": [intr %x, stat %x, step %x]\n", 2611 sc->sc_dev.dv_xname, 2612 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2613 NCRCMD(sc, NCRCMD_FLUSH); 2614 DELAY(1); 2615 goto reset; 2616 } 2617 if (sc->sc_state == NCR_IDLE) { 2618 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); 2619 simple_unlock(&sc->sc_lock); 2620 return (0); 2621 } 2622 break; 2623 2624 case NCR_CONNECTED: 2625 if ((sc->sc_flags & NCR_ICCS) != 0) { 2626 /* "Initiate Command Complete Steps" in progress */ 2627 u_char msg; 2628 2629 sc->sc_flags &= ~NCR_ICCS; 2630 2631 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2632 printf("%s: ICCS: " 2633 ": [intr %x, stat %x, step %x]\n", 2634 sc->sc_dev.dv_xname, 2635 sc->sc_espintr, sc->sc_espstat, 2636 sc->sc_espstep); 2637 } 2638 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2639 if (sc->sc_imlen < 2) 2640 printf("%s: can't get status, only %d bytes\n", 2641 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2642 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2643 msg = sc->sc_imess[sc->sc_imlen - 1]; 2644 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2645 if (msg == MSG_CMDCOMPLETE) { 2646 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2647 ? 0 : sc->sc_dleft; 2648 if ((ecb->flags & ECB_SENSE) == 0) 2649 ecb->xs->resid = ecb->dleft; 2650 sc->sc_state = NCR_CMDCOMPLETE; 2651 } else 2652 printf("%s: STATUS_PHASE: msg %d\n", 2653 sc->sc_dev.dv_xname, msg); 2654 sc->sc_imlen = 0; 2655 NCRCMD(sc, NCRCMD_MSGOK); 2656 goto shortcut; /* ie. wait for disconnect */ 2657 } 2658 break; 2659 2660 default: 2661 printf("%s: invalid state: %d [intr %x, phase(c %x, p %x)]\n", 2662 sc->sc_dev.dv_xname, sc->sc_state, 2663 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase); 2664 goto reset; 2665 } 2666 2667 /* 2668 * Driver is now in state NCR_CONNECTED, i.e. we 2669 * have a current command working the SCSI bus. 2670 */ 2671 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2672 panic("ncr53c9x: no nexus"); 2673 } 2674 2675 switch (sc->sc_phase) { 2676 case MESSAGE_OUT_PHASE: 2677 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2678 ncr53c9x_msgout(sc); 2679 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2680 break; 2681 2682 case MESSAGE_IN_PHASE: 2683 msgin: 2684 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2685 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2686 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2687 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2688 NCRCMD(sc, NCRCMD_FLUSH); 2689 } 2690 sc->sc_flags |= NCR_WAITI; 2691 NCRCMD(sc, NCRCMD_TRANS); 2692 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2693 if ((sc->sc_flags & NCR_WAITI) == 0) { 2694 printf("%s: MSGIN: unexpected FC bit: " 2695 "[intr %x, stat %x, step %x]\n", 2696 sc->sc_dev.dv_xname, 2697 sc->sc_espintr, sc->sc_espstat, 2698 sc->sc_espstep); 2699 } 2700 sc->sc_flags &= ~NCR_WAITI; 2701 ncr53c9x_rdfifo(sc, 2702 (sc->sc_prevphase == sc->sc_phase) ? 2703 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2704 ncr53c9x_msgin(sc); 2705 } else { 2706 printf("%s: MSGIN: weird bits: " 2707 "[intr %x, stat %x, step %x]\n", 2708 sc->sc_dev.dv_xname, 2709 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2710 } 2711 sc->sc_prevphase = MESSAGE_IN_PHASE; 2712 goto shortcut; /* i.e. expect data to be ready */ 2713 2714 case COMMAND_PHASE: 2715 /* 2716 * Send the command block. Normally we don't see this 2717 * phase because the SEL_ATN command takes care of 2718 * all this. However, we end up here if either the 2719 * target or we wanted to exchange some more messages 2720 * first (e.g. to start negotiations). 2721 */ 2722 2723 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2724 ecb->cmd.cmd.opcode, ecb->clen)); 2725 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2726 NCRCMD(sc, NCRCMD_FLUSH); 2727 /* DELAY(1);*/ 2728 } 2729 if (sc->sc_features & NCR_F_DMASELECT) { 2730 /* setup DMA transfer for command */ 2731 size = ecb->clen; 2732 sc->sc_cmdlen = size; 2733 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 2734 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2735 0, &size); 2736 /* Program the SCSI counter */ 2737 NCR_SET_COUNT(sc, size); 2738 2739 /* load the count in */ 2740 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2741 2742 /* start the command transfer */ 2743 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2744 NCRDMA_GO(sc); 2745 } else { 2746 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2747 NCRCMD(sc, NCRCMD_TRANS); 2748 } 2749 sc->sc_prevphase = COMMAND_PHASE; 2750 break; 2751 2752 case DATA_OUT_PHASE: 2753 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2754 NCRCMD(sc, NCRCMD_FLUSH); 2755 size = min(sc->sc_dleft, sc->sc_maxxfer); 2756 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2757 sc->sc_prevphase = DATA_OUT_PHASE; 2758 goto setup_xfer; 2759 2760 case DATA_IN_PHASE: 2761 NCR_PHASE(("DATA_IN_PHASE ")); 2762 if (sc->sc_rev == NCR_VARIANT_ESP100) 2763 NCRCMD(sc, NCRCMD_FLUSH); 2764 size = min(sc->sc_dleft, sc->sc_maxxfer); 2765 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2766 sc->sc_prevphase = DATA_IN_PHASE; 2767 setup_xfer: 2768 /* Target returned to data phase: wipe "done" memory */ 2769 ecb->flags &= ~ECB_TENTATIVE_DONE; 2770 2771 /* Program the SCSI counter */ 2772 NCR_SET_COUNT(sc, size); 2773 2774 /* load the count in */ 2775 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2776 2777 /* 2778 * Note that if `size' is 0, we've already transceived 2779 * all the bytes we want but we're still in DATA PHASE. 2780 * Apparently, the device needs padding. Also, a 2781 * transfer size of 0 means "maximum" to the chip 2782 * DMA logic. 2783 */ 2784 NCRCMD(sc, 2785 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2786 NCRDMA_GO(sc); 2787 goto out; 2788 2789 case STATUS_PHASE: 2790 NCR_PHASE(("STATUS_PHASE ")); 2791 sc->sc_flags |= NCR_ICCS; 2792 NCRCMD(sc, NCRCMD_ICCS); 2793 sc->sc_prevphase = STATUS_PHASE; 2794 goto shortcut; /* i.e. expect status results soon */ 2795 2796 case INVALID_PHASE: 2797 break; 2798 2799 default: 2800 printf("%s: unexpected bus phase; resetting\n", 2801 sc->sc_dev.dv_xname); 2802 goto reset; 2803 } 2804 2805 out: 2806 simple_unlock(&sc->sc_lock); 2807 return (1); 2808 2809 reset: 2810 ncr53c9x_init(sc, 1); 2811 goto out; 2812 2813 finish: 2814 ncr53c9x_done(sc, ecb); 2815 goto out; 2816 2817 sched: 2818 sc->sc_state = NCR_IDLE; 2819 ncr53c9x_sched(sc); 2820 goto out; 2821 2822 shortcut: 2823 /* 2824 * The idea is that many of the SCSI operations take very little 2825 * time, and going away and getting interrupted is too high an 2826 * overhead to pay. For example, selecting, sending a message 2827 * and command and then doing some work can be done in one "pass". 2828 * 2829 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2830 * at 40MHz. This needs testing. 2831 */ 2832 { 2833 struct timeval wait, cur; 2834 2835 microtime(&wait); 2836 wait.tv_usec += 50 / sc->sc_freq; 2837 if (wait.tv_usec > 1000000) { 2838 wait.tv_sec++; 2839 wait.tv_usec -= 1000000; 2840 } 2841 do { 2842 if (NCRDMA_ISINTR(sc)) 2843 goto again; 2844 microtime(&cur); 2845 } while (cur.tv_sec <= wait.tv_sec && 2846 cur.tv_usec <= wait.tv_usec); 2847 } 2848 goto out; 2849 } 2850 2851 void 2852 ncr53c9x_abort(sc, ecb) 2853 struct ncr53c9x_softc *sc; 2854 struct ncr53c9x_ecb *ecb; 2855 { 2856 2857 /* 2 secs for the abort */ 2858 ecb->timeout = NCR_ABORT_TIMEOUT; 2859 ecb->flags |= ECB_ABORT; 2860 2861 if (ecb == sc->sc_nexus) { 2862 /* 2863 * If we're still selecting, the message will be scheduled 2864 * after selection is complete. 2865 */ 2866 if (sc->sc_state == NCR_CONNECTED) 2867 ncr53c9x_sched_msgout(SEND_ABORT); 2868 2869 /* 2870 * Reschedule timeout. 2871 */ 2872 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2873 ncr53c9x_timeout, ecb); 2874 } else { 2875 /* 2876 * Just leave the command where it is. 2877 * XXX - what choice do we have but to reset the SCSI 2878 * eventually? 2879 */ 2880 if (sc->sc_state == NCR_IDLE) 2881 ncr53c9x_sched(sc); 2882 } 2883 } 2884 2885 void 2886 ncr53c9x_timeout(arg) 2887 void *arg; 2888 { 2889 struct ncr53c9x_ecb *ecb = arg; 2890 struct scsipi_xfer *xs = ecb->xs; 2891 struct scsipi_periph *periph = xs->xs_periph; 2892 struct ncr53c9x_softc *sc = 2893 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2894 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2895 int s; 2896 2897 scsipi_printaddr(periph); 2898 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2899 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2900 "msg(q %x,o %x) %s>", 2901 sc->sc_dev.dv_xname, 2902 ecb, ecb->flags, ecb->dleft, ecb->stat, 2903 sc->sc_state, sc->sc_nexus, 2904 NCR_READ_REG(sc, NCR_STAT), 2905 sc->sc_phase, sc->sc_prevphase, 2906 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2907 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2908 #if NCR53C9X_DEBUG > 1 2909 printf("TRACE: %s.", ecb->trace); 2910 #endif 2911 2912 s = splbio(); 2913 simple_lock(&sc->sc_lock); 2914 2915 if (ecb->flags & ECB_ABORT) { 2916 /* abort timed out */ 2917 printf(" AGAIN\n"); 2918 2919 ncr53c9x_init(sc, 1); 2920 } else { 2921 /* abort the operation that has timed out */ 2922 printf("\n"); 2923 xs->error = XS_TIMEOUT; 2924 ncr53c9x_abort(sc, ecb); 2925 2926 /* Disable sync mode if stuck in a data phase */ 2927 if (ecb == sc->sc_nexus && 2928 (ti->flags & T_SYNCMODE) != 0 && 2929 (sc->sc_phase & (MSGI|CDI)) == 0) { 2930 /* XXX ASYNC CALLBACK! */ 2931 scsipi_printaddr(periph); 2932 printf("sync negotiation disabled\n"); 2933 sc->sc_cfflags |= 2934 (1 << ((periph->periph_target & 7) + 8)); 2935 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2936 } 2937 } 2938 2939 simple_unlock(&sc->sc_lock); 2940 splx(s); 2941 } 2942 2943 void 2944 ncr53c9x_watch(arg) 2945 void *arg; 2946 { 2947 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2948 struct ncr53c9x_tinfo *ti; 2949 struct ncr53c9x_linfo *li; 2950 int t, s; 2951 /* Delete any structures that have not been used in 10min. */ 2952 time_t old = time_second - (10 * 60); 2953 2954 s = splbio(); 2955 simple_lock(&sc->sc_lock); 2956 for (t = 0; t < sc->sc_ntarg; t++) { 2957 ti = &sc->sc_tinfo[t]; 2958 li = LIST_FIRST(&ti->luns); 2959 while (li) { 2960 if (li->last_used < old && 2961 li->untagged == NULL && 2962 li->used == 0) { 2963 if (li->lun < NCR_NLUN) 2964 ti->lun[li->lun] = NULL; 2965 LIST_REMOVE(li, link); 2966 free(li, M_DEVBUF); 2967 /* Restart the search at the beginning */ 2968 li = LIST_FIRST(&ti->luns); 2969 continue; 2970 } 2971 li = LIST_NEXT(li, link); 2972 } 2973 } 2974 simple_unlock(&sc->sc_lock); 2975 splx(s); 2976 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2977 } 2978 2979
Indexes created Tue Sep 30 20:09:53 GMT 2025