ncr53c9x.c revision 1.129
1 /* $NetBSD: ncr53c9x.c,v 1.129 2007/08/20 12:32:30 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.129 2007/08/20 12:32:30 tsutsui Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/callout.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/malloc.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 #include <sys/pool.h> 94 #include <sys/scsiio.h> 95 96 #include <dev/scsipi/scsi_spc.h> 97 #include <dev/scsipi/scsi_all.h> 98 #include <dev/scsipi/scsipi_all.h> 99 #include <dev/scsipi/scsiconf.h> 100 #include <dev/scsipi/scsi_message.h> 101 102 #include <dev/ic/ncr53c9xreg.h> 103 #include <dev/ic/ncr53c9xvar.h> 104 105 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 106 #ifdef DEBUG 107 int ncr53c9x_notag = 0; 108 #endif 109 110 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 111 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 112 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 113 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 114 /*static*/ void ncr53c9x_clear(struct ncr53c9x_softc *, scsipi_xfer_result_t); 115 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 116 struct scsipi_xfer *, int); 117 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 118 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 119 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 120 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 121 /*static*/ void ncr53c9x_timeout(void *arg); 122 /*static*/ void ncr53c9x_watch(void *arg); 123 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 124 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 125 struct ncr53c9x_ecb *); 126 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 127 void *, int, struct proc *); 128 129 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 130 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 131 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 132 133 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 134 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 135 struct ncr53c9x_tinfo *); 136 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 137 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 138 int64_t lun); 139 140 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 141 142 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 143 #define NCR_RDFIFO_START 0 144 #define NCR_RDFIFO_CONTINUE 1 145 146 147 #define NCR_SET_COUNT(sc, size) do { \ 148 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 149 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 150 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 151 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 152 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 153 } \ 154 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 155 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 156 } \ 157 } while (/* CONSTCOND */0) 158 159 static int ecb_pool_initialized = 0; 160 static struct pool ecb_pool; 161 162 /* 163 * Names for the NCR53c9x variants, corresponding to the variant tags 164 * in ncr53c9xvar.h. 165 */ 166 static const char *ncr53c9x_variant_names[] = { 167 "ESP100", 168 "ESP100A", 169 "ESP200", 170 "NCR53C94", 171 "NCR53C96", 172 "ESP406", 173 "FAS408", 174 "FAS216", 175 "AM53C974", 176 "FAS366/HME", 177 "NCR53C90 (86C01)", 178 }; 179 180 /* 181 * Search linked list for LUN info by LUN id. 182 */ 183 static struct ncr53c9x_linfo * 184 ncr53c9x_lunsearch(struct ncr53c9x_tinfo *ti, int64_t lun) 185 { 186 struct ncr53c9x_linfo *li; 187 188 LIST_FOREACH(li, &ti->luns, link) 189 if (li->lun == lun) 190 return li; 191 return NULL; 192 } 193 194 /* 195 * Attach this instance, and then all the sub-devices 196 */ 197 void 198 ncr53c9x_attach(struct ncr53c9x_softc *sc) 199 { 200 struct scsipi_adapter *adapt = &sc->sc_adapter; 201 struct scsipi_channel *chan = &sc->sc_channel; 202 203 simple_lock_init(&sc->sc_lock); 204 205 callout_init(&sc->sc_watchdog, 0); 206 207 /* 208 * Note, the front-end has set us up to print the chip variation. 209 */ 210 if (sc->sc_rev >= NCR_VARIANT_MAX) { 211 printf("\n%s: unknown variant %d, devices not attached\n", 212 sc->sc_dev.dv_xname, sc->sc_rev); 213 return; 214 } 215 216 printf(": %s, %dMHz, SCSI ID %d\n", 217 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 218 219 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8; 220 221 /* 222 * Allocate SCSI message buffers. 223 * Front-ends can override allocation to avoid alignment 224 * handling in the DMA engines. Note that that ncr53c9x_msgout() 225 * can request a 1 byte DMA transfer. 226 */ 227 if (sc->sc_omess == NULL) 228 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 229 230 if (sc->sc_imess == NULL) 231 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 232 233 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]), 234 M_DEVBUF, M_NOWAIT | M_ZERO); 235 236 if (sc->sc_omess == NULL || sc->sc_imess == NULL || 237 sc->sc_tinfo == NULL) { 238 printf("out of memory\n"); 239 return; 240 } 241 242 /* 243 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 244 * from now on. 245 */ 246 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 247 sc->sc_rev = NCR_VARIANT_ESP100; 248 249 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 250 251 /* The value *must not* be == 1. Make it 2 */ 252 if (sc->sc_ccf == 1) 253 sc->sc_ccf = 2; 254 255 /* 256 * The recommended timeout is 250ms. This register is loaded 257 * with a value calculated as follows, from the docs: 258 * 259 * (timout period) x (CLK frequency) 260 * reg = ------------------------------------- 261 * 8192 x (Clock Conversion Factor) 262 * 263 * Since CCF has a linear relation to CLK, this generally computes 264 * to the constant of 153. 265 */ 266 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 267 268 /* CCF register only has 3 bits; 0 is actually 8 */ 269 sc->sc_ccf &= 7; 270 271 /* 272 * Fill in the scsipi_adapter. 273 */ 274 adapt->adapt_dev = &sc->sc_dev; 275 adapt->adapt_nchannels = 1; 276 adapt->adapt_openings = 256; 277 adapt->adapt_max_periph = 256; 278 adapt->adapt_ioctl = ncr53c9x_ioctl; 279 /* adapt_request initialized by front-end */ 280 /* adapt_minphys initialized by front-end */ 281 282 /* 283 * Fill in the scsipi_channel. 284 */ 285 memset(chan, 0, sizeof(*chan)); 286 chan->chan_adapter = adapt; 287 chan->chan_bustype = &scsi_bustype; 288 chan->chan_channel = 0; 289 chan->chan_ntargets = sc->sc_ntarg; 290 chan->chan_nluns = 8; 291 chan->chan_id = sc->sc_id; 292 293 /* 294 * Add reference to adapter so that we drop the reference after 295 * config_found() to make sure the adatper is disabled. 296 */ 297 if (scsipi_adapter_addref(adapt) != 0) { 298 printf("%s: unable to enable controller\n", 299 sc->sc_dev.dv_xname); 300 return; 301 } 302 303 /* Reset state & bus */ 304 sc->sc_cfflags = device_cfdata(&sc->sc_dev)->cf_flags; 305 sc->sc_state = 0; 306 ncr53c9x_init(sc, 1); 307 308 /* 309 * Now try to attach all the sub-devices 310 */ 311 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 312 313 scsipi_adapter_delref(adapt); 314 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 315 } 316 317 int 318 ncr53c9x_detach(struct ncr53c9x_softc *sc, int flags) 319 { 320 struct ncr53c9x_linfo *li, *nextli; 321 int t; 322 int error; 323 324 callout_stop(&sc->sc_watchdog); 325 326 if (sc->sc_tinfo) { 327 /* Cancel all commands. */ 328 ncr53c9x_clear(sc, XS_DRIVER_STUFFUP); 329 330 /* Free logical units. */ 331 for (t = 0; t < sc->sc_ntarg; t++) { 332 for (li = LIST_FIRST(&sc->sc_tinfo[t].luns); li; 333 li = nextli) { 334 nextli = LIST_NEXT(li, link); 335 free(li, M_DEVBUF); 336 } 337 } 338 } 339 340 if (sc->sc_child) { 341 error = config_detach(sc->sc_child, flags); 342 if (error) 343 return error; 344 } 345 346 if (sc->sc_imess) 347 free(sc->sc_imess, M_DEVBUF); 348 if (sc->sc_omess) 349 free(sc->sc_omess, M_DEVBUF); 350 351 return 0; 352 } 353 354 /* 355 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 356 * only this controller, but kills any on-going commands, and also stops 357 * and resets the DMA. 358 * 359 * After reset, registers are loaded with the defaults from the attach 360 * routine above. 361 */ 362 void 363 ncr53c9x_reset(struct ncr53c9x_softc *sc) 364 { 365 366 /* reset DMA first */ 367 NCRDMA_RESET(sc); 368 369 /* reset SCSI chip */ 370 NCRCMD(sc, NCRCMD_RSTCHIP); 371 NCRCMD(sc, NCRCMD_NOP); 372 DELAY(500); 373 374 /* do these backwards, and fall through */ 375 switch (sc->sc_rev) { 376 case NCR_VARIANT_ESP406: 377 case NCR_VARIANT_FAS408: 378 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 379 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 380 case NCR_VARIANT_AM53C974: 381 case NCR_VARIANT_FAS216: 382 case NCR_VARIANT_NCR53C94: 383 case NCR_VARIANT_NCR53C96: 384 case NCR_VARIANT_ESP200: 385 sc->sc_features |= NCR_F_HASCFG3; 386 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 387 case NCR_VARIANT_ESP100A: 388 sc->sc_features |= NCR_F_SELATN3; 389 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 390 case NCR_VARIANT_ESP100: 391 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 392 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 393 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 394 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 395 break; 396 397 case NCR_VARIANT_FAS366: 398 sc->sc_features |= 399 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 400 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 401 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 402 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 403 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 404 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 405 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 406 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 407 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 408 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 409 break; 410 411 default: 412 printf("%s: unknown revision code, assuming ESP100\n", 413 sc->sc_dev.dv_xname); 414 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 415 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 416 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 417 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 418 } 419 420 if (sc->sc_rev == NCR_VARIANT_AM53C974) 421 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 422 423 #if 0 424 printf("%s: ncr53c9x_reset: revision %d\n", 425 sc->sc_dev.dv_xname, sc->sc_rev); 426 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 427 "ccf 0x%x, timeout 0x%x\n", 428 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 429 sc->sc_ccf, sc->sc_timeout); 430 #endif 431 } 432 433 /* 434 * Reset the SCSI bus, but not the chip 435 */ 436 void 437 ncr53c9x_scsi_reset(struct ncr53c9x_softc *sc) 438 { 439 440 (*sc->sc_glue->gl_dma_stop)(sc); 441 442 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 443 NCRCMD(sc, NCRCMD_RSTSCSI); 444 } 445 446 /* 447 * Clear all commands 448 */ 449 void 450 ncr53c9x_clear(struct ncr53c9x_softc *sc, scsipi_xfer_result_t result) 451 { 452 struct ncr53c9x_ecb *ecb; 453 struct ncr53c9x_linfo *li; 454 int i, r; 455 456 /* Cancel any active commands. */ 457 sc->sc_state = NCR_CLEANING; 458 sc->sc_msgify = 0; 459 if ((ecb = sc->sc_nexus) != NULL) { 460 ecb->xs->error = result; 461 ncr53c9x_done(sc, ecb); 462 } 463 /* Cancel outstanding disconnected commands on each LUN */ 464 for (r = 0; r < sc->sc_ntarg; r++) { 465 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 466 if ((ecb = li->untagged) != NULL) { 467 li->untagged = NULL; 468 /* 469 * XXXXXXX 470 * 471 * Should we terminate a command 472 * that never reached the disk? 473 */ 474 li->busy = 0; 475 ecb->xs->error = result; 476 ncr53c9x_done(sc, ecb); 477 } 478 for (i = 0; i < 256; i++) 479 if ((ecb = li->queued[i])) { 480 li->queued[i] = NULL; 481 ecb->xs->error = result; 482 ncr53c9x_done(sc, ecb); 483 } 484 li->used = 0; 485 } 486 } 487 } 488 489 /* 490 * Initialize ncr53c9x state machine 491 */ 492 void 493 ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset) 494 { 495 int r; 496 497 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 498 499 if (!ecb_pool_initialized) { 500 /* All instances share this pool */ 501 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 502 "ncr53c9x_ecb", NULL, IPL_BIO); 503 /* make sure to always have some items to play with */ 504 if (pool_prime(&ecb_pool, 1) == ENOMEM) { 505 printf("WARNING: not enough memory for ncr53c9x_ecb\n"); 506 } 507 ecb_pool_initialized = 1; 508 } 509 510 if (sc->sc_state == 0) { 511 /* First time through; initialize. */ 512 513 TAILQ_INIT(&sc->ready_list); 514 sc->sc_nexus = NULL; 515 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 516 for (r = 0; r < sc->sc_ntarg; r++) { 517 LIST_INIT(&sc->sc_tinfo[r].luns); 518 } 519 } else { 520 ncr53c9x_clear(sc, XS_TIMEOUT); 521 } 522 523 /* 524 * reset the chip to a known state 525 */ 526 ncr53c9x_reset(sc); 527 528 sc->sc_flags = 0; 529 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 530 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 531 532 for (r = 0; r < sc->sc_ntarg; r++) { 533 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 534 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 535 536 ti->flags = ((sc->sc_minsync && 537 !(sc->sc_cfflags & (1 << ((r & 7) + 8)))) ? 538 0 : T_SYNCHOFF) | 539 ((sc->sc_cfflags & (1 << (r & 7))) ? T_RSELECTOFF : 0); 540 #ifdef DEBUG 541 if (ncr53c9x_notag) 542 ti->flags &= ~T_TAG; 543 #endif 544 ti->period = sc->sc_minsync; 545 ti->offset = 0; 546 ti->cfg3 = 0; 547 548 ncr53c9x_update_xfer_mode(sc, r); 549 } 550 551 if (doreset) { 552 sc->sc_state = NCR_SBR; 553 NCRCMD(sc, NCRCMD_RSTSCSI); 554 } else { 555 sc->sc_state = NCR_IDLE; 556 ncr53c9x_sched(sc); 557 } 558 559 /* Notify upper layer */ 560 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_RESET, NULL); 561 } 562 563 /* 564 * Read the NCR registers, and save their contents for later use. 565 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 566 * NCR_INTR - so make sure it is the last read. 567 * 568 * I think that (from reading the docs) most bits in these registers 569 * only make sense when he DMA CSR has an interrupt showing. Call only 570 * if an interrupt is pending. 571 */ 572 inline void 573 ncr53c9x_readregs(struct ncr53c9x_softc *sc) 574 { 575 576 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 577 /* Only the stepo bits are of interest */ 578 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 579 580 if (sc->sc_rev == NCR_VARIANT_FAS366) 581 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 582 583 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 584 585 if (sc->sc_glue->gl_clear_latched_intr != NULL) 586 (*sc->sc_glue->gl_clear_latched_intr)(sc); 587 588 /* 589 * Determine the SCSI bus phase, return either a real SCSI bus phase 590 * or some pseudo phase we use to detect certain exceptions. 591 */ 592 593 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 594 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 595 596 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 597 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 598 } 599 600 /* 601 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 602 */ 603 static inline int 604 ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc, int period) 605 { 606 int v; 607 608 v = (sc->sc_freq * period) / 250; 609 if (ncr53c9x_cpb2stp(sc, v) < period) 610 /* Correct round-down error */ 611 v++; 612 return v; 613 } 614 615 static inline void 616 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti) 617 { 618 u_char syncoff, synctp; 619 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 620 621 if (ti->flags & T_SYNCMODE) { 622 syncoff = ti->offset; 623 synctp = ncr53c9x_stp2cpb(sc, ti->period); 624 if (sc->sc_features & NCR_F_FASTSCSI) { 625 /* 626 * If the period is 200ns or less (ti->period <= 50), 627 * put the chip in Fast SCSI mode. 628 */ 629 if (ti->period <= 50) 630 /* 631 * There are (at least) 4 variations of the 632 * configuration 3 register. The drive attach 633 * routine sets the appropriate bit to put the 634 * chip into Fast SCSI mode so that it doesn't 635 * have to be figured out here each time. 636 */ 637 cfg3 |= sc->sc_cfg3_fscsi; 638 } 639 640 /* 641 * Am53c974 requires different SYNCTP values when the 642 * FSCSI bit is off. 643 */ 644 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 645 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 646 synctp--; 647 } else { 648 syncoff = 0; 649 synctp = 0; 650 } 651 652 if (sc->sc_features & NCR_F_HASCFG3) 653 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 654 655 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 656 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 657 } 658 659 /* 660 * Send a command to a target, set the driver state to NCR_SELECTING 661 * and let the caller take care of the rest. 662 * 663 * Keeping this as a function allows me to say that this may be done 664 * by DMA instead of programmed I/O soon. 665 */ 666 void 667 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 668 { 669 struct scsipi_periph *periph = ecb->xs->xs_periph; 670 int target = periph->periph_target; 671 int lun = periph->periph_lun; 672 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 673 int tiflags = ti->flags; 674 u_char *cmd; 675 int clen; 676 int selatn3, selatns; 677 size_t dmasize; 678 679 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 680 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 681 682 sc->sc_state = NCR_SELECTING; 683 /* 684 * Schedule the timeout now, the first time we will go away 685 * expecting to come back due to an interrupt, because it is 686 * always possible that the interrupt may never happen. 687 */ 688 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 689 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 690 ncr53c9x_timeout, ecb); 691 } 692 693 /* 694 * The docs say the target register is never reset, and I 695 * can't think of a better place to set it 696 */ 697 if (sc->sc_rev == NCR_VARIANT_FAS366) { 698 NCRCMD(sc, NCRCMD_FLUSH); 699 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 700 } else { 701 NCR_WRITE_REG(sc, NCR_SELID, target); 702 } 703 ncr53c9x_setsync(sc, ti); 704 705 if ((ecb->flags & ECB_SENSE) != 0) { 706 /* 707 * For REQUEST SENSE, we should not send an IDENTIFY or 708 * otherwise mangle the target. There should be no MESSAGE IN 709 * phase. 710 */ 711 if (sc->sc_features & NCR_F_DMASELECT) { 712 /* setup DMA transfer for command */ 713 dmasize = clen = ecb->clen; 714 sc->sc_cmdlen = clen; 715 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 716 717 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 718 &dmasize); 719 /* Program the SCSI counter */ 720 NCR_SET_COUNT(sc, dmasize); 721 722 if (sc->sc_rev != NCR_VARIANT_FAS366) 723 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 724 725 /* And get the targets attention */ 726 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 727 NCRDMA_GO(sc); 728 } else { 729 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 730 NCRCMD(sc, NCRCMD_SELNATN); 731 } 732 return; 733 } 734 735 selatn3 = selatns = 0; 736 if (ecb->tag[0] != 0) { 737 if (sc->sc_features & NCR_F_SELATN3) 738 /* use SELATN3 to send tag messages */ 739 selatn3 = 1; 740 else 741 /* We don't have SELATN3; use SELATNS to send tags */ 742 selatns = 1; 743 } 744 745 if (ti->flags & T_NEGOTIATE) { 746 /* We have to use SELATNS to send sync/wide messages */ 747 selatn3 = 0; 748 selatns = 1; 749 } 750 751 cmd = (u_char *)&ecb->cmd.cmd; 752 753 if (selatn3) { 754 /* We'll use tags with SELATN3 */ 755 clen = ecb->clen + 3; 756 cmd -= 3; 757 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 758 cmd[1] = ecb->tag[0]; /* msg[1] */ 759 cmd[2] = ecb->tag[1]; /* msg[2] */ 760 } else { 761 /* We don't have tags, or will send messages with SELATNS */ 762 clen = ecb->clen + 1; 763 cmd -= 1; 764 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 765 } 766 767 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 768 769 /* setup DMA transfer for command */ 770 dmasize = clen; 771 sc->sc_cmdlen = clen; 772 sc->sc_cmdp = cmd; 773 774 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 775 /* Program the SCSI counter */ 776 NCR_SET_COUNT(sc, dmasize); 777 778 /* load the count in */ 779 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 780 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 781 782 /* And get the targets attention */ 783 if (selatn3) { 784 sc->sc_msgout = SEND_TAG; 785 sc->sc_flags |= NCR_ATN; 786 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 787 } else 788 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 789 NCRDMA_GO(sc); 790 return; 791 } 792 793 /* 794 * Who am I. This is where we tell the target that we are 795 * happy for it to disconnect etc. 796 */ 797 798 /* Now get the command into the FIFO */ 799 ncr53c9x_wrfifo(sc, cmd, clen); 800 801 /* And get the targets attention */ 802 if (selatns) { 803 NCR_MSGS(("SELATNS \n")); 804 /* Arbitrate, select and stop after IDENTIFY message */ 805 NCRCMD(sc, NCRCMD_SELATNS); 806 } else if (selatn3) { 807 sc->sc_msgout = SEND_TAG; 808 sc->sc_flags |= NCR_ATN; 809 NCRCMD(sc, NCRCMD_SELATN3); 810 } else 811 NCRCMD(sc, NCRCMD_SELATN); 812 } 813 814 void 815 ncr53c9x_free_ecb(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 816 { 817 int s; 818 819 s = splbio(); 820 ecb->flags = 0; 821 pool_put(&ecb_pool, (void *)ecb); 822 splx(s); 823 return; 824 } 825 826 struct ncr53c9x_ecb * 827 ncr53c9x_get_ecb(struct ncr53c9x_softc *sc, int flags) 828 { 829 struct ncr53c9x_ecb *ecb; 830 int s; 831 832 s = splbio(); 833 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 834 splx(s); 835 if (ecb) { 836 memset(ecb, 0, sizeof(*ecb)); 837 ecb->flags |= ECB_ALLOC; 838 } 839 return ecb; 840 } 841 842 /* 843 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 844 */ 845 846 /* 847 * Start a SCSI-command 848 * This function is called by the higher level SCSI-driver to queue/run 849 * SCSI-commands. 850 */ 851 852 void 853 ncr53c9x_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 854 void *arg) 855 { 856 struct scsipi_xfer *xs; 857 struct scsipi_periph *periph; 858 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 859 struct ncr53c9x_ecb *ecb; 860 int s, flags; 861 862 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 863 864 s = splbio(); 865 simple_lock(&sc->sc_lock); 866 867 switch (req) { 868 case ADAPTER_REQ_RUN_XFER: 869 xs = arg; 870 periph = xs->xs_periph; 871 flags = xs->xs_control; 872 873 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 874 periph->periph_target)); 875 876 /* Get an ECB to use. */ 877 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 878 /* 879 * This should never happen as we track resources 880 * in the mid-layer, but for now it can as pool_get() 881 * can fail. 882 */ 883 if (ecb == NULL) { 884 scsipi_printaddr(periph); 885 printf("unable to allocate ecb\n"); 886 xs->error = XS_RESOURCE_SHORTAGE; 887 simple_unlock(&sc->sc_lock); 888 splx(s); 889 scsipi_done(xs); 890 return; 891 } 892 893 /* Initialize ecb */ 894 ecb->xs = xs; 895 ecb->timeout = xs->timeout; 896 897 if (flags & XS_CTL_RESET) { 898 ecb->flags |= ECB_RESET; 899 ecb->clen = 0; 900 ecb->dleft = 0; 901 } else { 902 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 903 ecb->clen = xs->cmdlen; 904 ecb->daddr = xs->data; 905 ecb->dleft = xs->datalen; 906 } 907 ecb->stat = 0; 908 909 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 910 ecb->flags |= ECB_READY; 911 if (sc->sc_state == NCR_IDLE) 912 ncr53c9x_sched(sc); 913 914 if ((flags & XS_CTL_POLL) == 0) 915 break; 916 917 /* Not allowed to use interrupts, use polling instead */ 918 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 919 ncr53c9x_timeout(ecb); 920 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 921 ncr53c9x_timeout(ecb); 922 } 923 break; 924 925 case ADAPTER_REQ_GROW_RESOURCES: 926 /* XXX Not supported. */ 927 break; 928 929 case ADAPTER_REQ_SET_XFER_MODE: 930 { 931 struct ncr53c9x_tinfo *ti; 932 struct scsipi_xfer_mode *xm = arg; 933 934 ti = &sc->sc_tinfo[xm->xm_target]; 935 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 936 ti->period = 0; 937 ti->offset = 0; 938 939 if ((sc->sc_cfflags & (1 << ((xm->xm_target & 7) + 16))) == 0 && 940 (xm->xm_mode & PERIPH_CAP_TQING)) { 941 NCR_MISC(("%s: target %d: tagged queuing\n", 942 sc->sc_dev.dv_xname, xm->xm_target)); 943 ti->flags |= T_TAG; 944 } else 945 ti->flags &= ~T_TAG; 946 947 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 948 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 949 sc->sc_dev.dv_xname, xm->xm_target)); 950 if (sc->sc_rev == NCR_VARIANT_FAS366) { 951 ti->flags |= T_WIDE; 952 ti->width = 1; 953 } 954 } 955 956 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 957 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 958 NCR_MISC(("%s: target %d: sync negotiation\n", 959 sc->sc_dev.dv_xname, xm->xm_target)); 960 ti->flags |= T_NEGOTIATE; 961 ti->period = sc->sc_minsync; 962 } 963 /* 964 * If we're not going to negotiate, send the notification 965 * now, since it won't happen later. 966 */ 967 if ((ti->flags & T_NEGOTIATE) == 0) 968 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 969 } 970 break; 971 } 972 973 simple_unlock(&sc->sc_lock); 974 splx(s); 975 } 976 977 void 978 ncr53c9x_update_xfer_mode(struct ncr53c9x_softc *sc, int target) 979 { 980 struct scsipi_xfer_mode xm; 981 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 982 983 xm.xm_target = target; 984 xm.xm_mode = 0; 985 xm.xm_period = 0; 986 xm.xm_offset = 0; 987 988 if (ti->flags & T_SYNCMODE) { 989 xm.xm_mode |= PERIPH_CAP_SYNC; 990 xm.xm_period = ti->period; 991 xm.xm_offset = ti->offset; 992 } 993 if (ti->width) 994 xm.xm_mode |= PERIPH_CAP_WIDE16; 995 996 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 997 xm.xm_mode |= PERIPH_CAP_TQING; 998 999 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 1000 } 1001 1002 /* 1003 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 1004 */ 1005 int 1006 ncr53c9x_poll(struct ncr53c9x_softc *sc, struct scsipi_xfer *xs, int count) 1007 { 1008 1009 NCR_TRACE(("[ncr53c9x_poll] ")); 1010 while (count) { 1011 if (NCRDMA_ISINTR(sc)) { 1012 simple_unlock(&sc->sc_lock); 1013 ncr53c9x_intr(sc); 1014 simple_lock(&sc->sc_lock); 1015 } 1016 #if alternatively 1017 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 1018 ncr53c9x_intr(sc); 1019 #endif 1020 if ((xs->xs_status & XS_STS_DONE) != 0) 1021 return 0; 1022 if (sc->sc_state == NCR_IDLE) { 1023 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 1024 ncr53c9x_sched(sc); 1025 } 1026 DELAY(1000); 1027 count--; 1028 } 1029 return 1; 1030 } 1031 1032 int 1033 ncr53c9x_ioctl(struct scsipi_channel *chan, u_long cmd, void *arg, 1034 int flag, struct proc *p) 1035 { 1036 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1037 int s, error = 0; 1038 1039 switch (cmd) { 1040 case SCBUSIORESET: 1041 s = splbio(); 1042 simple_lock(&sc->sc_lock); 1043 ncr53c9x_init(sc, 1); 1044 simple_unlock(&sc->sc_lock); 1045 splx(s); 1046 break; 1047 default: 1048 error = ENOTTY; 1049 break; 1050 } 1051 return error; 1052 } 1053 1054 1055 /* 1056 * LOW LEVEL SCSI UTILITIES 1057 */ 1058 1059 /* 1060 * Schedule a scsi operation. This has now been pulled out of the interrupt 1061 * handler so that we may call it from ncr53c9x_scsipi_request and 1062 * ncr53c9x_done. This may save us an unnecessary interrupt just to get 1063 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1064 */ 1065 void 1066 ncr53c9x_sched(struct ncr53c9x_softc *sc) 1067 { 1068 struct ncr53c9x_ecb *ecb; 1069 struct scsipi_periph *periph; 1070 struct ncr53c9x_tinfo *ti; 1071 struct ncr53c9x_linfo *li; 1072 int lun; 1073 int tag; 1074 1075 NCR_TRACE(("[ncr53c9x_sched] ")); 1076 if (sc->sc_state != NCR_IDLE) 1077 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1078 1079 /* 1080 * Find first ecb in ready queue that is for a target/lunit 1081 * combinations that is not busy. 1082 */ 1083 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1084 ecb = TAILQ_NEXT(ecb, chain)) { 1085 periph = ecb->xs->xs_periph; 1086 ti = &sc->sc_tinfo[periph->periph_target]; 1087 lun = periph->periph_lun; 1088 1089 /* Select type of tag for this command */ 1090 if ((ti->flags & (T_RSELECTOFF)) != 0) 1091 tag = 0; 1092 else if ((ti->flags & (T_TAG)) == 0) 1093 tag = 0; 1094 else if ((ecb->flags & ECB_SENSE) != 0) 1095 tag = 0; 1096 else 1097 tag = ecb->xs->xs_tag_type; 1098 #if 0 1099 /* XXXX Use tags for polled commands? */ 1100 if (ecb->xs->xs_control & XS_CTL_POLL) 1101 tag = 0; 1102 #endif 1103 1104 li = TINFO_LUN(ti, lun); 1105 if (li == NULL) { 1106 /* Initialize LUN info and add to list. */ 1107 if ((li = malloc(sizeof(*li), 1108 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) { 1109 continue; 1110 } 1111 li->lun = lun; 1112 1113 LIST_INSERT_HEAD(&ti->luns, li, link); 1114 if (lun < NCR_NLUN) 1115 ti->lun[lun] = li; 1116 } 1117 li->last_used = time_second; 1118 if (tag == 0) { 1119 /* Try to issue this as an un-tagged command */ 1120 if (li->untagged == NULL) 1121 li->untagged = ecb; 1122 } 1123 if (li->untagged != NULL) { 1124 tag = 0; 1125 if ((li->busy != 1) && li->used == 0) { 1126 /* We need to issue this untagged command now */ 1127 ecb = li->untagged; 1128 periph = ecb->xs->xs_periph; 1129 } else { 1130 /* Not ready yet */ 1131 continue; 1132 } 1133 } 1134 ecb->tag[0] = tag; 1135 if (tag != 0) { 1136 li->queued[ecb->xs->xs_tag_id] = ecb; 1137 ecb->tag[1] = ecb->xs->xs_tag_id; 1138 li->used++; 1139 } 1140 if (li->untagged != NULL && (li->busy != 1)) { 1141 li->busy = 1; 1142 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1143 ecb->flags &= ~ECB_READY; 1144 sc->sc_nexus = ecb; 1145 ncr53c9x_select(sc, ecb); 1146 break; 1147 } 1148 if (li->untagged == NULL && tag != 0) { 1149 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1150 ecb->flags &= ~ECB_READY; 1151 sc->sc_nexus = ecb; 1152 ncr53c9x_select(sc, ecb); 1153 break; 1154 } else { 1155 NCR_TRACE(("%d:%d busy\n", 1156 periph->periph_target, 1157 periph->periph_lun)); 1158 } 1159 } 1160 } 1161 1162 void 1163 ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1164 { 1165 struct scsipi_xfer *xs = ecb->xs; 1166 struct scsipi_periph *periph = xs->xs_periph; 1167 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1168 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd; 1169 struct ncr53c9x_linfo *li; 1170 int lun = periph->periph_lun; 1171 1172 NCR_TRACE(("requesting sense ")); 1173 /* Next, setup a request sense command block */ 1174 memset(ss, 0, sizeof(*ss)); 1175 ss->opcode = SCSI_REQUEST_SENSE; 1176 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1177 ss->length = sizeof(struct scsi_sense_data); 1178 ecb->clen = sizeof(*ss); 1179 ecb->daddr = (char *)&xs->sense.scsi_sense; 1180 ecb->dleft = sizeof(struct scsi_sense_data); 1181 ecb->flags |= ECB_SENSE; 1182 ecb->timeout = NCR_SENSE_TIMEOUT; 1183 ti->senses++; 1184 li = TINFO_LUN(ti, lun); 1185 if (li->busy) 1186 li->busy = 0; 1187 ncr53c9x_dequeue(sc, ecb); 1188 li->untagged = ecb; /* must be executed first to fix C/A */ 1189 li->busy = 2; 1190 if (ecb == sc->sc_nexus) { 1191 ncr53c9x_select(sc, ecb); 1192 } else { 1193 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1194 ecb->flags |= ECB_READY; 1195 if (sc->sc_state == NCR_IDLE) 1196 ncr53c9x_sched(sc); 1197 } 1198 } 1199 1200 /* 1201 * POST PROCESSING OF SCSI_CMD (usually current) 1202 */ 1203 void 1204 ncr53c9x_done(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1205 { 1206 struct scsipi_xfer *xs = ecb->xs; 1207 struct scsipi_periph *periph = xs->xs_periph; 1208 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1209 int lun = periph->periph_lun; 1210 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1211 1212 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1213 1214 callout_stop(&ecb->xs->xs_callout); 1215 1216 /* 1217 * Now, if we've come here with no error code, i.e. we've kept the 1218 * initial XS_NOERROR, and the status code signals that we should 1219 * check sense, we'll need to set up a request sense cmd block and 1220 * push the command back into the ready queue *before* any other 1221 * commands for this target/lunit, else we lose the sense info. 1222 * We don't support chk sense conditions for the request sense cmd. 1223 */ 1224 if (xs->error == XS_NOERROR) { 1225 xs->status = ecb->stat; 1226 if ((ecb->flags & ECB_ABORT) != 0) { 1227 xs->error = XS_TIMEOUT; 1228 } else if ((ecb->flags & ECB_SENSE) != 0) { 1229 xs->error = XS_SENSE; 1230 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1231 /* First, save the return values */ 1232 xs->resid = ecb->dleft; 1233 ncr53c9x_sense(sc, ecb); 1234 return; 1235 } else { 1236 xs->resid = ecb->dleft; 1237 } 1238 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1239 xs->error = XS_BUSY; 1240 } 1241 1242 #ifdef NCR53C9X_DEBUG 1243 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1244 if (xs->resid != 0) 1245 printf("resid=%d ", xs->resid); 1246 if (xs->error == XS_SENSE) 1247 printf("sense=0x%02x\n", 1248 xs->sense.scsi_sense.response_code); 1249 else 1250 printf("error=%d\n", xs->error); 1251 } 1252 #endif 1253 1254 /* 1255 * Remove the ECB from whatever queue it's on. 1256 */ 1257 ncr53c9x_dequeue(sc, ecb); 1258 if (ecb == sc->sc_nexus) { 1259 sc->sc_nexus = NULL; 1260 if (sc->sc_state != NCR_CLEANING) { 1261 sc->sc_state = NCR_IDLE; 1262 ncr53c9x_sched(sc); 1263 } 1264 } 1265 1266 if (xs->error == XS_SELTIMEOUT) { 1267 /* Selection timeout -- discard this LUN if empty */ 1268 if (li->untagged == NULL && li->used == 0) { 1269 if (lun < NCR_NLUN) 1270 ti->lun[lun] = NULL; 1271 LIST_REMOVE(li, link); 1272 free(li, M_DEVBUF); 1273 } 1274 } 1275 1276 ncr53c9x_free_ecb(sc, ecb); 1277 ti->cmds++; 1278 simple_unlock(&sc->sc_lock); 1279 scsipi_done(xs); 1280 simple_lock(&sc->sc_lock); 1281 } 1282 1283 void 1284 ncr53c9x_dequeue(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1285 { 1286 struct ncr53c9x_tinfo *ti = 1287 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1288 struct ncr53c9x_linfo *li; 1289 int64_t lun = ecb->xs->xs_periph->periph_lun; 1290 1291 li = TINFO_LUN(ti, lun); 1292 #ifdef DIAGNOSTIC 1293 if (li == NULL || li->lun != lun) 1294 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist", 1295 (long long)lun, ecb); 1296 #endif 1297 if (li->untagged == ecb) { 1298 li->busy = 0; 1299 li->untagged = NULL; 1300 } 1301 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1302 #ifdef DIAGNOSTIC 1303 if (li->queued[ecb->tag[1]] != NULL && 1304 (li->queued[ecb->tag[1]] != ecb)) 1305 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1306 "instead of ecb %p\n", ecb->tag[1], 1307 (long long)lun, 1308 li->queued[ecb->tag[1]], ecb); 1309 #endif 1310 li->queued[ecb->tag[1]] = NULL; 1311 li->used--; 1312 } 1313 1314 if ((ecb->flags & ECB_READY) != 0) { 1315 ecb->flags &= ~ECB_READY; 1316 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1317 } 1318 } 1319 1320 /* 1321 * INTERRUPT/PROTOCOL ENGINE 1322 */ 1323 1324 /* 1325 * Schedule an outgoing message by prioritizing it, and asserting 1326 * attention on the bus. We can only do this when we are the initiator 1327 * else there will be an illegal command interrupt. 1328 */ 1329 #define ncr53c9x_sched_msgout(m) \ 1330 do { \ 1331 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1332 NCRCMD(sc, NCRCMD_SETATN); \ 1333 sc->sc_flags |= NCR_ATN; \ 1334 sc->sc_msgpriq |= (m); \ 1335 } while (/* CONSTCOND */0) 1336 1337 static void 1338 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1339 { 1340 NCR_TRACE(("[flushfifo] ")); 1341 1342 NCRCMD(sc, NCRCMD_FLUSH); 1343 1344 if (sc->sc_phase == COMMAND_PHASE || 1345 sc->sc_phase == MESSAGE_OUT_PHASE) 1346 DELAY(2); 1347 } 1348 1349 static int 1350 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1351 { 1352 int i, n; 1353 u_char *ibuf; 1354 1355 switch(how) { 1356 case NCR_RDFIFO_START: 1357 ibuf = sc->sc_imess; 1358 sc->sc_imlen = 0; 1359 break; 1360 case NCR_RDFIFO_CONTINUE: 1361 ibuf = sc->sc_imess + sc->sc_imlen; 1362 break; 1363 default: 1364 panic("ncr53c9x_rdfifo: bad flag"); 1365 break; 1366 } 1367 1368 /* 1369 * XXX buffer (sc_imess) size for message 1370 */ 1371 1372 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1373 1374 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1375 n *= 2; 1376 1377 for (i = 0; i < n; i++) 1378 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1379 1380 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1381 1382 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1383 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1384 1385 NCR_READ_REG(sc, NCR_FIFO); 1386 1387 ncr53c9x_flushfifo(sc); 1388 } 1389 } else { 1390 for (i = 0; i < n; i++) 1391 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1392 } 1393 1394 sc->sc_imlen += i; 1395 1396 #if 0 1397 #ifdef NCR53C9X_DEBUG 1398 { 1399 int j; 1400 1401 NCR_TRACE(("\n[rdfifo %s (%d):", 1402 (how == NCR_RDFIFO_START) ? "start" : "cont", 1403 (int)sc->sc_imlen)); 1404 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1405 for (j = 0; j < sc->sc_imlen; j++) 1406 printf(" %02x", sc->sc_imess[j]); 1407 printf("]\n"); 1408 } 1409 } 1410 #endif 1411 #endif 1412 return sc->sc_imlen; 1413 } 1414 1415 static void 1416 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1417 { 1418 int i; 1419 1420 #ifdef NCR53C9X_DEBUG 1421 NCR_MSGS(("[wrfifo(%d):", len)); 1422 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1423 for (i = 0; i < len; i++) 1424 printf(" %02x", p[i]); 1425 printf("]\n"); 1426 } 1427 #endif 1428 1429 for (i = 0; i < len; i++) { 1430 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1431 1432 if (sc->sc_rev == NCR_VARIANT_FAS366) 1433 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1434 } 1435 } 1436 1437 int 1438 ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype, 1439 int tagid) 1440 { 1441 u_char selid, target, lun; 1442 struct ncr53c9x_ecb *ecb = NULL; 1443 struct ncr53c9x_tinfo *ti; 1444 struct ncr53c9x_linfo *li; 1445 1446 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1447 target = sc->sc_selid; 1448 } else { 1449 /* 1450 * The SCSI chip made a snapshot of the data bus 1451 * while the reselection was being negotiated. 1452 * This enables us to determine which target did 1453 * the reselect. 1454 */ 1455 selid = sc->sc_selid & ~(1 << sc->sc_id); 1456 if (selid & (selid - 1)) { 1457 printf("%s: reselect with invalid selid %02x;" 1458 " sending DEVICE RESET\n", 1459 sc->sc_dev.dv_xname, selid); 1460 goto reset; 1461 } 1462 1463 target = ffs(selid) - 1; 1464 } 1465 lun = message & 0x07; 1466 1467 /* 1468 * Search wait queue for disconnected cmd 1469 * The list should be short, so I haven't bothered with 1470 * any more sophisticated structures than a simple 1471 * singly linked list. 1472 */ 1473 ti = &sc->sc_tinfo[target]; 1474 li = TINFO_LUN(ti, lun); 1475 1476 /* 1477 * We can get as far as the LUN with the IDENTIFY 1478 * message. Check to see if we're running an 1479 * un-tagged command. Otherwise ack the IDENTIFY 1480 * and wait for a tag message. 1481 */ 1482 if (li != NULL) { 1483 if (li->untagged != NULL && li->busy) 1484 ecb = li->untagged; 1485 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1486 /* Wait for tag to come by */ 1487 sc->sc_state = NCR_IDENTIFIED; 1488 return 0; 1489 } else if (tagtype) 1490 ecb = li->queued[tagid]; 1491 } 1492 if (ecb == NULL) { 1493 printf("%s: reselect from target %d lun %d tag %x:%x " 1494 "with no nexus; sending ABORT\n", 1495 sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1496 goto abort; 1497 } 1498 1499 /* Make this nexus active again. */ 1500 sc->sc_state = NCR_CONNECTED; 1501 sc->sc_nexus = ecb; 1502 ncr53c9x_setsync(sc, ti); 1503 1504 if (ecb->flags & ECB_RESET) 1505 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1506 else if (ecb->flags & ECB_ABORT) 1507 ncr53c9x_sched_msgout(SEND_ABORT); 1508 1509 /* Do an implicit RESTORE POINTERS. */ 1510 sc->sc_dp = ecb->daddr; 1511 sc->sc_dleft = ecb->dleft; 1512 1513 return 0; 1514 1515 reset: 1516 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1517 return 1; 1518 1519 abort: 1520 ncr53c9x_sched_msgout(SEND_ABORT); 1521 return 1; 1522 } 1523 1524 static inline int 1525 __verify_msg_format(u_char *p, int len) 1526 { 1527 1528 if (len == 1 && MSG_IS1BYTE(p[0])) 1529 return 1; 1530 if (len == 2 && MSG_IS2BYTE(p[0])) 1531 return 1; 1532 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1533 len == p[1] + 2) 1534 return 1; 1535 1536 return 0; 1537 } 1538 1539 /* 1540 * Get an incoming message as initiator. 1541 * 1542 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1543 * byte in the FIFO 1544 */ 1545 void 1546 ncr53c9x_msgin(struct ncr53c9x_softc *sc) 1547 { 1548 1549 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1550 1551 if (sc->sc_imlen == 0) { 1552 printf("%s: msgin: no msg byte available\n", 1553 sc->sc_dev.dv_xname); 1554 return; 1555 } 1556 1557 /* 1558 * Prepare for a new message. A message should (according 1559 * to the SCSI standard) be transmitted in one single 1560 * MESSAGE_IN_PHASE. If we have been in some other phase, 1561 * then this is a new message. 1562 */ 1563 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1564 sc->sc_state != NCR_RESELECTED) { 1565 printf("%s: phase change, dropping message, " 1566 "prev %d, state %d\n", 1567 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1568 sc->sc_flags &= ~NCR_DROP_MSGI; 1569 sc->sc_imlen = 0; 1570 } 1571 1572 /* 1573 * If we're going to reject the message, don't bother storing 1574 * the incoming bytes. But still, we need to ACK them. 1575 */ 1576 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1577 NCRCMD(sc, NCRCMD_MSGOK); 1578 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1579 return; 1580 } 1581 1582 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1583 ncr53c9x_sched_msgout(SEND_REJECT); 1584 sc->sc_flags |= NCR_DROP_MSGI; 1585 } else { 1586 u_char *pb; 1587 int plen; 1588 1589 switch (sc->sc_state) { 1590 /* 1591 * if received message is the first of reselection 1592 * then first byte is selid, and then message 1593 */ 1594 case NCR_RESELECTED: 1595 pb = sc->sc_imess + 1; 1596 plen = sc->sc_imlen - 1; 1597 break; 1598 default: 1599 pb = sc->sc_imess; 1600 plen = sc->sc_imlen; 1601 break; 1602 } 1603 1604 if (__verify_msg_format(pb, plen)) 1605 goto gotit; 1606 } 1607 1608 /* Ack what we have so far */ 1609 NCRCMD(sc, NCRCMD_MSGOK); 1610 return; 1611 1612 gotit: 1613 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1614 /* we got complete message, flush the imess, */ 1615 /* XXX nobody uses imlen below */ 1616 sc->sc_imlen = 0; 1617 /* 1618 * Now we should have a complete message (1 byte, 2 byte 1619 * and moderately long extended messages). We only handle 1620 * extended messages which total length is shorter than 1621 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1622 */ 1623 switch (sc->sc_state) { 1624 struct ncr53c9x_ecb *ecb; 1625 struct ncr53c9x_tinfo *ti; 1626 struct ncr53c9x_linfo *li; 1627 int lun; 1628 1629 case NCR_CONNECTED: 1630 ecb = sc->sc_nexus; 1631 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1632 1633 switch (sc->sc_imess[0]) { 1634 case MSG_CMDCOMPLETE: 1635 NCR_MSGS(("cmdcomplete ")); 1636 if (sc->sc_dleft < 0) { 1637 scsipi_printaddr(ecb->xs->xs_periph); 1638 printf("got %ld extra bytes\n", 1639 -(long)sc->sc_dleft); 1640 sc->sc_dleft = 0; 1641 } 1642 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1643 0 : sc->sc_dleft; 1644 if ((ecb->flags & ECB_SENSE) == 0) 1645 ecb->xs->resid = ecb->dleft; 1646 sc->sc_state = NCR_CMDCOMPLETE; 1647 break; 1648 1649 case MSG_MESSAGE_REJECT: 1650 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1651 switch (sc->sc_msgout) { 1652 case SEND_TAG: 1653 /* 1654 * Target does not like tagged queuing. 1655 * - Flush the command queue 1656 * - Disable tagged queuing for the target 1657 * - Dequeue ecb from the queued array. 1658 */ 1659 printf("%s: tagged queuing rejected: " 1660 "target %d\n", 1661 sc->sc_dev.dv_xname, 1662 ecb->xs->xs_periph->periph_target); 1663 1664 NCR_MSGS(("(rejected sent tag)")); 1665 NCRCMD(sc, NCRCMD_FLUSH); 1666 DELAY(1); 1667 ti->flags &= ~T_TAG; 1668 lun = ecb->xs->xs_periph->periph_lun; 1669 li = TINFO_LUN(ti, lun); 1670 if (ecb->tag[0] && 1671 li->queued[ecb->tag[1]] != NULL) { 1672 li->queued[ecb->tag[1]] = NULL; 1673 li->used--; 1674 } 1675 ecb->tag[0] = ecb->tag[1] = 0; 1676 li->untagged = ecb; 1677 li->busy = 1; 1678 break; 1679 1680 case SEND_SDTR: 1681 printf("%s: sync transfer rejected: " 1682 "target %d\n", 1683 sc->sc_dev.dv_xname, 1684 ecb->xs->xs_periph->periph_target); 1685 1686 sc->sc_flags &= ~NCR_SYNCHNEGO; 1687 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1688 ncr53c9x_setsync(sc, ti); 1689 ncr53c9x_update_xfer_mode(sc, 1690 ecb->xs->xs_periph->periph_target); 1691 break; 1692 1693 case SEND_WDTR: 1694 printf("%s: wide transfer rejected: " 1695 "target %d\n", 1696 sc->sc_dev.dv_xname, 1697 ecb->xs->xs_periph->periph_target); 1698 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1699 ti->width = 0; 1700 break; 1701 1702 case SEND_INIT_DET_ERR: 1703 goto abort; 1704 } 1705 break; 1706 1707 case MSG_NOOP: 1708 NCR_MSGS(("noop ")); 1709 break; 1710 1711 case MSG_HEAD_OF_Q_TAG: 1712 case MSG_SIMPLE_Q_TAG: 1713 case MSG_ORDERED_Q_TAG: 1714 NCR_MSGS(("TAG %x:%x", 1715 sc->sc_imess[0], sc->sc_imess[1])); 1716 break; 1717 1718 case MSG_DISCONNECT: 1719 NCR_MSGS(("disconnect ")); 1720 ti->dconns++; 1721 sc->sc_state = NCR_DISCONNECT; 1722 1723 /* 1724 * Mark the fact that all bytes have moved. The 1725 * target may not bother to do a SAVE POINTERS 1726 * at this stage. This flag will set the residual 1727 * count to zero on MSG COMPLETE. 1728 */ 1729 if (sc->sc_dleft == 0) 1730 ecb->flags |= ECB_TENTATIVE_DONE; 1731 1732 break; 1733 1734 case MSG_SAVEDATAPOINTER: 1735 NCR_MSGS(("save datapointer ")); 1736 ecb->daddr = sc->sc_dp; 1737 ecb->dleft = sc->sc_dleft; 1738 break; 1739 1740 case MSG_RESTOREPOINTERS: 1741 NCR_MSGS(("restore datapointer ")); 1742 sc->sc_dp = ecb->daddr; 1743 sc->sc_dleft = ecb->dleft; 1744 break; 1745 1746 case MSG_EXTENDED: 1747 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1748 switch (sc->sc_imess[2]) { 1749 case MSG_EXT_SDTR: 1750 NCR_MSGS(("SDTR period %d, offset %d ", 1751 sc->sc_imess[3], sc->sc_imess[4])); 1752 if (sc->sc_imess[1] != 3) 1753 goto reject; 1754 ti->period = sc->sc_imess[3]; 1755 ti->offset = sc->sc_imess[4]; 1756 ti->flags &= ~T_NEGOTIATE; 1757 if (sc->sc_minsync == 0 || 1758 ti->offset == 0 || 1759 ti->period > 124) { 1760 #if 0 1761 #ifdef NCR53C9X_DEBUG 1762 scsipi_printaddr(ecb->xs->xs_periph); 1763 printf("async mode\n"); 1764 #endif 1765 #endif 1766 ti->flags &= ~T_SYNCMODE; 1767 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1768 /* 1769 * target initiated negotiation 1770 */ 1771 ti->offset = 0; 1772 ncr53c9x_sched_msgout( 1773 SEND_SDTR); 1774 } 1775 } else { 1776 int p; 1777 1778 p = ncr53c9x_stp2cpb(sc, ti->period); 1779 ti->period = ncr53c9x_cpb2stp(sc, p); 1780 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1781 /* 1782 * target initiated negotiation 1783 */ 1784 if (ti->period < 1785 sc->sc_minsync) 1786 ti->period = 1787 sc->sc_minsync; 1788 if (ti->offset > 15) 1789 ti->offset = 15; 1790 ti->flags &= ~T_SYNCMODE; 1791 ncr53c9x_sched_msgout( 1792 SEND_SDTR); 1793 } else { 1794 /* we are sync */ 1795 ti->flags |= T_SYNCMODE; 1796 } 1797 } 1798 ncr53c9x_update_xfer_mode(sc, 1799 ecb->xs->xs_periph->periph_target); 1800 sc->sc_flags &= ~NCR_SYNCHNEGO; 1801 ncr53c9x_setsync(sc, ti); 1802 break; 1803 1804 case MSG_EXT_WDTR: 1805 #ifdef NCR53C9X_DEBUG 1806 printf("%s: wide mode %d\n", 1807 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1808 #endif 1809 if (sc->sc_imess[3] == 1) { 1810 ti->cfg3 |= NCRFASCFG3_EWIDE; 1811 ncr53c9x_setsync(sc, ti); 1812 } else 1813 ti->width = 0; 1814 /* 1815 * Device started width negotiation. 1816 */ 1817 if (!(ti->flags & T_WDTRSENT)) 1818 ncr53c9x_sched_msgout(SEND_WDTR); 1819 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1820 break; 1821 default: 1822 scsipi_printaddr(ecb->xs->xs_periph); 1823 printf("unrecognized MESSAGE EXTENDED;" 1824 " sending REJECT\n"); 1825 goto reject; 1826 } 1827 break; 1828 1829 default: 1830 NCR_MSGS(("ident ")); 1831 scsipi_printaddr(ecb->xs->xs_periph); 1832 printf("unrecognized MESSAGE; sending REJECT\n"); 1833 reject: 1834 ncr53c9x_sched_msgout(SEND_REJECT); 1835 break; 1836 } 1837 break; 1838 1839 case NCR_IDENTIFIED: 1840 /* 1841 * IDENTIFY message was received and queue tag is expected now 1842 */ 1843 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1844 (sc->sc_msgify == 0)) { 1845 printf("%s: TAG reselect without IDENTIFY;" 1846 " MSG %x;" 1847 " sending DEVICE RESET\n", 1848 sc->sc_dev.dv_xname, 1849 sc->sc_imess[0]); 1850 goto reset; 1851 } 1852 (void)ncr53c9x_reselect(sc, sc->sc_msgify, 1853 sc->sc_imess[0], sc->sc_imess[1]); 1854 break; 1855 1856 case NCR_RESELECTED: 1857 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1858 sc->sc_msgify = sc->sc_imess[1]; 1859 } else { 1860 printf("%s: reselect without IDENTIFY;" 1861 " MSG %x;" 1862 " sending DEVICE RESET\n", 1863 sc->sc_dev.dv_xname, 1864 sc->sc_imess[1]); 1865 goto reset; 1866 } 1867 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1868 break; 1869 1870 default: 1871 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1872 sc->sc_dev.dv_xname); 1873 reset: 1874 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1875 break; 1876 1877 abort: 1878 ncr53c9x_sched_msgout(SEND_ABORT); 1879 break; 1880 } 1881 1882 /* if we have more messages to send set ATN */ 1883 if (sc->sc_msgpriq) 1884 NCRCMD(sc, NCRCMD_SETATN); 1885 1886 /* Ack last message byte */ 1887 NCRCMD(sc, NCRCMD_MSGOK); 1888 1889 /* Done, reset message pointer. */ 1890 sc->sc_flags &= ~NCR_DROP_MSGI; 1891 sc->sc_imlen = 0; 1892 } 1893 1894 1895 /* 1896 * Send the highest priority, scheduled message 1897 */ 1898 void 1899 ncr53c9x_msgout(struct ncr53c9x_softc *sc) 1900 { 1901 struct ncr53c9x_tinfo *ti; 1902 struct ncr53c9x_ecb *ecb; 1903 size_t size; 1904 1905 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1906 sc->sc_msgpriq, sc->sc_prevphase)); 1907 1908 /* 1909 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1910 * condition on the SCSI bus. The 53c9x chip 1911 * automatically turns off ATN before sending the 1912 * message byte. (see also the comment below in the 1913 * default case when picking out a message to send) 1914 */ 1915 if (sc->sc_flags & NCR_ATN) { 1916 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1917 new: 1918 NCRCMD(sc, NCRCMD_FLUSH); 1919 #if 0 1920 DELAY(1); 1921 #endif 1922 sc->sc_msgoutq = 0; 1923 sc->sc_omlen = 0; 1924 } 1925 } else { 1926 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1927 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1928 goto new; 1929 } else { 1930 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1931 sc->sc_dev.dv_xname, __LINE__); 1932 } 1933 } 1934 1935 if (sc->sc_omlen == 0) { 1936 /* Pick up highest priority message */ 1937 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1938 sc->sc_msgoutq |= sc->sc_msgout; 1939 sc->sc_msgpriq &= ~sc->sc_msgout; 1940 sc->sc_omlen = 1; /* "Default" message len */ 1941 switch (sc->sc_msgout) { 1942 case SEND_SDTR: 1943 ecb = sc->sc_nexus; 1944 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1945 sc->sc_omess[0] = MSG_EXTENDED; 1946 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1947 sc->sc_omess[2] = MSG_EXT_SDTR; 1948 sc->sc_omess[3] = ti->period; 1949 sc->sc_omess[4] = ti->offset; 1950 sc->sc_omlen = 5; 1951 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1952 ti->flags |= T_SYNCMODE; 1953 ncr53c9x_setsync(sc, ti); 1954 } 1955 break; 1956 case SEND_WDTR: 1957 ecb = sc->sc_nexus; 1958 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1959 sc->sc_omess[0] = MSG_EXTENDED; 1960 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1961 sc->sc_omess[2] = MSG_EXT_WDTR; 1962 sc->sc_omess[3] = ti->width; 1963 sc->sc_omlen = 4; 1964 break; 1965 case SEND_IDENTIFY: 1966 if (sc->sc_state != NCR_CONNECTED) { 1967 printf("%s at line %d: no nexus\n", 1968 sc->sc_dev.dv_xname, __LINE__); 1969 } 1970 ecb = sc->sc_nexus; 1971 sc->sc_omess[0] = 1972 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1973 break; 1974 case SEND_TAG: 1975 if (sc->sc_state != NCR_CONNECTED) { 1976 printf("%s at line %d: no nexus\n", 1977 sc->sc_dev.dv_xname, __LINE__); 1978 } 1979 ecb = sc->sc_nexus; 1980 sc->sc_omess[0] = ecb->tag[0]; 1981 sc->sc_omess[1] = ecb->tag[1]; 1982 sc->sc_omlen = 2; 1983 break; 1984 case SEND_DEV_RESET: 1985 sc->sc_flags |= NCR_ABORTING; 1986 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1987 ecb = sc->sc_nexus; 1988 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1989 ti->flags &= ~T_SYNCMODE; 1990 ncr53c9x_update_xfer_mode(sc, 1991 ecb->xs->xs_periph->periph_target); 1992 if ((ti->flags & T_SYNCHOFF) == 0) 1993 /* We can re-start sync negotiation */ 1994 ti->flags |= T_NEGOTIATE; 1995 break; 1996 case SEND_PARITY_ERROR: 1997 sc->sc_omess[0] = MSG_PARITY_ERROR; 1998 break; 1999 case SEND_ABORT: 2000 sc->sc_flags |= NCR_ABORTING; 2001 sc->sc_omess[0] = MSG_ABORT; 2002 break; 2003 case SEND_INIT_DET_ERR: 2004 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 2005 break; 2006 case SEND_REJECT: 2007 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 2008 break; 2009 default: 2010 /* 2011 * We normally do not get here, since the chip 2012 * automatically turns off ATN before the last 2013 * byte of a message is sent to the target. 2014 * However, if the target rejects our (multi-byte) 2015 * message early by switching to MSG IN phase 2016 * ATN remains on, so the target may return to 2017 * MSG OUT phase. If there are no scheduled messages 2018 * left we send a NO-OP. 2019 * 2020 * XXX - Note that this leaves no useful purpose for 2021 * the NCR_ATN flag. 2022 */ 2023 sc->sc_flags &= ~NCR_ATN; 2024 sc->sc_omess[0] = MSG_NOOP; 2025 break; 2026 } 2027 sc->sc_omp = sc->sc_omess; 2028 } 2029 2030 #ifdef DEBUG 2031 if (ncr53c9x_debug & NCR_SHOWMSGS) { 2032 int i; 2033 2034 NCR_MSGS(("<msgout:")); 2035 for (i = 0; i < sc->sc_omlen; i++) 2036 NCR_MSGS((" %02x", sc->sc_omess[i])); 2037 NCR_MSGS(("> ")); 2038 } 2039 #endif 2040 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2041 /* 2042 * XXX fifo size 2043 */ 2044 ncr53c9x_flushfifo(sc); 2045 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2046 NCRCMD(sc, NCRCMD_TRANS); 2047 } else { 2048 /* (re)send the message */ 2049 size = min(sc->sc_omlen, sc->sc_maxxfer); 2050 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2051 /* Program the SCSI counter */ 2052 NCR_SET_COUNT(sc, size); 2053 2054 /* Load the count in and start the message-out transfer */ 2055 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2056 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2057 NCRDMA_GO(sc); 2058 } 2059 } 2060 2061 /* 2062 * This is the most critical part of the driver, and has to know 2063 * how to deal with *all* error conditions and phases from the SCSI 2064 * bus. If there are no errors and the DMA was active, then call the 2065 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2066 * and we can return from here without further processing. 2067 * 2068 * Most of this needs verifying. 2069 */ 2070 int 2071 ncr53c9x_intr(void *arg) 2072 { 2073 struct ncr53c9x_softc *sc = arg; 2074 struct ncr53c9x_ecb *ecb; 2075 struct scsipi_periph *periph; 2076 struct ncr53c9x_tinfo *ti; 2077 size_t size; 2078 int nfifo; 2079 2080 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2081 2082 if (!NCRDMA_ISINTR(sc)) 2083 return 0; 2084 2085 simple_lock(&sc->sc_lock); 2086 again: 2087 /* and what do the registers say... */ 2088 ncr53c9x_readregs(sc); 2089 2090 sc->sc_intrcnt.ev_count++; 2091 2092 /* 2093 * At the moment, only a SCSI Bus Reset or Illegal 2094 * Command are classed as errors. A disconnect is a 2095 * valid condition, and we let the code check is the 2096 * "NCR_BUSFREE_OK" flag was set before declaring it 2097 * and error. 2098 * 2099 * Also, the status register tells us about "Gross 2100 * Errors" and "Parity errors". Only the Gross Error 2101 * is really bad, and the parity errors are dealt 2102 * with later 2103 * 2104 * TODO 2105 * If there are too many parity error, go to slow 2106 * cable mode ? 2107 */ 2108 2109 /* SCSI Reset */ 2110 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2111 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2112 NCRCMD(sc, NCRCMD_FLUSH); 2113 DELAY(1); 2114 } 2115 if (sc->sc_state != NCR_SBR) { 2116 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 2117 ncr53c9x_init(sc, 0); /* Restart everything */ 2118 goto out; 2119 } 2120 #if 0 2121 /*XXX*/ printf("<expected bus reset: " 2122 "[intr %x, stat %x, step %d]>\n", 2123 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2124 #endif 2125 if (sc->sc_nexus != NULL) 2126 panic("%s: nexus in reset state", 2127 sc->sc_dev.dv_xname); 2128 goto sched; 2129 } 2130 2131 ecb = sc->sc_nexus; 2132 2133 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2134 if (sc->sc_espintr & NCRINTR_ERR || 2135 sc->sc_espstat & NCRSTAT_GE) { 2136 2137 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2138 /* Gross Error; no target ? */ 2139 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2140 NCRCMD(sc, NCRCMD_FLUSH); 2141 DELAY(1); 2142 } 2143 if (sc->sc_state == NCR_CONNECTED || 2144 sc->sc_state == NCR_SELECTING) { 2145 ecb->xs->error = XS_TIMEOUT; 2146 ncr53c9x_done(sc, ecb); 2147 } 2148 goto out; 2149 } 2150 2151 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2152 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2153 /* 2154 * Eat away "Illegal command" interrupt 2155 * on a ESP100 caused by a re-selection 2156 * while we were trying to select 2157 * another target. 2158 */ 2159 #ifdef DEBUG 2160 printf("%s: ESP100 work-around activated\n", 2161 sc->sc_dev.dv_xname); 2162 #endif 2163 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2164 goto out; 2165 } 2166 /* illegal command, out of sync ? */ 2167 printf("%s: illegal command: 0x%x " 2168 "(state %d, phase %x, prevphase %x)\n", 2169 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2170 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2171 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2172 NCRCMD(sc, NCRCMD_FLUSH); 2173 DELAY(1); 2174 } 2175 ncr53c9x_init(sc, 1); /* Restart everything */ 2176 goto out; 2177 } 2178 } 2179 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2180 2181 /* 2182 * Call if DMA is active. 2183 * 2184 * If DMA_INTR returns true, then maybe go 'round the loop 2185 * again in case there is no more DMA queued, but a phase 2186 * change is expected. 2187 */ 2188 if (NCRDMA_ISACTIVE(sc)) { 2189 int r = NCRDMA_INTR(sc); 2190 if (r == -1) { 2191 printf("%s: DMA error; resetting\n", 2192 sc->sc_dev.dv_xname); 2193 ncr53c9x_init(sc, 1); 2194 goto out; 2195 } 2196 /* If DMA active here, then go back to work... */ 2197 if (NCRDMA_ISACTIVE(sc)) 2198 goto out; 2199 2200 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2201 /* 2202 * DMA not completed. If we can not find a 2203 * acceptable explanation, print a diagnostic. 2204 */ 2205 if (sc->sc_state == NCR_SELECTING) 2206 /* 2207 * This can happen if we are reselected 2208 * while using DMA to select a target. 2209 */ 2210 /*void*/; 2211 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2212 /* 2213 * Our (multi-byte) message (eg SDTR) was 2214 * interrupted by the target to send 2215 * a MSG REJECT. 2216 * Print diagnostic if current phase 2217 * is not MESSAGE IN. 2218 */ 2219 if (sc->sc_phase != MESSAGE_IN_PHASE) 2220 printf("%s: !TC on MSG OUT" 2221 " [intr %x, stat %x, step %d]" 2222 " prevphase %x, resid %lx\n", 2223 sc->sc_dev.dv_xname, 2224 sc->sc_espintr, 2225 sc->sc_espstat, 2226 sc->sc_espstep, 2227 sc->sc_prevphase, 2228 (u_long)sc->sc_omlen); 2229 } else if (sc->sc_dleft == 0) { 2230 /* 2231 * The DMA operation was started for 2232 * a DATA transfer. Print a diagnostic 2233 * if the DMA counter and TC bit 2234 * appear to be out of sync. 2235 */ 2236 printf("%s: !TC on DATA XFER" 2237 " [intr %x, stat %x, step %d]" 2238 " prevphase %x, resid %x\n", 2239 sc->sc_dev.dv_xname, 2240 sc->sc_espintr, 2241 sc->sc_espstat, 2242 sc->sc_espstep, 2243 sc->sc_prevphase, 2244 ecb ? ecb->dleft : -1); 2245 } 2246 } 2247 } 2248 2249 /* 2250 * Check for less serious errors. 2251 */ 2252 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2253 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2254 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2255 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2256 else 2257 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2258 } 2259 2260 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2261 sc->sc_msgify = 0; 2262 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2263 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2264 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2265 NCRCMD(sc, NCRCMD_FLUSH); 2266 #if 0 2267 DELAY(1); 2268 #endif 2269 } 2270 /* 2271 * This command must (apparently) be issued within 2272 * 250mS of a disconnect. So here you are... 2273 */ 2274 NCRCMD(sc, NCRCMD_ENSEL); 2275 2276 switch (sc->sc_state) { 2277 case NCR_RESELECTED: 2278 goto sched; 2279 2280 case NCR_SELECTING: 2281 { 2282 struct ncr53c9x_linfo *li; 2283 2284 ecb->xs->error = XS_SELTIMEOUT; 2285 2286 /* Selection timeout -- discard all LUNs if empty */ 2287 periph = ecb->xs->xs_periph; 2288 ti = &sc->sc_tinfo[periph->periph_target]; 2289 li = LIST_FIRST(&ti->luns); 2290 while (li != NULL) { 2291 if (li->untagged == NULL && li->used == 0) { 2292 if (li->lun < NCR_NLUN) 2293 ti->lun[li->lun] = NULL; 2294 LIST_REMOVE(li, link); 2295 free(li, M_DEVBUF); 2296 /* 2297 * Restart the search at the beginning 2298 */ 2299 li = LIST_FIRST(&ti->luns); 2300 continue; 2301 } 2302 li = LIST_NEXT(li, link); 2303 } 2304 goto finish; 2305 } 2306 case NCR_CONNECTED: 2307 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2308 #ifdef NCR53C9X_DEBUG 2309 if (ecb != NULL) 2310 scsipi_printaddr(ecb->xs->xs_periph); 2311 printf("sync nego not completed!\n"); 2312 #endif 2313 ti = &sc->sc_tinfo[ 2314 ecb->xs->xs_periph->periph_target]; 2315 sc->sc_flags &= ~NCR_SYNCHNEGO; 2316 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2317 } 2318 2319 /* it may be OK to disconnect */ 2320 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2321 /* 2322 * Section 5.1.1 of the SCSI 2 spec 2323 * suggests issuing a REQUEST SENSE 2324 * following an unexpected disconnect. 2325 * Some devices go into a contingent 2326 * allegiance condition when 2327 * disconnecting, and this is necessary 2328 * to clean up their state. 2329 */ 2330 printf("%s: unexpected disconnect " 2331 "[state %d, intr %x, stat %x, phase(c %x, p %x)]; ", 2332 sc->sc_dev.dv_xname, sc->sc_state, 2333 sc->sc_espintr, sc->sc_espstat, 2334 sc->sc_phase, sc->sc_prevphase); 2335 2336 if ((ecb->flags & ECB_SENSE) != 0) { 2337 printf("resetting\n"); 2338 goto reset; 2339 } 2340 printf("sending REQUEST SENSE\n"); 2341 callout_stop(&ecb->xs->xs_callout); 2342 ncr53c9x_sense(sc, ecb); 2343 goto out; 2344 } 2345 2346 ecb->xs->error = XS_TIMEOUT; 2347 goto finish; 2348 2349 case NCR_DISCONNECT: 2350 sc->sc_nexus = NULL; 2351 goto sched; 2352 2353 case NCR_CMDCOMPLETE: 2354 goto finish; 2355 } 2356 } 2357 2358 switch (sc->sc_state) { 2359 2360 case NCR_SBR: 2361 printf("%s: waiting for SCSI Bus Reset to happen\n", 2362 sc->sc_dev.dv_xname); 2363 goto out; 2364 2365 case NCR_RESELECTED: 2366 /* 2367 * we must be continuing a message ? 2368 */ 2369 printf("%s: unhandled reselect continuation, " 2370 "state %d, intr %02x\n", 2371 sc->sc_dev.dv_xname, sc->sc_state, sc->sc_espintr); 2372 ncr53c9x_init(sc, 1); 2373 goto out; 2374 2375 case NCR_IDENTIFIED: 2376 ecb = sc->sc_nexus; 2377 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2378 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2379 /* 2380 * Things are seriously screwed up. 2381 * Pull the brakes, i.e. reset 2382 */ 2383 printf("%s: target didn't send tag: %d bytes in fifo\n", 2384 sc->sc_dev.dv_xname, i); 2385 /* Drain and display fifo */ 2386 while (i-- > 0) 2387 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2388 2389 ncr53c9x_init(sc, 1); 2390 goto out; 2391 } else 2392 goto msgin; 2393 2394 case NCR_IDLE: 2395 case NCR_SELECTING: 2396 ecb = sc->sc_nexus; 2397 if (sc->sc_espintr & NCRINTR_RESEL) { 2398 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2399 sc->sc_flags = 0; 2400 /* 2401 * If we're trying to select a 2402 * target ourselves, push our command 2403 * back into the ready list. 2404 */ 2405 if (sc->sc_state == NCR_SELECTING) { 2406 NCR_INTS(("backoff selector ")); 2407 callout_stop(&ecb->xs->xs_callout); 2408 ncr53c9x_dequeue(sc, ecb); 2409 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2410 ecb->flags |= ECB_READY; 2411 ecb = sc->sc_nexus = NULL; 2412 } 2413 sc->sc_state = NCR_RESELECTED; 2414 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2415 /* 2416 * Things are seriously screwed up. 2417 * Pull the brakes, i.e. reset 2418 */ 2419 printf("%s: target didn't identify\n", 2420 sc->sc_dev.dv_xname); 2421 ncr53c9x_init(sc, 1); 2422 goto out; 2423 } 2424 /* 2425 * The C90 only inhibits FIFO writes until reselection 2426 * is complete, instead of waiting until the interrupt 2427 * status register has been read. So, if the reselect 2428 * happens while we were entering command bytes (for 2429 * another target) some of those bytes can appear in 2430 * the FIFO here, after the interrupt is taken. 2431 * 2432 * To remedy this situation, pull the Selection ID 2433 * and Identify message from the FIFO directly, and 2434 * ignore any extraneous fifo contents. Also, set 2435 * a flag that allows one Illegal Command Interrupt 2436 * to occur which the chip also generates as a result 2437 * of writing to the FIFO during a reselect. 2438 */ 2439 if (sc->sc_rev == NCR_VARIANT_ESP100) { 2440 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & 2441 NCRFIFO_FF; 2442 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO); 2443 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO); 2444 sc->sc_imlen = 2; 2445 if (nfifo != 2) { 2446 /* Flush the rest */ 2447 NCRCMD(sc, NCRCMD_FLUSH); 2448 } 2449 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2450 if (nfifo > 2) 2451 nfifo = 2; /* We fixed it.. */ 2452 } else 2453 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2454 2455 if (nfifo != 2) { 2456 printf("%s: RESELECT: %d bytes in FIFO! " 2457 "[intr %x, stat %x, step %d, " 2458 "prevphase %x]\n", 2459 sc->sc_dev.dv_xname, 2460 nfifo, 2461 sc->sc_espintr, 2462 sc->sc_espstat, 2463 sc->sc_espstep, 2464 sc->sc_prevphase); 2465 ncr53c9x_init(sc, 1); 2466 goto out; 2467 } 2468 sc->sc_selid = sc->sc_imess[0]; 2469 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2470 2471 /* Handle identify message */ 2472 ncr53c9x_msgin(sc); 2473 2474 if (sc->sc_state != NCR_CONNECTED && 2475 sc->sc_state != NCR_IDENTIFIED) { 2476 /* IDENTIFY fail?! */ 2477 printf("%s: identify failed, " 2478 "state %d, intr %02x\n", 2479 sc->sc_dev.dv_xname, sc->sc_state, 2480 sc->sc_espintr); 2481 ncr53c9x_init(sc, 1); 2482 goto out; 2483 } 2484 goto shortcut; /* ie. next phase expected soon */ 2485 } 2486 2487 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2488 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2489 /* 2490 * Arbitration won; examine the `step' register 2491 * to determine how far the selection could progress. 2492 */ 2493 ecb = sc->sc_nexus; 2494 if (ecb == NULL) 2495 panic("ncr53c9x: no nexus"); 2496 2497 periph = ecb->xs->xs_periph; 2498 ti = &sc->sc_tinfo[periph->periph_target]; 2499 2500 switch (sc->sc_espstep) { 2501 case 0: 2502 /* 2503 * The target did not respond with a 2504 * message out phase - probably an old 2505 * device that doesn't recognize ATN. 2506 * Clear ATN and just continue, the 2507 * target should be in the command 2508 * phase. 2509 * XXXX check for command phase? 2510 */ 2511 NCRCMD(sc, NCRCMD_RSTATN); 2512 break; 2513 case 1: 2514 if ((ti->flags & T_NEGOTIATE) == 0 && 2515 ecb->tag[0] == 0) { 2516 printf("%s: step 1 & !NEG\n", 2517 sc->sc_dev.dv_xname); 2518 goto reset; 2519 } 2520 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2521 printf("%s: !MSGOUT\n", 2522 sc->sc_dev.dv_xname); 2523 goto reset; 2524 } 2525 if (ti->flags & T_WIDE) { 2526 ti->flags |= T_WDTRSENT; 2527 ncr53c9x_sched_msgout(SEND_WDTR); 2528 } 2529 if (ti->flags & T_NEGOTIATE) { 2530 /* Start negotiating */ 2531 ti->period = sc->sc_minsync; 2532 ti->offset = 15; 2533 sc->sc_flags |= NCR_SYNCHNEGO; 2534 if (ecb->tag[0]) 2535 ncr53c9x_sched_msgout( 2536 SEND_TAG|SEND_SDTR); 2537 else 2538 ncr53c9x_sched_msgout( 2539 SEND_SDTR); 2540 } else { 2541 /* Could not do ATN3 so send TAG */ 2542 ncr53c9x_sched_msgout(SEND_TAG); 2543 } 2544 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2545 break; 2546 case 3: 2547 /* 2548 * Grr, this is supposed to mean 2549 * "target left command phase prematurely". 2550 * It seems to happen regularly when 2551 * sync mode is on. 2552 * Look at FIFO to see if command went out. 2553 * (Timing problems?) 2554 */ 2555 if (sc->sc_features & NCR_F_DMASELECT) { 2556 if (sc->sc_cmdlen == 0) 2557 /* Hope for the best.. */ 2558 break; 2559 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2560 & NCRFIFO_FF) == 0) { 2561 /* Hope for the best.. */ 2562 break; 2563 } 2564 printf("(%s:%d:%d): selection failed;" 2565 " %d left in FIFO " 2566 "[intr %x, stat %x, step %d]\n", 2567 sc->sc_dev.dv_xname, 2568 periph->periph_target, 2569 periph->periph_lun, 2570 NCR_READ_REG(sc, NCR_FFLAG) 2571 & NCRFIFO_FF, 2572 sc->sc_espintr, sc->sc_espstat, 2573 sc->sc_espstep); 2574 NCRCMD(sc, NCRCMD_FLUSH); 2575 ncr53c9x_sched_msgout(SEND_ABORT); 2576 goto out; 2577 case 2: 2578 /* Select stuck at Command Phase */ 2579 NCRCMD(sc, NCRCMD_FLUSH); 2580 break; 2581 case 4: 2582 if (sc->sc_features & NCR_F_DMASELECT && 2583 sc->sc_cmdlen != 0) 2584 printf("(%s:%d:%d): select; " 2585 "%lu left in DMA buffer " 2586 "[intr %x, stat %x, step %d]\n", 2587 sc->sc_dev.dv_xname, 2588 periph->periph_target, 2589 periph->periph_lun, 2590 (u_long)sc->sc_cmdlen, 2591 sc->sc_espintr, 2592 sc->sc_espstat, 2593 sc->sc_espstep); 2594 /* So far, everything went fine */ 2595 break; 2596 } 2597 2598 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2599 /* Do an implicit RESTORE POINTERS. */ 2600 sc->sc_dp = ecb->daddr; 2601 sc->sc_dleft = ecb->dleft; 2602 sc->sc_state = NCR_CONNECTED; 2603 break; 2604 2605 } else { 2606 2607 printf("%s: unexpected status after select" 2608 ": [intr %x, stat %x, step %x]\n", 2609 sc->sc_dev.dv_xname, 2610 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2611 NCRCMD(sc, NCRCMD_FLUSH); 2612 DELAY(1); 2613 goto reset; 2614 } 2615 if (sc->sc_state == NCR_IDLE) { 2616 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); 2617 simple_unlock(&sc->sc_lock); 2618 return 0; 2619 } 2620 break; 2621 2622 case NCR_CONNECTED: 2623 if ((sc->sc_flags & NCR_ICCS) != 0) { 2624 /* "Initiate Command Complete Steps" in progress */ 2625 u_char msg; 2626 2627 sc->sc_flags &= ~NCR_ICCS; 2628 2629 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2630 printf("%s: ICCS: " 2631 ": [intr %x, stat %x, step %x]\n", 2632 sc->sc_dev.dv_xname, 2633 sc->sc_espintr, sc->sc_espstat, 2634 sc->sc_espstep); 2635 } 2636 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2637 if (sc->sc_imlen < 2) 2638 printf("%s: can't get status, only %d bytes\n", 2639 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2640 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2641 msg = sc->sc_imess[sc->sc_imlen - 1]; 2642 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2643 if (msg == MSG_CMDCOMPLETE) { 2644 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2645 ? 0 : sc->sc_dleft; 2646 if ((ecb->flags & ECB_SENSE) == 0) 2647 ecb->xs->resid = ecb->dleft; 2648 sc->sc_state = NCR_CMDCOMPLETE; 2649 } else 2650 printf("%s: STATUS_PHASE: msg %d\n", 2651 sc->sc_dev.dv_xname, msg); 2652 sc->sc_imlen = 0; 2653 NCRCMD(sc, NCRCMD_MSGOK); 2654 goto shortcut; /* ie. wait for disconnect */ 2655 } 2656 break; 2657 2658 default: 2659 printf("%s: invalid state: %d [intr %x, phase(c %x, p %x)]\n", 2660 sc->sc_dev.dv_xname, sc->sc_state, 2661 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase); 2662 goto reset; 2663 } 2664 2665 /* 2666 * Driver is now in state NCR_CONNECTED, i.e. we 2667 * have a current command working the SCSI bus. 2668 */ 2669 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2670 panic("ncr53c9x: no nexus"); 2671 } 2672 2673 switch (sc->sc_phase) { 2674 case MESSAGE_OUT_PHASE: 2675 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2676 ncr53c9x_msgout(sc); 2677 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2678 break; 2679 2680 case MESSAGE_IN_PHASE: 2681 msgin: 2682 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2683 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2684 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2685 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2686 NCRCMD(sc, NCRCMD_FLUSH); 2687 } 2688 sc->sc_flags |= NCR_WAITI; 2689 NCRCMD(sc, NCRCMD_TRANS); 2690 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2691 if ((sc->sc_flags & NCR_WAITI) == 0) { 2692 printf("%s: MSGIN: unexpected FC bit: " 2693 "[intr %x, stat %x, step %x]\n", 2694 sc->sc_dev.dv_xname, 2695 sc->sc_espintr, sc->sc_espstat, 2696 sc->sc_espstep); 2697 } 2698 sc->sc_flags &= ~NCR_WAITI; 2699 ncr53c9x_rdfifo(sc, 2700 (sc->sc_prevphase == sc->sc_phase) ? 2701 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2702 ncr53c9x_msgin(sc); 2703 } else { 2704 printf("%s: MSGIN: weird bits: " 2705 "[intr %x, stat %x, step %x]\n", 2706 sc->sc_dev.dv_xname, 2707 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2708 } 2709 sc->sc_prevphase = MESSAGE_IN_PHASE; 2710 goto shortcut; /* i.e. expect data to be ready */ 2711 2712 case COMMAND_PHASE: 2713 /* 2714 * Send the command block. Normally we don't see this 2715 * phase because the SEL_ATN command takes care of 2716 * all this. However, we end up here if either the 2717 * target or we wanted to exchange some more messages 2718 * first (e.g. to start negotiations). 2719 */ 2720 2721 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2722 ecb->cmd.cmd.opcode, ecb->clen)); 2723 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2724 NCRCMD(sc, NCRCMD_FLUSH); 2725 #if 0 2726 DELAY(1); 2727 #endif 2728 } 2729 if (sc->sc_features & NCR_F_DMASELECT) { 2730 /* setup DMA transfer for command */ 2731 size = ecb->clen; 2732 sc->sc_cmdlen = size; 2733 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 2734 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2735 0, &size); 2736 /* Program the SCSI counter */ 2737 NCR_SET_COUNT(sc, size); 2738 2739 /* load the count in */ 2740 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2741 2742 /* start the command transfer */ 2743 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2744 NCRDMA_GO(sc); 2745 } else { 2746 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2747 NCRCMD(sc, NCRCMD_TRANS); 2748 } 2749 sc->sc_prevphase = COMMAND_PHASE; 2750 break; 2751 2752 case DATA_OUT_PHASE: 2753 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2754 NCRCMD(sc, NCRCMD_FLUSH); 2755 size = min(sc->sc_dleft, sc->sc_maxxfer); 2756 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2757 sc->sc_prevphase = DATA_OUT_PHASE; 2758 goto setup_xfer; 2759 2760 case DATA_IN_PHASE: 2761 NCR_PHASE(("DATA_IN_PHASE ")); 2762 if (sc->sc_rev == NCR_VARIANT_ESP100) 2763 NCRCMD(sc, NCRCMD_FLUSH); 2764 size = min(sc->sc_dleft, sc->sc_maxxfer); 2765 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2766 sc->sc_prevphase = DATA_IN_PHASE; 2767 setup_xfer: 2768 /* Target returned to data phase: wipe "done" memory */ 2769 ecb->flags &= ~ECB_TENTATIVE_DONE; 2770 2771 /* Program the SCSI counter */ 2772 NCR_SET_COUNT(sc, size); 2773 2774 /* load the count in */ 2775 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2776 2777 /* 2778 * Note that if `size' is 0, we've already transceived 2779 * all the bytes we want but we're still in DATA PHASE. 2780 * Apparently, the device needs padding. Also, a 2781 * transfer size of 0 means "maximum" to the chip 2782 * DMA logic. 2783 */ 2784 NCRCMD(sc, 2785 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2786 NCRDMA_GO(sc); 2787 goto out; 2788 2789 case STATUS_PHASE: 2790 NCR_PHASE(("STATUS_PHASE ")); 2791 sc->sc_flags |= NCR_ICCS; 2792 NCRCMD(sc, NCRCMD_ICCS); 2793 sc->sc_prevphase = STATUS_PHASE; 2794 goto shortcut; /* i.e. expect status results soon */ 2795 2796 case INVALID_PHASE: 2797 break; 2798 2799 default: 2800 printf("%s: unexpected bus phase; resetting\n", 2801 sc->sc_dev.dv_xname); 2802 goto reset; 2803 } 2804 2805 out: 2806 simple_unlock(&sc->sc_lock); 2807 return 1; 2808 2809 reset: 2810 ncr53c9x_init(sc, 1); 2811 goto out; 2812 2813 finish: 2814 ncr53c9x_done(sc, ecb); 2815 goto out; 2816 2817 sched: 2818 sc->sc_state = NCR_IDLE; 2819 ncr53c9x_sched(sc); 2820 goto out; 2821 2822 shortcut: 2823 /* 2824 * The idea is that many of the SCSI operations take very little 2825 * time, and going away and getting interrupted is too high an 2826 * overhead to pay. For example, selecting, sending a message 2827 * and command and then doing some work can be done in one "pass". 2828 * 2829 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2830 * at 40MHz. This needs testing. 2831 */ 2832 { 2833 struct timeval wait, cur; 2834 2835 microtime(&wait); 2836 wait.tv_usec += 50 / sc->sc_freq; 2837 if (wait.tv_usec > 1000000) { 2838 wait.tv_sec++; 2839 wait.tv_usec -= 1000000; 2840 } 2841 do { 2842 if (NCRDMA_ISINTR(sc)) 2843 goto again; 2844 microtime(&cur); 2845 } while (cur.tv_sec <= wait.tv_sec && 2846 cur.tv_usec <= wait.tv_usec); 2847 } 2848 goto out; 2849 } 2850 2851 void 2852 ncr53c9x_abort(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 2853 { 2854 2855 /* 2 secs for the abort */ 2856 ecb->timeout = NCR_ABORT_TIMEOUT; 2857 ecb->flags |= ECB_ABORT; 2858 2859 if (ecb == sc->sc_nexus) { 2860 /* 2861 * If we're still selecting, the message will be scheduled 2862 * after selection is complete. 2863 */ 2864 if (sc->sc_state == NCR_CONNECTED) 2865 ncr53c9x_sched_msgout(SEND_ABORT); 2866 2867 /* 2868 * Reschedule timeout. 2869 */ 2870 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2871 ncr53c9x_timeout, ecb); 2872 } else { 2873 /* 2874 * Just leave the command where it is. 2875 * XXX - what choice do we have but to reset the SCSI 2876 * eventually? 2877 */ 2878 if (sc->sc_state == NCR_IDLE) 2879 ncr53c9x_sched(sc); 2880 } 2881 } 2882 2883 void 2884 ncr53c9x_timeout(void *arg) 2885 { 2886 struct ncr53c9x_ecb *ecb = arg; 2887 struct scsipi_xfer *xs = ecb->xs; 2888 struct scsipi_periph *periph = xs->xs_periph; 2889 struct ncr53c9x_softc *sc = 2890 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2891 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2892 int s; 2893 2894 scsipi_printaddr(periph); 2895 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2896 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2897 "msg(q %x,o %x) %s>", 2898 sc->sc_dev.dv_xname, 2899 ecb, ecb->flags, ecb->dleft, ecb->stat, 2900 sc->sc_state, sc->sc_nexus, 2901 NCR_READ_REG(sc, NCR_STAT), 2902 sc->sc_phase, sc->sc_prevphase, 2903 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2904 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2905 #if NCR53C9X_DEBUG > 1 2906 printf("TRACE: %s.", ecb->trace); 2907 #endif 2908 2909 s = splbio(); 2910 simple_lock(&sc->sc_lock); 2911 2912 if (ecb->flags & ECB_ABORT) { 2913 /* abort timed out */ 2914 printf(" AGAIN\n"); 2915 2916 ncr53c9x_init(sc, 1); 2917 } else { 2918 /* abort the operation that has timed out */ 2919 printf("\n"); 2920 xs->error = XS_TIMEOUT; 2921 ncr53c9x_abort(sc, ecb); 2922 2923 /* Disable sync mode if stuck in a data phase */ 2924 if (ecb == sc->sc_nexus && 2925 (ti->flags & T_SYNCMODE) != 0 && 2926 (sc->sc_phase & (MSGI|CDI)) == 0) { 2927 /* XXX ASYNC CALLBACK! */ 2928 scsipi_printaddr(periph); 2929 printf("sync negotiation disabled\n"); 2930 sc->sc_cfflags |= 2931 (1 << ((periph->periph_target & 7) + 8)); 2932 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2933 } 2934 } 2935 2936 simple_unlock(&sc->sc_lock); 2937 splx(s); 2938 } 2939 2940 void 2941 ncr53c9x_watch(void *arg) 2942 { 2943 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2944 struct ncr53c9x_tinfo *ti; 2945 struct ncr53c9x_linfo *li; 2946 int t, s; 2947 /* Delete any structures that have not been used in 10min. */ 2948 time_t old = time_second - (10 * 60); 2949 2950 s = splbio(); 2951 simple_lock(&sc->sc_lock); 2952 for (t = 0; t < sc->sc_ntarg; t++) { 2953 ti = &sc->sc_tinfo[t]; 2954 li = LIST_FIRST(&ti->luns); 2955 while (li) { 2956 if (li->last_used < old && 2957 li->untagged == NULL && 2958 li->used == 0) { 2959 if (li->lun < NCR_NLUN) 2960 ti->lun[li->lun] = NULL; 2961 LIST_REMOVE(li, link); 2962 free(li, M_DEVBUF); 2963 /* Restart the search at the beginning */ 2964 li = LIST_FIRST(&ti->luns); 2965 continue; 2966 } 2967 li = LIST_NEXT(li, link); 2968 } 2969 } 2970 simple_unlock(&sc->sc_lock); 2971 splx(s); 2972 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2973 } 2974 2975
Indexes created Sat Sep 27 14:09:57 GMT 2025