ncr53c9x.c revision 1.132
1 /* $NetBSD: ncr53c9x.c,v 1.132 2008/04/08 12:07:26 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.132 2008/04/08 12:07:26 cegger Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/callout.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/malloc.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 #include <sys/pool.h> 94 #include <sys/scsiio.h> 95 96 #include <dev/scsipi/scsi_spc.h> 97 #include <dev/scsipi/scsi_all.h> 98 #include <dev/scsipi/scsipi_all.h> 99 #include <dev/scsipi/scsiconf.h> 100 #include <dev/scsipi/scsi_message.h> 101 102 #include <dev/ic/ncr53c9xreg.h> 103 #include <dev/ic/ncr53c9xvar.h> 104 105 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 106 #ifdef DEBUG 107 int ncr53c9x_notag = 0; 108 #endif 109 110 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 111 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 112 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 113 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 114 /*static*/ void ncr53c9x_clear(struct ncr53c9x_softc *, scsipi_xfer_result_t); 115 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 116 struct scsipi_xfer *, int); 117 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 118 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 119 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 120 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 121 /*static*/ void ncr53c9x_timeout(void *arg); 122 /*static*/ void ncr53c9x_watch(void *arg); 123 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 124 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 125 struct ncr53c9x_ecb *); 126 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 127 void *, int, struct proc *); 128 129 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 130 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 131 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 132 133 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 134 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 135 struct ncr53c9x_tinfo *); 136 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 137 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 138 int64_t lun); 139 140 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 141 142 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 143 #define NCR_RDFIFO_START 0 144 #define NCR_RDFIFO_CONTINUE 1 145 146 147 #define NCR_SET_COUNT(sc, size) do { \ 148 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 149 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 150 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 151 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 152 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 153 } \ 154 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 155 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 156 } \ 157 } while (/* CONSTCOND */0) 158 159 static int ecb_pool_initialized = 0; 160 static struct pool ecb_pool; 161 162 /* 163 * Names for the NCR53c9x variants, corresponding to the variant tags 164 * in ncr53c9xvar.h. 165 */ 166 static const char *ncr53c9x_variant_names[] = { 167 "ESP100", 168 "ESP100A", 169 "ESP200", 170 "NCR53C94", 171 "NCR53C96", 172 "ESP406", 173 "FAS408", 174 "FAS216", 175 "AM53C974", 176 "FAS366/HME", 177 "NCR53C90 (86C01)", 178 }; 179 180 /* 181 * Search linked list for LUN info by LUN id. 182 */ 183 static struct ncr53c9x_linfo * 184 ncr53c9x_lunsearch(struct ncr53c9x_tinfo *ti, int64_t lun) 185 { 186 struct ncr53c9x_linfo *li; 187 188 LIST_FOREACH(li, &ti->luns, link) 189 if (li->lun == lun) 190 return li; 191 return NULL; 192 } 193 194 /* 195 * Attach this instance, and then all the sub-devices 196 */ 197 void 198 ncr53c9x_attach(struct ncr53c9x_softc *sc) 199 { 200 struct scsipi_adapter *adapt = &sc->sc_adapter; 201 struct scsipi_channel *chan = &sc->sc_channel; 202 203 simple_lock_init(&sc->sc_lock); 204 205 callout_init(&sc->sc_watchdog, 0); 206 207 /* 208 * Note, the front-end has set us up to print the chip variation. 209 */ 210 if (sc->sc_rev >= NCR_VARIANT_MAX) { 211 aprint_error_dev(&sc->sc_dev, "unknown variant %d, devices not attached\n", 212 sc->sc_rev); 213 return; 214 } 215 216 printf(": %s, %dMHz, SCSI ID %d\n", 217 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 218 219 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8; 220 221 /* 222 * Allocate SCSI message buffers. 223 * Front-ends can override allocation to avoid alignment 224 * handling in the DMA engines. Note that that ncr53c9x_msgout() 225 * can request a 1 byte DMA transfer. 226 */ 227 if (sc->sc_omess == NULL) 228 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 229 230 if (sc->sc_imess == NULL) 231 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 232 233 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]), 234 M_DEVBUF, M_NOWAIT | M_ZERO); 235 236 if (sc->sc_omess == NULL || sc->sc_imess == NULL || 237 sc->sc_tinfo == NULL) { 238 printf("out of memory\n"); 239 return; 240 } 241 242 /* 243 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 244 * from now on. 245 */ 246 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 247 sc->sc_rev = NCR_VARIANT_ESP100; 248 249 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 250 251 /* The value *must not* be == 1. Make it 2 */ 252 if (sc->sc_ccf == 1) 253 sc->sc_ccf = 2; 254 255 /* 256 * The recommended timeout is 250ms. This register is loaded 257 * with a value calculated as follows, from the docs: 258 * 259 * (timout period) x (CLK frequency) 260 * reg = ------------------------------------- 261 * 8192 x (Clock Conversion Factor) 262 * 263 * Since CCF has a linear relation to CLK, this generally computes 264 * to the constant of 153. 265 */ 266 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 267 268 /* CCF register only has 3 bits; 0 is actually 8 */ 269 sc->sc_ccf &= 7; 270 271 /* 272 * Fill in the scsipi_adapter. 273 */ 274 adapt->adapt_dev = &sc->sc_dev; 275 adapt->adapt_nchannels = 1; 276 adapt->adapt_openings = 256; 277 adapt->adapt_max_periph = 256; 278 adapt->adapt_ioctl = ncr53c9x_ioctl; 279 /* adapt_request initialized by front-end */ 280 /* adapt_minphys initialized by front-end */ 281 282 /* 283 * Fill in the scsipi_channel. 284 */ 285 memset(chan, 0, sizeof(*chan)); 286 chan->chan_adapter = adapt; 287 chan->chan_bustype = &scsi_bustype; 288 chan->chan_channel = 0; 289 chan->chan_ntargets = sc->sc_ntarg; 290 chan->chan_nluns = 8; 291 chan->chan_id = sc->sc_id; 292 293 /* 294 * Add reference to adapter so that we drop the reference after 295 * config_found() to make sure the adatper is disabled. 296 */ 297 if (scsipi_adapter_addref(adapt) != 0) { 298 aprint_error_dev(&sc->sc_dev, "unable to enable controller\n"); 299 return; 300 } 301 302 /* Reset state & bus */ 303 sc->sc_cfflags = device_cfdata(&sc->sc_dev)->cf_flags; 304 sc->sc_state = 0; 305 ncr53c9x_init(sc, 1); 306 307 /* 308 * Now try to attach all the sub-devices 309 */ 310 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 311 312 scsipi_adapter_delref(adapt); 313 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 314 } 315 316 int 317 ncr53c9x_detach(struct ncr53c9x_softc *sc, int flags) 318 { 319 struct ncr53c9x_linfo *li, *nextli; 320 int t; 321 int error; 322 323 callout_stop(&sc->sc_watchdog); 324 325 if (sc->sc_tinfo) { 326 /* Cancel all commands. */ 327 ncr53c9x_clear(sc, XS_DRIVER_STUFFUP); 328 329 /* Free logical units. */ 330 for (t = 0; t < sc->sc_ntarg; t++) { 331 for (li = LIST_FIRST(&sc->sc_tinfo[t].luns); li; 332 li = nextli) { 333 nextli = LIST_NEXT(li, link); 334 free(li, M_DEVBUF); 335 } 336 } 337 } 338 339 if (sc->sc_child) { 340 error = config_detach(sc->sc_child, flags); 341 if (error) 342 return error; 343 } 344 345 if (sc->sc_imess) 346 free(sc->sc_imess, M_DEVBUF); 347 if (sc->sc_omess) 348 free(sc->sc_omess, M_DEVBUF); 349 350 return 0; 351 } 352 353 /* 354 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 355 * only this controller, but kills any on-going commands, and also stops 356 * and resets the DMA. 357 * 358 * After reset, registers are loaded with the defaults from the attach 359 * routine above. 360 */ 361 void 362 ncr53c9x_reset(struct ncr53c9x_softc *sc) 363 { 364 365 /* reset DMA first */ 366 NCRDMA_RESET(sc); 367 368 /* reset SCSI chip */ 369 NCRCMD(sc, NCRCMD_RSTCHIP); 370 NCRCMD(sc, NCRCMD_NOP); 371 DELAY(500); 372 373 /* do these backwards, and fall through */ 374 switch (sc->sc_rev) { 375 case NCR_VARIANT_ESP406: 376 case NCR_VARIANT_FAS408: 377 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 378 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 379 case NCR_VARIANT_AM53C974: 380 case NCR_VARIANT_FAS216: 381 case NCR_VARIANT_NCR53C94: 382 case NCR_VARIANT_NCR53C96: 383 case NCR_VARIANT_ESP200: 384 sc->sc_features |= NCR_F_HASCFG3; 385 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 386 case NCR_VARIANT_ESP100A: 387 sc->sc_features |= NCR_F_SELATN3; 388 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 389 case NCR_VARIANT_ESP100: 390 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 391 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 392 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 393 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 394 break; 395 396 case NCR_VARIANT_FAS366: 397 sc->sc_features |= 398 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 399 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 400 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 401 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 402 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 403 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 404 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 405 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 406 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 407 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 408 break; 409 410 default: 411 aprint_error_dev(&sc->sc_dev, "unknown revision code, assuming ESP100\n"); 412 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 413 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 414 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 415 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 416 } 417 418 if (sc->sc_rev == NCR_VARIANT_AM53C974) 419 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 420 421 #if 0 422 printf("%s: ncr53c9x_reset: revision %d\n", 423 device_xname(&sc->sc_dev), sc->sc_rev); 424 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 425 "ccf 0x%x, timeout 0x%x\n", 426 device_xname(&sc->sc_dev), sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 427 sc->sc_ccf, sc->sc_timeout); 428 #endif 429 } 430 431 /* 432 * Reset the SCSI bus, but not the chip 433 */ 434 void 435 ncr53c9x_scsi_reset(struct ncr53c9x_softc *sc) 436 { 437 438 (*sc->sc_glue->gl_dma_stop)(sc); 439 440 printf("%s: resetting SCSI bus\n", device_xname(&sc->sc_dev)); 441 NCRCMD(sc, NCRCMD_RSTSCSI); 442 } 443 444 /* 445 * Clear all commands 446 */ 447 void 448 ncr53c9x_clear(struct ncr53c9x_softc *sc, scsipi_xfer_result_t result) 449 { 450 struct ncr53c9x_ecb *ecb; 451 struct ncr53c9x_linfo *li; 452 int i, r; 453 454 /* Cancel any active commands. */ 455 sc->sc_state = NCR_CLEANING; 456 sc->sc_msgify = 0; 457 if ((ecb = sc->sc_nexus) != NULL) { 458 ecb->xs->error = result; 459 ncr53c9x_done(sc, ecb); 460 } 461 /* Cancel outstanding disconnected commands on each LUN */ 462 for (r = 0; r < sc->sc_ntarg; r++) { 463 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 464 if ((ecb = li->untagged) != NULL) { 465 li->untagged = NULL; 466 /* 467 * XXXXXXX 468 * 469 * Should we terminate a command 470 * that never reached the disk? 471 */ 472 li->busy = 0; 473 ecb->xs->error = result; 474 ncr53c9x_done(sc, ecb); 475 } 476 for (i = 0; i < 256; i++) 477 if ((ecb = li->queued[i])) { 478 li->queued[i] = NULL; 479 ecb->xs->error = result; 480 ncr53c9x_done(sc, ecb); 481 } 482 li->used = 0; 483 } 484 } 485 } 486 487 /* 488 * Initialize ncr53c9x state machine 489 */ 490 void 491 ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset) 492 { 493 int r; 494 495 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 496 497 if (!ecb_pool_initialized) { 498 /* All instances share this pool */ 499 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 500 "ncr53c9x_ecb", NULL, IPL_BIO); 501 /* make sure to always have some items to play with */ 502 if (pool_prime(&ecb_pool, 1) == ENOMEM) { 503 printf("WARNING: not enough memory for ncr53c9x_ecb\n"); 504 } 505 ecb_pool_initialized = 1; 506 } 507 508 if (sc->sc_state == 0) { 509 /* First time through; initialize. */ 510 511 TAILQ_INIT(&sc->ready_list); 512 sc->sc_nexus = NULL; 513 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 514 for (r = 0; r < sc->sc_ntarg; r++) { 515 LIST_INIT(&sc->sc_tinfo[r].luns); 516 } 517 } else { 518 ncr53c9x_clear(sc, XS_TIMEOUT); 519 } 520 521 /* 522 * reset the chip to a known state 523 */ 524 ncr53c9x_reset(sc); 525 526 sc->sc_flags = 0; 527 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 528 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 529 530 for (r = 0; r < sc->sc_ntarg; r++) { 531 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 532 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 533 534 ti->flags = ((sc->sc_minsync && 535 !(sc->sc_cfflags & (1 << ((r & 7) + 8)))) ? 536 0 : T_SYNCHOFF) | 537 ((sc->sc_cfflags & (1 << (r & 7))) ? T_RSELECTOFF : 0); 538 #ifdef DEBUG 539 if (ncr53c9x_notag) 540 ti->flags &= ~T_TAG; 541 #endif 542 ti->period = sc->sc_minsync; 543 ti->offset = 0; 544 ti->cfg3 = 0; 545 546 ncr53c9x_update_xfer_mode(sc, r); 547 } 548 549 if (doreset) { 550 sc->sc_state = NCR_SBR; 551 NCRCMD(sc, NCRCMD_RSTSCSI); 552 } else { 553 sc->sc_state = NCR_IDLE; 554 ncr53c9x_sched(sc); 555 } 556 557 /* Notify upper layer */ 558 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_RESET, NULL); 559 } 560 561 /* 562 * Read the NCR registers, and save their contents for later use. 563 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 564 * NCR_INTR - so make sure it is the last read. 565 * 566 * I think that (from reading the docs) most bits in these registers 567 * only make sense when he DMA CSR has an interrupt showing. Call only 568 * if an interrupt is pending. 569 */ 570 inline void 571 ncr53c9x_readregs(struct ncr53c9x_softc *sc) 572 { 573 574 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 575 /* Only the stepo bits are of interest */ 576 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 577 578 if (sc->sc_rev == NCR_VARIANT_FAS366) 579 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 580 581 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 582 583 if (sc->sc_glue->gl_clear_latched_intr != NULL) 584 (*sc->sc_glue->gl_clear_latched_intr)(sc); 585 586 /* 587 * Determine the SCSI bus phase, return either a real SCSI bus phase 588 * or some pseudo phase we use to detect certain exceptions. 589 */ 590 591 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 592 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 593 594 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 595 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 596 } 597 598 /* 599 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 600 */ 601 static inline int 602 ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc, int period) 603 { 604 int v; 605 606 v = (sc->sc_freq * period) / 250; 607 if (ncr53c9x_cpb2stp(sc, v) < period) 608 /* Correct round-down error */ 609 v++; 610 return v; 611 } 612 613 static inline void 614 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti) 615 { 616 u_char syncoff, synctp; 617 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 618 619 if (ti->flags & T_SYNCMODE) { 620 syncoff = ti->offset; 621 synctp = ncr53c9x_stp2cpb(sc, ti->period); 622 if (sc->sc_features & NCR_F_FASTSCSI) { 623 /* 624 * If the period is 200ns or less (ti->period <= 50), 625 * put the chip in Fast SCSI mode. 626 */ 627 if (ti->period <= 50) 628 /* 629 * There are (at least) 4 variations of the 630 * configuration 3 register. The drive attach 631 * routine sets the appropriate bit to put the 632 * chip into Fast SCSI mode so that it doesn't 633 * have to be figured out here each time. 634 */ 635 cfg3 |= sc->sc_cfg3_fscsi; 636 } 637 638 /* 639 * Am53c974 requires different SYNCTP values when the 640 * FSCSI bit is off. 641 */ 642 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 643 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 644 synctp--; 645 } else { 646 syncoff = 0; 647 synctp = 0; 648 } 649 650 if (sc->sc_features & NCR_F_HASCFG3) 651 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 652 653 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 654 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 655 } 656 657 /* 658 * Send a command to a target, set the driver state to NCR_SELECTING 659 * and let the caller take care of the rest. 660 * 661 * Keeping this as a function allows me to say that this may be done 662 * by DMA instead of programmed I/O soon. 663 */ 664 void 665 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 666 { 667 struct scsipi_periph *periph = ecb->xs->xs_periph; 668 int target = periph->periph_target; 669 int lun = periph->periph_lun; 670 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 671 int tiflags = ti->flags; 672 u_char *cmd; 673 int clen; 674 int selatn3, selatns; 675 size_t dmasize; 676 677 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 678 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 679 680 sc->sc_state = NCR_SELECTING; 681 /* 682 * Schedule the timeout now, the first time we will go away 683 * expecting to come back due to an interrupt, because it is 684 * always possible that the interrupt may never happen. 685 */ 686 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 687 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 688 ncr53c9x_timeout, ecb); 689 } 690 691 /* 692 * The docs say the target register is never reset, and I 693 * can't think of a better place to set it 694 */ 695 if (sc->sc_rev == NCR_VARIANT_FAS366) { 696 NCRCMD(sc, NCRCMD_FLUSH); 697 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 698 } else { 699 NCR_WRITE_REG(sc, NCR_SELID, target); 700 } 701 ncr53c9x_setsync(sc, ti); 702 703 if ((ecb->flags & ECB_SENSE) != 0) { 704 /* 705 * For REQUEST SENSE, we should not send an IDENTIFY or 706 * otherwise mangle the target. There should be no MESSAGE IN 707 * phase. 708 */ 709 if (sc->sc_features & NCR_F_DMASELECT) { 710 /* setup DMA transfer for command */ 711 dmasize = clen = ecb->clen; 712 sc->sc_cmdlen = clen; 713 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 714 715 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 716 &dmasize); 717 /* Program the SCSI counter */ 718 NCR_SET_COUNT(sc, dmasize); 719 720 if (sc->sc_rev != NCR_VARIANT_FAS366) 721 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 722 723 /* And get the targets attention */ 724 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 725 NCRDMA_GO(sc); 726 } else { 727 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 728 NCRCMD(sc, NCRCMD_SELNATN); 729 } 730 return; 731 } 732 733 selatn3 = selatns = 0; 734 if (ecb->tag[0] != 0) { 735 if (sc->sc_features & NCR_F_SELATN3) 736 /* use SELATN3 to send tag messages */ 737 selatn3 = 1; 738 else 739 /* We don't have SELATN3; use SELATNS to send tags */ 740 selatns = 1; 741 } 742 743 if (ti->flags & T_NEGOTIATE) { 744 /* We have to use SELATNS to send sync/wide messages */ 745 selatn3 = 0; 746 selatns = 1; 747 } 748 749 cmd = (u_char *)&ecb->cmd.cmd; 750 751 if (selatn3) { 752 /* We'll use tags with SELATN3 */ 753 clen = ecb->clen + 3; 754 cmd -= 3; 755 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 756 cmd[1] = ecb->tag[0]; /* msg[1] */ 757 cmd[2] = ecb->tag[1]; /* msg[2] */ 758 } else { 759 /* We don't have tags, or will send messages with SELATNS */ 760 clen = ecb->clen + 1; 761 cmd -= 1; 762 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 763 } 764 765 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 766 767 /* setup DMA transfer for command */ 768 dmasize = clen; 769 sc->sc_cmdlen = clen; 770 sc->sc_cmdp = cmd; 771 772 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 773 /* Program the SCSI counter */ 774 NCR_SET_COUNT(sc, dmasize); 775 776 /* load the count in */ 777 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 778 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 779 780 /* And get the targets attention */ 781 if (selatn3) { 782 sc->sc_msgout = SEND_TAG; 783 sc->sc_flags |= NCR_ATN; 784 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 785 } else 786 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 787 NCRDMA_GO(sc); 788 return; 789 } 790 791 /* 792 * Who am I. This is where we tell the target that we are 793 * happy for it to disconnect etc. 794 */ 795 796 /* Now get the command into the FIFO */ 797 ncr53c9x_wrfifo(sc, cmd, clen); 798 799 /* And get the targets attention */ 800 if (selatns) { 801 NCR_MSGS(("SELATNS \n")); 802 /* Arbitrate, select and stop after IDENTIFY message */ 803 NCRCMD(sc, NCRCMD_SELATNS); 804 } else if (selatn3) { 805 sc->sc_msgout = SEND_TAG; 806 sc->sc_flags |= NCR_ATN; 807 NCRCMD(sc, NCRCMD_SELATN3); 808 } else 809 NCRCMD(sc, NCRCMD_SELATN); 810 } 811 812 void 813 ncr53c9x_free_ecb(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 814 { 815 int s; 816 817 s = splbio(); 818 ecb->flags = 0; 819 pool_put(&ecb_pool, (void *)ecb); 820 splx(s); 821 return; 822 } 823 824 struct ncr53c9x_ecb * 825 ncr53c9x_get_ecb(struct ncr53c9x_softc *sc, int flags) 826 { 827 struct ncr53c9x_ecb *ecb; 828 int s; 829 830 s = splbio(); 831 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 832 splx(s); 833 if (ecb) { 834 memset(ecb, 0, sizeof(*ecb)); 835 ecb->flags |= ECB_ALLOC; 836 } 837 return ecb; 838 } 839 840 /* 841 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 842 */ 843 844 /* 845 * Start a SCSI-command 846 * This function is called by the higher level SCSI-driver to queue/run 847 * SCSI-commands. 848 */ 849 850 void 851 ncr53c9x_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 852 void *arg) 853 { 854 struct scsipi_xfer *xs; 855 struct scsipi_periph *periph; 856 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 857 struct ncr53c9x_ecb *ecb; 858 int s, flags; 859 860 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 861 862 s = splbio(); 863 simple_lock(&sc->sc_lock); 864 865 switch (req) { 866 case ADAPTER_REQ_RUN_XFER: 867 xs = arg; 868 periph = xs->xs_periph; 869 flags = xs->xs_control; 870 871 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 872 periph->periph_target)); 873 874 /* Get an ECB to use. */ 875 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 876 /* 877 * This should never happen as we track resources 878 * in the mid-layer, but for now it can as pool_get() 879 * can fail. 880 */ 881 if (ecb == NULL) { 882 scsipi_printaddr(periph); 883 printf("unable to allocate ecb\n"); 884 xs->error = XS_RESOURCE_SHORTAGE; 885 simple_unlock(&sc->sc_lock); 886 splx(s); 887 scsipi_done(xs); 888 return; 889 } 890 891 /* Initialize ecb */ 892 ecb->xs = xs; 893 ecb->timeout = xs->timeout; 894 895 if (flags & XS_CTL_RESET) { 896 ecb->flags |= ECB_RESET; 897 ecb->clen = 0; 898 ecb->dleft = 0; 899 } else { 900 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 901 ecb->clen = xs->cmdlen; 902 ecb->daddr = xs->data; 903 ecb->dleft = xs->datalen; 904 } 905 ecb->stat = 0; 906 907 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 908 ecb->flags |= ECB_READY; 909 if (sc->sc_state == NCR_IDLE) 910 ncr53c9x_sched(sc); 911 912 if ((flags & XS_CTL_POLL) == 0) 913 break; 914 915 /* Not allowed to use interrupts, use polling instead */ 916 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 917 ncr53c9x_timeout(ecb); 918 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 919 ncr53c9x_timeout(ecb); 920 } 921 break; 922 923 case ADAPTER_REQ_GROW_RESOURCES: 924 /* XXX Not supported. */ 925 break; 926 927 case ADAPTER_REQ_SET_XFER_MODE: 928 { 929 struct ncr53c9x_tinfo *ti; 930 struct scsipi_xfer_mode *xm = arg; 931 932 ti = &sc->sc_tinfo[xm->xm_target]; 933 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 934 ti->period = 0; 935 ti->offset = 0; 936 937 if ((sc->sc_cfflags & (1 << ((xm->xm_target & 7) + 16))) == 0 && 938 (xm->xm_mode & PERIPH_CAP_TQING)) { 939 NCR_MISC(("%s: target %d: tagged queuing\n", 940 device_xname(&sc->sc_dev), xm->xm_target)); 941 ti->flags |= T_TAG; 942 } else 943 ti->flags &= ~T_TAG; 944 945 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 946 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 947 device_xname(&sc->sc_dev), xm->xm_target)); 948 if (sc->sc_rev == NCR_VARIANT_FAS366) { 949 ti->flags |= T_WIDE; 950 ti->width = 1; 951 } 952 } 953 954 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 955 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 956 NCR_MISC(("%s: target %d: sync negotiation\n", 957 device_xname(&sc->sc_dev), xm->xm_target)); 958 ti->flags |= T_NEGOTIATE; 959 ti->period = sc->sc_minsync; 960 } 961 /* 962 * If we're not going to negotiate, send the notification 963 * now, since it won't happen later. 964 */ 965 if ((ti->flags & T_NEGOTIATE) == 0) 966 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 967 } 968 break; 969 } 970 971 simple_unlock(&sc->sc_lock); 972 splx(s); 973 } 974 975 void 976 ncr53c9x_update_xfer_mode(struct ncr53c9x_softc *sc, int target) 977 { 978 struct scsipi_xfer_mode xm; 979 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 980 981 xm.xm_target = target; 982 xm.xm_mode = 0; 983 xm.xm_period = 0; 984 xm.xm_offset = 0; 985 986 if (ti->flags & T_SYNCMODE) { 987 xm.xm_mode |= PERIPH_CAP_SYNC; 988 xm.xm_period = ti->period; 989 xm.xm_offset = ti->offset; 990 } 991 if (ti->width) 992 xm.xm_mode |= PERIPH_CAP_WIDE16; 993 994 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 995 xm.xm_mode |= PERIPH_CAP_TQING; 996 997 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 998 } 999 1000 /* 1001 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 1002 */ 1003 int 1004 ncr53c9x_poll(struct ncr53c9x_softc *sc, struct scsipi_xfer *xs, int count) 1005 { 1006 1007 NCR_TRACE(("[ncr53c9x_poll] ")); 1008 while (count) { 1009 if (NCRDMA_ISINTR(sc)) { 1010 simple_unlock(&sc->sc_lock); 1011 ncr53c9x_intr(sc); 1012 simple_lock(&sc->sc_lock); 1013 } 1014 #if alternatively 1015 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 1016 ncr53c9x_intr(sc); 1017 #endif 1018 if ((xs->xs_status & XS_STS_DONE) != 0) 1019 return 0; 1020 if (sc->sc_state == NCR_IDLE) { 1021 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 1022 ncr53c9x_sched(sc); 1023 } 1024 DELAY(1000); 1025 count--; 1026 } 1027 return 1; 1028 } 1029 1030 int 1031 ncr53c9x_ioctl(struct scsipi_channel *chan, u_long cmd, void *arg, 1032 int flag, struct proc *p) 1033 { 1034 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1035 int s, error = 0; 1036 1037 switch (cmd) { 1038 case SCBUSIORESET: 1039 s = splbio(); 1040 simple_lock(&sc->sc_lock); 1041 ncr53c9x_init(sc, 1); 1042 simple_unlock(&sc->sc_lock); 1043 splx(s); 1044 break; 1045 default: 1046 error = ENOTTY; 1047 break; 1048 } 1049 return error; 1050 } 1051 1052 1053 /* 1054 * LOW LEVEL SCSI UTILITIES 1055 */ 1056 1057 /* 1058 * Schedule a scsi operation. This has now been pulled out of the interrupt 1059 * handler so that we may call it from ncr53c9x_scsipi_request and 1060 * ncr53c9x_done. This may save us an unnecessary interrupt just to get 1061 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1062 */ 1063 void 1064 ncr53c9x_sched(struct ncr53c9x_softc *sc) 1065 { 1066 struct ncr53c9x_ecb *ecb; 1067 struct scsipi_periph *periph; 1068 struct ncr53c9x_tinfo *ti; 1069 struct ncr53c9x_linfo *li; 1070 int lun; 1071 int tag; 1072 1073 NCR_TRACE(("[ncr53c9x_sched] ")); 1074 if (sc->sc_state != NCR_IDLE) 1075 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1076 1077 /* 1078 * Find first ecb in ready queue that is for a target/lunit 1079 * combinations that is not busy. 1080 */ 1081 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1082 ecb = TAILQ_NEXT(ecb, chain)) { 1083 periph = ecb->xs->xs_periph; 1084 ti = &sc->sc_tinfo[periph->periph_target]; 1085 lun = periph->periph_lun; 1086 1087 /* Select type of tag for this command */ 1088 if ((ti->flags & (T_RSELECTOFF)) != 0) 1089 tag = 0; 1090 else if ((ti->flags & (T_TAG)) == 0) 1091 tag = 0; 1092 else if ((ecb->flags & ECB_SENSE) != 0) 1093 tag = 0; 1094 else 1095 tag = ecb->xs->xs_tag_type; 1096 #if 0 1097 /* XXXX Use tags for polled commands? */ 1098 if (ecb->xs->xs_control & XS_CTL_POLL) 1099 tag = 0; 1100 #endif 1101 1102 li = TINFO_LUN(ti, lun); 1103 if (li == NULL) { 1104 /* Initialize LUN info and add to list. */ 1105 if ((li = malloc(sizeof(*li), 1106 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) { 1107 continue; 1108 } 1109 li->lun = lun; 1110 1111 LIST_INSERT_HEAD(&ti->luns, li, link); 1112 if (lun < NCR_NLUN) 1113 ti->lun[lun] = li; 1114 } 1115 li->last_used = time_second; 1116 if (tag == 0) { 1117 /* Try to issue this as an un-tagged command */ 1118 if (li->untagged == NULL) 1119 li->untagged = ecb; 1120 } 1121 if (li->untagged != NULL) { 1122 tag = 0; 1123 if ((li->busy != 1) && li->used == 0) { 1124 /* We need to issue this untagged command now */ 1125 ecb = li->untagged; 1126 periph = ecb->xs->xs_periph; 1127 } else { 1128 /* Not ready yet */ 1129 continue; 1130 } 1131 } 1132 ecb->tag[0] = tag; 1133 if (tag != 0) { 1134 li->queued[ecb->xs->xs_tag_id] = ecb; 1135 ecb->tag[1] = ecb->xs->xs_tag_id; 1136 li->used++; 1137 } 1138 if (li->untagged != NULL && (li->busy != 1)) { 1139 li->busy = 1; 1140 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1141 ecb->flags &= ~ECB_READY; 1142 sc->sc_nexus = ecb; 1143 ncr53c9x_select(sc, ecb); 1144 break; 1145 } 1146 if (li->untagged == NULL && tag != 0) { 1147 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1148 ecb->flags &= ~ECB_READY; 1149 sc->sc_nexus = ecb; 1150 ncr53c9x_select(sc, ecb); 1151 break; 1152 } else { 1153 NCR_TRACE(("%d:%d busy\n", 1154 periph->periph_target, 1155 periph->periph_lun)); 1156 } 1157 } 1158 } 1159 1160 void 1161 ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1162 { 1163 struct scsipi_xfer *xs = ecb->xs; 1164 struct scsipi_periph *periph = xs->xs_periph; 1165 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1166 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd; 1167 struct ncr53c9x_linfo *li; 1168 int lun = periph->periph_lun; 1169 1170 NCR_TRACE(("requesting sense ")); 1171 /* Next, setup a request sense command block */ 1172 memset(ss, 0, sizeof(*ss)); 1173 ss->opcode = SCSI_REQUEST_SENSE; 1174 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1175 ss->length = sizeof(struct scsi_sense_data); 1176 ecb->clen = sizeof(*ss); 1177 ecb->daddr = (char *)&xs->sense.scsi_sense; 1178 ecb->dleft = sizeof(struct scsi_sense_data); 1179 ecb->flags |= ECB_SENSE; 1180 ecb->timeout = NCR_SENSE_TIMEOUT; 1181 ti->senses++; 1182 li = TINFO_LUN(ti, lun); 1183 if (li->busy) 1184 li->busy = 0; 1185 ncr53c9x_dequeue(sc, ecb); 1186 li->untagged = ecb; /* must be executed first to fix C/A */ 1187 li->busy = 2; 1188 if (ecb == sc->sc_nexus) { 1189 ncr53c9x_select(sc, ecb); 1190 } else { 1191 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1192 ecb->flags |= ECB_READY; 1193 if (sc->sc_state == NCR_IDLE) 1194 ncr53c9x_sched(sc); 1195 } 1196 } 1197 1198 /* 1199 * POST PROCESSING OF SCSI_CMD (usually current) 1200 */ 1201 void 1202 ncr53c9x_done(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1203 { 1204 struct scsipi_xfer *xs = ecb->xs; 1205 struct scsipi_periph *periph = xs->xs_periph; 1206 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1207 int lun = periph->periph_lun; 1208 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1209 1210 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1211 1212 if ((xs->xs_control & XS_CTL_POLL) == 0) 1213 callout_stop(&xs->xs_callout); 1214 1215 /* 1216 * Now, if we've come here with no error code, i.e. we've kept the 1217 * initial XS_NOERROR, and the status code signals that we should 1218 * check sense, we'll need to set up a request sense cmd block and 1219 * push the command back into the ready queue *before* any other 1220 * commands for this target/lunit, else we lose the sense info. 1221 * We don't support chk sense conditions for the request sense cmd. 1222 */ 1223 if (xs->error == XS_NOERROR) { 1224 xs->status = ecb->stat; 1225 if ((ecb->flags & ECB_ABORT) != 0) { 1226 xs->error = XS_TIMEOUT; 1227 } else if ((ecb->flags & ECB_SENSE) != 0) { 1228 xs->error = XS_SENSE; 1229 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1230 /* First, save the return values */ 1231 xs->resid = ecb->dleft; 1232 ncr53c9x_sense(sc, ecb); 1233 return; 1234 } else { 1235 xs->resid = ecb->dleft; 1236 } 1237 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1238 xs->error = XS_BUSY; 1239 } 1240 1241 #ifdef NCR53C9X_DEBUG 1242 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1243 if (xs->resid != 0) 1244 printf("resid=%d ", xs->resid); 1245 if (xs->error == XS_SENSE) 1246 printf("sense=0x%02x\n", 1247 xs->sense.scsi_sense.response_code); 1248 else 1249 printf("error=%d\n", xs->error); 1250 } 1251 #endif 1252 1253 /* 1254 * Remove the ECB from whatever queue it's on. 1255 */ 1256 ncr53c9x_dequeue(sc, ecb); 1257 if (ecb == sc->sc_nexus) { 1258 sc->sc_nexus = NULL; 1259 if (sc->sc_state != NCR_CLEANING) { 1260 sc->sc_state = NCR_IDLE; 1261 ncr53c9x_sched(sc); 1262 } 1263 } 1264 1265 if (xs->error == XS_SELTIMEOUT) { 1266 /* Selection timeout -- discard this LUN if empty */ 1267 if (li->untagged == NULL && li->used == 0) { 1268 if (lun < NCR_NLUN) 1269 ti->lun[lun] = NULL; 1270 LIST_REMOVE(li, link); 1271 free(li, M_DEVBUF); 1272 } 1273 } 1274 1275 ncr53c9x_free_ecb(sc, ecb); 1276 ti->cmds++; 1277 simple_unlock(&sc->sc_lock); 1278 scsipi_done(xs); 1279 simple_lock(&sc->sc_lock); 1280 } 1281 1282 void 1283 ncr53c9x_dequeue(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1284 { 1285 struct ncr53c9x_tinfo *ti = 1286 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1287 struct ncr53c9x_linfo *li; 1288 int64_t lun = ecb->xs->xs_periph->periph_lun; 1289 1290 li = TINFO_LUN(ti, lun); 1291 #ifdef DIAGNOSTIC 1292 if (li == NULL || li->lun != lun) 1293 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist", 1294 (long long)lun, ecb); 1295 #endif 1296 if (li->untagged == ecb) { 1297 li->busy = 0; 1298 li->untagged = NULL; 1299 } 1300 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1301 #ifdef DIAGNOSTIC 1302 if (li->queued[ecb->tag[1]] != NULL && 1303 (li->queued[ecb->tag[1]] != ecb)) 1304 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1305 "instead of ecb %p\n", ecb->tag[1], 1306 (long long)lun, 1307 li->queued[ecb->tag[1]], ecb); 1308 #endif 1309 li->queued[ecb->tag[1]] = NULL; 1310 li->used--; 1311 } 1312 1313 if ((ecb->flags & ECB_READY) != 0) { 1314 ecb->flags &= ~ECB_READY; 1315 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1316 } 1317 } 1318 1319 /* 1320 * INTERRUPT/PROTOCOL ENGINE 1321 */ 1322 1323 /* 1324 * Schedule an outgoing message by prioritizing it, and asserting 1325 * attention on the bus. We can only do this when we are the initiator 1326 * else there will be an illegal command interrupt. 1327 */ 1328 #define ncr53c9x_sched_msgout(m) \ 1329 do { \ 1330 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1331 NCRCMD(sc, NCRCMD_SETATN); \ 1332 sc->sc_flags |= NCR_ATN; \ 1333 sc->sc_msgpriq |= (m); \ 1334 } while (/* CONSTCOND */0) 1335 1336 static void 1337 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1338 { 1339 NCR_TRACE(("[flushfifo] ")); 1340 1341 NCRCMD(sc, NCRCMD_FLUSH); 1342 1343 if (sc->sc_phase == COMMAND_PHASE || 1344 sc->sc_phase == MESSAGE_OUT_PHASE) 1345 DELAY(2); 1346 } 1347 1348 static int 1349 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1350 { 1351 int i, n; 1352 u_char *ibuf; 1353 1354 switch(how) { 1355 case NCR_RDFIFO_START: 1356 ibuf = sc->sc_imess; 1357 sc->sc_imlen = 0; 1358 break; 1359 case NCR_RDFIFO_CONTINUE: 1360 ibuf = sc->sc_imess + sc->sc_imlen; 1361 break; 1362 default: 1363 panic("ncr53c9x_rdfifo: bad flag"); 1364 break; 1365 } 1366 1367 /* 1368 * XXX buffer (sc_imess) size for message 1369 */ 1370 1371 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1372 1373 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1374 n *= 2; 1375 1376 for (i = 0; i < n; i++) 1377 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1378 1379 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1380 1381 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1382 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1383 1384 NCR_READ_REG(sc, NCR_FIFO); 1385 1386 ncr53c9x_flushfifo(sc); 1387 } 1388 } else { 1389 for (i = 0; i < n; i++) 1390 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1391 } 1392 1393 sc->sc_imlen += i; 1394 1395 #if 0 1396 #ifdef NCR53C9X_DEBUG 1397 { 1398 int j; 1399 1400 NCR_TRACE(("\n[rdfifo %s (%d):", 1401 (how == NCR_RDFIFO_START) ? "start" : "cont", 1402 (int)sc->sc_imlen)); 1403 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1404 for (j = 0; j < sc->sc_imlen; j++) 1405 printf(" %02x", sc->sc_imess[j]); 1406 printf("]\n"); 1407 } 1408 } 1409 #endif 1410 #endif 1411 return sc->sc_imlen; 1412 } 1413 1414 static void 1415 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1416 { 1417 int i; 1418 1419 #ifdef NCR53C9X_DEBUG 1420 NCR_MSGS(("[wrfifo(%d):", len)); 1421 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1422 for (i = 0; i < len; i++) 1423 printf(" %02x", p[i]); 1424 printf("]\n"); 1425 } 1426 #endif 1427 1428 for (i = 0; i < len; i++) { 1429 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1430 1431 if (sc->sc_rev == NCR_VARIANT_FAS366) 1432 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1433 } 1434 } 1435 1436 int 1437 ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype, 1438 int tagid) 1439 { 1440 u_char selid, target, lun; 1441 struct ncr53c9x_ecb *ecb = NULL; 1442 struct ncr53c9x_tinfo *ti; 1443 struct ncr53c9x_linfo *li; 1444 1445 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1446 target = sc->sc_selid; 1447 } else { 1448 /* 1449 * The SCSI chip made a snapshot of the data bus 1450 * while the reselection was being negotiated. 1451 * This enables us to determine which target did 1452 * the reselect. 1453 */ 1454 selid = sc->sc_selid & ~(1 << sc->sc_id); 1455 if (selid & (selid - 1)) { 1456 printf("%s: reselect with invalid selid %02x;" 1457 " sending DEVICE RESET\n", 1458 device_xname(&sc->sc_dev), selid); 1459 goto reset; 1460 } 1461 1462 target = ffs(selid) - 1; 1463 } 1464 lun = message & 0x07; 1465 1466 /* 1467 * Search wait queue for disconnected cmd 1468 * The list should be short, so I haven't bothered with 1469 * any more sophisticated structures than a simple 1470 * singly linked list. 1471 */ 1472 ti = &sc->sc_tinfo[target]; 1473 li = TINFO_LUN(ti, lun); 1474 1475 /* 1476 * We can get as far as the LUN with the IDENTIFY 1477 * message. Check to see if we're running an 1478 * un-tagged command. Otherwise ack the IDENTIFY 1479 * and wait for a tag message. 1480 */ 1481 if (li != NULL) { 1482 if (li->untagged != NULL && li->busy) 1483 ecb = li->untagged; 1484 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1485 /* Wait for tag to come by */ 1486 sc->sc_state = NCR_IDENTIFIED; 1487 return 0; 1488 } else if (tagtype) 1489 ecb = li->queued[tagid]; 1490 } 1491 if (ecb == NULL) { 1492 printf("%s: reselect from target %d lun %d tag %x:%x " 1493 "with no nexus; sending ABORT\n", 1494 device_xname(&sc->sc_dev), target, lun, tagtype, tagid); 1495 goto abort; 1496 } 1497 1498 /* Make this nexus active again. */ 1499 sc->sc_state = NCR_CONNECTED; 1500 sc->sc_nexus = ecb; 1501 ncr53c9x_setsync(sc, ti); 1502 1503 if (ecb->flags & ECB_RESET) 1504 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1505 else if (ecb->flags & ECB_ABORT) 1506 ncr53c9x_sched_msgout(SEND_ABORT); 1507 1508 /* Do an implicit RESTORE POINTERS. */ 1509 sc->sc_dp = ecb->daddr; 1510 sc->sc_dleft = ecb->dleft; 1511 1512 return 0; 1513 1514 reset: 1515 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1516 return 1; 1517 1518 abort: 1519 ncr53c9x_sched_msgout(SEND_ABORT); 1520 return 1; 1521 } 1522 1523 static inline int 1524 __verify_msg_format(u_char *p, int len) 1525 { 1526 1527 if (len == 1 && MSG_IS1BYTE(p[0])) 1528 return 1; 1529 if (len == 2 && MSG_IS2BYTE(p[0])) 1530 return 1; 1531 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1532 len == p[1] + 2) 1533 return 1; 1534 1535 return 0; 1536 } 1537 1538 /* 1539 * Get an incoming message as initiator. 1540 * 1541 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1542 * byte in the FIFO 1543 */ 1544 void 1545 ncr53c9x_msgin(struct ncr53c9x_softc *sc) 1546 { 1547 1548 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1549 1550 if (sc->sc_imlen == 0) { 1551 printf("%s: msgin: no msg byte available\n", 1552 device_xname(&sc->sc_dev)); 1553 return; 1554 } 1555 1556 /* 1557 * Prepare for a new message. A message should (according 1558 * to the SCSI standard) be transmitted in one single 1559 * MESSAGE_IN_PHASE. If we have been in some other phase, 1560 * then this is a new message. 1561 */ 1562 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1563 sc->sc_state != NCR_RESELECTED) { 1564 printf("%s: phase change, dropping message, " 1565 "prev %d, state %d\n", 1566 device_xname(&sc->sc_dev), sc->sc_prevphase, sc->sc_state); 1567 sc->sc_flags &= ~NCR_DROP_MSGI; 1568 sc->sc_imlen = 0; 1569 } 1570 1571 /* 1572 * If we're going to reject the message, don't bother storing 1573 * the incoming bytes. But still, we need to ACK them. 1574 */ 1575 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1576 NCRCMD(sc, NCRCMD_MSGOK); 1577 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1578 return; 1579 } 1580 1581 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1582 ncr53c9x_sched_msgout(SEND_REJECT); 1583 sc->sc_flags |= NCR_DROP_MSGI; 1584 } else { 1585 u_char *pb; 1586 int plen; 1587 1588 switch (sc->sc_state) { 1589 /* 1590 * if received message is the first of reselection 1591 * then first byte is selid, and then message 1592 */ 1593 case NCR_RESELECTED: 1594 pb = sc->sc_imess + 1; 1595 plen = sc->sc_imlen - 1; 1596 break; 1597 default: 1598 pb = sc->sc_imess; 1599 plen = sc->sc_imlen; 1600 break; 1601 } 1602 1603 if (__verify_msg_format(pb, plen)) 1604 goto gotit; 1605 } 1606 1607 /* Ack what we have so far */ 1608 NCRCMD(sc, NCRCMD_MSGOK); 1609 return; 1610 1611 gotit: 1612 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1613 /* we got complete message, flush the imess, */ 1614 /* XXX nobody uses imlen below */ 1615 sc->sc_imlen = 0; 1616 /* 1617 * Now we should have a complete message (1 byte, 2 byte 1618 * and moderately long extended messages). We only handle 1619 * extended messages which total length is shorter than 1620 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1621 */ 1622 switch (sc->sc_state) { 1623 struct ncr53c9x_ecb *ecb; 1624 struct ncr53c9x_tinfo *ti; 1625 struct ncr53c9x_linfo *li; 1626 int lun; 1627 1628 case NCR_CONNECTED: 1629 ecb = sc->sc_nexus; 1630 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1631 1632 switch (sc->sc_imess[0]) { 1633 case MSG_CMDCOMPLETE: 1634 NCR_MSGS(("cmdcomplete ")); 1635 if (sc->sc_dleft < 0) { 1636 scsipi_printaddr(ecb->xs->xs_periph); 1637 printf("got %ld extra bytes\n", 1638 -(long)sc->sc_dleft); 1639 sc->sc_dleft = 0; 1640 } 1641 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1642 0 : sc->sc_dleft; 1643 if ((ecb->flags & ECB_SENSE) == 0) 1644 ecb->xs->resid = ecb->dleft; 1645 sc->sc_state = NCR_CMDCOMPLETE; 1646 break; 1647 1648 case MSG_MESSAGE_REJECT: 1649 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1650 switch (sc->sc_msgout) { 1651 case SEND_TAG: 1652 /* 1653 * Target does not like tagged queuing. 1654 * - Flush the command queue 1655 * - Disable tagged queuing for the target 1656 * - Dequeue ecb from the queued array. 1657 */ 1658 printf("%s: tagged queuing rejected: " 1659 "target %d\n", 1660 device_xname(&sc->sc_dev), 1661 ecb->xs->xs_periph->periph_target); 1662 1663 NCR_MSGS(("(rejected sent tag)")); 1664 NCRCMD(sc, NCRCMD_FLUSH); 1665 DELAY(1); 1666 ti->flags &= ~T_TAG; 1667 lun = ecb->xs->xs_periph->periph_lun; 1668 li = TINFO_LUN(ti, lun); 1669 if (ecb->tag[0] && 1670 li->queued[ecb->tag[1]] != NULL) { 1671 li->queued[ecb->tag[1]] = NULL; 1672 li->used--; 1673 } 1674 ecb->tag[0] = ecb->tag[1] = 0; 1675 li->untagged = ecb; 1676 li->busy = 1; 1677 break; 1678 1679 case SEND_SDTR: 1680 printf("%s: sync transfer rejected: " 1681 "target %d\n", 1682 device_xname(&sc->sc_dev), 1683 ecb->xs->xs_periph->periph_target); 1684 1685 sc->sc_flags &= ~NCR_SYNCHNEGO; 1686 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1687 ncr53c9x_setsync(sc, ti); 1688 ncr53c9x_update_xfer_mode(sc, 1689 ecb->xs->xs_periph->periph_target); 1690 break; 1691 1692 case SEND_WDTR: 1693 printf("%s: wide transfer rejected: " 1694 "target %d\n", 1695 device_xname(&sc->sc_dev), 1696 ecb->xs->xs_periph->periph_target); 1697 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1698 ti->width = 0; 1699 break; 1700 1701 case SEND_INIT_DET_ERR: 1702 goto abort; 1703 } 1704 break; 1705 1706 case MSG_NOOP: 1707 NCR_MSGS(("noop ")); 1708 break; 1709 1710 case MSG_HEAD_OF_Q_TAG: 1711 case MSG_SIMPLE_Q_TAG: 1712 case MSG_ORDERED_Q_TAG: 1713 NCR_MSGS(("TAG %x:%x", 1714 sc->sc_imess[0], sc->sc_imess[1])); 1715 break; 1716 1717 case MSG_DISCONNECT: 1718 NCR_MSGS(("disconnect ")); 1719 ti->dconns++; 1720 sc->sc_state = NCR_DISCONNECT; 1721 1722 /* 1723 * Mark the fact that all bytes have moved. The 1724 * target may not bother to do a SAVE POINTERS 1725 * at this stage. This flag will set the residual 1726 * count to zero on MSG COMPLETE. 1727 */ 1728 if (sc->sc_dleft == 0) 1729 ecb->flags |= ECB_TENTATIVE_DONE; 1730 1731 break; 1732 1733 case MSG_SAVEDATAPOINTER: 1734 NCR_MSGS(("save datapointer ")); 1735 ecb->daddr = sc->sc_dp; 1736 ecb->dleft = sc->sc_dleft; 1737 break; 1738 1739 case MSG_RESTOREPOINTERS: 1740 NCR_MSGS(("restore datapointer ")); 1741 sc->sc_dp = ecb->daddr; 1742 sc->sc_dleft = ecb->dleft; 1743 break; 1744 1745 case MSG_EXTENDED: 1746 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1747 switch (sc->sc_imess[2]) { 1748 case MSG_EXT_SDTR: 1749 NCR_MSGS(("SDTR period %d, offset %d ", 1750 sc->sc_imess[3], sc->sc_imess[4])); 1751 if (sc->sc_imess[1] != 3) 1752 goto reject; 1753 ti->period = sc->sc_imess[3]; 1754 ti->offset = sc->sc_imess[4]; 1755 ti->flags &= ~T_NEGOTIATE; 1756 if (sc->sc_minsync == 0 || 1757 ti->offset == 0 || 1758 ti->period > 124) { 1759 #if 0 1760 #ifdef NCR53C9X_DEBUG 1761 scsipi_printaddr(ecb->xs->xs_periph); 1762 printf("async mode\n"); 1763 #endif 1764 #endif 1765 ti->flags &= ~T_SYNCMODE; 1766 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1767 /* 1768 * target initiated negotiation 1769 */ 1770 ti->offset = 0; 1771 ncr53c9x_sched_msgout( 1772 SEND_SDTR); 1773 } 1774 } else { 1775 int p; 1776 1777 p = ncr53c9x_stp2cpb(sc, ti->period); 1778 ti->period = ncr53c9x_cpb2stp(sc, p); 1779 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1780 /* 1781 * target initiated negotiation 1782 */ 1783 if (ti->period < 1784 sc->sc_minsync) 1785 ti->period = 1786 sc->sc_minsync; 1787 if (ti->offset > 15) 1788 ti->offset = 15; 1789 ti->flags &= ~T_SYNCMODE; 1790 ncr53c9x_sched_msgout( 1791 SEND_SDTR); 1792 } else { 1793 /* we are sync */ 1794 ti->flags |= T_SYNCMODE; 1795 } 1796 } 1797 ncr53c9x_update_xfer_mode(sc, 1798 ecb->xs->xs_periph->periph_target); 1799 sc->sc_flags &= ~NCR_SYNCHNEGO; 1800 ncr53c9x_setsync(sc, ti); 1801 break; 1802 1803 case MSG_EXT_WDTR: 1804 #ifdef NCR53C9X_DEBUG 1805 printf("%s: wide mode %d\n", 1806 device_xname(&sc->sc_dev), sc->sc_imess[3]); 1807 #endif 1808 if (sc->sc_imess[3] == 1) { 1809 ti->cfg3 |= NCRFASCFG3_EWIDE; 1810 ncr53c9x_setsync(sc, ti); 1811 } else 1812 ti->width = 0; 1813 /* 1814 * Device started width negotiation. 1815 */ 1816 if (!(ti->flags & T_WDTRSENT)) 1817 ncr53c9x_sched_msgout(SEND_WDTR); 1818 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1819 break; 1820 default: 1821 scsipi_printaddr(ecb->xs->xs_periph); 1822 printf("unrecognized MESSAGE EXTENDED;" 1823 " sending REJECT\n"); 1824 goto reject; 1825 } 1826 break; 1827 1828 default: 1829 NCR_MSGS(("ident ")); 1830 scsipi_printaddr(ecb->xs->xs_periph); 1831 printf("unrecognized MESSAGE; sending REJECT\n"); 1832 reject: 1833 ncr53c9x_sched_msgout(SEND_REJECT); 1834 break; 1835 } 1836 break; 1837 1838 case NCR_IDENTIFIED: 1839 /* 1840 * IDENTIFY message was received and queue tag is expected now 1841 */ 1842 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1843 (sc->sc_msgify == 0)) { 1844 printf("%s: TAG reselect without IDENTIFY;" 1845 " MSG %x;" 1846 " sending DEVICE RESET\n", 1847 device_xname(&sc->sc_dev), 1848 sc->sc_imess[0]); 1849 goto reset; 1850 } 1851 (void)ncr53c9x_reselect(sc, sc->sc_msgify, 1852 sc->sc_imess[0], sc->sc_imess[1]); 1853 break; 1854 1855 case NCR_RESELECTED: 1856 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1857 sc->sc_msgify = sc->sc_imess[1]; 1858 } else { 1859 printf("%s: reselect without IDENTIFY;" 1860 " MSG %x;" 1861 " sending DEVICE RESET\n", 1862 device_xname(&sc->sc_dev), 1863 sc->sc_imess[1]); 1864 goto reset; 1865 } 1866 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1867 break; 1868 1869 default: 1870 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1871 device_xname(&sc->sc_dev)); 1872 reset: 1873 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1874 break; 1875 1876 abort: 1877 ncr53c9x_sched_msgout(SEND_ABORT); 1878 break; 1879 } 1880 1881 /* if we have more messages to send set ATN */ 1882 if (sc->sc_msgpriq) 1883 NCRCMD(sc, NCRCMD_SETATN); 1884 1885 /* Ack last message byte */ 1886 NCRCMD(sc, NCRCMD_MSGOK); 1887 1888 /* Done, reset message pointer. */ 1889 sc->sc_flags &= ~NCR_DROP_MSGI; 1890 sc->sc_imlen = 0; 1891 } 1892 1893 1894 /* 1895 * Send the highest priority, scheduled message 1896 */ 1897 void 1898 ncr53c9x_msgout(struct ncr53c9x_softc *sc) 1899 { 1900 struct ncr53c9x_tinfo *ti; 1901 struct ncr53c9x_ecb *ecb; 1902 size_t size; 1903 1904 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1905 sc->sc_msgpriq, sc->sc_prevphase)); 1906 1907 /* 1908 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1909 * condition on the SCSI bus. The 53c9x chip 1910 * automatically turns off ATN before sending the 1911 * message byte. (see also the comment below in the 1912 * default case when picking out a message to send) 1913 */ 1914 if (sc->sc_flags & NCR_ATN) { 1915 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1916 new: 1917 NCRCMD(sc, NCRCMD_FLUSH); 1918 #if 0 1919 DELAY(1); 1920 #endif 1921 sc->sc_msgoutq = 0; 1922 sc->sc_omlen = 0; 1923 } 1924 } else { 1925 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1926 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1927 goto new; 1928 } else { 1929 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1930 device_xname(&sc->sc_dev), __LINE__); 1931 } 1932 } 1933 1934 if (sc->sc_omlen == 0) { 1935 /* Pick up highest priority message */ 1936 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1937 sc->sc_msgoutq |= sc->sc_msgout; 1938 sc->sc_msgpriq &= ~sc->sc_msgout; 1939 sc->sc_omlen = 1; /* "Default" message len */ 1940 switch (sc->sc_msgout) { 1941 case SEND_SDTR: 1942 ecb = sc->sc_nexus; 1943 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1944 sc->sc_omess[0] = MSG_EXTENDED; 1945 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1946 sc->sc_omess[2] = MSG_EXT_SDTR; 1947 sc->sc_omess[3] = ti->period; 1948 sc->sc_omess[4] = ti->offset; 1949 sc->sc_omlen = 5; 1950 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1951 ti->flags |= T_SYNCMODE; 1952 ncr53c9x_setsync(sc, ti); 1953 } 1954 break; 1955 case SEND_WDTR: 1956 ecb = sc->sc_nexus; 1957 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1958 sc->sc_omess[0] = MSG_EXTENDED; 1959 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1960 sc->sc_omess[2] = MSG_EXT_WDTR; 1961 sc->sc_omess[3] = ti->width; 1962 sc->sc_omlen = 4; 1963 break; 1964 case SEND_IDENTIFY: 1965 if (sc->sc_state != NCR_CONNECTED) { 1966 printf("%s at line %d: no nexus\n", 1967 device_xname(&sc->sc_dev), __LINE__); 1968 } 1969 ecb = sc->sc_nexus; 1970 sc->sc_omess[0] = 1971 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1972 break; 1973 case SEND_TAG: 1974 if (sc->sc_state != NCR_CONNECTED) { 1975 printf("%s at line %d: no nexus\n", 1976 device_xname(&sc->sc_dev), __LINE__); 1977 } 1978 ecb = sc->sc_nexus; 1979 sc->sc_omess[0] = ecb->tag[0]; 1980 sc->sc_omess[1] = ecb->tag[1]; 1981 sc->sc_omlen = 2; 1982 break; 1983 case SEND_DEV_RESET: 1984 sc->sc_flags |= NCR_ABORTING; 1985 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1986 ecb = sc->sc_nexus; 1987 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1988 ti->flags &= ~T_SYNCMODE; 1989 ncr53c9x_update_xfer_mode(sc, 1990 ecb->xs->xs_periph->periph_target); 1991 if ((ti->flags & T_SYNCHOFF) == 0) 1992 /* We can re-start sync negotiation */ 1993 ti->flags |= T_NEGOTIATE; 1994 break; 1995 case SEND_PARITY_ERROR: 1996 sc->sc_omess[0] = MSG_PARITY_ERROR; 1997 break; 1998 case SEND_ABORT: 1999 sc->sc_flags |= NCR_ABORTING; 2000 sc->sc_omess[0] = MSG_ABORT; 2001 break; 2002 case SEND_INIT_DET_ERR: 2003 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 2004 break; 2005 case SEND_REJECT: 2006 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 2007 break; 2008 default: 2009 /* 2010 * We normally do not get here, since the chip 2011 * automatically turns off ATN before the last 2012 * byte of a message is sent to the target. 2013 * However, if the target rejects our (multi-byte) 2014 * message early by switching to MSG IN phase 2015 * ATN remains on, so the target may return to 2016 * MSG OUT phase. If there are no scheduled messages 2017 * left we send a NO-OP. 2018 * 2019 * XXX - Note that this leaves no useful purpose for 2020 * the NCR_ATN flag. 2021 */ 2022 sc->sc_flags &= ~NCR_ATN; 2023 sc->sc_omess[0] = MSG_NOOP; 2024 break; 2025 } 2026 sc->sc_omp = sc->sc_omess; 2027 } 2028 2029 #ifdef DEBUG 2030 if (ncr53c9x_debug & NCR_SHOWMSGS) { 2031 int i; 2032 2033 NCR_MSGS(("<msgout:")); 2034 for (i = 0; i < sc->sc_omlen; i++) 2035 NCR_MSGS((" %02x", sc->sc_omess[i])); 2036 NCR_MSGS(("> ")); 2037 } 2038 #endif 2039 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2040 /* 2041 * XXX fifo size 2042 */ 2043 ncr53c9x_flushfifo(sc); 2044 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2045 NCRCMD(sc, NCRCMD_TRANS); 2046 } else { 2047 /* (re)send the message */ 2048 size = min(sc->sc_omlen, sc->sc_maxxfer); 2049 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2050 /* Program the SCSI counter */ 2051 NCR_SET_COUNT(sc, size); 2052 2053 /* Load the count in and start the message-out transfer */ 2054 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2055 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2056 NCRDMA_GO(sc); 2057 } 2058 } 2059 2060 /* 2061 * This is the most critical part of the driver, and has to know 2062 * how to deal with *all* error conditions and phases from the SCSI 2063 * bus. If there are no errors and the DMA was active, then call the 2064 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2065 * and we can return from here without further processing. 2066 * 2067 * Most of this needs verifying. 2068 */ 2069 int 2070 ncr53c9x_intr(void *arg) 2071 { 2072 struct ncr53c9x_softc *sc = arg; 2073 struct ncr53c9x_ecb *ecb; 2074 struct scsipi_periph *periph; 2075 struct ncr53c9x_tinfo *ti; 2076 size_t size; 2077 int nfifo; 2078 2079 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2080 2081 if (!NCRDMA_ISINTR(sc)) 2082 return 0; 2083 2084 simple_lock(&sc->sc_lock); 2085 again: 2086 /* and what do the registers say... */ 2087 ncr53c9x_readregs(sc); 2088 2089 sc->sc_intrcnt.ev_count++; 2090 2091 /* 2092 * At the moment, only a SCSI Bus Reset or Illegal 2093 * Command are classed as errors. A disconnect is a 2094 * valid condition, and we let the code check is the 2095 * "NCR_BUSFREE_OK" flag was set before declaring it 2096 * and error. 2097 * 2098 * Also, the status register tells us about "Gross 2099 * Errors" and "Parity errors". Only the Gross Error 2100 * is really bad, and the parity errors are dealt 2101 * with later 2102 * 2103 * TODO 2104 * If there are too many parity error, go to slow 2105 * cable mode ? 2106 */ 2107 2108 /* SCSI Reset */ 2109 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2110 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2111 NCRCMD(sc, NCRCMD_FLUSH); 2112 DELAY(1); 2113 } 2114 if (sc->sc_state != NCR_SBR) { 2115 printf("%s: SCSI bus reset\n", device_xname(&sc->sc_dev)); 2116 ncr53c9x_init(sc, 0); /* Restart everything */ 2117 goto out; 2118 } 2119 #if 0 2120 /*XXX*/ printf("<expected bus reset: " 2121 "[intr %x, stat %x, step %d]>\n", 2122 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2123 #endif 2124 if (sc->sc_nexus != NULL) 2125 panic("%s: nexus in reset state", 2126 device_xname(&sc->sc_dev)); 2127 goto sched; 2128 } 2129 2130 ecb = sc->sc_nexus; 2131 2132 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2133 if (sc->sc_espintr & NCRINTR_ERR || 2134 sc->sc_espstat & NCRSTAT_GE) { 2135 2136 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2137 /* Gross Error; no target ? */ 2138 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2139 NCRCMD(sc, NCRCMD_FLUSH); 2140 DELAY(1); 2141 } 2142 if (sc->sc_state == NCR_CONNECTED || 2143 sc->sc_state == NCR_SELECTING) { 2144 ecb->xs->error = XS_TIMEOUT; 2145 ncr53c9x_done(sc, ecb); 2146 } 2147 goto out; 2148 } 2149 2150 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2151 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2152 /* 2153 * Eat away "Illegal command" interrupt 2154 * on a ESP100 caused by a re-selection 2155 * while we were trying to select 2156 * another target. 2157 */ 2158 #ifdef DEBUG 2159 printf("%s: ESP100 work-around activated\n", 2160 device_xname(&sc->sc_dev)); 2161 #endif 2162 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2163 goto out; 2164 } 2165 /* illegal command, out of sync ? */ 2166 aprint_error_dev(&sc->sc_dev, "illegal command: 0x%x " 2167 "(state %d, phase %x, prevphase %x)\n", 2168 sc->sc_lastcmd, 2169 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2170 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2171 NCRCMD(sc, NCRCMD_FLUSH); 2172 DELAY(1); 2173 } 2174 ncr53c9x_init(sc, 1); /* Restart everything */ 2175 goto out; 2176 } 2177 } 2178 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2179 2180 /* 2181 * Call if DMA is active. 2182 * 2183 * If DMA_INTR returns true, then maybe go 'round the loop 2184 * again in case there is no more DMA queued, but a phase 2185 * change is expected. 2186 */ 2187 if (NCRDMA_ISACTIVE(sc)) { 2188 int r = NCRDMA_INTR(sc); 2189 if (r == -1) { 2190 printf("%s: DMA error; resetting\n", 2191 device_xname(&sc->sc_dev)); 2192 ncr53c9x_init(sc, 1); 2193 goto out; 2194 } 2195 /* If DMA active here, then go back to work... */ 2196 if (NCRDMA_ISACTIVE(sc)) 2197 goto out; 2198 2199 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2200 /* 2201 * DMA not completed. If we can not find a 2202 * acceptable explanation, print a diagnostic. 2203 */ 2204 if (sc->sc_state == NCR_SELECTING) 2205 /* 2206 * This can happen if we are reselected 2207 * while using DMA to select a target. 2208 */ 2209 /*void*/; 2210 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2211 /* 2212 * Our (multi-byte) message (eg SDTR) was 2213 * interrupted by the target to send 2214 * a MSG REJECT. 2215 * Print diagnostic if current phase 2216 * is not MESSAGE IN. 2217 */ 2218 if (sc->sc_phase != MESSAGE_IN_PHASE) 2219 printf("%s: !TC on MSG OUT" 2220 " [intr %x, stat %x, step %d]" 2221 " prevphase %x, resid %lx\n", 2222 device_xname(&sc->sc_dev), 2223 sc->sc_espintr, 2224 sc->sc_espstat, 2225 sc->sc_espstep, 2226 sc->sc_prevphase, 2227 (u_long)sc->sc_omlen); 2228 } else if (sc->sc_dleft == 0) { 2229 /* 2230 * The DMA operation was started for 2231 * a DATA transfer. Print a diagnostic 2232 * if the DMA counter and TC bit 2233 * appear to be out of sync. 2234 */ 2235 printf("%s: !TC on DATA XFER" 2236 " [intr %x, stat %x, step %d]" 2237 " prevphase %x, resid %x\n", 2238 device_xname(&sc->sc_dev), 2239 sc->sc_espintr, 2240 sc->sc_espstat, 2241 sc->sc_espstep, 2242 sc->sc_prevphase, 2243 ecb ? ecb->dleft : -1); 2244 } 2245 } 2246 } 2247 2248 /* 2249 * Check for less serious errors. 2250 */ 2251 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2252 aprint_error_dev(&sc->sc_dev, "SCSI bus parity error\n"); 2253 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2254 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2255 else 2256 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2257 } 2258 2259 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2260 sc->sc_msgify = 0; 2261 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2262 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2263 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2264 NCRCMD(sc, NCRCMD_FLUSH); 2265 #if 0 2266 DELAY(1); 2267 #endif 2268 } 2269 /* 2270 * This command must (apparently) be issued within 2271 * 250mS of a disconnect. So here you are... 2272 */ 2273 NCRCMD(sc, NCRCMD_ENSEL); 2274 2275 switch (sc->sc_state) { 2276 case NCR_RESELECTED: 2277 goto sched; 2278 2279 case NCR_SELECTING: 2280 { 2281 struct ncr53c9x_linfo *li; 2282 2283 ecb->xs->error = XS_SELTIMEOUT; 2284 2285 /* Selection timeout -- discard all LUNs if empty */ 2286 periph = ecb->xs->xs_periph; 2287 ti = &sc->sc_tinfo[periph->periph_target]; 2288 li = LIST_FIRST(&ti->luns); 2289 while (li != NULL) { 2290 if (li->untagged == NULL && li->used == 0) { 2291 if (li->lun < NCR_NLUN) 2292 ti->lun[li->lun] = NULL; 2293 LIST_REMOVE(li, link); 2294 free(li, M_DEVBUF); 2295 /* 2296 * Restart the search at the beginning 2297 */ 2298 li = LIST_FIRST(&ti->luns); 2299 continue; 2300 } 2301 li = LIST_NEXT(li, link); 2302 } 2303 goto finish; 2304 } 2305 case NCR_CONNECTED: 2306 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2307 #ifdef NCR53C9X_DEBUG 2308 if (ecb != NULL) 2309 scsipi_printaddr(ecb->xs->xs_periph); 2310 printf("sync nego not completed!\n"); 2311 #endif 2312 ti = &sc->sc_tinfo[ 2313 ecb->xs->xs_periph->periph_target]; 2314 sc->sc_flags &= ~NCR_SYNCHNEGO; 2315 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2316 } 2317 2318 /* it may be OK to disconnect */ 2319 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2320 /* 2321 * Section 5.1.1 of the SCSI 2 spec 2322 * suggests issuing a REQUEST SENSE 2323 * following an unexpected disconnect. 2324 * Some devices go into a contingent 2325 * allegiance condition when 2326 * disconnecting, and this is necessary 2327 * to clean up their state. 2328 */ 2329 printf("%s: unexpected disconnect " 2330 "[state %d, intr %x, stat %x, phase(c %x, p %x)]; ", 2331 device_xname(&sc->sc_dev), sc->sc_state, 2332 sc->sc_espintr, sc->sc_espstat, 2333 sc->sc_phase, sc->sc_prevphase); 2334 2335 if ((ecb->flags & ECB_SENSE) != 0) { 2336 printf("resetting\n"); 2337 goto reset; 2338 } 2339 printf("sending REQUEST SENSE\n"); 2340 callout_stop(&ecb->xs->xs_callout); 2341 ncr53c9x_sense(sc, ecb); 2342 goto out; 2343 } 2344 2345 ecb->xs->error = XS_TIMEOUT; 2346 goto finish; 2347 2348 case NCR_DISCONNECT: 2349 sc->sc_nexus = NULL; 2350 goto sched; 2351 2352 case NCR_CMDCOMPLETE: 2353 goto finish; 2354 } 2355 } 2356 2357 switch (sc->sc_state) { 2358 2359 case NCR_SBR: 2360 printf("%s: waiting for SCSI Bus Reset to happen\n", 2361 device_xname(&sc->sc_dev)); 2362 goto out; 2363 2364 case NCR_RESELECTED: 2365 /* 2366 * we must be continuing a message ? 2367 */ 2368 printf("%s: unhandled reselect continuation, " 2369 "state %d, intr %02x\n", 2370 device_xname(&sc->sc_dev), sc->sc_state, sc->sc_espintr); 2371 ncr53c9x_init(sc, 1); 2372 goto out; 2373 2374 case NCR_IDENTIFIED: 2375 ecb = sc->sc_nexus; 2376 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2377 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2378 /* 2379 * Things are seriously screwed up. 2380 * Pull the brakes, i.e. reset 2381 */ 2382 aprint_error_dev(&sc->sc_dev, "target didn't send tag: %d bytes in fifo\n", i); 2383 /* Drain and display fifo */ 2384 while (i-- > 0) 2385 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2386 2387 ncr53c9x_init(sc, 1); 2388 goto out; 2389 } else 2390 goto msgin; 2391 2392 case NCR_IDLE: 2393 case NCR_SELECTING: 2394 ecb = sc->sc_nexus; 2395 if (sc->sc_espintr & NCRINTR_RESEL) { 2396 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2397 sc->sc_flags = 0; 2398 /* 2399 * If we're trying to select a 2400 * target ourselves, push our command 2401 * back into the ready list. 2402 */ 2403 if (sc->sc_state == NCR_SELECTING) { 2404 NCR_INTS(("backoff selector ")); 2405 callout_stop(&ecb->xs->xs_callout); 2406 ncr53c9x_dequeue(sc, ecb); 2407 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2408 ecb->flags |= ECB_READY; 2409 ecb = sc->sc_nexus = NULL; 2410 } 2411 sc->sc_state = NCR_RESELECTED; 2412 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2413 /* 2414 * Things are seriously screwed up. 2415 * Pull the brakes, i.e. reset 2416 */ 2417 aprint_error_dev(&sc->sc_dev, "target didn't identify\n"); 2418 ncr53c9x_init(sc, 1); 2419 goto out; 2420 } 2421 /* 2422 * The C90 only inhibits FIFO writes until reselection 2423 * is complete, instead of waiting until the interrupt 2424 * status register has been read. So, if the reselect 2425 * happens while we were entering command bytes (for 2426 * another target) some of those bytes can appear in 2427 * the FIFO here, after the interrupt is taken. 2428 * 2429 * To remedy this situation, pull the Selection ID 2430 * and Identify message from the FIFO directly, and 2431 * ignore any extraneous fifo contents. Also, set 2432 * a flag that allows one Illegal Command Interrupt 2433 * to occur which the chip also generates as a result 2434 * of writing to the FIFO during a reselect. 2435 */ 2436 if (sc->sc_rev == NCR_VARIANT_ESP100) { 2437 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & 2438 NCRFIFO_FF; 2439 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO); 2440 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO); 2441 sc->sc_imlen = 2; 2442 if (nfifo != 2) { 2443 /* Flush the rest */ 2444 NCRCMD(sc, NCRCMD_FLUSH); 2445 } 2446 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2447 if (nfifo > 2) 2448 nfifo = 2; /* We fixed it.. */ 2449 } else 2450 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2451 2452 if (nfifo != 2) { 2453 printf("%s: RESELECT: %d bytes in FIFO! " 2454 "[intr %x, stat %x, step %d, " 2455 "prevphase %x]\n", 2456 device_xname(&sc->sc_dev), 2457 nfifo, 2458 sc->sc_espintr, 2459 sc->sc_espstat, 2460 sc->sc_espstep, 2461 sc->sc_prevphase); 2462 ncr53c9x_init(sc, 1); 2463 goto out; 2464 } 2465 sc->sc_selid = sc->sc_imess[0]; 2466 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2467 2468 /* Handle identify message */ 2469 ncr53c9x_msgin(sc); 2470 2471 if (sc->sc_state != NCR_CONNECTED && 2472 sc->sc_state != NCR_IDENTIFIED) { 2473 /* IDENTIFY fail?! */ 2474 aprint_error_dev(&sc->sc_dev, "identify failed, " 2475 "state %d, intr %02x\n", 2476 sc->sc_state, sc->sc_espintr); 2477 ncr53c9x_init(sc, 1); 2478 goto out; 2479 } 2480 goto shortcut; /* ie. next phase expected soon */ 2481 } 2482 2483 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2484 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2485 /* 2486 * Arbitration won; examine the `step' register 2487 * to determine how far the selection could progress. 2488 */ 2489 ecb = sc->sc_nexus; 2490 if (ecb == NULL) 2491 panic("ncr53c9x: no nexus"); 2492 2493 periph = ecb->xs->xs_periph; 2494 ti = &sc->sc_tinfo[periph->periph_target]; 2495 2496 switch (sc->sc_espstep) { 2497 case 0: 2498 /* 2499 * The target did not respond with a 2500 * message out phase - probably an old 2501 * device that doesn't recognize ATN. 2502 * Clear ATN and just continue, the 2503 * target should be in the command 2504 * phase. 2505 * XXXX check for command phase? 2506 */ 2507 NCRCMD(sc, NCRCMD_RSTATN); 2508 break; 2509 case 1: 2510 if ((ti->flags & T_NEGOTIATE) == 0 && 2511 ecb->tag[0] == 0) { 2512 printf("%s: step 1 & !NEG\n", 2513 device_xname(&sc->sc_dev)); 2514 goto reset; 2515 } 2516 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2517 printf("%s: !MSGOUT\n", 2518 device_xname(&sc->sc_dev)); 2519 goto reset; 2520 } 2521 if (ti->flags & T_WIDE) { 2522 ti->flags |= T_WDTRSENT; 2523 ncr53c9x_sched_msgout(SEND_WDTR); 2524 } 2525 if (ti->flags & T_NEGOTIATE) { 2526 /* Start negotiating */ 2527 ti->period = sc->sc_minsync; 2528 ti->offset = 15; 2529 sc->sc_flags |= NCR_SYNCHNEGO; 2530 if (ecb->tag[0]) 2531 ncr53c9x_sched_msgout( 2532 SEND_TAG|SEND_SDTR); 2533 else 2534 ncr53c9x_sched_msgout( 2535 SEND_SDTR); 2536 } else { 2537 /* Could not do ATN3 so send TAG */ 2538 ncr53c9x_sched_msgout(SEND_TAG); 2539 } 2540 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2541 break; 2542 case 3: 2543 /* 2544 * Grr, this is supposed to mean 2545 * "target left command phase prematurely". 2546 * It seems to happen regularly when 2547 * sync mode is on. 2548 * Look at FIFO to see if command went out. 2549 * (Timing problems?) 2550 */ 2551 if (sc->sc_features & NCR_F_DMASELECT) { 2552 if (sc->sc_cmdlen == 0) 2553 /* Hope for the best.. */ 2554 break; 2555 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2556 & NCRFIFO_FF) == 0) { 2557 /* Hope for the best.. */ 2558 break; 2559 } 2560 printf("(%s:%d:%d): selection failed;" 2561 " %d left in FIFO " 2562 "[intr %x, stat %x, step %d]\n", 2563 device_xname(&sc->sc_dev), 2564 periph->periph_target, 2565 periph->periph_lun, 2566 NCR_READ_REG(sc, NCR_FFLAG) 2567 & NCRFIFO_FF, 2568 sc->sc_espintr, sc->sc_espstat, 2569 sc->sc_espstep); 2570 NCRCMD(sc, NCRCMD_FLUSH); 2571 ncr53c9x_sched_msgout(SEND_ABORT); 2572 goto out; 2573 case 2: 2574 /* Select stuck at Command Phase */ 2575 NCRCMD(sc, NCRCMD_FLUSH); 2576 break; 2577 case 4: 2578 if (sc->sc_features & NCR_F_DMASELECT && 2579 sc->sc_cmdlen != 0) 2580 printf("(%s:%d:%d): select; " 2581 "%lu left in DMA buffer " 2582 "[intr %x, stat %x, step %d]\n", 2583 device_xname(&sc->sc_dev), 2584 periph->periph_target, 2585 periph->periph_lun, 2586 (u_long)sc->sc_cmdlen, 2587 sc->sc_espintr, 2588 sc->sc_espstat, 2589 sc->sc_espstep); 2590 /* So far, everything went fine */ 2591 break; 2592 } 2593 2594 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2595 /* Do an implicit RESTORE POINTERS. */ 2596 sc->sc_dp = ecb->daddr; 2597 sc->sc_dleft = ecb->dleft; 2598 sc->sc_state = NCR_CONNECTED; 2599 break; 2600 2601 } else { 2602 2603 aprint_error_dev(&sc->sc_dev, "unexpected status after select" 2604 ": [intr %x, stat %x, step %x]\n", 2605 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2606 NCRCMD(sc, NCRCMD_FLUSH); 2607 DELAY(1); 2608 goto reset; 2609 } 2610 if (sc->sc_state == NCR_IDLE) { 2611 printf("%s: stray interrupt\n", device_xname(&sc->sc_dev)); 2612 simple_unlock(&sc->sc_lock); 2613 return 0; 2614 } 2615 break; 2616 2617 case NCR_CONNECTED: 2618 if ((sc->sc_flags & NCR_ICCS) != 0) { 2619 /* "Initiate Command Complete Steps" in progress */ 2620 u_char msg; 2621 2622 sc->sc_flags &= ~NCR_ICCS; 2623 2624 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2625 printf("%s: ICCS: " 2626 ": [intr %x, stat %x, step %x]\n", 2627 device_xname(&sc->sc_dev), 2628 sc->sc_espintr, sc->sc_espstat, 2629 sc->sc_espstep); 2630 } 2631 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2632 if (sc->sc_imlen < 2) 2633 aprint_error_dev(&sc->sc_dev, "can't get status, only %d bytes\n", 2634 (int)sc->sc_imlen); 2635 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2636 msg = sc->sc_imess[sc->sc_imlen - 1]; 2637 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2638 if (msg == MSG_CMDCOMPLETE) { 2639 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2640 ? 0 : sc->sc_dleft; 2641 if ((ecb->flags & ECB_SENSE) == 0) 2642 ecb->xs->resid = ecb->dleft; 2643 sc->sc_state = NCR_CMDCOMPLETE; 2644 } else 2645 printf("%s: STATUS_PHASE: msg %d\n", 2646 device_xname(&sc->sc_dev), msg); 2647 sc->sc_imlen = 0; 2648 NCRCMD(sc, NCRCMD_MSGOK); 2649 goto shortcut; /* ie. wait for disconnect */ 2650 } 2651 break; 2652 2653 default: 2654 aprint_error_dev(&sc->sc_dev, "invalid state: %d [intr %x, phase(c %x, p %x)]\n", 2655 sc->sc_state, 2656 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase); 2657 goto reset; 2658 } 2659 2660 /* 2661 * Driver is now in state NCR_CONNECTED, i.e. we 2662 * have a current command working the SCSI bus. 2663 */ 2664 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2665 panic("ncr53c9x: no nexus"); 2666 } 2667 2668 switch (sc->sc_phase) { 2669 case MESSAGE_OUT_PHASE: 2670 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2671 ncr53c9x_msgout(sc); 2672 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2673 break; 2674 2675 case MESSAGE_IN_PHASE: 2676 msgin: 2677 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2678 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2679 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2680 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2681 NCRCMD(sc, NCRCMD_FLUSH); 2682 } 2683 sc->sc_flags |= NCR_WAITI; 2684 NCRCMD(sc, NCRCMD_TRANS); 2685 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2686 if ((sc->sc_flags & NCR_WAITI) == 0) { 2687 aprint_error_dev(&sc->sc_dev, "MSGIN: unexpected FC bit: " 2688 "[intr %x, stat %x, step %x]\n", 2689 sc->sc_espintr, sc->sc_espstat, 2690 sc->sc_espstep); 2691 } 2692 sc->sc_flags &= ~NCR_WAITI; 2693 ncr53c9x_rdfifo(sc, 2694 (sc->sc_prevphase == sc->sc_phase) ? 2695 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2696 ncr53c9x_msgin(sc); 2697 } else { 2698 printf("%s: MSGIN: weird bits: " 2699 "[intr %x, stat %x, step %x]\n", 2700 device_xname(&sc->sc_dev), 2701 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2702 } 2703 sc->sc_prevphase = MESSAGE_IN_PHASE; 2704 goto shortcut; /* i.e. expect data to be ready */ 2705 2706 case COMMAND_PHASE: 2707 /* 2708 * Send the command block. Normally we don't see this 2709 * phase because the SEL_ATN command takes care of 2710 * all this. However, we end up here if either the 2711 * target or we wanted to exchange some more messages 2712 * first (e.g. to start negotiations). 2713 */ 2714 2715 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2716 ecb->cmd.cmd.opcode, ecb->clen)); 2717 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2718 NCRCMD(sc, NCRCMD_FLUSH); 2719 #if 0 2720 DELAY(1); 2721 #endif 2722 } 2723 if (sc->sc_features & NCR_F_DMASELECT) { 2724 /* setup DMA transfer for command */ 2725 size = ecb->clen; 2726 sc->sc_cmdlen = size; 2727 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 2728 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2729 0, &size); 2730 /* Program the SCSI counter */ 2731 NCR_SET_COUNT(sc, size); 2732 2733 /* load the count in */ 2734 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2735 2736 /* start the command transfer */ 2737 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2738 NCRDMA_GO(sc); 2739 } else { 2740 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2741 NCRCMD(sc, NCRCMD_TRANS); 2742 } 2743 sc->sc_prevphase = COMMAND_PHASE; 2744 break; 2745 2746 case DATA_OUT_PHASE: 2747 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2748 NCRCMD(sc, NCRCMD_FLUSH); 2749 size = min(sc->sc_dleft, sc->sc_maxxfer); 2750 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2751 sc->sc_prevphase = DATA_OUT_PHASE; 2752 goto setup_xfer; 2753 2754 case DATA_IN_PHASE: 2755 NCR_PHASE(("DATA_IN_PHASE ")); 2756 if (sc->sc_rev == NCR_VARIANT_ESP100) 2757 NCRCMD(sc, NCRCMD_FLUSH); 2758 size = min(sc->sc_dleft, sc->sc_maxxfer); 2759 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2760 sc->sc_prevphase = DATA_IN_PHASE; 2761 setup_xfer: 2762 /* Target returned to data phase: wipe "done" memory */ 2763 ecb->flags &= ~ECB_TENTATIVE_DONE; 2764 2765 /* Program the SCSI counter */ 2766 NCR_SET_COUNT(sc, size); 2767 2768 /* load the count in */ 2769 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2770 2771 /* 2772 * Note that if `size' is 0, we've already transceived 2773 * all the bytes we want but we're still in DATA PHASE. 2774 * Apparently, the device needs padding. Also, a 2775 * transfer size of 0 means "maximum" to the chip 2776 * DMA logic. 2777 */ 2778 NCRCMD(sc, 2779 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2780 NCRDMA_GO(sc); 2781 goto out; 2782 2783 case STATUS_PHASE: 2784 NCR_PHASE(("STATUS_PHASE ")); 2785 sc->sc_flags |= NCR_ICCS; 2786 NCRCMD(sc, NCRCMD_ICCS); 2787 sc->sc_prevphase = STATUS_PHASE; 2788 goto shortcut; /* i.e. expect status results soon */ 2789 2790 case INVALID_PHASE: 2791 break; 2792 2793 default: 2794 printf("%s: unexpected bus phase; resetting\n", 2795 device_xname(&sc->sc_dev)); 2796 goto reset; 2797 } 2798 2799 out: 2800 simple_unlock(&sc->sc_lock); 2801 return 1; 2802 2803 reset: 2804 ncr53c9x_init(sc, 1); 2805 goto out; 2806 2807 finish: 2808 ncr53c9x_done(sc, ecb); 2809 goto out; 2810 2811 sched: 2812 sc->sc_state = NCR_IDLE; 2813 ncr53c9x_sched(sc); 2814 goto out; 2815 2816 shortcut: 2817 /* 2818 * The idea is that many of the SCSI operations take very little 2819 * time, and going away and getting interrupted is too high an 2820 * overhead to pay. For example, selecting, sending a message 2821 * and command and then doing some work can be done in one "pass". 2822 * 2823 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2824 * at 40MHz. This needs testing. 2825 */ 2826 { 2827 struct timeval wait, cur; 2828 2829 microtime(&wait); 2830 wait.tv_usec += 50 / sc->sc_freq; 2831 if (wait.tv_usec > 1000000) { 2832 wait.tv_sec++; 2833 wait.tv_usec -= 1000000; 2834 } 2835 do { 2836 if (NCRDMA_ISINTR(sc)) 2837 goto again; 2838 microtime(&cur); 2839 } while (cur.tv_sec <= wait.tv_sec && 2840 cur.tv_usec <= wait.tv_usec); 2841 } 2842 goto out; 2843 } 2844 2845 void 2846 ncr53c9x_abort(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 2847 { 2848 2849 /* 2 secs for the abort */ 2850 ecb->timeout = NCR_ABORT_TIMEOUT; 2851 ecb->flags |= ECB_ABORT; 2852 2853 if (ecb == sc->sc_nexus) { 2854 /* 2855 * If we're still selecting, the message will be scheduled 2856 * after selection is complete. 2857 */ 2858 if (sc->sc_state == NCR_CONNECTED) 2859 ncr53c9x_sched_msgout(SEND_ABORT); 2860 2861 /* 2862 * Reschedule timeout. 2863 */ 2864 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2865 ncr53c9x_timeout, ecb); 2866 } else { 2867 /* 2868 * Just leave the command where it is. 2869 * XXX - what choice do we have but to reset the SCSI 2870 * eventually? 2871 */ 2872 if (sc->sc_state == NCR_IDLE) 2873 ncr53c9x_sched(sc); 2874 } 2875 } 2876 2877 void 2878 ncr53c9x_timeout(void *arg) 2879 { 2880 struct ncr53c9x_ecb *ecb = arg; 2881 struct scsipi_xfer *xs = ecb->xs; 2882 struct scsipi_periph *periph = xs->xs_periph; 2883 struct ncr53c9x_softc *sc = 2884 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2885 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2886 int s; 2887 2888 scsipi_printaddr(periph); 2889 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2890 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2891 "msg(q %x,o %x) %s>", 2892 device_xname(&sc->sc_dev), 2893 ecb, ecb->flags, ecb->dleft, ecb->stat, 2894 sc->sc_state, sc->sc_nexus, 2895 NCR_READ_REG(sc, NCR_STAT), 2896 sc->sc_phase, sc->sc_prevphase, 2897 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2898 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2899 #if NCR53C9X_DEBUG > 1 2900 printf("TRACE: %s.", ecb->trace); 2901 #endif 2902 2903 s = splbio(); 2904 simple_lock(&sc->sc_lock); 2905 2906 if (ecb->flags & ECB_ABORT) { 2907 /* abort timed out */ 2908 printf(" AGAIN\n"); 2909 2910 ncr53c9x_init(sc, 1); 2911 } else { 2912 /* abort the operation that has timed out */ 2913 printf("\n"); 2914 xs->error = XS_TIMEOUT; 2915 ncr53c9x_abort(sc, ecb); 2916 2917 /* Disable sync mode if stuck in a data phase */ 2918 if (ecb == sc->sc_nexus && 2919 (ti->flags & T_SYNCMODE) != 0 && 2920 (sc->sc_phase & (MSGI|CDI)) == 0) { 2921 /* XXX ASYNC CALLBACK! */ 2922 scsipi_printaddr(periph); 2923 printf("sync negotiation disabled\n"); 2924 sc->sc_cfflags |= 2925 (1 << ((periph->periph_target & 7) + 8)); 2926 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2927 } 2928 } 2929 2930 simple_unlock(&sc->sc_lock); 2931 splx(s); 2932 } 2933 2934 void 2935 ncr53c9x_watch(void *arg) 2936 { 2937 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2938 struct ncr53c9x_tinfo *ti; 2939 struct ncr53c9x_linfo *li; 2940 int t, s; 2941 /* Delete any structures that have not been used in 10min. */ 2942 time_t old = time_second - (10 * 60); 2943 2944 s = splbio(); 2945 simple_lock(&sc->sc_lock); 2946 for (t = 0; t < sc->sc_ntarg; t++) { 2947 ti = &sc->sc_tinfo[t]; 2948 li = LIST_FIRST(&ti->luns); 2949 while (li) { 2950 if (li->last_used < old && 2951 li->untagged == NULL && 2952 li->used == 0) { 2953 if (li->lun < NCR_NLUN) 2954 ti->lun[li->lun] = NULL; 2955 LIST_REMOVE(li, link); 2956 free(li, M_DEVBUF); 2957 /* Restart the search at the beginning */ 2958 li = LIST_FIRST(&ti->luns); 2959 continue; 2960 } 2961 li = LIST_NEXT(li, link); 2962 } 2963 } 2964 simple_unlock(&sc->sc_lock); 2965 splx(s); 2966 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2967 } 2968 2969
Indexes created Fri Sep 26 20:09:58 GMT 2025