ncr53c9x.c revision 1.137
1 /* $NetBSD: ncr53c9x.c,v 1.137 2008/05/13 22:16:27 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 1994 Peter Galbavy 34 * Copyright (c) 1995 Paul Kranenburg 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Peter Galbavy 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 53 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 54 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 59 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 60 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 /* 65 * Based on aic6360 by Jarle Greipsland 66 * 67 * Acknowledgements: Many of the algorithms used in this driver are 68 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 69 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.137 2008/05/13 22:16:27 christos Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/callout.h> 78 #include <sys/kernel.h> 79 #include <sys/errno.h> 80 #include <sys/ioctl.h> 81 #include <sys/device.h> 82 #include <sys/buf.h> 83 #include <sys/malloc.h> 84 #include <sys/proc.h> 85 #include <sys/queue.h> 86 #include <sys/pool.h> 87 #include <sys/scsiio.h> 88 89 #include <dev/scsipi/scsi_spc.h> 90 #include <dev/scsipi/scsi_all.h> 91 #include <dev/scsipi/scsipi_all.h> 92 #include <dev/scsipi/scsiconf.h> 93 #include <dev/scsipi/scsi_message.h> 94 95 #include <dev/ic/ncr53c9xreg.h> 96 #include <dev/ic/ncr53c9xvar.h> 97 98 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 99 #ifdef DEBUG 100 int ncr53c9x_notag = 0; 101 #endif 102 103 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 104 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 105 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 106 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 107 /*static*/ void ncr53c9x_clear(struct ncr53c9x_softc *, scsipi_xfer_result_t); 108 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 109 struct scsipi_xfer *, int); 110 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 111 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 112 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 113 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 114 /*static*/ void ncr53c9x_timeout(void *arg); 115 /*static*/ void ncr53c9x_watch(void *arg); 116 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 117 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 118 struct ncr53c9x_ecb *); 119 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 120 void *, int, struct proc *); 121 122 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 123 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 124 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 125 126 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 127 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 128 struct ncr53c9x_tinfo *); 129 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 130 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 131 int64_t lun); 132 133 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, uint8_t *, int); 134 135 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 136 #define NCR_RDFIFO_START 0 137 #define NCR_RDFIFO_CONTINUE 1 138 139 140 #define NCR_SET_COUNT(sc, size) do { \ 141 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 142 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 143 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 144 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 145 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 146 } \ 147 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 148 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 149 } \ 150 } while (/* CONSTCOND */0) 151 152 static int ecb_pool_initialized = 0; 153 static struct pool ecb_pool; 154 155 /* 156 * Names for the NCR53c9x variants, corresponding to the variant tags 157 * in ncr53c9xvar.h. 158 */ 159 static const char *ncr53c9x_variant_names[] = { 160 "ESP100", 161 "ESP100A", 162 "ESP200", 163 "NCR53C94", 164 "NCR53C96", 165 "ESP406", 166 "FAS408", 167 "FAS216", 168 "AM53C974", 169 "FAS366/HME", 170 "NCR53C90 (86C01)", 171 }; 172 173 /* 174 * Search linked list for LUN info by LUN id. 175 */ 176 static struct ncr53c9x_linfo * 177 ncr53c9x_lunsearch(struct ncr53c9x_tinfo *ti, int64_t lun) 178 { 179 struct ncr53c9x_linfo *li; 180 181 LIST_FOREACH(li, &ti->luns, link) 182 if (li->lun == lun) 183 return li; 184 return NULL; 185 } 186 187 /* 188 * Attach this instance, and then all the sub-devices 189 */ 190 void 191 ncr53c9x_attach(struct ncr53c9x_softc *sc) 192 { 193 struct scsipi_adapter *adapt = &sc->sc_adapter; 194 struct scsipi_channel *chan = &sc->sc_channel; 195 196 simple_lock_init(&sc->sc_lock); 197 198 callout_init(&sc->sc_watchdog, 0); 199 200 /* 201 * Note, the front-end has set us up to print the chip variation. 202 */ 203 if (sc->sc_rev >= NCR_VARIANT_MAX) { 204 aprint_error(": unknown variant %d, devices not attached\n", 205 sc->sc_rev); 206 return; 207 } 208 209 aprint_normal(": %s, %dMHz, SCSI ID %d\n", 210 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 211 212 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8; 213 214 /* 215 * Allocate SCSI message buffers. 216 * Front-ends can override allocation to avoid alignment 217 * handling in the DMA engines. Note that that ncr53c9x_msgout() 218 * can request a 1 byte DMA transfer. 219 */ 220 if (sc->sc_omess == NULL) 221 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 222 223 if (sc->sc_imess == NULL) 224 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 225 226 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]), 227 M_DEVBUF, M_NOWAIT | M_ZERO); 228 229 if (sc->sc_omess == NULL || sc->sc_imess == NULL || 230 sc->sc_tinfo == NULL) { 231 aprint_error_dev(sc->sc_dev, "out of memory\n"); 232 return; 233 } 234 235 /* 236 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 237 * from now on. 238 */ 239 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 240 sc->sc_rev = NCR_VARIANT_ESP100; 241 242 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 243 244 /* The value *must not* be == 1. Make it 2 */ 245 if (sc->sc_ccf == 1) 246 sc->sc_ccf = 2; 247 248 /* 249 * The recommended timeout is 250ms. This register is loaded 250 * with a value calculated as follows, from the docs: 251 * 252 * (timout period) x (CLK frequency) 253 * reg = ------------------------------------- 254 * 8192 x (Clock Conversion Factor) 255 * 256 * Since CCF has a linear relation to CLK, this generally computes 257 * to the constant of 153. 258 */ 259 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 260 261 /* CCF register only has 3 bits; 0 is actually 8 */ 262 sc->sc_ccf &= 7; 263 264 /* 265 * Fill in the scsipi_adapter. 266 */ 267 adapt->adapt_dev = sc->sc_dev; 268 adapt->adapt_nchannels = 1; 269 adapt->adapt_openings = 256; 270 adapt->adapt_max_periph = 256; 271 adapt->adapt_ioctl = ncr53c9x_ioctl; 272 /* adapt_request initialized by front-end */ 273 /* adapt_minphys initialized by front-end */ 274 275 /* 276 * Fill in the scsipi_channel. 277 */ 278 memset(chan, 0, sizeof(*chan)); 279 chan->chan_adapter = adapt; 280 chan->chan_bustype = &scsi_bustype; 281 chan->chan_channel = 0; 282 chan->chan_ntargets = sc->sc_ntarg; 283 chan->chan_nluns = 8; 284 chan->chan_id = sc->sc_id; 285 286 /* 287 * Add reference to adapter so that we drop the reference after 288 * config_found() to make sure the adatper is disabled. 289 */ 290 if (scsipi_adapter_addref(adapt) != 0) { 291 aprint_error_dev(sc->sc_dev, "unable to enable controller\n"); 292 return; 293 } 294 295 /* Reset state & bus */ 296 sc->sc_cfflags = device_cfdata(sc->sc_dev)->cf_flags; 297 sc->sc_state = 0; 298 ncr53c9x_init(sc, 1); 299 300 /* 301 * Now try to attach all the sub-devices 302 */ 303 sc->sc_child = config_found(sc->sc_dev, &sc->sc_channel, scsiprint); 304 305 scsipi_adapter_delref(adapt); 306 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 307 } 308 309 int 310 ncr53c9x_detach(struct ncr53c9x_softc *sc, int flags) 311 { 312 struct ncr53c9x_linfo *li, *nextli; 313 int t; 314 int error; 315 316 callout_stop(&sc->sc_watchdog); 317 318 if (sc->sc_tinfo) { 319 /* Cancel all commands. */ 320 ncr53c9x_clear(sc, XS_DRIVER_STUFFUP); 321 322 /* Free logical units. */ 323 for (t = 0; t < sc->sc_ntarg; t++) { 324 for (li = LIST_FIRST(&sc->sc_tinfo[t].luns); li; 325 li = nextli) { 326 nextli = LIST_NEXT(li, link); 327 free(li, M_DEVBUF); 328 } 329 } 330 } 331 332 if (sc->sc_child) { 333 error = config_detach(sc->sc_child, flags); 334 if (error) 335 return error; 336 } 337 338 if (sc->sc_imess) 339 free(sc->sc_imess, M_DEVBUF); 340 if (sc->sc_omess) 341 free(sc->sc_omess, M_DEVBUF); 342 343 return 0; 344 } 345 346 /* 347 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 348 * only this controller, but kills any on-going commands, and also stops 349 * and resets the DMA. 350 * 351 * After reset, registers are loaded with the defaults from the attach 352 * routine above. 353 */ 354 void 355 ncr53c9x_reset(struct ncr53c9x_softc *sc) 356 { 357 358 /* reset DMA first */ 359 NCRDMA_RESET(sc); 360 361 /* reset SCSI chip */ 362 NCRCMD(sc, NCRCMD_RSTCHIP); 363 NCRCMD(sc, NCRCMD_NOP); 364 DELAY(500); 365 366 /* do these backwards, and fall through */ 367 switch (sc->sc_rev) { 368 case NCR_VARIANT_ESP406: 369 case NCR_VARIANT_FAS408: 370 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 371 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 372 case NCR_VARIANT_AM53C974: 373 case NCR_VARIANT_FAS216: 374 case NCR_VARIANT_NCR53C94: 375 case NCR_VARIANT_NCR53C96: 376 case NCR_VARIANT_ESP200: 377 sc->sc_features |= NCR_F_HASCFG3; 378 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 379 case NCR_VARIANT_ESP100A: 380 sc->sc_features |= NCR_F_SELATN3; 381 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 382 case NCR_VARIANT_ESP100: 383 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 384 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 385 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 386 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 387 break; 388 389 case NCR_VARIANT_FAS366: 390 sc->sc_features |= 391 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 392 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 393 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 394 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 395 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 396 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 397 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 398 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 399 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 400 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 401 break; 402 403 default: 404 printf("%s: unknown revision code, assuming ESP100\n", 405 device_xname(sc->sc_dev)); 406 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 407 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 408 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 409 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 410 } 411 412 if (sc->sc_rev == NCR_VARIANT_AM53C974) 413 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 414 415 #if 0 416 printf("%s: ncr53c9x_reset: revision %d\n", 417 device_xname(sc->sc_dev), sc->sc_rev); 418 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 419 "ccf 0x%x, timeout 0x%x\n", 420 device_xname(sc->sc_dev), sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 421 sc->sc_ccf, sc->sc_timeout); 422 #endif 423 } 424 425 /* 426 * Reset the SCSI bus, but not the chip 427 */ 428 void 429 ncr53c9x_scsi_reset(struct ncr53c9x_softc *sc) 430 { 431 432 (*sc->sc_glue->gl_dma_stop)(sc); 433 434 printf("%s: resetting SCSI bus\n", device_xname(sc->sc_dev)); 435 NCRCMD(sc, NCRCMD_RSTSCSI); 436 } 437 438 /* 439 * Clear all commands 440 */ 441 void 442 ncr53c9x_clear(struct ncr53c9x_softc *sc, scsipi_xfer_result_t result) 443 { 444 struct ncr53c9x_ecb *ecb; 445 struct ncr53c9x_linfo *li; 446 int i, r; 447 448 /* Cancel any active commands. */ 449 sc->sc_state = NCR_CLEANING; 450 sc->sc_msgify = 0; 451 ecb = sc->sc_nexus; 452 if (ecb != NULL) { 453 ecb->xs->error = result; 454 ncr53c9x_done(sc, ecb); 455 } 456 /* Cancel outstanding disconnected commands on each LUN */ 457 for (r = 0; r < sc->sc_ntarg; r++) { 458 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 459 ecb = li->untagged; 460 if (ecb != NULL) { 461 li->untagged = NULL; 462 /* 463 * XXXXXXX 464 * 465 * Should we terminate a command 466 * that never reached the disk? 467 */ 468 li->busy = 0; 469 ecb->xs->error = result; 470 ncr53c9x_done(sc, ecb); 471 } 472 for (i = 0; i < 256; i++) 473 ecb = li->queued[i]; 474 if (ecb != NULL) { 475 li->queued[i] = NULL; 476 ecb->xs->error = result; 477 ncr53c9x_done(sc, ecb); 478 } 479 li->used = 0; 480 } 481 } 482 } 483 484 /* 485 * Initialize ncr53c9x state machine 486 */ 487 void 488 ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset) 489 { 490 int r; 491 492 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 493 494 if (!ecb_pool_initialized) { 495 /* All instances share this pool */ 496 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 497 "ncr53c9x_ecb", NULL, IPL_BIO); 498 /* make sure to always have some items to play with */ 499 if (pool_prime(&ecb_pool, 1) == ENOMEM) { 500 printf("WARNING: not enough memory for ncr53c9x_ecb\n"); 501 } 502 ecb_pool_initialized = 1; 503 } 504 505 if (sc->sc_state == 0) { 506 /* First time through; initialize. */ 507 508 TAILQ_INIT(&sc->ready_list); 509 sc->sc_nexus = NULL; 510 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 511 for (r = 0; r < sc->sc_ntarg; r++) { 512 LIST_INIT(&sc->sc_tinfo[r].luns); 513 } 514 } else { 515 ncr53c9x_clear(sc, XS_TIMEOUT); 516 } 517 518 /* 519 * reset the chip to a known state 520 */ 521 ncr53c9x_reset(sc); 522 523 sc->sc_flags = 0; 524 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 525 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 526 527 for (r = 0; r < sc->sc_ntarg; r++) { 528 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 529 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 530 531 ti->flags = ((sc->sc_minsync && 532 !(sc->sc_cfflags & (1 << ((r & 7) + 8)))) ? 533 0 : T_SYNCHOFF) | 534 ((sc->sc_cfflags & (1 << (r & 7))) ? T_RSELECTOFF : 0); 535 #ifdef DEBUG 536 if (ncr53c9x_notag) 537 ti->flags &= ~T_TAG; 538 #endif 539 ti->period = sc->sc_minsync; 540 ti->offset = 0; 541 ti->cfg3 = 0; 542 543 ncr53c9x_update_xfer_mode(sc, r); 544 } 545 546 if (doreset) { 547 sc->sc_state = NCR_SBR; 548 NCRCMD(sc, NCRCMD_RSTSCSI); 549 } else { 550 sc->sc_state = NCR_IDLE; 551 ncr53c9x_sched(sc); 552 } 553 554 /* Notify upper layer */ 555 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_RESET, NULL); 556 } 557 558 /* 559 * Read the NCR registers, and save their contents for later use. 560 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 561 * NCR_INTR - so make sure it is the last read. 562 * 563 * I think that (from reading the docs) most bits in these registers 564 * only make sense when he DMA CSR has an interrupt showing. Call only 565 * if an interrupt is pending. 566 */ 567 inline void 568 ncr53c9x_readregs(struct ncr53c9x_softc *sc) 569 { 570 571 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 572 /* Only the stepo bits are of interest */ 573 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 574 575 if (sc->sc_rev == NCR_VARIANT_FAS366) 576 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 577 578 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 579 580 if (sc->sc_glue->gl_clear_latched_intr != NULL) 581 (*sc->sc_glue->gl_clear_latched_intr)(sc); 582 583 /* 584 * Determine the SCSI bus phase, return either a real SCSI bus phase 585 * or some pseudo phase we use to detect certain exceptions. 586 */ 587 588 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 589 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 590 591 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 592 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 593 } 594 595 /* 596 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 597 */ 598 static inline int 599 ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc, int period) 600 { 601 int v; 602 603 v = (sc->sc_freq * period) / 250; 604 if (ncr53c9x_cpb2stp(sc, v) < period) 605 /* Correct round-down error */ 606 v++; 607 return v; 608 } 609 610 static inline void 611 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti) 612 { 613 uint8_t syncoff, synctp; 614 uint8_t cfg3 = sc->sc_cfg3 | ti->cfg3; 615 616 if (ti->flags & T_SYNCMODE) { 617 syncoff = ti->offset; 618 synctp = ncr53c9x_stp2cpb(sc, ti->period); 619 if (sc->sc_features & NCR_F_FASTSCSI) { 620 /* 621 * If the period is 200ns or less (ti->period <= 50), 622 * put the chip in Fast SCSI mode. 623 */ 624 if (ti->period <= 50) 625 /* 626 * There are (at least) 4 variations of the 627 * configuration 3 register. The drive attach 628 * routine sets the appropriate bit to put the 629 * chip into Fast SCSI mode so that it doesn't 630 * have to be figured out here each time. 631 */ 632 cfg3 |= sc->sc_cfg3_fscsi; 633 } 634 635 /* 636 * Am53c974 requires different SYNCTP values when the 637 * FSCSI bit is off. 638 */ 639 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 640 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 641 synctp--; 642 } else { 643 syncoff = 0; 644 synctp = 0; 645 } 646 647 if (sc->sc_features & NCR_F_HASCFG3) 648 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 649 650 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 651 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 652 } 653 654 /* 655 * Send a command to a target, set the driver state to NCR_SELECTING 656 * and let the caller take care of the rest. 657 * 658 * Keeping this as a function allows me to say that this may be done 659 * by DMA instead of programmed I/O soon. 660 */ 661 void 662 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 663 { 664 struct scsipi_periph *periph = ecb->xs->xs_periph; 665 int target = periph->periph_target; 666 int lun = periph->periph_lun; 667 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 668 int tiflags = ti->flags; 669 uint8_t *cmd; 670 int clen; 671 bool selatn3, selatns; 672 size_t dmasize; 673 674 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 675 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 676 677 sc->sc_state = NCR_SELECTING; 678 /* 679 * Schedule the timeout now, the first time we will go away 680 * expecting to come back due to an interrupt, because it is 681 * always possible that the interrupt may never happen. 682 */ 683 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 684 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 685 ncr53c9x_timeout, ecb); 686 } 687 688 /* 689 * The docs say the target register is never reset, and I 690 * can't think of a better place to set it 691 */ 692 if (sc->sc_rev == NCR_VARIANT_FAS366) { 693 NCRCMD(sc, NCRCMD_FLUSH); 694 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 695 } else { 696 NCR_WRITE_REG(sc, NCR_SELID, target); 697 } 698 ncr53c9x_setsync(sc, ti); 699 700 if ((ecb->flags & ECB_SENSE) != 0) { 701 /* 702 * For REQUEST SENSE, we should not send an IDENTIFY or 703 * otherwise mangle the target. There should be no MESSAGE IN 704 * phase. 705 */ 706 if (sc->sc_features & NCR_F_DMASELECT) { 707 /* setup DMA transfer for command */ 708 dmasize = clen = ecb->clen; 709 sc->sc_cmdlen = clen; 710 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 711 712 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 713 &dmasize); 714 /* Program the SCSI counter */ 715 NCR_SET_COUNT(sc, dmasize); 716 717 if (sc->sc_rev != NCR_VARIANT_FAS366) 718 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 719 720 /* And get the targets attention */ 721 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 722 NCRDMA_GO(sc); 723 } else { 724 ncr53c9x_wrfifo(sc, (uint8_t *)&ecb->cmd.cmd, 725 ecb->clen); 726 NCRCMD(sc, NCRCMD_SELNATN); 727 } 728 return; 729 } 730 731 selatn3 = selatns = false; 732 if (ecb->tag[0] != 0) { 733 if (sc->sc_features & NCR_F_SELATN3) 734 /* use SELATN3 to send tag messages */ 735 selatn3 = true; 736 else 737 /* We don't have SELATN3; use SELATNS to send tags */ 738 selatns = true; 739 } 740 741 if (ti->flags & T_NEGOTIATE) { 742 /* We have to use SELATNS to send sync/wide messages */ 743 selatn3 = false; 744 selatns = true; 745 } 746 747 cmd = (uint8_t *)&ecb->cmd.cmd; 748 749 if (selatn3) { 750 /* We'll use tags with SELATN3 */ 751 clen = ecb->clen + 3; 752 cmd -= 3; 753 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 754 cmd[1] = ecb->tag[0]; /* msg[1] */ 755 cmd[2] = ecb->tag[1]; /* msg[2] */ 756 } else { 757 /* We don't have tags, or will send messages with SELATNS */ 758 clen = ecb->clen + 1; 759 cmd -= 1; 760 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 761 } 762 763 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 764 765 /* setup DMA transfer for command */ 766 dmasize = clen; 767 sc->sc_cmdlen = clen; 768 sc->sc_cmdp = cmd; 769 770 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 771 /* Program the SCSI counter */ 772 NCR_SET_COUNT(sc, dmasize); 773 774 /* load the count in */ 775 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 776 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 777 778 /* And get the targets attention */ 779 if (selatn3) { 780 sc->sc_msgout = SEND_TAG; 781 sc->sc_flags |= NCR_ATN; 782 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 783 } else 784 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 785 NCRDMA_GO(sc); 786 return; 787 } 788 789 /* 790 * Who am I. This is where we tell the target that we are 791 * happy for it to disconnect etc. 792 */ 793 794 /* Now get the command into the FIFO */ 795 ncr53c9x_wrfifo(sc, cmd, clen); 796 797 /* And get the targets attention */ 798 if (selatns) { 799 NCR_MSGS(("SELATNS \n")); 800 /* Arbitrate, select and stop after IDENTIFY message */ 801 NCRCMD(sc, NCRCMD_SELATNS); 802 } else if (selatn3) { 803 sc->sc_msgout = SEND_TAG; 804 sc->sc_flags |= NCR_ATN; 805 NCRCMD(sc, NCRCMD_SELATN3); 806 } else 807 NCRCMD(sc, NCRCMD_SELATN); 808 } 809 810 void 811 ncr53c9x_free_ecb(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 812 { 813 int s; 814 815 s = splbio(); 816 ecb->flags = 0; 817 pool_put(&ecb_pool, (void *)ecb); 818 splx(s); 819 return; 820 } 821 822 struct ncr53c9x_ecb * 823 ncr53c9x_get_ecb(struct ncr53c9x_softc *sc, int flags) 824 { 825 struct ncr53c9x_ecb *ecb; 826 int s; 827 828 s = splbio(); 829 ecb = pool_get(&ecb_pool, PR_NOWAIT); 830 splx(s); 831 if (ecb) { 832 memset(ecb, 0, sizeof(*ecb)); 833 ecb->flags |= ECB_ALLOC; 834 } 835 return ecb; 836 } 837 838 /* 839 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 840 */ 841 842 /* 843 * Start a SCSI-command 844 * This function is called by the higher level SCSI-driver to queue/run 845 * SCSI-commands. 846 */ 847 848 void 849 ncr53c9x_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 850 void *arg) 851 { 852 struct scsipi_xfer *xs; 853 struct scsipi_periph *periph; 854 struct ncr53c9x_softc *sc; 855 struct ncr53c9x_ecb *ecb; 856 int s, flags; 857 858 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 859 860 sc = device_private(chan->chan_adapter->adapt_dev); 861 s = splbio(); 862 simple_lock(&sc->sc_lock); 863 864 switch (req) { 865 case ADAPTER_REQ_RUN_XFER: 866 xs = arg; 867 periph = xs->xs_periph; 868 flags = xs->xs_control; 869 870 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 871 periph->periph_target)); 872 873 /* Get an ECB to use. */ 874 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 875 /* 876 * This should never happen as we track resources 877 * in the mid-layer, but for now it can as pool_get() 878 * can fail. 879 */ 880 if (ecb == NULL) { 881 scsipi_printaddr(periph); 882 printf("%s: unable to allocate ecb\n", 883 device_xname(sc->sc_dev)); 884 xs->error = XS_RESOURCE_SHORTAGE; 885 simple_unlock(&sc->sc_lock); 886 splx(s); 887 scsipi_done(xs); 888 return; 889 } 890 891 /* Initialize ecb */ 892 ecb->xs = xs; 893 ecb->timeout = xs->timeout; 894 895 if (flags & XS_CTL_RESET) { 896 ecb->flags |= ECB_RESET; 897 ecb->clen = 0; 898 ecb->dleft = 0; 899 } else { 900 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 901 ecb->clen = xs->cmdlen; 902 ecb->daddr = xs->data; 903 ecb->dleft = xs->datalen; 904 } 905 ecb->stat = 0; 906 907 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 908 ecb->flags |= ECB_READY; 909 if (sc->sc_state == NCR_IDLE) 910 ncr53c9x_sched(sc); 911 912 if ((flags & XS_CTL_POLL) == 0) 913 break; 914 915 /* Not allowed to use interrupts, use polling instead */ 916 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 917 ncr53c9x_timeout(ecb); 918 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 919 ncr53c9x_timeout(ecb); 920 } 921 break; 922 923 case ADAPTER_REQ_GROW_RESOURCES: 924 /* XXX Not supported. */ 925 break; 926 927 case ADAPTER_REQ_SET_XFER_MODE: 928 { 929 struct ncr53c9x_tinfo *ti; 930 struct scsipi_xfer_mode *xm = arg; 931 932 ti = &sc->sc_tinfo[xm->xm_target]; 933 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 934 ti->period = 0; 935 ti->offset = 0; 936 937 if ((sc->sc_cfflags & (1 << ((xm->xm_target & 7) + 16))) == 0 && 938 (xm->xm_mode & PERIPH_CAP_TQING)) { 939 NCR_MISC(("%s: target %d: tagged queuing\n", 940 device_xname(sc->sc_dev), xm->xm_target)); 941 ti->flags |= T_TAG; 942 } else 943 ti->flags &= ~T_TAG; 944 945 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 946 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 947 device_xname(sc->sc_dev), xm->xm_target)); 948 if (sc->sc_rev == NCR_VARIANT_FAS366) { 949 ti->flags |= T_WIDE; 950 ti->width = 1; 951 } 952 } 953 954 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 955 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 956 NCR_MISC(("%s: target %d: sync negotiation\n", 957 device_xname(sc->sc_dev), xm->xm_target)); 958 ti->flags |= T_NEGOTIATE; 959 ti->period = sc->sc_minsync; 960 } 961 /* 962 * If we're not going to negotiate, send the notification 963 * now, since it won't happen later. 964 */ 965 if ((ti->flags & T_NEGOTIATE) == 0) 966 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 967 } 968 break; 969 } 970 971 simple_unlock(&sc->sc_lock); 972 splx(s); 973 } 974 975 void 976 ncr53c9x_update_xfer_mode(struct ncr53c9x_softc *sc, int target) 977 { 978 struct scsipi_xfer_mode xm; 979 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 980 981 xm.xm_target = target; 982 xm.xm_mode = 0; 983 xm.xm_period = 0; 984 xm.xm_offset = 0; 985 986 if (ti->flags & T_SYNCMODE) { 987 xm.xm_mode |= PERIPH_CAP_SYNC; 988 xm.xm_period = ti->period; 989 xm.xm_offset = ti->offset; 990 } 991 if (ti->width) 992 xm.xm_mode |= PERIPH_CAP_WIDE16; 993 994 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 995 xm.xm_mode |= PERIPH_CAP_TQING; 996 997 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 998 } 999 1000 /* 1001 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 1002 */ 1003 int 1004 ncr53c9x_poll(struct ncr53c9x_softc *sc, struct scsipi_xfer *xs, int count) 1005 { 1006 1007 NCR_TRACE(("[ncr53c9x_poll] ")); 1008 while (count) { 1009 if (NCRDMA_ISINTR(sc)) { 1010 simple_unlock(&sc->sc_lock); 1011 ncr53c9x_intr(sc); 1012 simple_lock(&sc->sc_lock); 1013 } 1014 #if alternatively 1015 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 1016 ncr53c9x_intr(sc); 1017 #endif 1018 if ((xs->xs_status & XS_STS_DONE) != 0) 1019 return 0; 1020 if (sc->sc_state == NCR_IDLE) { 1021 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 1022 ncr53c9x_sched(sc); 1023 } 1024 DELAY(1000); 1025 count--; 1026 } 1027 return 1; 1028 } 1029 1030 int 1031 ncr53c9x_ioctl(struct scsipi_channel *chan, u_long cmd, void *arg, 1032 int flag, struct proc *p) 1033 { 1034 struct ncr53c9x_softc *sc; 1035 int s, error = 0; 1036 1037 sc = device_private(chan->chan_adapter->adapt_dev); 1038 switch (cmd) { 1039 case SCBUSIORESET: 1040 s = splbio(); 1041 simple_lock(&sc->sc_lock); 1042 ncr53c9x_init(sc, 1); 1043 simple_unlock(&sc->sc_lock); 1044 splx(s); 1045 break; 1046 default: 1047 error = ENOTTY; 1048 break; 1049 } 1050 return error; 1051 } 1052 1053 1054 /* 1055 * LOW LEVEL SCSI UTILITIES 1056 */ 1057 1058 /* 1059 * Schedule a scsi operation. This has now been pulled out of the interrupt 1060 * handler so that we may call it from ncr53c9x_scsipi_request and 1061 * ncr53c9x_done. This may save us an unnecessary interrupt just to get 1062 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1063 */ 1064 void 1065 ncr53c9x_sched(struct ncr53c9x_softc *sc) 1066 { 1067 struct ncr53c9x_ecb *ecb; 1068 struct scsipi_periph *periph; 1069 struct ncr53c9x_tinfo *ti; 1070 struct ncr53c9x_linfo *li; 1071 int lun; 1072 int tag; 1073 1074 NCR_TRACE(("[ncr53c9x_sched] ")); 1075 if (sc->sc_state != NCR_IDLE) 1076 panic("%s: not IDLE (state=%d)", __func__, sc->sc_state); 1077 1078 /* 1079 * Find first ecb in ready queue that is for a target/lunit 1080 * combinations that is not busy. 1081 */ 1082 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1083 ecb = TAILQ_NEXT(ecb, chain)) { 1084 periph = ecb->xs->xs_periph; 1085 ti = &sc->sc_tinfo[periph->periph_target]; 1086 lun = periph->periph_lun; 1087 1088 /* Select type of tag for this command */ 1089 if ((ti->flags & T_RSELECTOFF) != 0) 1090 tag = 0; 1091 else if ((ti->flags & T_TAG) == 0) 1092 tag = 0; 1093 else if ((ecb->flags & ECB_SENSE) != 0) 1094 tag = 0; 1095 else 1096 tag = ecb->xs->xs_tag_type; 1097 #if 0 1098 /* XXXX Use tags for polled commands? */ 1099 if (ecb->xs->xs_control & XS_CTL_POLL) 1100 tag = 0; 1101 #endif 1102 1103 li = TINFO_LUN(ti, lun); 1104 if (li == NULL) { 1105 /* Initialize LUN info and add to list. */ 1106 li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT|M_ZERO); 1107 if (li == NULL) { 1108 continue; 1109 } 1110 li->lun = lun; 1111 1112 LIST_INSERT_HEAD(&ti->luns, li, link); 1113 if (lun < NCR_NLUN) 1114 ti->lun[lun] = li; 1115 } 1116 li->last_used = time_second; 1117 if (tag == 0) { 1118 /* Try to issue this as an un-tagged command */ 1119 if (li->untagged == NULL) 1120 li->untagged = ecb; 1121 } 1122 if (li->untagged != NULL) { 1123 tag = 0; 1124 if ((li->busy != 1) && li->used == 0) { 1125 /* We need to issue this untagged command now */ 1126 ecb = li->untagged; 1127 periph = ecb->xs->xs_periph; 1128 } else { 1129 /* Not ready yet */ 1130 continue; 1131 } 1132 } 1133 ecb->tag[0] = tag; 1134 if (tag != 0) { 1135 li->queued[ecb->xs->xs_tag_id] = ecb; 1136 ecb->tag[1] = ecb->xs->xs_tag_id; 1137 li->used++; 1138 } 1139 if (li->untagged != NULL && (li->busy != 1)) { 1140 li->busy = 1; 1141 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1142 ecb->flags &= ~ECB_READY; 1143 sc->sc_nexus = ecb; 1144 ncr53c9x_select(sc, ecb); 1145 break; 1146 } 1147 if (li->untagged == NULL && tag != 0) { 1148 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1149 ecb->flags &= ~ECB_READY; 1150 sc->sc_nexus = ecb; 1151 ncr53c9x_select(sc, ecb); 1152 break; 1153 } else { 1154 NCR_TRACE(("%d:%d busy\n", 1155 periph->periph_target, 1156 periph->periph_lun)); 1157 } 1158 } 1159 } 1160 1161 void 1162 ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1163 { 1164 struct scsipi_xfer *xs = ecb->xs; 1165 struct scsipi_periph *periph = xs->xs_periph; 1166 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1167 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd; 1168 struct ncr53c9x_linfo *li; 1169 int lun = periph->periph_lun; 1170 1171 NCR_TRACE(("requesting sense ")); 1172 /* Next, setup a request sense command block */ 1173 memset(ss, 0, sizeof(*ss)); 1174 ss->opcode = SCSI_REQUEST_SENSE; 1175 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1176 ss->length = sizeof(struct scsi_sense_data); 1177 ecb->clen = sizeof(*ss); 1178 ecb->daddr = (uint8_t *)&xs->sense.scsi_sense; 1179 ecb->dleft = sizeof(struct scsi_sense_data); 1180 ecb->flags |= ECB_SENSE; 1181 ecb->timeout = NCR_SENSE_TIMEOUT; 1182 ti->senses++; 1183 li = TINFO_LUN(ti, lun); 1184 if (li->busy) 1185 li->busy = 0; 1186 ncr53c9x_dequeue(sc, ecb); 1187 li->untagged = ecb; /* must be executed first to fix C/A */ 1188 li->busy = 2; 1189 if (ecb == sc->sc_nexus) { 1190 ncr53c9x_select(sc, ecb); 1191 } else { 1192 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1193 ecb->flags |= ECB_READY; 1194 if (sc->sc_state == NCR_IDLE) 1195 ncr53c9x_sched(sc); 1196 } 1197 } 1198 1199 /* 1200 * POST PROCESSING OF SCSI_CMD (usually current) 1201 */ 1202 void 1203 ncr53c9x_done(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1204 { 1205 struct scsipi_xfer *xs = ecb->xs; 1206 struct scsipi_periph *periph = xs->xs_periph; 1207 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1208 int lun = periph->periph_lun; 1209 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1210 1211 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1212 1213 if ((xs->xs_control & XS_CTL_POLL) == 0) 1214 callout_stop(&xs->xs_callout); 1215 1216 /* 1217 * Now, if we've come here with no error code, i.e. we've kept the 1218 * initial XS_NOERROR, and the status code signals that we should 1219 * check sense, we'll need to set up a request sense cmd block and 1220 * push the command back into the ready queue *before* any other 1221 * commands for this target/lunit, else we lose the sense info. 1222 * We don't support chk sense conditions for the request sense cmd. 1223 */ 1224 if (xs->error == XS_NOERROR) { 1225 xs->status = ecb->stat; 1226 if ((ecb->flags & ECB_ABORT) != 0) { 1227 xs->error = XS_TIMEOUT; 1228 } else if ((ecb->flags & ECB_SENSE) != 0) { 1229 xs->error = XS_SENSE; 1230 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1231 /* First, save the return values */ 1232 xs->resid = ecb->dleft; 1233 ncr53c9x_sense(sc, ecb); 1234 return; 1235 } else { 1236 xs->resid = ecb->dleft; 1237 } 1238 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1239 xs->error = XS_BUSY; 1240 } 1241 1242 #ifdef NCR53C9X_DEBUG 1243 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1244 if (xs->resid != 0) 1245 printf("resid=%d ", xs->resid); 1246 if (xs->error == XS_SENSE) 1247 printf("sense=0x%02x\n", 1248 xs->sense.scsi_sense.response_code); 1249 else 1250 printf("error=%d\n", xs->error); 1251 } 1252 #endif 1253 1254 /* 1255 * Remove the ECB from whatever queue it's on. 1256 */ 1257 ncr53c9x_dequeue(sc, ecb); 1258 if (ecb == sc->sc_nexus) { 1259 sc->sc_nexus = NULL; 1260 if (sc->sc_state != NCR_CLEANING) { 1261 sc->sc_state = NCR_IDLE; 1262 ncr53c9x_sched(sc); 1263 } 1264 } 1265 1266 if (xs->error == XS_SELTIMEOUT) { 1267 /* Selection timeout -- discard this LUN if empty */ 1268 if (li->untagged == NULL && li->used == 0) { 1269 if (lun < NCR_NLUN) 1270 ti->lun[lun] = NULL; 1271 LIST_REMOVE(li, link); 1272 free(li, M_DEVBUF); 1273 } 1274 } 1275 1276 ncr53c9x_free_ecb(sc, ecb); 1277 ti->cmds++; 1278 simple_unlock(&sc->sc_lock); 1279 scsipi_done(xs); 1280 simple_lock(&sc->sc_lock); 1281 } 1282 1283 void 1284 ncr53c9x_dequeue(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1285 { 1286 struct ncr53c9x_tinfo *ti = 1287 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1288 struct ncr53c9x_linfo *li; 1289 int64_t lun = ecb->xs->xs_periph->periph_lun; 1290 1291 li = TINFO_LUN(ti, lun); 1292 #ifdef DIAGNOSTIC 1293 if (li == NULL || li->lun != lun) 1294 panic("%s: lun %" PRIx64 " for ecb %p does not exist", 1295 __func__, lun, ecb); 1296 #endif 1297 if (li->untagged == ecb) { 1298 li->busy = 0; 1299 li->untagged = NULL; 1300 } 1301 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1302 #ifdef DIAGNOSTIC 1303 if (li->queued[ecb->tag[1]] != NULL && 1304 (li->queued[ecb->tag[1]] != ecb)) 1305 panic("%s: slot %d for lun %" PRIx64 " has %p " 1306 "instead of ecb %p\n", __func__, ecb->tag[1], 1307 lun, 1308 li->queued[ecb->tag[1]], ecb); 1309 #endif 1310 li->queued[ecb->tag[1]] = NULL; 1311 li->used--; 1312 } 1313 1314 if ((ecb->flags & ECB_READY) != 0) { 1315 ecb->flags &= ~ECB_READY; 1316 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1317 } 1318 } 1319 1320 /* 1321 * INTERRUPT/PROTOCOL ENGINE 1322 */ 1323 1324 /* 1325 * Schedule an outgoing message by prioritizing it, and asserting 1326 * attention on the bus. We can only do this when we are the initiator 1327 * else there will be an illegal command interrupt. 1328 */ 1329 #define ncr53c9x_sched_msgout(m) \ 1330 do { \ 1331 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1332 NCRCMD(sc, NCRCMD_SETATN); \ 1333 sc->sc_flags |= NCR_ATN; \ 1334 sc->sc_msgpriq |= (m); \ 1335 } while (/* CONSTCOND */0) 1336 1337 static void 1338 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1339 { 1340 1341 NCR_TRACE(("[flushfifo] ")); 1342 1343 NCRCMD(sc, NCRCMD_FLUSH); 1344 1345 if (sc->sc_phase == COMMAND_PHASE || 1346 sc->sc_phase == MESSAGE_OUT_PHASE) 1347 DELAY(2); 1348 } 1349 1350 static int 1351 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1352 { 1353 int i, n; 1354 uint8_t *ibuf; 1355 1356 switch (how) { 1357 case NCR_RDFIFO_START: 1358 ibuf = sc->sc_imess; 1359 sc->sc_imlen = 0; 1360 break; 1361 case NCR_RDFIFO_CONTINUE: 1362 ibuf = sc->sc_imess + sc->sc_imlen; 1363 break; 1364 default: 1365 panic("%s: bad flag", __func__); 1366 break; 1367 } 1368 1369 /* 1370 * XXX buffer (sc_imess) size for message 1371 */ 1372 1373 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1374 1375 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1376 n *= 2; 1377 1378 for (i = 0; i < n; i++) 1379 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1380 1381 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1382 1383 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1384 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1385 1386 NCR_READ_REG(sc, NCR_FIFO); 1387 1388 ncr53c9x_flushfifo(sc); 1389 } 1390 } else { 1391 for (i = 0; i < n; i++) 1392 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1393 } 1394 1395 sc->sc_imlen += i; 1396 1397 #if 0 1398 #ifdef NCR53C9X_DEBUG 1399 { 1400 int j; 1401 1402 NCR_TRACE(("\n[rdfifo %s (%d):", 1403 (how == NCR_RDFIFO_START) ? "start" : "cont", 1404 (int)sc->sc_imlen)); 1405 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1406 for (j = 0; j < sc->sc_imlen; j++) 1407 printf(" %02x", sc->sc_imess[j]); 1408 printf("]\n"); 1409 } 1410 } 1411 #endif 1412 #endif 1413 return sc->sc_imlen; 1414 } 1415 1416 static void 1417 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, uint8_t *p, int len) 1418 { 1419 int i; 1420 1421 #ifdef NCR53C9X_DEBUG 1422 NCR_MSGS(("[wrfifo(%d):", len)); 1423 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1424 for (i = 0; i < len; i++) 1425 printf(" %02x", p[i]); 1426 printf("]\n"); 1427 } 1428 #endif 1429 1430 for (i = 0; i < len; i++) { 1431 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1432 1433 if (sc->sc_rev == NCR_VARIANT_FAS366) 1434 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1435 } 1436 } 1437 1438 int 1439 ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype, 1440 int tagid) 1441 { 1442 uint8_t selid, target, lun; 1443 struct ncr53c9x_ecb *ecb = NULL; 1444 struct ncr53c9x_tinfo *ti; 1445 struct ncr53c9x_linfo *li; 1446 1447 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1448 target = sc->sc_selid; 1449 } else { 1450 /* 1451 * The SCSI chip made a snapshot of the data bus 1452 * while the reselection was being negotiated. 1453 * This enables us to determine which target did 1454 * the reselect. 1455 */ 1456 selid = sc->sc_selid & ~(1 << sc->sc_id); 1457 if (selid & (selid - 1)) { 1458 printf("%s: reselect with invalid selid %02x;" 1459 " sending DEVICE RESET\n", 1460 device_xname(sc->sc_dev), selid); 1461 goto reset; 1462 } 1463 1464 target = ffs(selid) - 1; 1465 } 1466 lun = message & 0x07; 1467 1468 /* 1469 * Search wait queue for disconnected cmd 1470 * The list should be short, so I haven't bothered with 1471 * any more sophisticated structures than a simple 1472 * singly linked list. 1473 */ 1474 ti = &sc->sc_tinfo[target]; 1475 li = TINFO_LUN(ti, lun); 1476 1477 /* 1478 * We can get as far as the LUN with the IDENTIFY 1479 * message. Check to see if we're running an 1480 * un-tagged command. Otherwise ack the IDENTIFY 1481 * and wait for a tag message. 1482 */ 1483 if (li != NULL) { 1484 if (li->untagged != NULL && li->busy) 1485 ecb = li->untagged; 1486 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1487 /* Wait for tag to come by */ 1488 sc->sc_state = NCR_IDENTIFIED; 1489 return 0; 1490 } else if (tagtype) 1491 ecb = li->queued[tagid]; 1492 } 1493 if (ecb == NULL) { 1494 printf("%s: reselect from target %d lun %d tag %x:%x " 1495 "with no nexus; sending ABORT\n", 1496 device_xname(sc->sc_dev), target, lun, tagtype, tagid); 1497 goto abort; 1498 } 1499 1500 /* Make this nexus active again. */ 1501 sc->sc_state = NCR_CONNECTED; 1502 sc->sc_nexus = ecb; 1503 ncr53c9x_setsync(sc, ti); 1504 1505 if (ecb->flags & ECB_RESET) 1506 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1507 else if (ecb->flags & ECB_ABORT) 1508 ncr53c9x_sched_msgout(SEND_ABORT); 1509 1510 /* Do an implicit RESTORE POINTERS. */ 1511 sc->sc_dp = ecb->daddr; 1512 sc->sc_dleft = ecb->dleft; 1513 1514 return 0; 1515 1516 reset: 1517 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1518 return 1; 1519 1520 abort: 1521 ncr53c9x_sched_msgout(SEND_ABORT); 1522 return 1; 1523 } 1524 1525 static inline int 1526 __verify_msg_format(uint8_t *p, int len) 1527 { 1528 1529 if (len == 1 && MSG_IS1BYTE(p[0])) 1530 return 1; 1531 if (len == 2 && MSG_IS2BYTE(p[0])) 1532 return 1; 1533 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1534 len == p[1] + 2) 1535 return 1; 1536 1537 return 0; 1538 } 1539 1540 /* 1541 * Get an incoming message as initiator. 1542 * 1543 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1544 * byte in the FIFO 1545 */ 1546 void 1547 ncr53c9x_msgin(struct ncr53c9x_softc *sc) 1548 { 1549 1550 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1551 1552 if (sc->sc_imlen == 0) { 1553 printf("%s: msgin: no msg byte available\n", 1554 device_xname(sc->sc_dev)); 1555 return; 1556 } 1557 1558 /* 1559 * Prepare for a new message. A message should (according 1560 * to the SCSI standard) be transmitted in one single 1561 * MESSAGE_IN_PHASE. If we have been in some other phase, 1562 * then this is a new message. 1563 */ 1564 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1565 sc->sc_state != NCR_RESELECTED) { 1566 printf("%s: phase change, dropping message, " 1567 "prev %d, state %d\n", 1568 device_xname(sc->sc_dev), sc->sc_prevphase, sc->sc_state); 1569 sc->sc_flags &= ~NCR_DROP_MSGI; 1570 sc->sc_imlen = 0; 1571 } 1572 1573 /* 1574 * If we're going to reject the message, don't bother storing 1575 * the incoming bytes. But still, we need to ACK them. 1576 */ 1577 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1578 NCRCMD(sc, NCRCMD_MSGOK); 1579 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1580 return; 1581 } 1582 1583 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1584 ncr53c9x_sched_msgout(SEND_REJECT); 1585 sc->sc_flags |= NCR_DROP_MSGI; 1586 } else { 1587 uint8_t *pb; 1588 int plen; 1589 1590 switch (sc->sc_state) { 1591 /* 1592 * if received message is the first of reselection 1593 * then first byte is selid, and then message 1594 */ 1595 case NCR_RESELECTED: 1596 pb = sc->sc_imess + 1; 1597 plen = sc->sc_imlen - 1; 1598 break; 1599 default: 1600 pb = sc->sc_imess; 1601 plen = sc->sc_imlen; 1602 break; 1603 } 1604 1605 if (__verify_msg_format(pb, plen)) 1606 goto gotit; 1607 } 1608 1609 /* Ack what we have so far */ 1610 NCRCMD(sc, NCRCMD_MSGOK); 1611 return; 1612 1613 gotit: 1614 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1615 /* we got complete message, flush the imess, */ 1616 /* XXX nobody uses imlen below */ 1617 sc->sc_imlen = 0; 1618 /* 1619 * Now we should have a complete message (1 byte, 2 byte 1620 * and moderately long extended messages). We only handle 1621 * extended messages which total length is shorter than 1622 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1623 */ 1624 switch (sc->sc_state) { 1625 struct ncr53c9x_ecb *ecb; 1626 struct ncr53c9x_tinfo *ti; 1627 struct ncr53c9x_linfo *li; 1628 int lun; 1629 1630 case NCR_CONNECTED: 1631 ecb = sc->sc_nexus; 1632 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1633 1634 switch (sc->sc_imess[0]) { 1635 case MSG_CMDCOMPLETE: 1636 NCR_MSGS(("cmdcomplete ")); 1637 if (sc->sc_dleft < 0) { 1638 scsipi_printaddr(ecb->xs->xs_periph); 1639 printf("%s: got %ld extra bytes\n", 1640 device_xname(sc->sc_dev), 1641 -(long)sc->sc_dleft); 1642 sc->sc_dleft = 0; 1643 } 1644 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1645 0 : sc->sc_dleft; 1646 if ((ecb->flags & ECB_SENSE) == 0) 1647 ecb->xs->resid = ecb->dleft; 1648 sc->sc_state = NCR_CMDCOMPLETE; 1649 break; 1650 1651 case MSG_MESSAGE_REJECT: 1652 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1653 switch (sc->sc_msgout) { 1654 case SEND_TAG: 1655 /* 1656 * Target does not like tagged queuing. 1657 * - Flush the command queue 1658 * - Disable tagged queuing for the target 1659 * - Dequeue ecb from the queued array. 1660 */ 1661 printf("%s: tagged queuing rejected: " 1662 "target %d\n", 1663 device_xname(sc->sc_dev), 1664 ecb->xs->xs_periph->periph_target); 1665 1666 NCR_MSGS(("(rejected sent tag)")); 1667 NCRCMD(sc, NCRCMD_FLUSH); 1668 DELAY(1); 1669 ti->flags &= ~T_TAG; 1670 lun = ecb->xs->xs_periph->periph_lun; 1671 li = TINFO_LUN(ti, lun); 1672 if (ecb->tag[0] && 1673 li->queued[ecb->tag[1]] != NULL) { 1674 li->queued[ecb->tag[1]] = NULL; 1675 li->used--; 1676 } 1677 ecb->tag[0] = ecb->tag[1] = 0; 1678 li->untagged = ecb; 1679 li->busy = 1; 1680 break; 1681 1682 case SEND_SDTR: 1683 printf("%s: sync transfer rejected: " 1684 "target %d\n", 1685 device_xname(sc->sc_dev), 1686 ecb->xs->xs_periph->periph_target); 1687 1688 sc->sc_flags &= ~NCR_SYNCHNEGO; 1689 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1690 ncr53c9x_setsync(sc, ti); 1691 ncr53c9x_update_xfer_mode(sc, 1692 ecb->xs->xs_periph->periph_target); 1693 break; 1694 1695 case SEND_WDTR: 1696 printf("%s: wide transfer rejected: " 1697 "target %d\n", 1698 device_xname(sc->sc_dev), 1699 ecb->xs->xs_periph->periph_target); 1700 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1701 ti->width = 0; 1702 break; 1703 1704 case SEND_INIT_DET_ERR: 1705 goto abort; 1706 } 1707 break; 1708 1709 case MSG_NOOP: 1710 NCR_MSGS(("noop ")); 1711 break; 1712 1713 case MSG_HEAD_OF_Q_TAG: 1714 case MSG_SIMPLE_Q_TAG: 1715 case MSG_ORDERED_Q_TAG: 1716 NCR_MSGS(("TAG %x:%x", 1717 sc->sc_imess[0], sc->sc_imess[1])); 1718 break; 1719 1720 case MSG_DISCONNECT: 1721 NCR_MSGS(("disconnect ")); 1722 ti->dconns++; 1723 sc->sc_state = NCR_DISCONNECT; 1724 1725 /* 1726 * Mark the fact that all bytes have moved. The 1727 * target may not bother to do a SAVE POINTERS 1728 * at this stage. This flag will set the residual 1729 * count to zero on MSG COMPLETE. 1730 */ 1731 if (sc->sc_dleft == 0) 1732 ecb->flags |= ECB_TENTATIVE_DONE; 1733 1734 break; 1735 1736 case MSG_SAVEDATAPOINTER: 1737 NCR_MSGS(("save datapointer ")); 1738 ecb->daddr = sc->sc_dp; 1739 ecb->dleft = sc->sc_dleft; 1740 break; 1741 1742 case MSG_RESTOREPOINTERS: 1743 NCR_MSGS(("restore datapointer ")); 1744 sc->sc_dp = ecb->daddr; 1745 sc->sc_dleft = ecb->dleft; 1746 break; 1747 1748 case MSG_EXTENDED: 1749 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1750 switch (sc->sc_imess[2]) { 1751 case MSG_EXT_SDTR: 1752 NCR_MSGS(("SDTR period %d, offset %d ", 1753 sc->sc_imess[3], sc->sc_imess[4])); 1754 if (sc->sc_imess[1] != 3) 1755 goto reject; 1756 ti->period = sc->sc_imess[3]; 1757 ti->offset = sc->sc_imess[4]; 1758 ti->flags &= ~T_NEGOTIATE; 1759 if (sc->sc_minsync == 0 || 1760 ti->offset == 0 || 1761 ti->period > 124) { 1762 #if 0 1763 #ifdef NCR53C9X_DEBUG 1764 scsipi_printaddr(ecb->xs->xs_periph); 1765 printf("async mode\n"); 1766 #endif 1767 #endif 1768 ti->flags &= ~T_SYNCMODE; 1769 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1770 /* 1771 * target initiated negotiation 1772 */ 1773 ti->offset = 0; 1774 ncr53c9x_sched_msgout( 1775 SEND_SDTR); 1776 } 1777 } else { 1778 int p; 1779 1780 p = ncr53c9x_stp2cpb(sc, ti->period); 1781 ti->period = ncr53c9x_cpb2stp(sc, p); 1782 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1783 /* 1784 * target initiated negotiation 1785 */ 1786 if (ti->period < 1787 sc->sc_minsync) 1788 ti->period = 1789 sc->sc_minsync; 1790 if (ti->offset > 15) 1791 ti->offset = 15; 1792 ti->flags &= ~T_SYNCMODE; 1793 ncr53c9x_sched_msgout( 1794 SEND_SDTR); 1795 } else { 1796 /* we are sync */ 1797 ti->flags |= T_SYNCMODE; 1798 } 1799 } 1800 ncr53c9x_update_xfer_mode(sc, 1801 ecb->xs->xs_periph->periph_target); 1802 sc->sc_flags &= ~NCR_SYNCHNEGO; 1803 ncr53c9x_setsync(sc, ti); 1804 break; 1805 1806 case MSG_EXT_WDTR: 1807 #ifdef NCR53C9X_DEBUG 1808 printf("%s: wide mode %d\n", 1809 device_xname(sc->sc_dev), sc->sc_imess[3]); 1810 #endif 1811 if (sc->sc_imess[3] == 1) { 1812 ti->cfg3 |= NCRFASCFG3_EWIDE; 1813 ncr53c9x_setsync(sc, ti); 1814 } else 1815 ti->width = 0; 1816 /* 1817 * Device started width negotiation. 1818 */ 1819 if ((ti->flags & T_WDTRSENT) == 0) 1820 ncr53c9x_sched_msgout(SEND_WDTR); 1821 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1822 break; 1823 default: 1824 scsipi_printaddr(ecb->xs->xs_periph); 1825 printf("%s: unrecognized MESSAGE EXTENDED;" 1826 " sending REJECT\n", 1827 device_xname(sc->sc_dev)); 1828 goto reject; 1829 } 1830 break; 1831 1832 default: 1833 NCR_MSGS(("ident ")); 1834 scsipi_printaddr(ecb->xs->xs_periph); 1835 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1836 device_xname(sc->sc_dev)); 1837 reject: 1838 ncr53c9x_sched_msgout(SEND_REJECT); 1839 break; 1840 } 1841 break; 1842 1843 case NCR_IDENTIFIED: 1844 /* 1845 * IDENTIFY message was received and queue tag is expected now 1846 */ 1847 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1848 (sc->sc_msgify == 0)) { 1849 printf("%s: TAG reselect without IDENTIFY;" 1850 " MSG %x;" 1851 " sending DEVICE RESET\n", 1852 device_xname(sc->sc_dev), 1853 sc->sc_imess[0]); 1854 goto reset; 1855 } 1856 (void)ncr53c9x_reselect(sc, sc->sc_msgify, 1857 sc->sc_imess[0], sc->sc_imess[1]); 1858 break; 1859 1860 case NCR_RESELECTED: 1861 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1862 sc->sc_msgify = sc->sc_imess[1]; 1863 } else { 1864 printf("%s: reselect without IDENTIFY;" 1865 " MSG %x;" 1866 " sending DEVICE RESET\n", 1867 device_xname(sc->sc_dev), 1868 sc->sc_imess[1]); 1869 goto reset; 1870 } 1871 (void)ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1872 break; 1873 1874 default: 1875 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1876 device_xname(sc->sc_dev)); 1877 reset: 1878 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1879 break; 1880 1881 abort: 1882 ncr53c9x_sched_msgout(SEND_ABORT); 1883 break; 1884 } 1885 1886 /* if we have more messages to send set ATN */ 1887 if (sc->sc_msgpriq) 1888 NCRCMD(sc, NCRCMD_SETATN); 1889 1890 /* Ack last message byte */ 1891 NCRCMD(sc, NCRCMD_MSGOK); 1892 1893 /* Done, reset message pointer. */ 1894 sc->sc_flags &= ~NCR_DROP_MSGI; 1895 sc->sc_imlen = 0; 1896 } 1897 1898 1899 /* 1900 * Send the highest priority, scheduled message 1901 */ 1902 void 1903 ncr53c9x_msgout(struct ncr53c9x_softc *sc) 1904 { 1905 struct ncr53c9x_tinfo *ti; 1906 struct ncr53c9x_ecb *ecb; 1907 size_t size; 1908 1909 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1910 sc->sc_msgpriq, sc->sc_prevphase)); 1911 1912 /* 1913 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1914 * condition on the SCSI bus. The 53c9x chip 1915 * automatically turns off ATN before sending the 1916 * message byte. (see also the comment below in the 1917 * default case when picking out a message to send) 1918 */ 1919 if (sc->sc_flags & NCR_ATN) { 1920 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1921 new: 1922 NCRCMD(sc, NCRCMD_FLUSH); 1923 #if 0 1924 DELAY(1); 1925 #endif 1926 sc->sc_msgoutq = 0; 1927 sc->sc_omlen = 0; 1928 } 1929 } else { 1930 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1931 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1932 goto new; 1933 } else { 1934 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1935 device_xname(sc->sc_dev), __LINE__); 1936 } 1937 } 1938 1939 if (sc->sc_omlen == 0) { 1940 /* Pick up highest priority message */ 1941 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1942 sc->sc_msgoutq |= sc->sc_msgout; 1943 sc->sc_msgpriq &= ~sc->sc_msgout; 1944 sc->sc_omlen = 1; /* "Default" message len */ 1945 switch (sc->sc_msgout) { 1946 case SEND_SDTR: 1947 ecb = sc->sc_nexus; 1948 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1949 sc->sc_omess[0] = MSG_EXTENDED; 1950 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1951 sc->sc_omess[2] = MSG_EXT_SDTR; 1952 sc->sc_omess[3] = ti->period; 1953 sc->sc_omess[4] = ti->offset; 1954 sc->sc_omlen = 5; 1955 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1956 ti->flags |= T_SYNCMODE; 1957 ncr53c9x_setsync(sc, ti); 1958 } 1959 break; 1960 case SEND_WDTR: 1961 ecb = sc->sc_nexus; 1962 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1963 sc->sc_omess[0] = MSG_EXTENDED; 1964 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1965 sc->sc_omess[2] = MSG_EXT_WDTR; 1966 sc->sc_omess[3] = ti->width; 1967 sc->sc_omlen = 4; 1968 break; 1969 case SEND_IDENTIFY: 1970 if (sc->sc_state != NCR_CONNECTED) { 1971 printf("%s at line %d: no nexus\n", 1972 device_xname(sc->sc_dev), __LINE__); 1973 } 1974 ecb = sc->sc_nexus; 1975 sc->sc_omess[0] = 1976 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1977 break; 1978 case SEND_TAG: 1979 if (sc->sc_state != NCR_CONNECTED) { 1980 printf("%s at line %d: no nexus\n", 1981 device_xname(sc->sc_dev), __LINE__); 1982 } 1983 ecb = sc->sc_nexus; 1984 sc->sc_omess[0] = ecb->tag[0]; 1985 sc->sc_omess[1] = ecb->tag[1]; 1986 sc->sc_omlen = 2; 1987 break; 1988 case SEND_DEV_RESET: 1989 sc->sc_flags |= NCR_ABORTING; 1990 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1991 ecb = sc->sc_nexus; 1992 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1993 ti->flags &= ~T_SYNCMODE; 1994 ncr53c9x_update_xfer_mode(sc, 1995 ecb->xs->xs_periph->periph_target); 1996 if ((ti->flags & T_SYNCHOFF) == 0) 1997 /* We can re-start sync negotiation */ 1998 ti->flags |= T_NEGOTIATE; 1999 break; 2000 case SEND_PARITY_ERROR: 2001 sc->sc_omess[0] = MSG_PARITY_ERROR; 2002 break; 2003 case SEND_ABORT: 2004 sc->sc_flags |= NCR_ABORTING; 2005 sc->sc_omess[0] = MSG_ABORT; 2006 break; 2007 case SEND_INIT_DET_ERR: 2008 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 2009 break; 2010 case SEND_REJECT: 2011 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 2012 break; 2013 default: 2014 /* 2015 * We normally do not get here, since the chip 2016 * automatically turns off ATN before the last 2017 * byte of a message is sent to the target. 2018 * However, if the target rejects our (multi-byte) 2019 * message early by switching to MSG IN phase 2020 * ATN remains on, so the target may return to 2021 * MSG OUT phase. If there are no scheduled messages 2022 * left we send a NO-OP. 2023 * 2024 * XXX - Note that this leaves no useful purpose for 2025 * the NCR_ATN flag. 2026 */ 2027 sc->sc_flags &= ~NCR_ATN; 2028 sc->sc_omess[0] = MSG_NOOP; 2029 break; 2030 } 2031 sc->sc_omp = sc->sc_omess; 2032 } 2033 2034 #ifdef DEBUG 2035 if (ncr53c9x_debug & NCR_SHOWMSGS) { 2036 int i; 2037 2038 NCR_MSGS(("<msgout:")); 2039 for (i = 0; i < sc->sc_omlen; i++) 2040 NCR_MSGS((" %02x", sc->sc_omess[i])); 2041 NCR_MSGS(("> ")); 2042 } 2043 #endif 2044 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2045 /* 2046 * XXX fifo size 2047 */ 2048 ncr53c9x_flushfifo(sc); 2049 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2050 NCRCMD(sc, NCRCMD_TRANS); 2051 } else { 2052 /* (re)send the message */ 2053 size = min(sc->sc_omlen, sc->sc_maxxfer); 2054 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2055 /* Program the SCSI counter */ 2056 NCR_SET_COUNT(sc, size); 2057 2058 /* Load the count in and start the message-out transfer */ 2059 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 2060 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2061 NCRDMA_GO(sc); 2062 } 2063 } 2064 2065 /* 2066 * This is the most critical part of the driver, and has to know 2067 * how to deal with *all* error conditions and phases from the SCSI 2068 * bus. If there are no errors and the DMA was active, then call the 2069 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2070 * and we can return from here without further processing. 2071 * 2072 * Most of this needs verifying. 2073 */ 2074 int 2075 ncr53c9x_intr(void *arg) 2076 { 2077 struct ncr53c9x_softc *sc = arg; 2078 struct ncr53c9x_ecb *ecb; 2079 struct scsipi_periph *periph; 2080 struct ncr53c9x_tinfo *ti; 2081 size_t size; 2082 int nfifo; 2083 2084 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2085 2086 if (!NCRDMA_ISINTR(sc)) 2087 return 0; 2088 2089 simple_lock(&sc->sc_lock); 2090 again: 2091 /* and what do the registers say... */ 2092 ncr53c9x_readregs(sc); 2093 2094 sc->sc_intrcnt.ev_count++; 2095 2096 /* 2097 * At the moment, only a SCSI Bus Reset or Illegal 2098 * Command are classed as errors. A disconnect is a 2099 * valid condition, and we let the code check is the 2100 * "NCR_BUSFREE_OK" flag was set before declaring it 2101 * and error. 2102 * 2103 * Also, the status register tells us about "Gross 2104 * Errors" and "Parity errors". Only the Gross Error 2105 * is really bad, and the parity errors are dealt 2106 * with later 2107 * 2108 * TODO 2109 * If there are too many parity error, go to slow 2110 * cable mode ? 2111 */ 2112 2113 /* SCSI Reset */ 2114 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2115 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2116 NCRCMD(sc, NCRCMD_FLUSH); 2117 DELAY(1); 2118 } 2119 if (sc->sc_state != NCR_SBR) { 2120 printf("%s: SCSI bus reset\n", 2121 device_xname(sc->sc_dev)); 2122 ncr53c9x_init(sc, 0); /* Restart everything */ 2123 goto out; 2124 } 2125 #if 0 2126 /*XXX*/ printf("<expected bus reset: " 2127 "[intr %x, stat %x, step %d]>\n", 2128 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2129 #endif 2130 if (sc->sc_nexus != NULL) 2131 panic("%s: nexus in reset state", 2132 device_xname(sc->sc_dev)); 2133 goto sched; 2134 } 2135 2136 ecb = sc->sc_nexus; 2137 2138 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2139 if (sc->sc_espintr & NCRINTR_ERR || 2140 sc->sc_espstat & NCRSTAT_GE) { 2141 2142 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2143 /* Gross Error; no target ? */ 2144 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2145 NCRCMD(sc, NCRCMD_FLUSH); 2146 DELAY(1); 2147 } 2148 if (sc->sc_state == NCR_CONNECTED || 2149 sc->sc_state == NCR_SELECTING) { 2150 ecb->xs->error = XS_TIMEOUT; 2151 ncr53c9x_done(sc, ecb); 2152 } 2153 goto out; 2154 } 2155 2156 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2157 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2158 /* 2159 * Eat away "Illegal command" interrupt 2160 * on a ESP100 caused by a re-selection 2161 * while we were trying to select 2162 * another target. 2163 */ 2164 #ifdef NCR53C9X_DEBUG 2165 printf("%s: ESP100 work-around activated\n", 2166 device_xname(sc->sc_dev)); 2167 #endif 2168 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2169 goto out; 2170 } 2171 /* illegal command, out of sync ? */ 2172 printf("%s: illegal command: 0x%x " 2173 "(state %d, phase %x, prevphase %x)\n", 2174 device_xname(sc->sc_dev), sc->sc_lastcmd, 2175 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2176 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2177 NCRCMD(sc, NCRCMD_FLUSH); 2178 DELAY(1); 2179 } 2180 ncr53c9x_init(sc, 1); /* Restart everything */ 2181 goto out; 2182 } 2183 } 2184 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2185 2186 /* 2187 * Call if DMA is active. 2188 * 2189 * If DMA_INTR returns true, then maybe go 'round the loop 2190 * again in case there is no more DMA queued, but a phase 2191 * change is expected. 2192 */ 2193 if (NCRDMA_ISACTIVE(sc)) { 2194 int r = NCRDMA_INTR(sc); 2195 if (r == -1) { 2196 printf("%s: DMA error; resetting\n", 2197 device_xname(sc->sc_dev)); 2198 ncr53c9x_init(sc, 1); 2199 goto out; 2200 } 2201 /* If DMA active here, then go back to work... */ 2202 if (NCRDMA_ISACTIVE(sc)) 2203 goto out; 2204 2205 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2206 /* 2207 * DMA not completed. If we can not find a 2208 * acceptable explanation, print a diagnostic. 2209 */ 2210 if (sc->sc_state == NCR_SELECTING) 2211 /* 2212 * This can happen if we are reselected 2213 * while using DMA to select a target. 2214 */ 2215 /*void*/; 2216 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2217 /* 2218 * Our (multi-byte) message (eg SDTR) was 2219 * interrupted by the target to send 2220 * a MSG REJECT. 2221 * Print diagnostic if current phase 2222 * is not MESSAGE IN. 2223 */ 2224 if (sc->sc_phase != MESSAGE_IN_PHASE) 2225 printf("%s: !TC on MSG OUT" 2226 " [intr %x, stat %x, step %d]" 2227 " prevphase %x, resid %lx\n", 2228 device_xname(sc->sc_dev), 2229 sc->sc_espintr, 2230 sc->sc_espstat, 2231 sc->sc_espstep, 2232 sc->sc_prevphase, 2233 (u_long)sc->sc_omlen); 2234 } else if (sc->sc_dleft == 0) { 2235 /* 2236 * The DMA operation was started for 2237 * a DATA transfer. Print a diagnostic 2238 * if the DMA counter and TC bit 2239 * appear to be out of sync. 2240 */ 2241 printf("%s: !TC on DATA XFER" 2242 " [intr %x, stat %x, step %d]" 2243 " prevphase %x, resid %x\n", 2244 device_xname(sc->sc_dev), 2245 sc->sc_espintr, 2246 sc->sc_espstat, 2247 sc->sc_espstep, 2248 sc->sc_prevphase, 2249 ecb ? ecb->dleft : -1); 2250 } 2251 } 2252 } 2253 2254 /* 2255 * Check for less serious errors. 2256 */ 2257 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2258 printf("%s: SCSI bus parity error\n", device_xname(sc->sc_dev)); 2259 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2260 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2261 else 2262 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2263 } 2264 2265 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2266 sc->sc_msgify = 0; 2267 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2268 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2269 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2270 NCRCMD(sc, NCRCMD_FLUSH); 2271 #if 0 2272 DELAY(1); 2273 #endif 2274 } 2275 /* 2276 * This command must (apparently) be issued within 2277 * 250mS of a disconnect. So here you are... 2278 */ 2279 NCRCMD(sc, NCRCMD_ENSEL); 2280 2281 switch (sc->sc_state) { 2282 case NCR_RESELECTED: 2283 goto sched; 2284 2285 case NCR_SELECTING: 2286 { 2287 struct ncr53c9x_linfo *li; 2288 2289 ecb->xs->error = XS_SELTIMEOUT; 2290 2291 /* Selection timeout -- discard all LUNs if empty */ 2292 periph = ecb->xs->xs_periph; 2293 ti = &sc->sc_tinfo[periph->periph_target]; 2294 li = LIST_FIRST(&ti->luns); 2295 while (li != NULL) { 2296 if (li->untagged == NULL && li->used == 0) { 2297 if (li->lun < NCR_NLUN) 2298 ti->lun[li->lun] = NULL; 2299 LIST_REMOVE(li, link); 2300 free(li, M_DEVBUF); 2301 /* 2302 * Restart the search at the beginning 2303 */ 2304 li = LIST_FIRST(&ti->luns); 2305 continue; 2306 } 2307 li = LIST_NEXT(li, link); 2308 } 2309 goto finish; 2310 } 2311 case NCR_CONNECTED: 2312 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2313 #ifdef NCR53C9X_DEBUG 2314 if (ecb != NULL) 2315 scsipi_printaddr(ecb->xs->xs_periph); 2316 printf("sync nego not completed!\n"); 2317 #endif 2318 ti = &sc->sc_tinfo[ 2319 ecb->xs->xs_periph->periph_target]; 2320 sc->sc_flags &= ~NCR_SYNCHNEGO; 2321 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2322 } 2323 2324 /* it may be OK to disconnect */ 2325 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2326 /* 2327 * Section 5.1.1 of the SCSI 2 spec 2328 * suggests issuing a REQUEST SENSE 2329 * following an unexpected disconnect. 2330 * Some devices go into a contingent 2331 * allegiance condition when 2332 * disconnecting, and this is necessary 2333 * to clean up their state. 2334 */ 2335 printf("%s: unexpected disconnect " 2336 "[state %d, intr %x, stat %x, phase(c %x, p %x)]; ", 2337 device_xname(sc->sc_dev), sc->sc_state, 2338 sc->sc_espintr, sc->sc_espstat, 2339 sc->sc_phase, sc->sc_prevphase); 2340 2341 if ((ecb->flags & ECB_SENSE) != 0) { 2342 printf("resetting\n"); 2343 goto reset; 2344 } 2345 printf("sending REQUEST SENSE\n"); 2346 callout_stop(&ecb->xs->xs_callout); 2347 ncr53c9x_sense(sc, ecb); 2348 goto out; 2349 } 2350 2351 ecb->xs->error = XS_TIMEOUT; 2352 goto finish; 2353 2354 case NCR_DISCONNECT: 2355 sc->sc_nexus = NULL; 2356 goto sched; 2357 2358 case NCR_CMDCOMPLETE: 2359 goto finish; 2360 } 2361 } 2362 2363 switch (sc->sc_state) { 2364 2365 case NCR_SBR: 2366 printf("%s: waiting for SCSI Bus Reset to happen\n", 2367 device_xname(sc->sc_dev)); 2368 goto out; 2369 2370 case NCR_RESELECTED: 2371 /* 2372 * we must be continuing a message ? 2373 */ 2374 printf("%s: unhandled reselect continuation, " 2375 "state %d, intr %02x\n", 2376 device_xname(sc->sc_dev), sc->sc_state, sc->sc_espintr); 2377 ncr53c9x_init(sc, 1); 2378 goto out; 2379 2380 case NCR_IDENTIFIED: 2381 ecb = sc->sc_nexus; 2382 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2383 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2384 /* 2385 * Things are seriously screwed up. 2386 * Pull the brakes, i.e. reset 2387 */ 2388 printf("%s: target didn't send tag: %d bytes in fifo\n", 2389 device_xname(sc->sc_dev), i); 2390 /* Drain and display fifo */ 2391 while (i-- > 0) 2392 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2393 2394 ncr53c9x_init(sc, 1); 2395 goto out; 2396 } else 2397 goto msgin; 2398 2399 case NCR_IDLE: 2400 case NCR_SELECTING: 2401 ecb = sc->sc_nexus; 2402 if (sc->sc_espintr & NCRINTR_RESEL) { 2403 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2404 sc->sc_flags = 0; 2405 /* 2406 * If we're trying to select a 2407 * target ourselves, push our command 2408 * back into the ready list. 2409 */ 2410 if (sc->sc_state == NCR_SELECTING) { 2411 NCR_INTS(("backoff selector ")); 2412 callout_stop(&ecb->xs->xs_callout); 2413 ncr53c9x_dequeue(sc, ecb); 2414 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2415 ecb->flags |= ECB_READY; 2416 ecb = sc->sc_nexus = NULL; 2417 } 2418 sc->sc_state = NCR_RESELECTED; 2419 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2420 /* 2421 * Things are seriously screwed up. 2422 * Pull the brakes, i.e. reset 2423 */ 2424 printf("%s: target didn't identify\n", 2425 device_xname(sc->sc_dev)); 2426 ncr53c9x_init(sc, 1); 2427 goto out; 2428 } 2429 /* 2430 * The C90 only inhibits FIFO writes until reselection 2431 * is complete, instead of waiting until the interrupt 2432 * status register has been read. So, if the reselect 2433 * happens while we were entering command bytes (for 2434 * another target) some of those bytes can appear in 2435 * the FIFO here, after the interrupt is taken. 2436 * 2437 * To remedy this situation, pull the Selection ID 2438 * and Identify message from the FIFO directly, and 2439 * ignore any extraneous fifo contents. Also, set 2440 * a flag that allows one Illegal Command Interrupt 2441 * to occur which the chip also generates as a result 2442 * of writing to the FIFO during a reselect. 2443 */ 2444 if (sc->sc_rev == NCR_VARIANT_ESP100) { 2445 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & 2446 NCRFIFO_FF; 2447 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO); 2448 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO); 2449 sc->sc_imlen = 2; 2450 if (nfifo != 2) { 2451 /* Flush the rest */ 2452 NCRCMD(sc, NCRCMD_FLUSH); 2453 } 2454 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2455 if (nfifo > 2) 2456 nfifo = 2; /* We fixed it.. */ 2457 } else 2458 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2459 2460 if (nfifo != 2) { 2461 printf("%s: RESELECT: %d bytes in FIFO! " 2462 "[intr %x, stat %x, step %d, " 2463 "prevphase %x]\n", 2464 device_xname(sc->sc_dev), 2465 nfifo, 2466 sc->sc_espintr, 2467 sc->sc_espstat, 2468 sc->sc_espstep, 2469 sc->sc_prevphase); 2470 ncr53c9x_init(sc, 1); 2471 goto out; 2472 } 2473 sc->sc_selid = sc->sc_imess[0]; 2474 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2475 2476 /* Handle identify message */ 2477 ncr53c9x_msgin(sc); 2478 2479 if (sc->sc_state != NCR_CONNECTED && 2480 sc->sc_state != NCR_IDENTIFIED) { 2481 /* IDENTIFY fail?! */ 2482 printf("%s: identify failed, " 2483 "state %d, intr %02x\n", 2484 device_xname(sc->sc_dev), 2485 sc->sc_state, sc->sc_espintr); 2486 ncr53c9x_init(sc, 1); 2487 goto out; 2488 } 2489 goto shortcut; /* ie. next phase expected soon */ 2490 } 2491 2492 #define NCRINTR_DONE (NCRINTR_FC | NCRINTR_BS) 2493 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2494 /* 2495 * Arbitration won; examine the `step' register 2496 * to determine how far the selection could progress. 2497 */ 2498 ecb = sc->sc_nexus; 2499 if (ecb == NULL) 2500 panic("%s: no nexus", __func__); 2501 2502 periph = ecb->xs->xs_periph; 2503 ti = &sc->sc_tinfo[periph->periph_target]; 2504 2505 switch (sc->sc_espstep) { 2506 case 0: 2507 /* 2508 * The target did not respond with a 2509 * message out phase - probably an old 2510 * device that doesn't recognize ATN. 2511 * Clear ATN and just continue, the 2512 * target should be in the command 2513 * phase. 2514 * XXXX check for command phase? 2515 */ 2516 NCRCMD(sc, NCRCMD_RSTATN); 2517 break; 2518 case 1: 2519 if ((ti->flags & T_NEGOTIATE) == 0 && 2520 ecb->tag[0] == 0) { 2521 printf("%s: step 1 & !NEG\n", 2522 device_xname(sc->sc_dev)); 2523 goto reset; 2524 } 2525 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2526 printf("%s: !MSGOUT\n", 2527 device_xname(sc->sc_dev)); 2528 goto reset; 2529 } 2530 if (ti->flags & T_WIDE) { 2531 ti->flags |= T_WDTRSENT; 2532 ncr53c9x_sched_msgout(SEND_WDTR); 2533 } 2534 if (ti->flags & T_NEGOTIATE) { 2535 /* Start negotiating */ 2536 ti->period = sc->sc_minsync; 2537 ti->offset = 15; 2538 sc->sc_flags |= NCR_SYNCHNEGO; 2539 if (ecb->tag[0]) 2540 ncr53c9x_sched_msgout( 2541 SEND_TAG | SEND_SDTR); 2542 else 2543 ncr53c9x_sched_msgout( 2544 SEND_SDTR); 2545 } else { 2546 /* Could not do ATN3 so send TAG */ 2547 ncr53c9x_sched_msgout(SEND_TAG); 2548 } 2549 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2550 break; 2551 case 3: 2552 /* 2553 * Grr, this is supposed to mean 2554 * "target left command phase prematurely". 2555 * It seems to happen regularly when 2556 * sync mode is on. 2557 * Look at FIFO to see if command went out. 2558 * (Timing problems?) 2559 */ 2560 if (sc->sc_features & NCR_F_DMASELECT) { 2561 if (sc->sc_cmdlen == 0) 2562 /* Hope for the best.. */ 2563 break; 2564 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2565 & NCRFIFO_FF) == 0) { 2566 /* Hope for the best.. */ 2567 break; 2568 } 2569 printf("(%s:%d:%d): selection failed;" 2570 " %d left in FIFO " 2571 "[intr %x, stat %x, step %d]\n", 2572 device_xname(sc->sc_dev), 2573 periph->periph_target, 2574 periph->periph_lun, 2575 NCR_READ_REG(sc, NCR_FFLAG) 2576 & NCRFIFO_FF, 2577 sc->sc_espintr, sc->sc_espstat, 2578 sc->sc_espstep); 2579 NCRCMD(sc, NCRCMD_FLUSH); 2580 ncr53c9x_sched_msgout(SEND_ABORT); 2581 goto out; 2582 case 2: 2583 /* Select stuck at Command Phase */ 2584 NCRCMD(sc, NCRCMD_FLUSH); 2585 break; 2586 case 4: 2587 if (sc->sc_features & NCR_F_DMASELECT && 2588 sc->sc_cmdlen != 0) 2589 printf("(%s:%d:%d): select; " 2590 "%lu left in DMA buffer " 2591 "[intr %x, stat %x, step %d]\n", 2592 device_xname(sc->sc_dev), 2593 periph->periph_target, 2594 periph->periph_lun, 2595 (u_long)sc->sc_cmdlen, 2596 sc->sc_espintr, 2597 sc->sc_espstat, 2598 sc->sc_espstep); 2599 /* So far, everything went fine */ 2600 break; 2601 } 2602 2603 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2604 /* Do an implicit RESTORE POINTERS. */ 2605 sc->sc_dp = ecb->daddr; 2606 sc->sc_dleft = ecb->dleft; 2607 sc->sc_state = NCR_CONNECTED; 2608 break; 2609 2610 } else { 2611 2612 printf("%s: unexpected status after select" 2613 ": [intr %x, stat %x, step %x]\n", 2614 device_xname(sc->sc_dev), 2615 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2616 NCRCMD(sc, NCRCMD_FLUSH); 2617 DELAY(1); 2618 goto reset; 2619 } 2620 if (sc->sc_state == NCR_IDLE) { 2621 printf("%s: stray interrupt\n", 2622 device_xname(sc->sc_dev)); 2623 simple_unlock(&sc->sc_lock); 2624 return 0; 2625 } 2626 break; 2627 2628 case NCR_CONNECTED: 2629 if ((sc->sc_flags & NCR_ICCS) != 0) { 2630 /* "Initiate Command Complete Steps" in progress */ 2631 uint8_t msg; 2632 2633 sc->sc_flags &= ~NCR_ICCS; 2634 2635 if ((sc->sc_espintr & NCRINTR_DONE) == 0) { 2636 printf("%s: ICCS: " 2637 ": [intr %x, stat %x, step %x]\n", 2638 device_xname(sc->sc_dev), 2639 sc->sc_espintr, sc->sc_espstat, 2640 sc->sc_espstep); 2641 } 2642 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2643 if (sc->sc_imlen < 2) 2644 printf("%s: can't get status, only %d bytes\n", 2645 device_xname(sc->sc_dev), 2646 (int)sc->sc_imlen); 2647 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2648 msg = sc->sc_imess[sc->sc_imlen - 1]; 2649 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2650 if (msg == MSG_CMDCOMPLETE) { 2651 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2652 ? 0 : sc->sc_dleft; 2653 if ((ecb->flags & ECB_SENSE) == 0) 2654 ecb->xs->resid = ecb->dleft; 2655 sc->sc_state = NCR_CMDCOMPLETE; 2656 } else 2657 printf("%s: STATUS_PHASE: msg %d\n", 2658 device_xname(sc->sc_dev), msg); 2659 sc->sc_imlen = 0; 2660 NCRCMD(sc, NCRCMD_MSGOK); 2661 goto shortcut; /* ie. wait for disconnect */ 2662 } 2663 break; 2664 2665 default: 2666 printf("%s: invalid state: %d [intr %x, phase(c %x, p %x)]\n", 2667 device_xname(sc->sc_dev), sc->sc_state, 2668 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase); 2669 goto reset; 2670 } 2671 2672 /* 2673 * Driver is now in state NCR_CONNECTED, i.e. we 2674 * have a current command working the SCSI bus. 2675 */ 2676 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2677 panic("%s: no nexus", __func__); 2678 } 2679 2680 switch (sc->sc_phase) { 2681 case MESSAGE_OUT_PHASE: 2682 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2683 ncr53c9x_msgout(sc); 2684 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2685 break; 2686 2687 case MESSAGE_IN_PHASE: 2688 msgin: 2689 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2690 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2691 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2692 (sc->sc_espstat2 & NCRFAS_STAT2_EMPTY) == 0) { 2693 NCRCMD(sc, NCRCMD_FLUSH); 2694 } 2695 sc->sc_flags |= NCR_WAITI; 2696 NCRCMD(sc, NCRCMD_TRANS); 2697 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2698 if ((sc->sc_flags & NCR_WAITI) == 0) { 2699 printf("%s: MSGIN: unexpected FC bit: " 2700 "[intr %x, stat %x, step %x]\n", 2701 device_xname(sc->sc_dev), 2702 sc->sc_espintr, sc->sc_espstat, 2703 sc->sc_espstep); 2704 } 2705 sc->sc_flags &= ~NCR_WAITI; 2706 ncr53c9x_rdfifo(sc, 2707 (sc->sc_prevphase == sc->sc_phase) ? 2708 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2709 ncr53c9x_msgin(sc); 2710 } else { 2711 printf("%s: MSGIN: weird bits: " 2712 "[intr %x, stat %x, step %x]\n", 2713 device_xname(sc->sc_dev), 2714 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2715 } 2716 sc->sc_prevphase = MESSAGE_IN_PHASE; 2717 goto shortcut; /* i.e. expect data to be ready */ 2718 2719 case COMMAND_PHASE: 2720 /* 2721 * Send the command block. Normally we don't see this 2722 * phase because the SEL_ATN command takes care of 2723 * all this. However, we end up here if either the 2724 * target or we wanted to exchange some more messages 2725 * first (e.g. to start negotiations). 2726 */ 2727 2728 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2729 ecb->cmd.cmd.opcode, ecb->clen)); 2730 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2731 NCRCMD(sc, NCRCMD_FLUSH); 2732 #if 0 2733 DELAY(1); 2734 #endif 2735 } 2736 if (sc->sc_features & NCR_F_DMASELECT) { 2737 /* setup DMA transfer for command */ 2738 size = ecb->clen; 2739 sc->sc_cmdlen = size; 2740 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 2741 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2742 0, &size); 2743 /* Program the SCSI counter */ 2744 NCR_SET_COUNT(sc, size); 2745 2746 /* load the count in */ 2747 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 2748 2749 /* start the command transfer */ 2750 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2751 NCRDMA_GO(sc); 2752 } else { 2753 ncr53c9x_wrfifo(sc, (uint8_t *)&ecb->cmd.cmd, 2754 ecb->clen); 2755 NCRCMD(sc, NCRCMD_TRANS); 2756 } 2757 sc->sc_prevphase = COMMAND_PHASE; 2758 break; 2759 2760 case DATA_OUT_PHASE: 2761 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2762 NCRCMD(sc, NCRCMD_FLUSH); 2763 size = min(sc->sc_dleft, sc->sc_maxxfer); 2764 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2765 sc->sc_prevphase = DATA_OUT_PHASE; 2766 goto setup_xfer; 2767 2768 case DATA_IN_PHASE: 2769 NCR_PHASE(("DATA_IN_PHASE ")); 2770 if (sc->sc_rev == NCR_VARIANT_ESP100) 2771 NCRCMD(sc, NCRCMD_FLUSH); 2772 size = min(sc->sc_dleft, sc->sc_maxxfer); 2773 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2774 sc->sc_prevphase = DATA_IN_PHASE; 2775 setup_xfer: 2776 /* Target returned to data phase: wipe "done" memory */ 2777 ecb->flags &= ~ECB_TENTATIVE_DONE; 2778 2779 /* Program the SCSI counter */ 2780 NCR_SET_COUNT(sc, size); 2781 2782 /* load the count in */ 2783 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 2784 2785 /* 2786 * Note that if `size' is 0, we've already transceived 2787 * all the bytes we want but we're still in DATA PHASE. 2788 * Apparently, the device needs padding. Also, a 2789 * transfer size of 0 means "maximum" to the chip 2790 * DMA logic. 2791 */ 2792 NCRCMD(sc, 2793 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2794 NCRDMA_GO(sc); 2795 goto out; 2796 2797 case STATUS_PHASE: 2798 NCR_PHASE(("STATUS_PHASE ")); 2799 sc->sc_flags |= NCR_ICCS; 2800 NCRCMD(sc, NCRCMD_ICCS); 2801 sc->sc_prevphase = STATUS_PHASE; 2802 goto shortcut; /* i.e. expect status results soon */ 2803 2804 case INVALID_PHASE: 2805 break; 2806 2807 default: 2808 printf("%s: unexpected bus phase; resetting\n", 2809 device_xname(sc->sc_dev)); 2810 goto reset; 2811 } 2812 2813 out: 2814 simple_unlock(&sc->sc_lock); 2815 return 1; 2816 2817 reset: 2818 ncr53c9x_init(sc, 1); 2819 goto out; 2820 2821 finish: 2822 ncr53c9x_done(sc, ecb); 2823 goto out; 2824 2825 sched: 2826 sc->sc_state = NCR_IDLE; 2827 ncr53c9x_sched(sc); 2828 goto out; 2829 2830 shortcut: 2831 /* 2832 * The idea is that many of the SCSI operations take very little 2833 * time, and going away and getting interrupted is too high an 2834 * overhead to pay. For example, selecting, sending a message 2835 * and command and then doing some work can be done in one "pass". 2836 * 2837 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2838 * at 40MHz. This needs testing. 2839 */ 2840 { 2841 struct timeval wait, cur; 2842 2843 microtime(&wait); 2844 wait.tv_usec += 50 / sc->sc_freq; 2845 if (wait.tv_usec > 1000000) { 2846 wait.tv_sec++; 2847 wait.tv_usec -= 1000000; 2848 } 2849 do { 2850 if (NCRDMA_ISINTR(sc)) 2851 goto again; 2852 microtime(&cur); 2853 } while (timercmp(&cur, &wait, <=)); 2854 } 2855 goto out; 2856 } 2857 2858 void 2859 ncr53c9x_abort(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 2860 { 2861 2862 /* 2 secs for the abort */ 2863 ecb->timeout = NCR_ABORT_TIMEOUT; 2864 ecb->flags |= ECB_ABORT; 2865 2866 if (ecb == sc->sc_nexus) { 2867 /* 2868 * If we're still selecting, the message will be scheduled 2869 * after selection is complete. 2870 */ 2871 if (sc->sc_state == NCR_CONNECTED) 2872 ncr53c9x_sched_msgout(SEND_ABORT); 2873 2874 /* 2875 * Reschedule timeout. 2876 */ 2877 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2878 ncr53c9x_timeout, ecb); 2879 } else { 2880 /* 2881 * Just leave the command where it is. 2882 * XXX - what choice do we have but to reset the SCSI 2883 * eventually? 2884 */ 2885 if (sc->sc_state == NCR_IDLE) 2886 ncr53c9x_sched(sc); 2887 } 2888 } 2889 2890 void 2891 ncr53c9x_timeout(void *arg) 2892 { 2893 struct ncr53c9x_ecb *ecb = arg; 2894 struct scsipi_xfer *xs = ecb->xs; 2895 struct scsipi_periph *periph = xs->xs_periph; 2896 struct ncr53c9x_softc *sc; 2897 struct ncr53c9x_tinfo *ti; 2898 int s; 2899 2900 sc = device_private(periph->periph_channel->chan_adapter->adapt_dev); 2901 ti = &sc->sc_tinfo[periph->periph_target]; 2902 2903 scsipi_printaddr(periph); 2904 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2905 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2906 "msg(q %x,o %x) %s>", 2907 device_xname(sc->sc_dev), 2908 ecb, ecb->flags, ecb->dleft, ecb->stat, 2909 sc->sc_state, sc->sc_nexus, 2910 NCR_READ_REG(sc, NCR_STAT), 2911 sc->sc_phase, sc->sc_prevphase, 2912 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2913 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2914 #if NCR53C9X_DEBUG > 1 2915 printf("TRACE: %s.", ecb->trace); 2916 #endif 2917 2918 s = splbio(); 2919 simple_lock(&sc->sc_lock); 2920 2921 if (ecb->flags & ECB_ABORT) { 2922 /* abort timed out */ 2923 printf(" AGAIN\n"); 2924 2925 ncr53c9x_init(sc, 1); 2926 } else { 2927 /* abort the operation that has timed out */ 2928 printf("\n"); 2929 xs->error = XS_TIMEOUT; 2930 ncr53c9x_abort(sc, ecb); 2931 2932 /* Disable sync mode if stuck in a data phase */ 2933 if (ecb == sc->sc_nexus && 2934 (ti->flags & T_SYNCMODE) != 0 && 2935 (sc->sc_phase & (MSGI | CDI)) == 0) { 2936 /* XXX ASYNC CALLBACK! */ 2937 scsipi_printaddr(periph); 2938 printf("sync negotiation disabled\n"); 2939 sc->sc_cfflags |= 2940 (1 << ((periph->periph_target & 7) + 8)); 2941 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2942 } 2943 } 2944 2945 simple_unlock(&sc->sc_lock); 2946 splx(s); 2947 } 2948 2949 void 2950 ncr53c9x_watch(void *arg) 2951 { 2952 struct ncr53c9x_softc *sc = arg; 2953 struct ncr53c9x_tinfo *ti; 2954 struct ncr53c9x_linfo *li; 2955 int t, s; 2956 /* Delete any structures that have not been used in 10min. */ 2957 time_t old = time_second - (10 * 60); 2958 2959 s = splbio(); 2960 simple_lock(&sc->sc_lock); 2961 for (t = 0; t < sc->sc_ntarg; t++) { 2962 ti = &sc->sc_tinfo[t]; 2963 li = LIST_FIRST(&ti->luns); 2964 while (li) { 2965 if (li->last_used < old && 2966 li->untagged == NULL && 2967 li->used == 0) { 2968 if (li->lun < NCR_NLUN) 2969 ti->lun[li->lun] = NULL; 2970 LIST_REMOVE(li, link); 2971 free(li, M_DEVBUF); 2972 /* Restart the search at the beginning */ 2973 li = LIST_FIRST(&ti->luns); 2974 continue; 2975 } 2976 li = LIST_NEXT(li, link); 2977 } 2978 } 2979 simple_unlock(&sc->sc_lock); 2980 splx(s); 2981 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2982 } 2983
Indexes created Sat Sep 27 14:09:57 GMT 2025