ncr53c9x.c revision 1.152
1 /* $NetBSD: ncr53c9x.c,v 1.152 2019/11/10 21:16:35 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 1994 Peter Galbavy 34 * Copyright (c) 1995 Paul Kranenburg 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Peter Galbavy 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 53 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 54 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 59 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 60 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 /* 65 * Based on aic6360 by Jarle Greipsland 66 * 67 * Acknowledgements: Many of the algorithms used in this driver are 68 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 69 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.152 2019/11/10 21:16:35 chs Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/callout.h> 78 #include <sys/kernel.h> 79 #include <sys/errno.h> 80 #include <sys/ioctl.h> 81 #include <sys/device.h> 82 #include <sys/buf.h> 83 #include <sys/malloc.h> 84 #include <sys/proc.h> 85 #include <sys/queue.h> 86 #include <sys/pool.h> 87 #include <sys/scsiio.h> 88 89 #include <dev/scsipi/scsi_spc.h> 90 #include <dev/scsipi/scsi_all.h> 91 #include <dev/scsipi/scsipi_all.h> 92 #include <dev/scsipi/scsiconf.h> 93 #include <dev/scsipi/scsi_message.h> 94 95 #include <dev/ic/ncr53c9xreg.h> 96 #include <dev/ic/ncr53c9xvar.h> 97 98 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 99 #ifdef DEBUG 100 int ncr53c9x_notag = 0; 101 #endif 102 103 static void ncr53c9x_readregs(struct ncr53c9x_softc *); 104 static void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 105 static int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 106 #if 0 107 static void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 108 #endif 109 static void ncr53c9x_clear(struct ncr53c9x_softc *, scsipi_xfer_result_t); 110 static int ncr53c9x_poll(struct ncr53c9x_softc *, 111 struct scsipi_xfer *, int); 112 static void ncr53c9x_sched(struct ncr53c9x_softc *); 113 static void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 114 static void ncr53c9x_msgin(struct ncr53c9x_softc *); 115 static void ncr53c9x_msgout(struct ncr53c9x_softc *); 116 static void ncr53c9x_timeout(void *arg); 117 static void ncr53c9x_watch(void *arg); 118 static void ncr53c9x_dequeue(struct ncr53c9x_softc *, 119 struct ncr53c9x_ecb *); 120 static int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 121 void *, int, struct proc *); 122 123 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 124 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 125 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 126 127 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 128 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 129 struct ncr53c9x_tinfo *); 130 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 131 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 132 int64_t lun); 133 134 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, uint8_t *, int); 135 136 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 137 #define NCR_RDFIFO_START 0 138 #define NCR_RDFIFO_CONTINUE 1 139 140 141 #define NCR_SET_COUNT(sc, size) do { \ 142 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 143 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 144 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 145 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 146 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 147 } \ 148 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 149 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 150 } \ 151 } while (/* CONSTCOND */0) 152 153 static int ecb_pool_initialized = 0; 154 static struct pool ecb_pool; 155 156 /* 157 * Names for the NCR53c9x variants, corresponding to the variant tags 158 * in ncr53c9xvar.h. 159 */ 160 static const char *ncr53c9x_variant_names[] = { 161 "ESP100", 162 "ESP100A", 163 "ESP200", 164 "NCR53C94", 165 "NCR53C96", 166 "ESP406", 167 "FAS408", 168 "FAS216", 169 "AM53C974", 170 "FAS366/HME", 171 "NCR53C90 (86C01)", 172 }; 173 174 /* 175 * Search linked list for LUN info by LUN id. 176 */ 177 static struct ncr53c9x_linfo * 178 ncr53c9x_lunsearch(struct ncr53c9x_tinfo *ti, int64_t lun) 179 { 180 struct ncr53c9x_linfo *li; 181 182 LIST_FOREACH(li, &ti->luns, link) 183 if (li->lun == lun) 184 return li; 185 return NULL; 186 } 187 188 /* 189 * Attach this instance, and then all the sub-devices 190 */ 191 void 192 ncr53c9x_attach(struct ncr53c9x_softc *sc) 193 { 194 struct scsipi_adapter *adapt = &sc->sc_adapter; 195 struct scsipi_channel *chan = &sc->sc_channel; 196 197 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_BIO); 198 199 callout_init(&sc->sc_watchdog, 0); 200 201 /* 202 * Note, the front-end has set us up to print the chip variation. 203 */ 204 if (sc->sc_rev >= NCR_VARIANT_MAX) { 205 aprint_error(": unknown variant %d, devices not attached\n", 206 sc->sc_rev); 207 return; 208 } 209 210 aprint_normal(": %s, %dMHz, SCSI ID %d\n", 211 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 212 213 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8; 214 215 /* 216 * Allocate SCSI message buffers. 217 * Front-ends can override allocation to avoid alignment 218 * handling in the DMA engines. Note that that ncr53c9x_msgout() 219 * can request a 1 byte DMA transfer. 220 */ 221 if (sc->sc_omess == NULL) 222 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_WAITOK); 223 224 if (sc->sc_imess == NULL) 225 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_WAITOK); 226 227 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]), 228 M_DEVBUF, M_WAITOK | M_ZERO); 229 230 /* 231 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 232 * from now on. 233 */ 234 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 235 sc->sc_rev = NCR_VARIANT_ESP100; 236 237 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 238 239 /* The value *must not* be == 1. Make it 2 */ 240 if (sc->sc_ccf == 1) 241 sc->sc_ccf = 2; 242 243 /* 244 * The recommended timeout is 250ms. This register is loaded 245 * with a value calculated as follows, from the docs: 246 * 247 * (timout period) x (CLK frequency) 248 * reg = ------------------------------------- 249 * 8192 x (Clock Conversion Factor) 250 * 251 * Since CCF has a linear relation to CLK, this generally computes 252 * to the constant of 153. 253 */ 254 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 255 256 /* CCF register only has 3 bits; 0 is actually 8 */ 257 sc->sc_ccf &= 7; 258 259 /* 260 * Fill in the scsipi_adapter. 261 */ 262 adapt->adapt_dev = sc->sc_dev; 263 adapt->adapt_nchannels = 1; 264 adapt->adapt_openings = 256; 265 adapt->adapt_max_periph = 256; 266 adapt->adapt_ioctl = ncr53c9x_ioctl; 267 /* adapt_request initialized by front-end */ 268 /* adapt_minphys initialized by front-end */ 269 270 /* 271 * Fill in the scsipi_channel. 272 */ 273 memset(chan, 0, sizeof(*chan)); 274 chan->chan_adapter = adapt; 275 chan->chan_bustype = &scsi_bustype; 276 chan->chan_channel = 0; 277 chan->chan_ntargets = sc->sc_ntarg; 278 chan->chan_nluns = 8; 279 chan->chan_id = sc->sc_id; 280 281 /* 282 * Add reference to adapter so that we drop the reference after 283 * config_found() to make sure the adapter is disabled. 284 */ 285 if (scsipi_adapter_addref(adapt) != 0) { 286 aprint_error_dev(sc->sc_dev, "unable to enable controller\n"); 287 return; 288 } 289 290 /* Reset state & bus */ 291 sc->sc_cfflags = device_cfdata(sc->sc_dev)->cf_flags; 292 sc->sc_state = 0; 293 ncr53c9x_init(sc, 0); /* no bus reset yet, leave that to scsibus* */ 294 295 /* 296 * Now try to attach all the sub-devices 297 */ 298 sc->sc_child = config_found(sc->sc_dev, &sc->sc_channel, scsiprint); 299 300 scsipi_adapter_delref(adapt); 301 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 302 } 303 304 int 305 ncr53c9x_detach(struct ncr53c9x_softc *sc, int flags) 306 { 307 struct ncr53c9x_linfo *li, *nextli; 308 int t; 309 int error; 310 311 callout_stop(&sc->sc_watchdog); 312 313 if (sc->sc_tinfo) { 314 /* Cancel all commands. */ 315 ncr53c9x_clear(sc, XS_DRIVER_STUFFUP); 316 317 /* Free logical units. */ 318 for (t = 0; t < sc->sc_ntarg; t++) { 319 for (li = LIST_FIRST(&sc->sc_tinfo[t].luns); li; 320 li = nextli) { 321 nextli = LIST_NEXT(li, link); 322 free(li, M_DEVBUF); 323 } 324 } 325 } 326 327 if (sc->sc_child) { 328 error = config_detach(sc->sc_child, flags); 329 if (error) 330 return error; 331 } 332 333 if (sc->sc_imess) 334 free(sc->sc_imess, M_DEVBUF); 335 if (sc->sc_omess) 336 free(sc->sc_omess, M_DEVBUF); 337 338 mutex_destroy(&sc->sc_lock); 339 340 return 0; 341 } 342 343 /* 344 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 345 * only this controller, but kills any on-going commands, and also stops 346 * and resets the DMA. 347 * 348 * After reset, registers are loaded with the defaults from the attach 349 * routine above. 350 */ 351 void 352 ncr53c9x_reset(struct ncr53c9x_softc *sc) 353 { 354 355 /* reset DMA first */ 356 NCRDMA_RESET(sc); 357 358 /* reset SCSI chip */ 359 NCRCMD(sc, NCRCMD_RSTCHIP); 360 NCRCMD(sc, NCRCMD_NOP); 361 DELAY(500); 362 363 /* do these backwards, and fall through */ 364 switch (sc->sc_rev) { 365 case NCR_VARIANT_ESP406: 366 case NCR_VARIANT_FAS408: 367 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 368 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 369 /* FALLTHROUGH */ 370 case NCR_VARIANT_AM53C974: 371 case NCR_VARIANT_FAS216: 372 case NCR_VARIANT_NCR53C94: 373 case NCR_VARIANT_NCR53C96: 374 case NCR_VARIANT_ESP200: 375 sc->sc_features |= NCR_F_HASCFG3; 376 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 377 /* FALLTHROUGH */ 378 case NCR_VARIANT_ESP100A: 379 sc->sc_features |= NCR_F_SELATN3; 380 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 381 /* FALLTHROUGH */ 382 case NCR_VARIANT_ESP100: 383 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 384 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 385 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 386 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 387 break; 388 389 case NCR_VARIANT_FAS366: 390 sc->sc_features |= 391 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 392 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 393 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 394 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 395 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 396 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 397 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 398 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 399 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 400 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 401 break; 402 403 default: 404 printf("%s: unknown revision code, assuming ESP100\n", 405 device_xname(sc->sc_dev)); 406 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 407 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 408 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 409 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 410 } 411 412 if (sc->sc_rev == NCR_VARIANT_AM53C974) 413 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 414 415 #if 0 416 printf("%s: ncr53c9x_reset: revision %d\n", 417 device_xname(sc->sc_dev), sc->sc_rev); 418 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 419 "ccf 0x%x, timeout 0x%x\n", 420 device_xname(sc->sc_dev), sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 421 sc->sc_ccf, sc->sc_timeout); 422 #endif 423 } 424 425 #if 0 426 /* 427 * Reset the SCSI bus, but not the chip 428 */ 429 void 430 ncr53c9x_scsi_reset(struct ncr53c9x_softc *sc) 431 { 432 433 (*sc->sc_glue->gl_dma_stop)(sc); 434 435 printf("%s: resetting SCSI bus\n", device_xname(sc->sc_dev)); 436 NCRCMD(sc, NCRCMD_RSTSCSI); 437 } 438 #endif 439 440 /* 441 * Clear all commands 442 */ 443 void 444 ncr53c9x_clear(struct ncr53c9x_softc *sc, scsipi_xfer_result_t result) 445 { 446 struct ncr53c9x_ecb *ecb; 447 struct ncr53c9x_linfo *li; 448 int i, r; 449 450 /* Cancel any active commands. */ 451 sc->sc_state = NCR_CLEANING; 452 sc->sc_msgify = 0; 453 ecb = sc->sc_nexus; 454 if (ecb != NULL) { 455 ecb->xs->error = result; 456 ncr53c9x_done(sc, ecb); 457 } 458 /* Cancel outstanding disconnected commands on each LUN */ 459 for (r = 0; r < sc->sc_ntarg; r++) { 460 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 461 ecb = li->untagged; 462 if (ecb != NULL) { 463 li->untagged = NULL; 464 /* 465 * XXXXXXX 466 * 467 * Should we terminate a command 468 * that never reached the disk? 469 */ 470 li->busy = 0; 471 ecb->xs->error = result; 472 ncr53c9x_done(sc, ecb); 473 } 474 for (i = 0; i < 256; i++) { 475 ecb = li->queued[i]; 476 if (ecb != NULL) { 477 li->queued[i] = NULL; 478 ecb->xs->error = result; 479 ncr53c9x_done(sc, ecb); 480 } 481 } 482 li->used = 0; 483 } 484 } 485 } 486 487 /* 488 * Initialize ncr53c9x state machine 489 */ 490 void 491 ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset) 492 { 493 int r; 494 495 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 496 497 if (!ecb_pool_initialized) { 498 /* All instances share this pool */ 499 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 500 "ncr53c9x_ecb", NULL, IPL_BIO); 501 /* make sure to always have some items to play with */ 502 if (pool_prime(&ecb_pool, 1) == ENOMEM) { 503 printf("WARNING: not enough memory for ncr53c9x_ecb\n"); 504 } 505 ecb_pool_initialized = 1; 506 } 507 508 if (sc->sc_state == 0) { 509 /* First time through; initialize. */ 510 511 TAILQ_INIT(&sc->ready_list); 512 sc->sc_nexus = NULL; 513 memset(sc->sc_tinfo, 0, sizeof(*sc->sc_tinfo)); 514 for (r = 0; r < sc->sc_ntarg; r++) { 515 LIST_INIT(&sc->sc_tinfo[r].luns); 516 } 517 } else { 518 ncr53c9x_clear(sc, XS_TIMEOUT); 519 } 520 521 /* 522 * reset the chip to a known state 523 */ 524 ncr53c9x_reset(sc); 525 526 sc->sc_flags = 0; 527 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 528 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 529 530 /* XXXSMP scsipi */ 531 KERNEL_LOCK(1, curlwp); 532 533 for (r = 0; r < sc->sc_ntarg; r++) { 534 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 535 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 536 537 ti->flags = ((sc->sc_minsync && 538 !(sc->sc_cfflags & (1 << ((r & 7) + 8)))) ? 539 0 : T_SYNCHOFF) | 540 ((sc->sc_cfflags & (1 << (r & 7))) ? T_RSELECTOFF : 0); 541 #ifdef DEBUG 542 if (ncr53c9x_notag) 543 ti->flags &= ~T_TAG; 544 #endif 545 ti->period = sc->sc_minsync; 546 ti->offset = 0; 547 ti->cfg3 = 0; 548 549 ncr53c9x_update_xfer_mode(sc, r); 550 } 551 552 if (doreset) { 553 sc->sc_state = NCR_SBR; 554 NCRCMD(sc, NCRCMD_RSTSCSI); 555 556 /* Notify upper layer */ 557 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_RESET, NULL); 558 } else { 559 sc->sc_state = NCR_IDLE; 560 ncr53c9x_sched(sc); 561 } 562 563 /* XXXSMP scsipi */ 564 KERNEL_UNLOCK_ONE(curlwp); 565 } 566 567 /* 568 * Read the NCR registers, and save their contents for later use. 569 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 570 * NCR_INTR - so make sure it is the last read. 571 * 572 * I think that (from reading the docs) most bits in these registers 573 * only make sense when he DMA CSR has an interrupt showing. Call only 574 * if an interrupt is pending. 575 */ 576 inline void 577 ncr53c9x_readregs(struct ncr53c9x_softc *sc) 578 { 579 580 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 581 /* Only the stepo bits are of interest */ 582 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 583 584 if (sc->sc_rev == NCR_VARIANT_FAS366) 585 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 586 587 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 588 589 if (sc->sc_glue->gl_clear_latched_intr != NULL) 590 (*sc->sc_glue->gl_clear_latched_intr)(sc); 591 592 /* 593 * Determine the SCSI bus phase, return either a real SCSI bus phase 594 * or some pseudo phase we use to detect certain exceptions. 595 */ 596 597 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 598 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 599 600 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 601 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 602 } 603 604 /* 605 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 606 */ 607 static inline int 608 ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc, int period) 609 { 610 int v; 611 612 v = (sc->sc_freq * period) / 250; 613 if (ncr53c9x_cpb2stp(sc, v) < period) 614 /* Correct round-down error */ 615 v++; 616 return v; 617 } 618 619 static inline void 620 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti) 621 { 622 uint8_t syncoff, synctp; 623 uint8_t cfg3 = sc->sc_cfg3 | ti->cfg3; 624 625 if (ti->flags & T_SYNCMODE) { 626 syncoff = ti->offset; 627 synctp = ncr53c9x_stp2cpb(sc, ti->period); 628 if (sc->sc_features & NCR_F_FASTSCSI) { 629 /* 630 * If the period is 200ns or less (ti->period <= 50), 631 * put the chip in Fast SCSI mode. 632 */ 633 if (ti->period <= 50) 634 /* 635 * There are (at least) 4 variations of the 636 * configuration 3 register. The drive attach 637 * routine sets the appropriate bit to put the 638 * chip into Fast SCSI mode so that it doesn't 639 * have to be figured out here each time. 640 */ 641 cfg3 |= sc->sc_cfg3_fscsi; 642 } 643 644 /* 645 * Am53c974 requires different SYNCTP values when the 646 * FSCSI bit is off. 647 */ 648 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 649 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 650 synctp--; 651 } else { 652 syncoff = 0; 653 synctp = 0; 654 } 655 656 if (sc->sc_features & NCR_F_HASCFG3) 657 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 658 659 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 660 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 661 } 662 663 /* 664 * Send a command to a target, set the driver state to NCR_SELECTING 665 * and let the caller take care of the rest. 666 * 667 * Keeping this as a function allows me to say that this may be done 668 * by DMA instead of programmed I/O soon. 669 */ 670 void 671 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 672 { 673 struct scsipi_periph *periph = ecb->xs->xs_periph; 674 int target = periph->periph_target; 675 int lun = periph->periph_lun; 676 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 677 int tiflags = ti->flags; 678 uint8_t *cmd; 679 int clen; 680 bool selatn3, selatns; 681 size_t dmasize; 682 683 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 684 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 685 686 sc->sc_state = NCR_SELECTING; 687 /* 688 * Schedule the timeout now, the first time we will go away 689 * expecting to come back due to an interrupt, because it is 690 * always possible that the interrupt may never happen. 691 */ 692 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 693 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 694 ncr53c9x_timeout, ecb); 695 } 696 697 /* 698 * The docs say the target register is never reset, and I 699 * can't think of a better place to set it 700 */ 701 if (sc->sc_rev == NCR_VARIANT_FAS366) { 702 NCRCMD(sc, NCRCMD_FLUSH); 703 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 704 } else { 705 NCR_WRITE_REG(sc, NCR_SELID, target); 706 } 707 ncr53c9x_setsync(sc, ti); 708 709 if ((ecb->flags & ECB_SENSE) != 0) { 710 /* 711 * For REQUEST SENSE, we should not send an IDENTIFY or 712 * otherwise mangle the target. There should be no MESSAGE IN 713 * phase. 714 */ 715 if (sc->sc_features & NCR_F_DMASELECT) { 716 /* setup DMA transfer for command */ 717 dmasize = clen = ecb->clen; 718 sc->sc_cmdlen = clen; 719 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 720 721 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 722 &dmasize); 723 /* Program the SCSI counter */ 724 NCR_SET_COUNT(sc, dmasize); 725 726 if (sc->sc_rev != NCR_VARIANT_FAS366) 727 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 728 729 /* And get the targets attention */ 730 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 731 NCRDMA_GO(sc); 732 } else { 733 ncr53c9x_wrfifo(sc, (uint8_t *)&ecb->cmd.cmd, 734 ecb->clen); 735 sc->sc_cmdlen = 0; 736 NCRCMD(sc, NCRCMD_SELNATN); 737 } 738 return; 739 } 740 741 selatn3 = selatns = false; 742 if (ecb->tag[0] != 0) { 743 if (sc->sc_features & NCR_F_SELATN3) 744 /* use SELATN3 to send tag messages */ 745 selatn3 = true; 746 else 747 /* We don't have SELATN3; use SELATNS to send tags */ 748 selatns = true; 749 } 750 751 if (ti->flags & T_NEGOTIATE) { 752 /* We have to use SELATNS to send sync/wide messages */ 753 selatn3 = false; 754 selatns = true; 755 } 756 757 cmd = (uint8_t *)&ecb->cmd.cmd; 758 759 if (selatn3) { 760 /* We'll use tags with SELATN3 */ 761 clen = ecb->clen + 3; 762 cmd -= 3; 763 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 764 cmd[1] = ecb->tag[0]; /* msg[1] */ 765 cmd[2] = ecb->tag[1]; /* msg[2] */ 766 } else { 767 /* We don't have tags, or will send messages with SELATNS */ 768 clen = ecb->clen + 1; 769 cmd -= 1; 770 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 771 } 772 773 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 774 775 /* setup DMA transfer for command */ 776 dmasize = clen; 777 sc->sc_cmdlen = clen; 778 sc->sc_cmdp = cmd; 779 780 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 781 /* Program the SCSI counter */ 782 NCR_SET_COUNT(sc, dmasize); 783 784 /* load the count in */ 785 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 786 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 787 788 /* And get the targets attention */ 789 if (selatn3) { 790 sc->sc_msgout = SEND_TAG; 791 sc->sc_flags |= NCR_ATN; 792 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 793 } else 794 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 795 NCRDMA_GO(sc); 796 return; 797 } 798 799 /* 800 * Who am I. This is where we tell the target that we are 801 * happy for it to disconnect etc. 802 */ 803 804 /* Now get the command into the FIFO */ 805 sc->sc_cmdlen = 0; 806 ncr53c9x_wrfifo(sc, cmd, clen); 807 808 /* And get the targets attention */ 809 if (selatns) { 810 NCR_MSGS(("SELATNS \n")); 811 /* Arbitrate, select and stop after IDENTIFY message */ 812 NCRCMD(sc, NCRCMD_SELATNS); 813 } else if (selatn3) { 814 sc->sc_msgout = SEND_TAG; 815 sc->sc_flags |= NCR_ATN; 816 NCRCMD(sc, NCRCMD_SELATN3); 817 } else 818 NCRCMD(sc, NCRCMD_SELATN); 819 } 820 821 void 822 ncr53c9x_free_ecb(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 823 { 824 int s; 825 826 s = splbio(); 827 ecb->flags = 0; 828 pool_put(&ecb_pool, (void *)ecb); 829 splx(s); 830 return; 831 } 832 833 struct ncr53c9x_ecb * 834 ncr53c9x_get_ecb(struct ncr53c9x_softc *sc, int flags) 835 { 836 struct ncr53c9x_ecb *ecb; 837 int s; 838 839 s = splbio(); 840 ecb = pool_get(&ecb_pool, PR_NOWAIT | PR_ZERO); 841 if (ecb) 842 ecb->flags |= ECB_ALLOC; 843 splx(s); 844 return ecb; 845 } 846 847 /* 848 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 849 */ 850 851 /* 852 * Start a SCSI-command 853 * This function is called by the higher level SCSI-driver to queue/run 854 * SCSI-commands. 855 */ 856 857 void 858 ncr53c9x_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 859 void *arg) 860 { 861 struct scsipi_xfer *xs; 862 struct scsipi_periph *periph; 863 struct ncr53c9x_softc *sc; 864 struct ncr53c9x_ecb *ecb; 865 int flags; 866 867 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 868 869 sc = device_private(chan->chan_adapter->adapt_dev); 870 mutex_enter(&sc->sc_lock); 871 872 switch (req) { 873 case ADAPTER_REQ_RUN_XFER: 874 xs = arg; 875 periph = xs->xs_periph; 876 flags = xs->xs_control; 877 878 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 879 periph->periph_target)); 880 881 /* Get an ECB to use. */ 882 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 883 /* 884 * This should never happen as we track resources 885 * in the mid-layer, but for now it can as pool_get() 886 * can fail. 887 */ 888 if (ecb == NULL) { 889 scsipi_printaddr(periph); 890 printf("%s: unable to allocate ecb\n", 891 device_xname(sc->sc_dev)); 892 xs->error = XS_RESOURCE_SHORTAGE; 893 mutex_exit(&sc->sc_lock); 894 scsipi_done(xs); 895 return; 896 } 897 898 /* Initialize ecb */ 899 ecb->xs = xs; 900 ecb->timeout = xs->timeout; 901 902 if (flags & XS_CTL_RESET) { 903 ecb->flags |= ECB_RESET; 904 ecb->clen = 0; 905 ecb->dleft = 0; 906 } else { 907 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 908 ecb->clen = xs->cmdlen; 909 ecb->daddr = xs->data; 910 ecb->dleft = xs->datalen; 911 } 912 ecb->stat = 0; 913 914 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 915 ecb->flags |= ECB_READY; 916 if (sc->sc_state == NCR_IDLE) 917 ncr53c9x_sched(sc); 918 919 if ((flags & XS_CTL_POLL) == 0) 920 break; 921 922 /* Not allowed to use interrupts, use polling instead */ 923 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 924 ncr53c9x_timeout(ecb); 925 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 926 ncr53c9x_timeout(ecb); 927 } 928 break; 929 930 case ADAPTER_REQ_GROW_RESOURCES: 931 /* XXX Not supported. */ 932 break; 933 934 case ADAPTER_REQ_SET_XFER_MODE: 935 { 936 struct ncr53c9x_tinfo *ti; 937 struct scsipi_xfer_mode *xm = arg; 938 939 ti = &sc->sc_tinfo[xm->xm_target]; 940 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 941 ti->period = 0; 942 ti->offset = 0; 943 944 if ((sc->sc_cfflags & (1 << ((xm->xm_target & 7) + 16))) == 0 && 945 (xm->xm_mode & PERIPH_CAP_TQING)) { 946 NCR_MISC(("%s: target %d: tagged queuing\n", 947 device_xname(sc->sc_dev), xm->xm_target)); 948 ti->flags |= T_TAG; 949 } else 950 ti->flags &= ~T_TAG; 951 952 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 953 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 954 device_xname(sc->sc_dev), xm->xm_target)); 955 if (sc->sc_rev == NCR_VARIANT_FAS366) { 956 ti->flags |= T_WIDE; 957 ti->width = 1; 958 } 959 } 960 961 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 962 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 963 NCR_MISC(("%s: target %d: sync negotiation\n", 964 device_xname(sc->sc_dev), xm->xm_target)); 965 ti->flags |= T_NEGOTIATE; 966 ti->period = sc->sc_minsync; 967 } 968 /* 969 * If we're not going to negotiate, send the notification 970 * now, since it won't happen later. 971 */ 972 if ((ti->flags & T_NEGOTIATE) == 0) 973 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 974 } 975 break; 976 } 977 978 mutex_exit(&sc->sc_lock); 979 } 980 981 void 982 ncr53c9x_update_xfer_mode(struct ncr53c9x_softc *sc, int target) 983 { 984 struct scsipi_xfer_mode xm; 985 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 986 987 xm.xm_target = target; 988 xm.xm_mode = 0; 989 xm.xm_period = 0; 990 xm.xm_offset = 0; 991 992 if (ti->flags & T_SYNCMODE) { 993 xm.xm_mode |= PERIPH_CAP_SYNC; 994 xm.xm_period = ti->period; 995 xm.xm_offset = ti->offset; 996 } 997 if (ti->width) 998 xm.xm_mode |= PERIPH_CAP_WIDE16; 999 1000 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 1001 xm.xm_mode |= PERIPH_CAP_TQING; 1002 1003 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 1004 } 1005 1006 /* 1007 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 1008 */ 1009 int 1010 ncr53c9x_poll(struct ncr53c9x_softc *sc, struct scsipi_xfer *xs, int count) 1011 { 1012 1013 NCR_TRACE(("[ncr53c9x_poll] ")); 1014 while (count) { 1015 if (NCRDMA_ISINTR(sc)) { 1016 mutex_exit(&sc->sc_lock); 1017 ncr53c9x_intr(sc); 1018 mutex_enter(&sc->sc_lock); 1019 } 1020 #if alternatively 1021 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 1022 ncr53c9x_intr(sc); 1023 #endif 1024 if ((xs->xs_status & XS_STS_DONE) != 0) 1025 return 0; 1026 if (sc->sc_state == NCR_IDLE) { 1027 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 1028 ncr53c9x_sched(sc); 1029 } 1030 DELAY(1000); 1031 count--; 1032 } 1033 return 1; 1034 } 1035 1036 int 1037 ncr53c9x_ioctl(struct scsipi_channel *chan, u_long cmd, void *arg, 1038 int flag, struct proc *p) 1039 { 1040 struct ncr53c9x_softc *sc; 1041 int error = 0; 1042 1043 sc = device_private(chan->chan_adapter->adapt_dev); 1044 switch (cmd) { 1045 case SCBUSIORESET: 1046 mutex_enter(&sc->sc_lock); 1047 ncr53c9x_init(sc, 1); 1048 mutex_exit(&sc->sc_lock); 1049 break; 1050 default: 1051 error = ENOTTY; 1052 break; 1053 } 1054 return error; 1055 } 1056 1057 1058 /* 1059 * LOW LEVEL SCSI UTILITIES 1060 */ 1061 1062 /* 1063 * Schedule a scsi operation. This has now been pulled out of the interrupt 1064 * handler so that we may call it from ncr53c9x_scsipi_request and 1065 * ncr53c9x_done. This may save us an unnecessary interrupt just to get 1066 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1067 */ 1068 void 1069 ncr53c9x_sched(struct ncr53c9x_softc *sc) 1070 { 1071 struct ncr53c9x_ecb *ecb; 1072 struct scsipi_periph *periph; 1073 struct ncr53c9x_tinfo *ti; 1074 struct ncr53c9x_linfo *li; 1075 int lun; 1076 int tag; 1077 1078 NCR_TRACE(("[ncr53c9x_sched] ")); 1079 if (sc->sc_state != NCR_IDLE) 1080 panic("%s: not IDLE (state=%d)", __func__, sc->sc_state); 1081 1082 /* 1083 * Find first ecb in ready queue that is for a target/lunit 1084 * combinations that is not busy. 1085 */ 1086 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1087 ecb = TAILQ_NEXT(ecb, chain)) { 1088 periph = ecb->xs->xs_periph; 1089 ti = &sc->sc_tinfo[periph->periph_target]; 1090 lun = periph->periph_lun; 1091 1092 /* Select type of tag for this command */ 1093 if ((ti->flags & T_RSELECTOFF) != 0) 1094 tag = 0; 1095 else if ((ti->flags & T_TAG) == 0) 1096 tag = 0; 1097 else if ((ecb->flags & ECB_SENSE) != 0) 1098 tag = 0; 1099 else 1100 tag = ecb->xs->xs_tag_type; 1101 #if 0 1102 /* XXXX Use tags for polled commands? */ 1103 if (ecb->xs->xs_control & XS_CTL_POLL) 1104 tag = 0; 1105 #endif 1106 1107 li = TINFO_LUN(ti, lun); 1108 if (li == NULL) { 1109 /* Initialize LUN info and add to list. */ 1110 li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT|M_ZERO); 1111 if (li == NULL) { 1112 continue; 1113 } 1114 li->lun = lun; 1115 1116 LIST_INSERT_HEAD(&ti->luns, li, link); 1117 if (lun < NCR_NLUN) 1118 ti->lun[lun] = li; 1119 } 1120 li->last_used = time_second; 1121 if (tag == 0) { 1122 /* Try to issue this as an un-tagged command */ 1123 if (li->untagged == NULL) 1124 li->untagged = ecb; 1125 } 1126 if (li->untagged != NULL) { 1127 tag = 0; 1128 if ((li->busy != 1) && li->used == 0) { 1129 /* We need to issue this untagged command now */ 1130 ecb = li->untagged; 1131 periph = ecb->xs->xs_periph; 1132 } else { 1133 /* Not ready yet */ 1134 continue; 1135 } 1136 } 1137 ecb->tag[0] = tag; 1138 if (tag != 0) { 1139 li->queued[ecb->xs->xs_tag_id] = ecb; 1140 ecb->tag[1] = ecb->xs->xs_tag_id; 1141 li->used++; 1142 } 1143 if (li->untagged != NULL && (li->busy != 1)) { 1144 li->busy = 1; 1145 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1146 ecb->flags &= ~ECB_READY; 1147 sc->sc_nexus = ecb; 1148 ncr53c9x_select(sc, ecb); 1149 break; 1150 } 1151 if (li->untagged == NULL && tag != 0) { 1152 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1153 ecb->flags &= ~ECB_READY; 1154 sc->sc_nexus = ecb; 1155 ncr53c9x_select(sc, ecb); 1156 break; 1157 } else { 1158 NCR_TRACE(("%d:%d busy\n", 1159 periph->periph_target, 1160 periph->periph_lun)); 1161 } 1162 } 1163 } 1164 1165 void 1166 ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1167 { 1168 struct scsipi_xfer *xs = ecb->xs; 1169 struct scsipi_periph *periph = xs->xs_periph; 1170 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1171 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd; 1172 struct ncr53c9x_linfo *li; 1173 int lun = periph->periph_lun; 1174 1175 NCR_TRACE(("requesting sense ")); 1176 /* Next, setup a request sense command block */ 1177 memset(ss, 0, sizeof(*ss)); 1178 ss->opcode = SCSI_REQUEST_SENSE; 1179 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1180 ss->length = sizeof(struct scsi_sense_data); 1181 ecb->clen = sizeof(*ss); 1182 ecb->daddr = (uint8_t *)&xs->sense.scsi_sense; 1183 ecb->dleft = sizeof(struct scsi_sense_data); 1184 ecb->flags |= ECB_SENSE; 1185 ecb->timeout = NCR_SENSE_TIMEOUT; 1186 ti->senses++; 1187 li = TINFO_LUN(ti, lun); 1188 if (li->busy) 1189 li->busy = 0; 1190 ncr53c9x_dequeue(sc, ecb); 1191 li->untagged = ecb; /* must be executed first to fix C/A */ 1192 li->busy = 2; 1193 if (ecb == sc->sc_nexus) { 1194 ncr53c9x_select(sc, ecb); 1195 } else { 1196 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1197 ecb->flags |= ECB_READY; 1198 if (sc->sc_state == NCR_IDLE) 1199 ncr53c9x_sched(sc); 1200 } 1201 } 1202 1203 /* 1204 * POST PROCESSING OF SCSI_CMD (usually current) 1205 */ 1206 void 1207 ncr53c9x_done(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1208 { 1209 struct scsipi_xfer *xs = ecb->xs; 1210 struct scsipi_periph *periph = xs->xs_periph; 1211 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1212 int lun = periph->periph_lun; 1213 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1214 1215 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1216 1217 if ((xs->xs_control & XS_CTL_POLL) == 0) 1218 callout_stop(&xs->xs_callout); 1219 1220 /* 1221 * Now, if we've come here with no error code, i.e. we've kept the 1222 * initial XS_NOERROR, and the status code signals that we should 1223 * check sense, we'll need to set up a request sense cmd block and 1224 * push the command back into the ready queue *before* any other 1225 * commands for this target/lunit, else we lose the sense info. 1226 * We don't support chk sense conditions for the request sense cmd. 1227 */ 1228 if (xs->error == XS_NOERROR) { 1229 xs->status = ecb->stat; 1230 if ((ecb->flags & ECB_ABORT) != 0) { 1231 xs->error = XS_TIMEOUT; 1232 } else if ((ecb->flags & ECB_SENSE) != 0) { 1233 xs->error = XS_SENSE; 1234 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1235 /* First, save the return values */ 1236 xs->resid = ecb->dleft; 1237 ncr53c9x_sense(sc, ecb); 1238 return; 1239 } else { 1240 xs->resid = ecb->dleft; 1241 } 1242 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1243 xs->error = XS_BUSY; 1244 } 1245 1246 #ifdef NCR53C9X_DEBUG 1247 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1248 if (xs->resid != 0) 1249 printf("resid=%d ", xs->resid); 1250 if (xs->error == XS_SENSE) 1251 printf("sense=0x%02x\n", 1252 xs->sense.scsi_sense.response_code); 1253 else 1254 printf("error=%d\n", xs->error); 1255 } 1256 #endif 1257 1258 /* 1259 * Remove the ECB from whatever queue it's on. 1260 */ 1261 ncr53c9x_dequeue(sc, ecb); 1262 if (ecb == sc->sc_nexus) { 1263 sc->sc_nexus = NULL; 1264 if (sc->sc_state != NCR_CLEANING) { 1265 sc->sc_state = NCR_IDLE; 1266 ncr53c9x_sched(sc); 1267 } 1268 } 1269 1270 if (xs->error == XS_SELTIMEOUT) { 1271 /* Selection timeout -- discard this LUN if empty */ 1272 if (li->untagged == NULL && li->used == 0) { 1273 if (lun < NCR_NLUN) 1274 ti->lun[lun] = NULL; 1275 LIST_REMOVE(li, link); 1276 free(li, M_DEVBUF); 1277 } 1278 } 1279 1280 ncr53c9x_free_ecb(sc, ecb); 1281 ti->cmds++; 1282 mutex_exit(&sc->sc_lock); 1283 scsipi_done(xs); 1284 mutex_enter(&sc->sc_lock); 1285 } 1286 1287 void 1288 ncr53c9x_dequeue(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 1289 { 1290 struct ncr53c9x_tinfo *ti = 1291 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1292 struct ncr53c9x_linfo *li; 1293 int64_t lun = ecb->xs->xs_periph->periph_lun; 1294 1295 li = TINFO_LUN(ti, lun); 1296 #ifdef DIAGNOSTIC 1297 if (li == NULL || li->lun != lun) 1298 panic("%s: lun %" PRIx64 " for ecb %p does not exist", 1299 __func__, lun, ecb); 1300 #endif 1301 if (li->untagged == ecb) { 1302 li->busy = 0; 1303 li->untagged = NULL; 1304 } 1305 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1306 #ifdef DIAGNOSTIC 1307 if (li->queued[ecb->tag[1]] != NULL && 1308 (li->queued[ecb->tag[1]] != ecb)) 1309 panic("%s: slot %d for lun %" PRIx64 " has %p " 1310 "instead of ecb %p\n", __func__, ecb->tag[1], 1311 lun, 1312 li->queued[ecb->tag[1]], ecb); 1313 #endif 1314 li->queued[ecb->tag[1]] = NULL; 1315 li->used--; 1316 } 1317 1318 if ((ecb->flags & ECB_READY) != 0) { 1319 ecb->flags &= ~ECB_READY; 1320 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1321 } 1322 } 1323 1324 /* 1325 * INTERRUPT/PROTOCOL ENGINE 1326 */ 1327 1328 /* 1329 * Schedule an outgoing message by prioritizing it, and asserting 1330 * attention on the bus. We can only do this when we are the initiator 1331 * else there will be an illegal command interrupt. 1332 */ 1333 #define ncr53c9x_sched_msgout(m) \ 1334 do { \ 1335 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1336 NCRCMD(sc, NCRCMD_SETATN); \ 1337 sc->sc_flags |= NCR_ATN; \ 1338 sc->sc_msgpriq |= (m); \ 1339 } while (/* CONSTCOND */0) 1340 1341 static void 1342 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1343 { 1344 1345 NCR_TRACE(("[flushfifo] ")); 1346 1347 NCRCMD(sc, NCRCMD_FLUSH); 1348 1349 if (sc->sc_phase == COMMAND_PHASE || 1350 sc->sc_phase == MESSAGE_OUT_PHASE) 1351 DELAY(2); 1352 } 1353 1354 static int 1355 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1356 { 1357 int i, n; 1358 uint8_t *ibuf; 1359 1360 switch (how) { 1361 case NCR_RDFIFO_START: 1362 ibuf = sc->sc_imess; 1363 sc->sc_imlen = 0; 1364 break; 1365 case NCR_RDFIFO_CONTINUE: 1366 ibuf = sc->sc_imess + sc->sc_imlen; 1367 break; 1368 default: 1369 panic("%s: bad flag", __func__); 1370 break; 1371 } 1372 1373 /* 1374 * XXX buffer (sc_imess) size for message 1375 */ 1376 1377 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1378 1379 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1380 n *= 2; 1381 1382 for (i = 0; i < n; i++) 1383 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1384 1385 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1386 1387 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1388 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1389 1390 NCR_READ_REG(sc, NCR_FIFO); 1391 1392 ncr53c9x_flushfifo(sc); 1393 } 1394 } else { 1395 for (i = 0; i < n; i++) 1396 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1397 } 1398 1399 sc->sc_imlen += i; 1400 1401 #if 0 1402 #ifdef NCR53C9X_DEBUG 1403 { 1404 int j; 1405 1406 NCR_TRACE(("\n[rdfifo %s (%d):", 1407 (how == NCR_RDFIFO_START) ? "start" : "cont", 1408 (int)sc->sc_imlen)); 1409 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1410 for (j = 0; j < sc->sc_imlen; j++) 1411 printf(" %02x", sc->sc_imess[j]); 1412 printf("]\n"); 1413 } 1414 } 1415 #endif 1416 #endif 1417 return sc->sc_imlen; 1418 } 1419 1420 static void 1421 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, uint8_t *p, int len) 1422 { 1423 int i; 1424 1425 #ifdef NCR53C9X_DEBUG 1426 NCR_MSGS(("[wrfifo(%d):", len)); 1427 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1428 for (i = 0; i < len; i++) 1429 printf(" %02x", p[i]); 1430 printf("]\n"); 1431 } 1432 #endif 1433 1434 for (i = 0; i < len; i++) { 1435 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1436 1437 if (sc->sc_rev == NCR_VARIANT_FAS366) 1438 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1439 } 1440 } 1441 1442 int 1443 ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype, 1444 int tagid) 1445 { 1446 uint8_t selid, target, lun; 1447 struct ncr53c9x_ecb *ecb = NULL; 1448 struct ncr53c9x_tinfo *ti; 1449 struct ncr53c9x_linfo *li; 1450 1451 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1452 target = sc->sc_selid; 1453 } else { 1454 /* 1455 * The SCSI chip made a snapshot of the data bus 1456 * while the reselection was being negotiated. 1457 * This enables us to determine which target did 1458 * the reselect. 1459 */ 1460 selid = sc->sc_selid & ~(1 << sc->sc_id); 1461 if (selid & (selid - 1)) { 1462 printf("%s: reselect with invalid selid %02x;" 1463 " sending DEVICE RESET\n", 1464 device_xname(sc->sc_dev), selid); 1465 goto reset; 1466 } 1467 1468 target = ffs(selid) - 1; 1469 } 1470 lun = message & 0x07; 1471 1472 /* 1473 * Search wait queue for disconnected cmd 1474 * The list should be short, so I haven't bothered with 1475 * any more sophisticated structures than a simple 1476 * singly linked list. 1477 */ 1478 ti = &sc->sc_tinfo[target]; 1479 li = TINFO_LUN(ti, lun); 1480 1481 /* 1482 * We can get as far as the LUN with the IDENTIFY 1483 * message. Check to see if we're running an 1484 * un-tagged command. Otherwise ack the IDENTIFY 1485 * and wait for a tag message. 1486 */ 1487 if (li != NULL) { 1488 if (li->untagged != NULL && li->busy) 1489 ecb = li->untagged; 1490 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1491 /* Wait for tag to come by */ 1492 sc->sc_state = NCR_IDENTIFIED; 1493 return 0; 1494 } else if (tagtype) 1495 ecb = li->queued[tagid]; 1496 } 1497 if (ecb == NULL) { 1498 printf("%s: reselect from target %d lun %d tag %x:%x " 1499 "with no nexus; sending ABORT\n", 1500 device_xname(sc->sc_dev), target, lun, tagtype, tagid); 1501 goto abort; 1502 } 1503 1504 /* Make this nexus active again. */ 1505 sc->sc_state = NCR_CONNECTED; 1506 sc->sc_nexus = ecb; 1507 ncr53c9x_setsync(sc, ti); 1508 1509 if (ecb->flags & ECB_RESET) 1510 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1511 else if (ecb->flags & ECB_ABORT) 1512 ncr53c9x_sched_msgout(SEND_ABORT); 1513 1514 /* Do an implicit RESTORE POINTERS. */ 1515 sc->sc_dp = ecb->daddr; 1516 sc->sc_dleft = ecb->dleft; 1517 1518 return 0; 1519 1520 reset: 1521 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1522 return 1; 1523 1524 abort: 1525 ncr53c9x_sched_msgout(SEND_ABORT); 1526 return 1; 1527 } 1528 1529 static inline int 1530 __verify_msg_format(uint8_t *p, int len) 1531 { 1532 1533 if (len == 1 && MSG_IS1BYTE(p[0])) 1534 return 1; 1535 if (len == 2 && MSG_IS2BYTE(p[0])) 1536 return 1; 1537 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1538 len == p[1] + 2) 1539 return 1; 1540 1541 return 0; 1542 } 1543 1544 /* 1545 * Get an incoming message as initiator. 1546 * 1547 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1548 * byte in the FIFO 1549 */ 1550 void 1551 ncr53c9x_msgin(struct ncr53c9x_softc *sc) 1552 { 1553 1554 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1555 1556 if (sc->sc_imlen == 0) { 1557 printf("%s: msgin: no msg byte available\n", 1558 device_xname(sc->sc_dev)); 1559 return; 1560 } 1561 1562 /* 1563 * Prepare for a new message. A message should (according 1564 * to the SCSI standard) be transmitted in one single 1565 * MESSAGE_IN_PHASE. If we have been in some other phase, 1566 * then this is a new message. 1567 */ 1568 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1569 sc->sc_state != NCR_RESELECTED) { 1570 printf("%s: phase change, dropping message, " 1571 "prev %d, state %d\n", 1572 device_xname(sc->sc_dev), sc->sc_prevphase, sc->sc_state); 1573 sc->sc_flags &= ~NCR_DROP_MSGI; 1574 sc->sc_imlen = 0; 1575 } 1576 1577 /* 1578 * If we're going to reject the message, don't bother storing 1579 * the incoming bytes. But still, we need to ACK them. 1580 */ 1581 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1582 NCRCMD(sc, NCRCMD_MSGOK); 1583 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1584 return; 1585 } 1586 1587 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1588 ncr53c9x_sched_msgout(SEND_REJECT); 1589 sc->sc_flags |= NCR_DROP_MSGI; 1590 } else { 1591 uint8_t *pb; 1592 int plen; 1593 1594 switch (sc->sc_state) { 1595 /* 1596 * if received message is the first of reselection 1597 * then first byte is selid, and then message 1598 */ 1599 case NCR_RESELECTED: 1600 pb = sc->sc_imess + 1; 1601 plen = sc->sc_imlen - 1; 1602 break; 1603 default: 1604 pb = sc->sc_imess; 1605 plen = sc->sc_imlen; 1606 break; 1607 } 1608 1609 if (__verify_msg_format(pb, plen)) 1610 goto gotit; 1611 } 1612 1613 /* Ack what we have so far */ 1614 NCRCMD(sc, NCRCMD_MSGOK); 1615 return; 1616 1617 gotit: 1618 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1619 /* we got complete message, flush the imess, */ 1620 /* XXX nobody uses imlen below */ 1621 sc->sc_imlen = 0; 1622 /* 1623 * Now we should have a complete message (1 byte, 2 byte 1624 * and moderately long extended messages). We only handle 1625 * extended messages which total length is shorter than 1626 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1627 */ 1628 switch (sc->sc_state) { 1629 struct ncr53c9x_ecb *ecb; 1630 struct ncr53c9x_tinfo *ti; 1631 struct ncr53c9x_linfo *li; 1632 int lun; 1633 1634 case NCR_CONNECTED: 1635 ecb = sc->sc_nexus; 1636 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1637 1638 switch (sc->sc_imess[0]) { 1639 case MSG_CMDCOMPLETE: 1640 NCR_MSGS(("cmdcomplete ")); 1641 if (sc->sc_dleft < 0) { 1642 scsipi_printaddr(ecb->xs->xs_periph); 1643 printf("%s: got %ld extra bytes\n", 1644 device_xname(sc->sc_dev), 1645 -(long)sc->sc_dleft); 1646 sc->sc_dleft = 0; 1647 } 1648 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1649 0 : sc->sc_dleft; 1650 if ((ecb->flags & ECB_SENSE) == 0) 1651 ecb->xs->resid = ecb->dleft; 1652 sc->sc_state = NCR_CMDCOMPLETE; 1653 break; 1654 1655 case MSG_MESSAGE_REJECT: 1656 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1657 switch (sc->sc_msgout) { 1658 case SEND_TAG: 1659 /* 1660 * Target does not like tagged queuing. 1661 * - Flush the command queue 1662 * - Disable tagged queuing for the target 1663 * - Dequeue ecb from the queued array. 1664 */ 1665 printf("%s: tagged queuing rejected: " 1666 "target %d\n", 1667 device_xname(sc->sc_dev), 1668 ecb->xs->xs_periph->periph_target); 1669 1670 NCR_MSGS(("(rejected sent tag)")); 1671 NCRCMD(sc, NCRCMD_FLUSH); 1672 DELAY(1); 1673 ti->flags &= ~T_TAG; 1674 lun = ecb->xs->xs_periph->periph_lun; 1675 li = TINFO_LUN(ti, lun); 1676 if (ecb->tag[0] && 1677 li->queued[ecb->tag[1]] != NULL) { 1678 li->queued[ecb->tag[1]] = NULL; 1679 li->used--; 1680 } 1681 ecb->tag[0] = ecb->tag[1] = 0; 1682 li->untagged = ecb; 1683 li->busy = 1; 1684 break; 1685 1686 case SEND_SDTR: 1687 printf("%s: sync transfer rejected: " 1688 "target %d\n", 1689 device_xname(sc->sc_dev), 1690 ecb->xs->xs_periph->periph_target); 1691 1692 sc->sc_flags &= ~NCR_SYNCHNEGO; 1693 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1694 ncr53c9x_setsync(sc, ti); 1695 ncr53c9x_update_xfer_mode(sc, 1696 ecb->xs->xs_periph->periph_target); 1697 break; 1698 1699 case SEND_WDTR: 1700 printf("%s: wide transfer rejected: " 1701 "target %d\n", 1702 device_xname(sc->sc_dev), 1703 ecb->xs->xs_periph->periph_target); 1704 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1705 ti->width = 0; 1706 break; 1707 1708 case SEND_INIT_DET_ERR: 1709 goto abort; 1710 } 1711 break; 1712 1713 case MSG_NOOP: 1714 NCR_MSGS(("noop ")); 1715 break; 1716 1717 case MSG_HEAD_OF_Q_TAG: 1718 case MSG_SIMPLE_Q_TAG: 1719 case MSG_ORDERED_Q_TAG: 1720 NCR_MSGS(("TAG %x:%x", 1721 sc->sc_imess[0], sc->sc_imess[1])); 1722 break; 1723 1724 case MSG_DISCONNECT: 1725 NCR_MSGS(("disconnect ")); 1726 ti->dconns++; 1727 sc->sc_state = NCR_DISCONNECT; 1728 1729 /* 1730 * Mark the fact that all bytes have moved. The 1731 * target may not bother to do a SAVE POINTERS 1732 * at this stage. This flag will set the residual 1733 * count to zero on MSG COMPLETE. 1734 */ 1735 if (sc->sc_dleft == 0) 1736 ecb->flags |= ECB_TENTATIVE_DONE; 1737 1738 break; 1739 1740 case MSG_SAVEDATAPOINTER: 1741 NCR_MSGS(("save datapointer ")); 1742 ecb->daddr = sc->sc_dp; 1743 ecb->dleft = sc->sc_dleft; 1744 break; 1745 1746 case MSG_RESTOREPOINTERS: 1747 NCR_MSGS(("restore datapointer ")); 1748 sc->sc_dp = ecb->daddr; 1749 sc->sc_dleft = ecb->dleft; 1750 break; 1751 1752 case MSG_EXTENDED: 1753 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1754 switch (sc->sc_imess[2]) { 1755 case MSG_EXT_SDTR: 1756 NCR_MSGS(("SDTR period %d, offset %d ", 1757 sc->sc_imess[3], sc->sc_imess[4])); 1758 if (sc->sc_imess[1] != 3) 1759 goto reject; 1760 ti->period = sc->sc_imess[3]; 1761 ti->offset = sc->sc_imess[4]; 1762 ti->flags &= ~T_NEGOTIATE; 1763 if (sc->sc_minsync == 0 || 1764 ti->offset == 0 || 1765 ti->period > 124) { 1766 #if 0 1767 #ifdef NCR53C9X_DEBUG 1768 scsipi_printaddr(ecb->xs->xs_periph); 1769 printf("async mode\n"); 1770 #endif 1771 #endif 1772 ti->flags &= ~T_SYNCMODE; 1773 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1774 /* 1775 * target initiated negotiation 1776 */ 1777 ti->offset = 0; 1778 ncr53c9x_sched_msgout( 1779 SEND_SDTR); 1780 } 1781 } else { 1782 int p; 1783 1784 p = ncr53c9x_stp2cpb(sc, ti->period); 1785 ti->period = ncr53c9x_cpb2stp(sc, p); 1786 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1787 /* 1788 * target initiated negotiation 1789 */ 1790 if (ti->period < 1791 sc->sc_minsync) 1792 ti->period = 1793 sc->sc_minsync; 1794 if (ti->offset > 15) 1795 ti->offset = 15; 1796 ti->flags &= ~T_SYNCMODE; 1797 ncr53c9x_sched_msgout( 1798 SEND_SDTR); 1799 } else { 1800 /* we are sync */ 1801 ti->flags |= T_SYNCMODE; 1802 } 1803 } 1804 ncr53c9x_update_xfer_mode(sc, 1805 ecb->xs->xs_periph->periph_target); 1806 sc->sc_flags &= ~NCR_SYNCHNEGO; 1807 ncr53c9x_setsync(sc, ti); 1808 break; 1809 1810 case MSG_EXT_WDTR: 1811 #ifdef NCR53C9X_DEBUG 1812 printf("%s: wide mode %d\n", 1813 device_xname(sc->sc_dev), sc->sc_imess[3]); 1814 #endif 1815 if (sc->sc_imess[3] == 1) { 1816 ti->cfg3 |= NCRFASCFG3_EWIDE; 1817 ncr53c9x_setsync(sc, ti); 1818 } else 1819 ti->width = 0; 1820 /* 1821 * Device started width negotiation. 1822 */ 1823 if ((ti->flags & T_WDTRSENT) == 0) 1824 ncr53c9x_sched_msgout(SEND_WDTR); 1825 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1826 break; 1827 default: 1828 scsipi_printaddr(ecb->xs->xs_periph); 1829 printf("%s: unrecognized MESSAGE EXTENDED;" 1830 " sending REJECT\n", 1831 device_xname(sc->sc_dev)); 1832 goto reject; 1833 } 1834 break; 1835 case MSG_IGN_WIDE_RESIDUE: 1836 NCR_MSGS(("ignore wide residue ")); 1837 break; 1838 1839 default: 1840 NCR_MSGS(("ident ")); 1841 scsipi_printaddr(ecb->xs->xs_periph); 1842 printf("%s: unrecognized MESSAGE (%x); sending REJECT\n", 1843 device_xname(sc->sc_dev), sc->sc_imess[0]); 1844 reject: 1845 ncr53c9x_sched_msgout(SEND_REJECT); 1846 break; 1847 } 1848 break; 1849 1850 case NCR_IDENTIFIED: 1851 /* 1852 * IDENTIFY message was received and queue tag is expected now 1853 */ 1854 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1855 (sc->sc_msgify == 0)) { 1856 printf("%s: TAG reselect without IDENTIFY;" 1857 " MSG %x;" 1858 " sending DEVICE RESET\n", 1859 device_xname(sc->sc_dev), 1860 sc->sc_imess[0]); 1861 goto reset; 1862 } 1863 (void)ncr53c9x_reselect(sc, sc->sc_msgify, 1864 sc->sc_imess[0], sc->sc_imess[1]); 1865 break; 1866 1867 case NCR_RESELECTED: 1868 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1869 sc->sc_msgify = sc->sc_imess[1]; 1870 } else { 1871 printf("%s: reselect without IDENTIFY;" 1872 " MSG %x;" 1873 " sending DEVICE RESET\n", 1874 device_xname(sc->sc_dev), 1875 sc->sc_imess[1]); 1876 goto reset; 1877 } 1878 (void)ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1879 break; 1880 1881 default: 1882 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1883 device_xname(sc->sc_dev)); 1884 reset: 1885 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1886 break; 1887 1888 abort: 1889 ncr53c9x_sched_msgout(SEND_ABORT); 1890 break; 1891 } 1892 1893 /* if we have more messages to send set ATN */ 1894 if (sc->sc_msgpriq) 1895 NCRCMD(sc, NCRCMD_SETATN); 1896 1897 /* Ack last message byte */ 1898 NCRCMD(sc, NCRCMD_MSGOK); 1899 1900 /* Done, reset message pointer. */ 1901 sc->sc_flags &= ~NCR_DROP_MSGI; 1902 sc->sc_imlen = 0; 1903 } 1904 1905 1906 /* 1907 * Send the highest priority, scheduled message 1908 */ 1909 void 1910 ncr53c9x_msgout(struct ncr53c9x_softc *sc) 1911 { 1912 struct ncr53c9x_tinfo *ti; 1913 struct ncr53c9x_ecb *ecb; 1914 size_t size; 1915 1916 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1917 sc->sc_msgpriq, sc->sc_prevphase)); 1918 1919 /* 1920 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1921 * condition on the SCSI bus. The 53c9x chip 1922 * automatically turns off ATN before sending the 1923 * message byte. (see also the comment below in the 1924 * default case when picking out a message to send) 1925 */ 1926 if (sc->sc_flags & NCR_ATN) { 1927 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1928 new: 1929 NCRCMD(sc, NCRCMD_FLUSH); 1930 #if 0 1931 DELAY(1); 1932 #endif 1933 sc->sc_msgoutq = 0; 1934 sc->sc_omlen = 0; 1935 } 1936 } else { 1937 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1938 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1939 goto new; 1940 } else { 1941 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1942 device_xname(sc->sc_dev), __LINE__); 1943 } 1944 } 1945 1946 if (sc->sc_omlen == 0) { 1947 /* Pick up highest priority message */ 1948 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1949 sc->sc_msgoutq |= sc->sc_msgout; 1950 sc->sc_msgpriq &= ~sc->sc_msgout; 1951 sc->sc_omlen = 1; /* "Default" message len */ 1952 switch (sc->sc_msgout) { 1953 case SEND_SDTR: 1954 ecb = sc->sc_nexus; 1955 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1956 sc->sc_omess[0] = MSG_EXTENDED; 1957 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1958 sc->sc_omess[2] = MSG_EXT_SDTR; 1959 sc->sc_omess[3] = ti->period; 1960 sc->sc_omess[4] = ti->offset; 1961 sc->sc_omlen = 5; 1962 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1963 ti->flags |= T_SYNCMODE; 1964 ncr53c9x_setsync(sc, ti); 1965 } 1966 break; 1967 case SEND_WDTR: 1968 ecb = sc->sc_nexus; 1969 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1970 sc->sc_omess[0] = MSG_EXTENDED; 1971 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1972 sc->sc_omess[2] = MSG_EXT_WDTR; 1973 sc->sc_omess[3] = ti->width; 1974 sc->sc_omlen = 4; 1975 break; 1976 case SEND_IDENTIFY: 1977 if (sc->sc_state != NCR_CONNECTED) { 1978 printf("%s at line %d: no nexus\n", 1979 device_xname(sc->sc_dev), __LINE__); 1980 } 1981 ecb = sc->sc_nexus; 1982 sc->sc_omess[0] = 1983 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1984 break; 1985 case SEND_TAG: 1986 if (sc->sc_state != NCR_CONNECTED) { 1987 printf("%s at line %d: no nexus\n", 1988 device_xname(sc->sc_dev), __LINE__); 1989 } 1990 ecb = sc->sc_nexus; 1991 sc->sc_omess[0] = ecb->tag[0]; 1992 sc->sc_omess[1] = ecb->tag[1]; 1993 sc->sc_omlen = 2; 1994 break; 1995 case SEND_DEV_RESET: 1996 sc->sc_flags |= NCR_ABORTING; 1997 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1998 ecb = sc->sc_nexus; 1999 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 2000 ti->flags &= ~T_SYNCMODE; 2001 ncr53c9x_update_xfer_mode(sc, 2002 ecb->xs->xs_periph->periph_target); 2003 if ((ti->flags & T_SYNCHOFF) == 0) 2004 /* We can re-start sync negotiation */ 2005 ti->flags |= T_NEGOTIATE; 2006 break; 2007 case SEND_PARITY_ERROR: 2008 sc->sc_omess[0] = MSG_PARITY_ERROR; 2009 break; 2010 case SEND_ABORT: 2011 sc->sc_flags |= NCR_ABORTING; 2012 sc->sc_omess[0] = MSG_ABORT; 2013 break; 2014 case SEND_INIT_DET_ERR: 2015 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 2016 break; 2017 case SEND_REJECT: 2018 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 2019 break; 2020 default: 2021 /* 2022 * We normally do not get here, since the chip 2023 * automatically turns off ATN before the last 2024 * byte of a message is sent to the target. 2025 * However, if the target rejects our (multi-byte) 2026 * message early by switching to MSG IN phase 2027 * ATN remains on, so the target may return to 2028 * MSG OUT phase. If there are no scheduled messages 2029 * left we send a NO-OP. 2030 * 2031 * XXX - Note that this leaves no useful purpose for 2032 * the NCR_ATN flag. 2033 */ 2034 sc->sc_flags &= ~NCR_ATN; 2035 sc->sc_omess[0] = MSG_NOOP; 2036 break; 2037 } 2038 sc->sc_omp = sc->sc_omess; 2039 } 2040 2041 #ifdef DEBUG 2042 if (ncr53c9x_debug & NCR_SHOWMSGS) { 2043 int i; 2044 2045 NCR_MSGS(("<msgout:")); 2046 for (i = 0; i < sc->sc_omlen; i++) 2047 NCR_MSGS((" %02x", sc->sc_omess[i])); 2048 NCR_MSGS(("> ")); 2049 } 2050 #endif 2051 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2052 /* 2053 * XXX fifo size 2054 */ 2055 ncr53c9x_flushfifo(sc); 2056 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2057 sc->sc_cmdlen = 0; 2058 NCRCMD(sc, NCRCMD_TRANS); 2059 } else { 2060 /* (re)send the message */ 2061 size = uimin(sc->sc_omlen, sc->sc_maxxfer); 2062 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2063 /* Program the SCSI counter */ 2064 NCR_SET_COUNT(sc, size); 2065 2066 /* Load the count in and start the message-out transfer */ 2067 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 2068 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2069 NCRDMA_GO(sc); 2070 } 2071 } 2072 2073 /* 2074 * This is the most critical part of the driver, and has to know 2075 * how to deal with *all* error conditions and phases from the SCSI 2076 * bus. If there are no errors and the DMA was active, then call the 2077 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2078 * and we can return from here without further processing. 2079 * 2080 * Most of this needs verifying. 2081 */ 2082 int 2083 ncr53c9x_intr(void *arg) 2084 { 2085 struct ncr53c9x_softc *sc = arg; 2086 struct ncr53c9x_ecb *ecb; 2087 struct scsipi_periph *periph; 2088 struct ncr53c9x_tinfo *ti; 2089 size_t size; 2090 int nfifo; 2091 2092 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2093 2094 if (!NCRDMA_ISINTR(sc)) 2095 return 0; 2096 2097 mutex_enter(&sc->sc_lock); 2098 again: 2099 /* and what do the registers say... */ 2100 ncr53c9x_readregs(sc); 2101 2102 sc->sc_intrcnt.ev_count++; 2103 2104 /* 2105 * At the moment, only a SCSI Bus Reset or Illegal 2106 * Command are classed as errors. A disconnect is a 2107 * valid condition, and we let the code check is the 2108 * "NCR_BUSFREE_OK" flag was set before declaring it 2109 * and error. 2110 * 2111 * Also, the status register tells us about "Gross 2112 * Errors" and "Parity errors". Only the Gross Error 2113 * is really bad, and the parity errors are dealt 2114 * with later 2115 * 2116 * TODO 2117 * If there are too many parity error, go to slow 2118 * cable mode ? 2119 */ 2120 2121 /* SCSI Reset */ 2122 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2123 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2124 NCRCMD(sc, NCRCMD_FLUSH); 2125 DELAY(1); 2126 } 2127 if (sc->sc_state != NCR_SBR) { 2128 printf("%s: SCSI bus reset\n", 2129 device_xname(sc->sc_dev)); 2130 ncr53c9x_init(sc, 0); /* Restart everything */ 2131 goto out; 2132 } 2133 #if 0 2134 /*XXX*/ printf("<expected bus reset: " 2135 "[intr %x, stat %x, step %d]>\n", 2136 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2137 #endif 2138 if (sc->sc_nexus != NULL) 2139 panic("%s: nexus in reset state", 2140 device_xname(sc->sc_dev)); 2141 goto sched; 2142 } 2143 2144 ecb = sc->sc_nexus; 2145 2146 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2147 if (sc->sc_espintr & NCRINTR_ERR || 2148 sc->sc_espstat & NCRSTAT_GE) { 2149 2150 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2151 /* Gross Error; no target ? */ 2152 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2153 NCRCMD(sc, NCRCMD_FLUSH); 2154 DELAY(1); 2155 } 2156 if (sc->sc_state == NCR_CONNECTED || 2157 sc->sc_state == NCR_SELECTING) { 2158 ecb->xs->error = XS_TIMEOUT; 2159 ncr53c9x_done(sc, ecb); 2160 } 2161 goto out; 2162 } 2163 2164 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2165 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2166 /* 2167 * Eat away "Illegal command" interrupt 2168 * on a ESP100 caused by a re-selection 2169 * while we were trying to select 2170 * another target. 2171 */ 2172 #ifdef NCR53C9X_DEBUG 2173 printf("%s: ESP100 work-around activated\n", 2174 device_xname(sc->sc_dev)); 2175 #endif 2176 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2177 goto out; 2178 } 2179 /* illegal command, out of sync ? */ 2180 printf("%s: illegal command: 0x%x " 2181 "(state %d, phase %x, prevphase %x)\n", 2182 device_xname(sc->sc_dev), sc->sc_lastcmd, 2183 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2184 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2185 NCRCMD(sc, NCRCMD_FLUSH); 2186 DELAY(1); 2187 } 2188 ncr53c9x_init(sc, 1); /* Restart everything */ 2189 goto out; 2190 } 2191 } 2192 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2193 2194 /* 2195 * Call if DMA is active. 2196 * 2197 * If DMA_INTR returns true, then maybe go 'round the loop 2198 * again in case there is no more DMA queued, but a phase 2199 * change is expected. 2200 */ 2201 if (NCRDMA_ISACTIVE(sc)) { 2202 int r = NCRDMA_INTR(sc); 2203 if (r == -1) { 2204 printf("%s: DMA error; resetting\n", 2205 device_xname(sc->sc_dev)); 2206 ncr53c9x_init(sc, 1); 2207 goto out; 2208 } 2209 /* If DMA active here, then go back to work... */ 2210 if (NCRDMA_ISACTIVE(sc)) 2211 goto out; 2212 2213 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2214 /* 2215 * DMA not completed. If we can not find a 2216 * acceptable explanation, print a diagnostic. 2217 */ 2218 if (sc->sc_state == NCR_SELECTING) 2219 /* 2220 * This can happen if we are reselected 2221 * while using DMA to select a target. 2222 */ 2223 /*void*/; 2224 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2225 /* 2226 * Our (multi-byte) message (eg SDTR) was 2227 * interrupted by the target to send 2228 * a MSG REJECT. 2229 * Print diagnostic if current phase 2230 * is not MESSAGE IN. 2231 */ 2232 if (sc->sc_phase != MESSAGE_IN_PHASE) 2233 printf("%s: !TC on MSG OUT" 2234 " [intr %x, stat %x, step %d]" 2235 " prevphase %x, resid %lx\n", 2236 device_xname(sc->sc_dev), 2237 sc->sc_espintr, 2238 sc->sc_espstat, 2239 sc->sc_espstep, 2240 sc->sc_prevphase, 2241 (u_long)sc->sc_omlen); 2242 } else if (sc->sc_dleft == 0) { 2243 /* 2244 * The DMA operation was started for 2245 * a DATA transfer. Print a diagnostic 2246 * if the DMA counter and TC bit 2247 * appear to be out of sync. 2248 */ 2249 printf("%s: !TC on DATA XFER" 2250 " [intr %x, stat %x, step %d]" 2251 " prevphase %x, resid %x\n", 2252 device_xname(sc->sc_dev), 2253 sc->sc_espintr, 2254 sc->sc_espstat, 2255 sc->sc_espstep, 2256 sc->sc_prevphase, 2257 ecb ? ecb->dleft : -1); 2258 } 2259 } 2260 } 2261 2262 /* 2263 * Check for less serious errors. 2264 */ 2265 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2266 printf("%s: SCSI bus parity error\n", device_xname(sc->sc_dev)); 2267 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2268 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2269 else 2270 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2271 } 2272 2273 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2274 sc->sc_msgify = 0; 2275 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2276 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2277 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2278 NCRCMD(sc, NCRCMD_FLUSH); 2279 #if 0 2280 DELAY(1); 2281 #endif 2282 } 2283 /* 2284 * This command must (apparently) be issued within 2285 * 250mS of a disconnect. So here you are... 2286 */ 2287 NCRCMD(sc, NCRCMD_ENSEL); 2288 2289 switch (sc->sc_state) { 2290 case NCR_RESELECTED: 2291 goto sched; 2292 2293 case NCR_SELECTING: 2294 { 2295 struct ncr53c9x_linfo *li; 2296 2297 ecb->xs->error = XS_SELTIMEOUT; 2298 2299 /* Selection timeout -- discard all LUNs if empty */ 2300 periph = ecb->xs->xs_periph; 2301 ti = &sc->sc_tinfo[periph->periph_target]; 2302 li = LIST_FIRST(&ti->luns); 2303 while (li != NULL) { 2304 if (li->untagged == NULL && li->used == 0) { 2305 if (li->lun < NCR_NLUN) 2306 ti->lun[li->lun] = NULL; 2307 LIST_REMOVE(li, link); 2308 free(li, M_DEVBUF); 2309 /* 2310 * Restart the search at the beginning 2311 */ 2312 li = LIST_FIRST(&ti->luns); 2313 continue; 2314 } 2315 li = LIST_NEXT(li, link); 2316 } 2317 goto finish; 2318 } 2319 case NCR_CONNECTED: 2320 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2321 #ifdef NCR53C9X_DEBUG 2322 if (ecb != NULL) 2323 scsipi_printaddr(ecb->xs->xs_periph); 2324 printf("sync nego not completed!\n"); 2325 #endif 2326 ti = &sc->sc_tinfo[ 2327 ecb->xs->xs_periph->periph_target]; 2328 sc->sc_flags &= ~NCR_SYNCHNEGO; 2329 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2330 } 2331 2332 /* it may be OK to disconnect */ 2333 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2334 /* 2335 * Section 5.1.1 of the SCSI 2 spec 2336 * suggests issuing a REQUEST SENSE 2337 * following an unexpected disconnect. 2338 * Some devices go into a contingent 2339 * allegiance condition when 2340 * disconnecting, and this is necessary 2341 * to clean up their state. 2342 */ 2343 printf("%s: unexpected disconnect " 2344 "[state %d, intr %x, stat %x, phase(c %x, p %x)]; ", 2345 device_xname(sc->sc_dev), sc->sc_state, 2346 sc->sc_espintr, sc->sc_espstat, 2347 sc->sc_phase, sc->sc_prevphase); 2348 2349 if ((ecb->flags & ECB_SENSE) != 0) { 2350 printf("resetting\n"); 2351 goto reset; 2352 } 2353 printf("sending REQUEST SENSE\n"); 2354 callout_stop(&ecb->xs->xs_callout); 2355 ncr53c9x_sense(sc, ecb); 2356 goto out; 2357 } 2358 2359 ecb->xs->error = XS_TIMEOUT; 2360 goto finish; 2361 2362 case NCR_DISCONNECT: 2363 sc->sc_nexus = NULL; 2364 goto sched; 2365 2366 case NCR_CMDCOMPLETE: 2367 goto finish; 2368 } 2369 } 2370 2371 switch (sc->sc_state) { 2372 2373 case NCR_SBR: 2374 printf("%s: waiting for SCSI Bus Reset to happen\n", 2375 device_xname(sc->sc_dev)); 2376 goto out; 2377 2378 case NCR_RESELECTED: 2379 /* 2380 * we must be continuing a message ? 2381 */ 2382 printf("%s: unhandled reselect continuation, " 2383 "state %d, intr %02x\n", 2384 device_xname(sc->sc_dev), sc->sc_state, sc->sc_espintr); 2385 ncr53c9x_init(sc, 1); 2386 goto out; 2387 2388 case NCR_IDENTIFIED: 2389 ecb = sc->sc_nexus; 2390 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2391 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2392 /* 2393 * Things are seriously screwed up. 2394 * Pull the brakes, i.e. reset 2395 */ 2396 printf("%s: target didn't send tag: %d bytes in fifo\n", 2397 device_xname(sc->sc_dev), i); 2398 /* Drain and display fifo */ 2399 while (i-- > 0) 2400 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2401 2402 ncr53c9x_init(sc, 1); 2403 goto out; 2404 } else 2405 goto msgin; 2406 2407 case NCR_IDLE: 2408 case NCR_SELECTING: 2409 ecb = sc->sc_nexus; 2410 if (sc->sc_espintr & NCRINTR_RESEL) { 2411 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2412 sc->sc_flags = 0; 2413 /* 2414 * If we're trying to select a 2415 * target ourselves, push our command 2416 * back into the ready list. 2417 */ 2418 if (sc->sc_state == NCR_SELECTING) { 2419 NCR_INTS(("backoff selector ")); 2420 callout_stop(&ecb->xs->xs_callout); 2421 ncr53c9x_dequeue(sc, ecb); 2422 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2423 ecb->flags |= ECB_READY; 2424 ecb = sc->sc_nexus = NULL; 2425 } 2426 sc->sc_state = NCR_RESELECTED; 2427 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2428 /* 2429 * Things are seriously screwed up. 2430 * Pull the brakes, i.e. reset 2431 */ 2432 printf("%s: target didn't identify\n", 2433 device_xname(sc->sc_dev)); 2434 ncr53c9x_init(sc, 1); 2435 goto out; 2436 } 2437 /* 2438 * The C90 only inhibits FIFO writes until reselection 2439 * is complete, instead of waiting until the interrupt 2440 * status register has been read. So, if the reselect 2441 * happens while we were entering command bytes (for 2442 * another target) some of those bytes can appear in 2443 * the FIFO here, after the interrupt is taken. 2444 * 2445 * To remedy this situation, pull the Selection ID 2446 * and Identify message from the FIFO directly, and 2447 * ignore any extraneous fifo contents. Also, set 2448 * a flag that allows one Illegal Command Interrupt 2449 * to occur which the chip also generates as a result 2450 * of writing to the FIFO during a reselect. 2451 */ 2452 if (sc->sc_rev == NCR_VARIANT_ESP100) { 2453 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & 2454 NCRFIFO_FF; 2455 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO); 2456 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO); 2457 sc->sc_imlen = 2; 2458 if (nfifo != 2) { 2459 /* Flush the rest */ 2460 NCRCMD(sc, NCRCMD_FLUSH); 2461 } 2462 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2463 if (nfifo > 2) 2464 nfifo = 2; /* We fixed it.. */ 2465 } else 2466 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2467 2468 if (nfifo != 2) { 2469 printf("%s: RESELECT: %d bytes in FIFO! " 2470 "[intr %x, stat %x, step %d, " 2471 "prevphase %x]\n", 2472 device_xname(sc->sc_dev), 2473 nfifo, 2474 sc->sc_espintr, 2475 sc->sc_espstat, 2476 sc->sc_espstep, 2477 sc->sc_prevphase); 2478 ncr53c9x_init(sc, 1); 2479 goto out; 2480 } 2481 sc->sc_selid = sc->sc_imess[0]; 2482 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2483 2484 /* Handle identify message */ 2485 ncr53c9x_msgin(sc); 2486 2487 if (sc->sc_state != NCR_CONNECTED && 2488 sc->sc_state != NCR_IDENTIFIED) { 2489 /* IDENTIFY fail?! */ 2490 printf("%s: identify failed, " 2491 "state %d, intr %02x\n", 2492 device_xname(sc->sc_dev), 2493 sc->sc_state, sc->sc_espintr); 2494 ncr53c9x_init(sc, 1); 2495 goto out; 2496 } 2497 goto shortcut; /* ie. next phase expected soon */ 2498 } 2499 2500 #define NCRINTR_DONE (NCRINTR_FC | NCRINTR_BS) 2501 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2502 /* 2503 * Arbitration won; examine the `step' register 2504 * to determine how far the selection could progress. 2505 */ 2506 ecb = sc->sc_nexus; 2507 if (ecb == NULL) 2508 panic("%s: no nexus", __func__); 2509 2510 periph = ecb->xs->xs_periph; 2511 ti = &sc->sc_tinfo[periph->periph_target]; 2512 2513 switch (sc->sc_espstep) { 2514 case 0: 2515 /* 2516 * The target did not respond with a 2517 * message out phase - probably an old 2518 * device that doesn't recognize ATN. 2519 * Clear ATN and just continue, the 2520 * target should be in the command 2521 * phase. 2522 * XXXX check for command phase? 2523 */ 2524 NCRCMD(sc, NCRCMD_RSTATN); 2525 break; 2526 case 1: 2527 if ((ti->flags & T_NEGOTIATE) == 0 && 2528 ecb->tag[0] == 0) { 2529 printf("%s: step 1 & !NEG\n", 2530 device_xname(sc->sc_dev)); 2531 goto reset; 2532 } 2533 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2534 printf("%s: !MSGOUT\n", 2535 device_xname(sc->sc_dev)); 2536 goto reset; 2537 } 2538 if (ti->flags & T_WIDE) { 2539 ti->flags |= T_WDTRSENT; 2540 ncr53c9x_sched_msgout(SEND_WDTR); 2541 } 2542 if (ti->flags & T_NEGOTIATE) { 2543 /* Start negotiating */ 2544 ti->period = sc->sc_minsync; 2545 ti->offset = 15; 2546 sc->sc_flags |= NCR_SYNCHNEGO; 2547 if (ecb->tag[0]) 2548 ncr53c9x_sched_msgout( 2549 SEND_TAG | SEND_SDTR); 2550 else 2551 ncr53c9x_sched_msgout( 2552 SEND_SDTR); 2553 } else { 2554 /* Could not do ATN3 so send TAG */ 2555 ncr53c9x_sched_msgout(SEND_TAG); 2556 } 2557 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2558 break; 2559 case 3: 2560 /* 2561 * Grr, this is supposed to mean 2562 * "target left command phase prematurely". 2563 * It seems to happen regularly when 2564 * sync mode is on. 2565 * Look at FIFO to see if command went out. 2566 * (Timing problems?) 2567 */ 2568 if (sc->sc_features & NCR_F_DMASELECT) { 2569 if (sc->sc_cmdlen == 0) 2570 /* Hope for the best.. */ 2571 break; 2572 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2573 & NCRFIFO_FF) == 0) { 2574 /* Hope for the best.. */ 2575 break; 2576 } 2577 printf("(%s:%d:%d): selection failed;" 2578 " %d left in FIFO " 2579 "[intr %x, stat %x, step %d]\n", 2580 device_xname(sc->sc_dev), 2581 periph->periph_target, 2582 periph->periph_lun, 2583 NCR_READ_REG(sc, NCR_FFLAG) 2584 & NCRFIFO_FF, 2585 sc->sc_espintr, sc->sc_espstat, 2586 sc->sc_espstep); 2587 NCRCMD(sc, NCRCMD_FLUSH); 2588 ncr53c9x_sched_msgout(SEND_ABORT); 2589 goto out; 2590 case 2: 2591 /* Select stuck at Command Phase */ 2592 NCRCMD(sc, NCRCMD_FLUSH); 2593 break; 2594 case 4: 2595 if (sc->sc_features & NCR_F_DMASELECT && 2596 sc->sc_cmdlen != 0) 2597 printf("(%s:%d:%d): select; " 2598 "%lu left in DMA buffer " 2599 "[intr %x, stat %x, step %d]\n", 2600 device_xname(sc->sc_dev), 2601 periph->periph_target, 2602 periph->periph_lun, 2603 (u_long)sc->sc_cmdlen, 2604 sc->sc_espintr, 2605 sc->sc_espstat, 2606 sc->sc_espstep); 2607 /* So far, everything went fine */ 2608 break; 2609 } 2610 2611 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2612 /* Do an implicit RESTORE POINTERS. */ 2613 sc->sc_dp = ecb->daddr; 2614 sc->sc_dleft = ecb->dleft; 2615 sc->sc_state = NCR_CONNECTED; 2616 break; 2617 2618 } else { 2619 2620 printf("%s: unexpected status after select" 2621 ": [intr %x, stat %x, step %x]\n", 2622 device_xname(sc->sc_dev), 2623 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2624 NCRCMD(sc, NCRCMD_FLUSH); 2625 DELAY(1); 2626 goto reset; 2627 } 2628 if (sc->sc_state == NCR_IDLE) { 2629 printf("%s: stray interrupt\n", 2630 device_xname(sc->sc_dev)); 2631 mutex_exit(&sc->sc_lock); 2632 return 0; 2633 } 2634 break; 2635 2636 case NCR_CONNECTED: 2637 if ((sc->sc_flags & NCR_ICCS) != 0) { 2638 /* "Initiate Command Complete Steps" in progress */ 2639 uint8_t msg; 2640 2641 sc->sc_flags &= ~NCR_ICCS; 2642 2643 if ((sc->sc_espintr & NCRINTR_DONE) == 0) { 2644 printf("%s: ICCS: " 2645 ": [intr %x, stat %x, step %x]\n", 2646 device_xname(sc->sc_dev), 2647 sc->sc_espintr, sc->sc_espstat, 2648 sc->sc_espstep); 2649 } 2650 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2651 if (sc->sc_imlen < 2) 2652 printf("%s: can't get status, only %d bytes\n", 2653 device_xname(sc->sc_dev), 2654 (int)sc->sc_imlen); 2655 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2656 msg = sc->sc_imess[sc->sc_imlen - 1]; 2657 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2658 if (msg == MSG_CMDCOMPLETE) { 2659 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2660 ? 0 : sc->sc_dleft; 2661 if ((ecb->flags & ECB_SENSE) == 0) 2662 ecb->xs->resid = ecb->dleft; 2663 sc->sc_state = NCR_CMDCOMPLETE; 2664 } else 2665 printf("%s: STATUS_PHASE: msg %d\n", 2666 device_xname(sc->sc_dev), msg); 2667 sc->sc_imlen = 0; 2668 NCRCMD(sc, NCRCMD_MSGOK); 2669 goto shortcut; /* ie. wait for disconnect */ 2670 } 2671 break; 2672 2673 default: 2674 printf("%s: invalid state: %d [intr %x, phase(c %x, p %x)]\n", 2675 device_xname(sc->sc_dev), sc->sc_state, 2676 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase); 2677 goto reset; 2678 } 2679 2680 /* 2681 * Driver is now in state NCR_CONNECTED, i.e. we 2682 * have a current command working the SCSI bus. 2683 */ 2684 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2685 panic("%s: no nexus", __func__); 2686 } 2687 2688 switch (sc->sc_phase) { 2689 case MESSAGE_OUT_PHASE: 2690 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2691 ncr53c9x_msgout(sc); 2692 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2693 break; 2694 2695 case MESSAGE_IN_PHASE: 2696 msgin: 2697 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2698 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2699 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2700 (sc->sc_espstat2 & NCRFAS_STAT2_EMPTY) == 0) { 2701 NCRCMD(sc, NCRCMD_FLUSH); 2702 } 2703 sc->sc_flags |= NCR_WAITI; 2704 NCRCMD(sc, NCRCMD_TRANS); 2705 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2706 if ((sc->sc_flags & NCR_WAITI) == 0) { 2707 printf("%s: MSGIN: unexpected FC bit: " 2708 "[intr %x, stat %x, step %x]\n", 2709 device_xname(sc->sc_dev), 2710 sc->sc_espintr, sc->sc_espstat, 2711 sc->sc_espstep); 2712 } 2713 sc->sc_flags &= ~NCR_WAITI; 2714 ncr53c9x_rdfifo(sc, 2715 (sc->sc_prevphase == sc->sc_phase) ? 2716 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2717 ncr53c9x_msgin(sc); 2718 } else { 2719 printf("%s: MSGIN: weird bits: " 2720 "[intr %x, stat %x, step %x]\n", 2721 device_xname(sc->sc_dev), 2722 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2723 } 2724 sc->sc_prevphase = MESSAGE_IN_PHASE; 2725 goto shortcut; /* i.e. expect data to be ready */ 2726 2727 case COMMAND_PHASE: 2728 /* 2729 * Send the command block. Normally we don't see this 2730 * phase because the SEL_ATN command takes care of 2731 * all this. However, we end up here if either the 2732 * target or we wanted to exchange some more messages 2733 * first (e.g. to start negotiations). 2734 */ 2735 2736 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2737 ecb->cmd.cmd.opcode, ecb->clen)); 2738 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2739 NCRCMD(sc, NCRCMD_FLUSH); 2740 #if 0 2741 DELAY(1); 2742 #endif 2743 } 2744 if (sc->sc_features & NCR_F_DMASELECT) { 2745 /* setup DMA transfer for command */ 2746 size = ecb->clen; 2747 sc->sc_cmdlen = size; 2748 sc->sc_cmdp = (void *)&ecb->cmd.cmd; 2749 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2750 0, &size); 2751 /* Program the SCSI counter */ 2752 NCR_SET_COUNT(sc, size); 2753 2754 /* load the count in */ 2755 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 2756 2757 /* start the command transfer */ 2758 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2759 NCRDMA_GO(sc); 2760 } else { 2761 ncr53c9x_wrfifo(sc, (uint8_t *)&ecb->cmd.cmd, 2762 ecb->clen); 2763 sc->sc_cmdlen = 0; 2764 NCRCMD(sc, NCRCMD_TRANS); 2765 } 2766 sc->sc_prevphase = COMMAND_PHASE; 2767 break; 2768 2769 case DATA_OUT_PHASE: 2770 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2771 NCRCMD(sc, NCRCMD_FLUSH); 2772 size = uimin(sc->sc_dleft, sc->sc_maxxfer); 2773 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2774 sc->sc_prevphase = DATA_OUT_PHASE; 2775 goto setup_xfer; 2776 2777 case DATA_IN_PHASE: 2778 NCR_PHASE(("DATA_IN_PHASE ")); 2779 if (sc->sc_rev == NCR_VARIANT_ESP100) 2780 NCRCMD(sc, NCRCMD_FLUSH); 2781 size = uimin(sc->sc_dleft, sc->sc_maxxfer); 2782 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2783 sc->sc_prevphase = DATA_IN_PHASE; 2784 setup_xfer: 2785 /* Target returned to data phase: wipe "done" memory */ 2786 ecb->flags &= ~ECB_TENTATIVE_DONE; 2787 2788 /* Program the SCSI counter */ 2789 NCR_SET_COUNT(sc, size); 2790 2791 /* load the count in */ 2792 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA); 2793 2794 /* 2795 * Note that if `size' is 0, we've already transceived 2796 * all the bytes we want but we're still in DATA PHASE. 2797 * Apparently, the device needs padding. Also, a 2798 * transfer size of 0 means "maximum" to the chip 2799 * DMA logic. 2800 */ 2801 NCRCMD(sc, 2802 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2803 NCRDMA_GO(sc); 2804 goto out; 2805 2806 case STATUS_PHASE: 2807 NCR_PHASE(("STATUS_PHASE ")); 2808 sc->sc_flags |= NCR_ICCS; 2809 NCRCMD(sc, NCRCMD_ICCS); 2810 sc->sc_prevphase = STATUS_PHASE; 2811 goto shortcut; /* i.e. expect status results soon */ 2812 2813 case INVALID_PHASE: 2814 break; 2815 2816 default: 2817 printf("%s: unexpected bus phase; resetting\n", 2818 device_xname(sc->sc_dev)); 2819 goto reset; 2820 } 2821 2822 out: 2823 mutex_exit(&sc->sc_lock); 2824 return 1; 2825 2826 reset: 2827 ncr53c9x_init(sc, 1); 2828 goto out; 2829 2830 finish: 2831 ncr53c9x_done(sc, ecb); 2832 goto out; 2833 2834 sched: 2835 sc->sc_state = NCR_IDLE; 2836 ncr53c9x_sched(sc); 2837 goto out; 2838 2839 shortcut: 2840 /* 2841 * The idea is that many of the SCSI operations take very little 2842 * time, and going away and getting interrupted is too high an 2843 * overhead to pay. For example, selecting, sending a message 2844 * and command and then doing some work can be done in one "pass". 2845 * 2846 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2847 * at 40MHz. This needs testing. 2848 */ 2849 { 2850 struct timeval wait, cur; 2851 2852 microtime(&wait); 2853 wait.tv_usec += 50 / sc->sc_freq; 2854 if (wait.tv_usec > 1000000) { 2855 wait.tv_sec++; 2856 wait.tv_usec -= 1000000; 2857 } 2858 do { 2859 if (NCRDMA_ISINTR(sc)) 2860 goto again; 2861 microtime(&cur); 2862 } while (timercmp(&cur, &wait, <=)); 2863 } 2864 goto out; 2865 } 2866 2867 void 2868 ncr53c9x_abort(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb) 2869 { 2870 2871 /* 2 secs for the abort */ 2872 ecb->timeout = NCR_ABORT_TIMEOUT; 2873 ecb->flags |= ECB_ABORT; 2874 2875 if (ecb == sc->sc_nexus) { 2876 /* 2877 * If we're still selecting, the message will be scheduled 2878 * after selection is complete. 2879 */ 2880 if (sc->sc_state == NCR_CONNECTED) 2881 ncr53c9x_sched_msgout(SEND_ABORT); 2882 2883 /* 2884 * Reschedule timeout. 2885 */ 2886 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2887 ncr53c9x_timeout, ecb); 2888 } else { 2889 /* 2890 * Just leave the command where it is. 2891 * XXX - what choice do we have but to reset the SCSI 2892 * eventually? 2893 */ 2894 if (sc->sc_state == NCR_IDLE) 2895 ncr53c9x_sched(sc); 2896 } 2897 } 2898 2899 void 2900 ncr53c9x_timeout(void *arg) 2901 { 2902 struct ncr53c9x_ecb *ecb = arg; 2903 struct scsipi_xfer *xs = ecb->xs; 2904 struct scsipi_periph *periph = xs->xs_periph; 2905 struct ncr53c9x_softc *sc; 2906 struct ncr53c9x_tinfo *ti; 2907 2908 sc = device_private(periph->periph_channel->chan_adapter->adapt_dev); 2909 ti = &sc->sc_tinfo[periph->periph_target]; 2910 2911 scsipi_printaddr(periph); 2912 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2913 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2914 "msg(q %x,o %x) %s>", 2915 device_xname(sc->sc_dev), 2916 ecb, ecb->flags, ecb->dleft, ecb->stat, 2917 sc->sc_state, sc->sc_nexus, 2918 NCR_READ_REG(sc, NCR_STAT), 2919 sc->sc_phase, sc->sc_prevphase, 2920 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2921 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2922 #if NCR53C9X_DEBUG > 1 2923 printf("TRACE: %s.", ecb->trace); 2924 #endif 2925 2926 mutex_enter(&sc->sc_lock); 2927 2928 if (ecb->flags & ECB_ABORT) { 2929 /* abort timed out */ 2930 printf(" AGAIN\n"); 2931 2932 ncr53c9x_init(sc, 1); 2933 } else { 2934 /* abort the operation that has timed out */ 2935 printf("\n"); 2936 xs->error = XS_TIMEOUT; 2937 ncr53c9x_abort(sc, ecb); 2938 2939 /* Disable sync mode if stuck in a data phase */ 2940 if (ecb == sc->sc_nexus && 2941 (ti->flags & T_SYNCMODE) != 0 && 2942 (sc->sc_phase & (MSGI | CDI)) == 0) { 2943 /* XXX ASYNC CALLBACK! */ 2944 scsipi_printaddr(periph); 2945 printf("sync negotiation disabled\n"); 2946 sc->sc_cfflags |= 2947 (1 << ((periph->periph_target & 7) + 8)); 2948 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2949 } 2950 } 2951 2952 mutex_exit(&sc->sc_lock); 2953 } 2954 2955 void 2956 ncr53c9x_watch(void *arg) 2957 { 2958 struct ncr53c9x_softc *sc = arg; 2959 struct ncr53c9x_tinfo *ti; 2960 struct ncr53c9x_linfo *li; 2961 int t; 2962 /* Delete any structures that have not been used in 10min. */ 2963 time_t old = time_second - (10 * 60); 2964 2965 mutex_enter(&sc->sc_lock); 2966 for (t = 0; t < sc->sc_ntarg; t++) { 2967 ti = &sc->sc_tinfo[t]; 2968 li = LIST_FIRST(&ti->luns); 2969 while (li) { 2970 if (li->last_used < old && 2971 li->untagged == NULL && 2972 li->used == 0) { 2973 if (li->lun < NCR_NLUN) 2974 ti->lun[li->lun] = NULL; 2975 LIST_REMOVE(li, link); 2976 free(li, M_DEVBUF); 2977 /* Restart the search at the beginning */ 2978 li = LIST_FIRST(&ti->luns); 2979 continue; 2980 } 2981 li = LIST_NEXT(li, link); 2982 } 2983 } 2984 mutex_exit(&sc->sc_lock); 2985 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2986 } 2987
Indexes created Sun Sep 28 07:09:56 GMT 2025