ncr53c9x.c revision 1.36.2.17 1 /* $NetBSD: ncr53c9x.c,v 1.36.2.17 2001/04/24 07:29:31 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/proc.h>
90 #include <sys/queue.h>
91 #include <sys/pool.h>
92 #include <sys/scsiio.h>
93
94 #include <dev/scsipi/scsi_all.h>
95 #include <dev/scsipi/scsipi_all.h>
96 #include <dev/scsipi/scsiconf.h>
97 #include <dev/scsipi/scsi_message.h>
98
99 #include <dev/ic/ncr53c9xreg.h>
100 #include <dev/ic/ncr53c9xvar.h>
101
102 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
103 #ifdef DEBUG
104 int ncr53c9x_notag = 0;
105 #endif
106
107 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
108 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
109 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
110 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
111 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
112 struct scsipi_xfer *, int);
113 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
114 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
115 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
117 /*static*/ void ncr53c9x_timeout(void *arg);
118 /*static*/ void ncr53c9x_watch(void *arg);
119 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
120 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
121 struct ncr53c9x_ecb *);
122 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
123 caddr_t, int, struct proc *);
124
125 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
126 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
127 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
128
129 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
130 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
131 struct ncr53c9x_tinfo *);
132 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
133 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
134 int64_t lun);
135
136 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
137
138 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
139 #define NCR_RDFIFO_START 0
140 #define NCR_RDFIFO_CONTINUE 1
141
142
143 #define NCR_SET_COUNT(sc, size) do { \
144 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
145 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
146 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
147 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
148 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
149 } \
150 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
151 NCR_WRITE_REG(sc, NCR_RCH, 0); \
152 } \
153 } while (0)
154
155 static int ecb_pool_initialized = 0;
156 static struct pool ecb_pool;
157
158 /*
159 * Names for the NCR53c9x variants, correspnding to the variant tags
160 * in ncr53c9xvar.h.
161 */
162 static const char *ncr53c9x_variant_names[] = {
163 "ESP100",
164 "ESP100A",
165 "ESP200",
166 "NCR53C94",
167 "NCR53C96",
168 "ESP406",
169 "FAS408",
170 "FAS216",
171 "AM53C974",
172 "FAS366/HME",
173 };
174
175 /*
176 * Search linked list for LUN info by LUN id.
177 */
178 static struct ncr53c9x_linfo *
179 ncr53c9x_lunsearch(ti, lun)
180 struct ncr53c9x_tinfo *ti;
181 int64_t lun;
182 {
183 struct ncr53c9x_linfo *li;
184 LIST_FOREACH(li, &ti->luns, link)
185 if (li->lun == lun)
186 return (li);
187 return (NULL);
188 }
189
190 /*
191 * Attach this instance, and then all the sub-devices
192 */
193 void
194 ncr53c9x_attach(sc)
195 struct ncr53c9x_softc *sc;
196 {
197 struct scsipi_adapter *adapt = &sc->sc_adapter;
198 struct scsipi_channel *chan = &sc->sc_channel;
199
200 callout_init(&sc->sc_watchdog);
201 /*
202 * Allocate SCSI message buffers.
203 * Front-ends can override allocation to avoid alignment
204 * handling in the DMA engines. Note that that ncr53c9x_msgout()
205 * can request a 1 byte DMA transfer.
206 */
207 if (sc->sc_omess == NULL)
208 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
209
210 if (sc->sc_imess == NULL)
211 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
212
213 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
214 printf("out of memory\n");
215 return;
216 }
217
218 /*
219 * Note, the front-end has set us up to print the chip variation.
220 */
221 if (sc->sc_rev >= NCR_VARIANT_MAX) {
222 printf("\n%s: unknown variant %d, devices not attached\n",
223 sc->sc_dev.dv_xname, sc->sc_rev);
224 return;
225 }
226
227 printf(": %s, %dMHz, SCSI ID %d\n",
228 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
229
230 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
231
232 /* The value *must not* be == 1. Make it 2 */
233 if (sc->sc_ccf == 1)
234 sc->sc_ccf = 2;
235
236 /*
237 * The recommended timeout is 250ms. This register is loaded
238 * with a value calculated as follows, from the docs:
239 *
240 * (timout period) x (CLK frequency)
241 * reg = -------------------------------------
242 * 8192 x (Clock Conversion Factor)
243 *
244 * Since CCF has a linear relation to CLK, this generally computes
245 * to the constant of 153.
246 */
247 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
248
249 /* CCF register only has 3 bits; 0 is actually 8 */
250 sc->sc_ccf &= 7;
251
252 /*
253 * Fill in the scsipi_adapter.
254 */
255 adapt->adapt_dev = &sc->sc_dev;
256 adapt->adapt_nchannels = 1;
257 adapt->adapt_openings = 256;
258 adapt->adapt_max_periph = 256;
259 adapt->adapt_ioctl = ncr53c9x_ioctl;
260 /* adapt_request initialized by front-end */
261 /* adapt_minphys initialized by front-end */
262
263 /*
264 * Fill in the scsipi_channel.
265 */
266 memset(chan, 0, sizeof(*chan));
267 chan->chan_adapter = adapt;
268 chan->chan_bustype = &scsi_bustype;
269 chan->chan_channel = 0;
270 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */
271 chan->chan_nluns = 8;
272 chan->chan_id = sc->sc_id;
273
274 /*
275 * Add reference to adapter so that we drop the reference after
276 * config_found() to make sure the adatper is disabled.
277 */
278 if (scsipi_adapter_addref(adapt) != 0) {
279 printf("%s: unable to enable controller\n",
280 sc->sc_dev.dv_xname);
281 return;
282 }
283
284 /* Reset state & bus */
285 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
286 sc->sc_state = 0;
287 ncr53c9x_init(sc, 1);
288
289 /*
290 * Now try to attach all the sub-devices
291 */
292 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
293
294 scsipi_adapter_delref(adapt);
295 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
296 }
297
298 int
299 ncr53c9x_detach(sc, flags)
300 struct ncr53c9x_softc *sc;
301 int flags;
302 {
303 int error;
304
305 if (sc->sc_child) {
306 error = config_detach(sc->sc_child, flags);
307 if (error)
308 return (error);
309 }
310
311 free(sc->sc_imess, M_DEVBUF);
312 free(sc->sc_omess, M_DEVBUF);
313
314 return (0);
315 }
316
317 /*
318 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
319 * only this controller, but kills any on-going commands, and also stops
320 * and resets the DMA.
321 *
322 * After reset, registers are loaded with the defaults from the attach
323 * routine above.
324 */
325 void
326 ncr53c9x_reset(sc)
327 struct ncr53c9x_softc *sc;
328 {
329
330 /* reset DMA first */
331 NCRDMA_RESET(sc);
332
333 /* reset SCSI chip */
334 NCRCMD(sc, NCRCMD_RSTCHIP);
335 NCRCMD(sc, NCRCMD_NOP);
336 DELAY(500);
337
338 /* do these backwards, and fall through */
339 switch (sc->sc_rev) {
340 case NCR_VARIANT_ESP406:
341 case NCR_VARIANT_FAS408:
342 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
343 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
344 case NCR_VARIANT_AM53C974:
345 case NCR_VARIANT_FAS216:
346 case NCR_VARIANT_NCR53C94:
347 case NCR_VARIANT_NCR53C96:
348 case NCR_VARIANT_ESP200:
349 sc->sc_features |= NCR_F_HASCFG3;
350 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
351 case NCR_VARIANT_ESP100A:
352 sc->sc_features |= NCR_F_SELATN3;
353 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
354 case NCR_VARIANT_ESP100:
355 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
356 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
357 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
358 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
359 break;
360
361 case NCR_VARIANT_FAS366:
362 sc->sc_features |=
363 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
364 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
365 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
366 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
367 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
368 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
369 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
370 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
371 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
372 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
373 break;
374
375 default:
376 printf("%s: unknown revision code, assuming ESP100\n",
377 sc->sc_dev.dv_xname);
378 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
379 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
380 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
381 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
382 }
383
384 if (sc->sc_rev == NCR_VARIANT_AM53C974)
385 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
386
387 #if 0
388 printf("%s: ncr53c9x_reset: revision %d\n",
389 sc->sc_dev.dv_xname, sc->sc_rev);
390 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
391 "ccf 0x%x, timeout 0x%x\n",
392 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
393 sc->sc_ccf, sc->sc_timeout);
394 #endif
395 }
396
397 /*
398 * Reset the SCSI bus, but not the chip
399 */
400 void
401 ncr53c9x_scsi_reset(sc)
402 struct ncr53c9x_softc *sc;
403 {
404
405 (*sc->sc_glue->gl_dma_stop)(sc);
406
407 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
408 NCRCMD(sc, NCRCMD_RSTSCSI);
409 }
410
411 /*
412 * Initialize ncr53c9x state machine
413 */
414 void
415 ncr53c9x_init(sc, doreset)
416 struct ncr53c9x_softc *sc;
417 int doreset;
418 {
419 struct ncr53c9x_ecb *ecb;
420 struct ncr53c9x_linfo *li;
421 int i, r;
422
423 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
424
425 if (!ecb_pool_initialized) {
426 /* All instances share this pool */
427 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
428 "ncr53c9x_ecb", 0, NULL, NULL, 0);
429 ecb_pool_initialized = 1;
430 }
431
432 if (sc->sc_state == 0) {
433 /* First time through; initialize. */
434
435 TAILQ_INIT(&sc->ready_list);
436 sc->sc_nexus = NULL;
437 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
438 for (r = 0; r < NCR_NTARG; r++) {
439 LIST_INIT(&sc->sc_tinfo[r].luns);
440 }
441 } else {
442 /* Cancel any active commands. */
443 sc->sc_state = NCR_CLEANING;
444 sc->sc_msgify = 0;
445 if ((ecb = sc->sc_nexus) != NULL) {
446 ecb->xs->error = XS_TIMEOUT;
447 ncr53c9x_done(sc, ecb);
448 }
449 /* Cancel outstanding disconnected commands on each LUN */
450 for (r = 0; r < 8; r++) {
451 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
452 if ((ecb = li->untagged) != NULL) {
453 li->untagged = NULL;
454 /*
455 * XXXXXXX
456 *
457 * Should we terminate a command
458 * that never reached the disk?
459 */
460 li->busy = 0;
461 ecb->xs->error = XS_TIMEOUT;
462 ncr53c9x_done(sc, ecb);
463 }
464 for (i = 0; i < 256; i++)
465 if ((ecb = li->queued[i])) {
466 li->queued[i] = NULL;
467 ecb->xs->error = XS_TIMEOUT;
468 ncr53c9x_done(sc, ecb);
469 }
470 li->used = 0;
471 }
472 }
473 }
474
475 /*
476 * reset the chip to a known state
477 */
478 ncr53c9x_reset(sc);
479
480 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
481 for (r = 0; r < 8; r++) {
482 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
483 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
484
485 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
486 ? 0 : T_SYNCHOFF) |
487 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
488 T_NEED_TO_RESET;
489 #ifdef DEBUG
490 if (ncr53c9x_notag)
491 ti->flags &= ~T_TAG;
492 #endif
493 ti->period = sc->sc_minsync;
494 ti->offset = 0;
495 ti->cfg3 = 0;
496 }
497
498 if (doreset) {
499 sc->sc_state = NCR_SBR;
500 NCRCMD(sc, NCRCMD_RSTSCSI);
501 } else {
502 sc->sc_state = NCR_IDLE;
503 ncr53c9x_sched(sc);
504 }
505 }
506
507 /*
508 * Read the NCR registers, and save their contents for later use.
509 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
510 * NCR_INTR - so make sure it is the last read.
511 *
512 * I think that (from reading the docs) most bits in these registers
513 * only make sense when he DMA CSR has an interrupt showing. Call only
514 * if an interrupt is pending.
515 */
516 __inline__ void
517 ncr53c9x_readregs(sc)
518 struct ncr53c9x_softc *sc;
519 {
520
521 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
522 /* Only the stepo bits are of interest */
523 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
524
525 if (sc->sc_rev == NCR_VARIANT_FAS366)
526 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
527
528 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
529
530 if (sc->sc_glue->gl_clear_latched_intr != NULL)
531 (*sc->sc_glue->gl_clear_latched_intr)(sc);
532
533 /*
534 * Determine the SCSI bus phase, return either a real SCSI bus phase
535 * or some pseudo phase we use to detect certain exceptions.
536 */
537
538 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
539 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
540
541 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
542 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
543 }
544
545 /*
546 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
547 */
548 static inline int
549 ncr53c9x_stp2cpb(sc, period)
550 struct ncr53c9x_softc *sc;
551 int period;
552 {
553 int v;
554 v = (sc->sc_freq * period) / 250;
555 if (ncr53c9x_cpb2stp(sc, v) < period)
556 /* Correct round-down error */
557 v++;
558 return (v);
559 }
560
561 static inline void
562 ncr53c9x_setsync(sc, ti)
563 struct ncr53c9x_softc *sc;
564 struct ncr53c9x_tinfo *ti;
565 {
566 u_char syncoff, synctp;
567 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
568
569 if (ti->flags & T_SYNCMODE) {
570 syncoff = ti->offset;
571 synctp = ncr53c9x_stp2cpb(sc, ti->period);
572 if (sc->sc_features & NCR_F_FASTSCSI) {
573 /*
574 * If the period is 200ns or less (ti->period <= 50),
575 * put the chip in Fast SCSI mode.
576 */
577 if (ti->period <= 50)
578 /*
579 * There are (at least) 4 variations of the
580 * configuration 3 register. The drive attach
581 * routine sets the appropriate bit to put the
582 * chip into Fast SCSI mode so that it doesn't
583 * have to be figured out here each time.
584 */
585 cfg3 |= sc->sc_cfg3_fscsi;
586 }
587
588 /*
589 * Am53c974 requires different SYNCTP values when the
590 * FSCSI bit is off.
591 */
592 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
593 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
594 synctp--;
595 } else {
596 syncoff = 0;
597 synctp = 0;
598 }
599
600 if (sc->sc_features & NCR_F_HASCFG3)
601 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
602
603 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
604 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
605 }
606
607 /*
608 * Send a command to a target, set the driver state to NCR_SELECTING
609 * and let the caller take care of the rest.
610 *
611 * Keeping this as a function allows me to say that this may be done
612 * by DMA instead of programmed I/O soon.
613 */
614 void
615 ncr53c9x_select(sc, ecb)
616 struct ncr53c9x_softc *sc;
617 struct ncr53c9x_ecb *ecb;
618 {
619 struct scsipi_periph *periph = ecb->xs->xs_periph;
620 int target = periph->periph_target;
621 int lun = periph->periph_lun;
622 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
623 int tiflags = ti->flags;
624 u_char *cmd;
625 int clen;
626 int selatn3, selatns;
627 size_t dmasize;
628
629 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
630 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
631
632 sc->sc_state = NCR_SELECTING;
633 /*
634 * Schedule the timeout now, the first time we will go away
635 * expecting to come back due to an interrupt, because it is
636 * always possible that the interrupt may never happen.
637 */
638 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
639 int timeout = ecb->timeout;
640
641 if (hz > 100 && timeout > 1000)
642 timeout = (timeout / 1000) * hz;
643 else
644 timeout = (timeout * hz) / 1000;
645
646 callout_reset(&ecb->xs->xs_callout, timeout,
647 ncr53c9x_timeout, ecb);
648 }
649
650 /*
651 * The docs say the target register is never reset, and I
652 * can't think of a better place to set it
653 */
654 if (sc->sc_rev == NCR_VARIANT_FAS366) {
655 NCRCMD(sc, NCRCMD_FLUSH);
656 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
657 } else {
658 NCR_WRITE_REG(sc, NCR_SELID, target);
659 }
660 ncr53c9x_setsync(sc, ti);
661
662 if ((ecb->flags & ECB_SENSE) != 0) {
663 /*
664 * For REQUEST SENSE, we should not send an IDENTIFY or
665 * otherwise mangle the target. There should be no MESSAGE IN
666 * phase.
667 */
668 if (sc->sc_features & NCR_F_DMASELECT) {
669 /* setup DMA transfer for command */
670 dmasize = clen = ecb->clen;
671 sc->sc_cmdlen = clen;
672 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
673
674 /* Program the SCSI counter */
675 NCR_SET_COUNT(sc, dmasize);
676
677 if (sc->sc_rev != NCR_VARIANT_FAS366)
678 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
679
680 /* And get the targets attention */
681 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
682 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
683 &dmasize);
684 NCRDMA_GO(sc);
685 } else {
686 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
687 NCRCMD(sc, NCRCMD_SELNATN);
688 }
689 return;
690 }
691
692 selatn3 = selatns = 0;
693 if (ecb->tag[0] != 0) {
694 if (sc->sc_features & NCR_F_SELATN3)
695 /* use SELATN3 to send tag messages */
696 selatn3 = 1;
697 else
698 /* We don't have SELATN3; use SELATNS to send tags */
699 selatns = 1;
700 }
701
702 if (ti->flags & T_NEGOTIATE) {
703 /* We have to use SELATNS to send sync/wide messages */
704 selatn3 = 0;
705 selatns = 1;
706 }
707
708 cmd = (u_char *)&ecb->cmd.cmd;
709
710 if (selatn3) {
711 /* We'll use tags with SELATN3 */
712 clen = ecb->clen + 3;
713 cmd -= 3;
714 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
715 cmd[1] = ecb->tag[0]; /* msg[1] */
716 cmd[2] = ecb->tag[1]; /* msg[2] */
717 } else {
718 /* We don't have tags, or will send messages with SELATNS */
719 clen = ecb->clen + 1;
720 cmd -= 1;
721 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
722 }
723
724 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
725
726 /* setup DMA transfer for command */
727 dmasize = clen;
728 sc->sc_cmdlen = clen;
729 sc->sc_cmdp = cmd;
730
731 /* Program the SCSI counter */
732 NCR_SET_COUNT(sc, dmasize);
733
734 /* load the count in */
735 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
736 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
737
738 /* And get the targets attention */
739 if (selatn3) {
740 sc->sc_msgout = SEND_TAG;
741 sc->sc_flags |= NCR_ATN;
742 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
743 } else
744 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
745 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
746 NCRDMA_GO(sc);
747 return;
748 }
749
750 /*
751 * Who am I. This is where we tell the target that we are
752 * happy for it to disconnect etc.
753 */
754
755 /* Now get the command into the FIFO */
756 ncr53c9x_wrfifo(sc, cmd, clen);
757
758 /* And get the targets attention */
759 if (selatns) {
760 NCR_MISC(("SELATNS \n"));
761 /* Arbitrate, select and stop after IDENTIFY message */
762 NCRCMD(sc, NCRCMD_SELATNS);
763 } else if (selatn3) {
764 sc->sc_msgout = SEND_TAG;
765 sc->sc_flags |= NCR_ATN;
766 NCRCMD(sc, NCRCMD_SELATN3);
767 } else
768 NCRCMD(sc, NCRCMD_SELATN);
769 }
770
771 void
772 ncr53c9x_free_ecb(sc, ecb)
773 struct ncr53c9x_softc *sc;
774 struct ncr53c9x_ecb *ecb;
775 {
776 int s;
777
778 s = splbio();
779 ecb->flags = 0;
780 pool_put(&ecb_pool, (void *)ecb);
781 splx(s);
782 return;
783 }
784
785 struct ncr53c9x_ecb *
786 ncr53c9x_get_ecb(sc, flags)
787 struct ncr53c9x_softc *sc;
788 int flags;
789 {
790 struct ncr53c9x_ecb *ecb;
791 int s, wait = 0;
792
793 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
794 wait = PR_WAITOK;
795
796 s = splbio();
797 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, wait);
798 splx(s);
799 bzero(ecb, sizeof(*ecb));
800 if (ecb)
801 ecb->flags |= ECB_ALLOC;
802 return (ecb);
803 }
804
805 /*
806 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
807 */
808
809 /*
810 * Start a SCSI-command
811 * This function is called by the higher level SCSI-driver to queue/run
812 * SCSI-commands.
813 */
814
815 void
816 ncr53c9x_scsipi_request(chan, req, arg)
817 struct scsipi_channel *chan;
818 scsipi_adapter_req_t req;
819 void *arg;
820 {
821 struct scsipi_xfer *xs;
822 struct scsipi_periph *periph;
823 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
824 struct ncr53c9x_ecb *ecb;
825 int s, flags;
826
827 NCR_TRACE(("[ncr53c9x_scsipi_request] "));
828
829 switch (req) {
830 case ADAPTER_REQ_RUN_XFER:
831 xs = arg;
832 periph = xs->xs_periph;
833 flags = xs->xs_control;
834
835 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
836 periph->periph_target));
837
838 /* Get an ECB to use. */
839 ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
840 #ifdef DIAGNOSTIC
841 /*
842 * This should never happen as we track resources
843 * in the mid-layer.
844 */
845 if (ecb == NULL) {
846 scsipi_printaddr(periph);
847 printf("unable to allocate ecb\n");
848 panic("ncr53c9x_scsipi_request");
849 }
850 #endif
851
852 /* Initialize ecb */
853 ecb->xs = xs;
854 ecb->timeout = xs->timeout;
855
856 if (flags & XS_CTL_RESET) {
857 ecb->flags |= ECB_RESET;
858 ecb->clen = 0;
859 ecb->dleft = 0;
860 } else {
861 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
862 ecb->clen = xs->cmdlen;
863 ecb->daddr = xs->data;
864 ecb->dleft = xs->datalen;
865 }
866 ecb->stat = 0;
867
868 s = splbio();
869
870 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
871 if (sc->sc_state == NCR_IDLE)
872 ncr53c9x_sched(sc);
873
874 splx(s);
875
876 if ((flags & XS_CTL_POLL) == 0)
877 return;
878
879 /* Not allowed to use interrupts, use polling instead */
880 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
881 ncr53c9x_timeout(ecb);
882 if (ncr53c9x_poll(sc, xs, ecb->timeout))
883 ncr53c9x_timeout(ecb);
884 }
885 return;
886
887 case ADAPTER_REQ_GROW_RESOURCES:
888 /* XXX Not supported. */
889 return;
890
891 case ADAPTER_REQ_SET_XFER_MODE:
892 {
893 struct ncr53c9x_tinfo *ti;
894 struct scsipi_xfer_mode *xm = arg;
895
896 ti = &sc->sc_tinfo[xm->xm_target];
897 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
898 ti->period = 0;
899 ti->offset = 0;
900
901 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 &&
902 (xm->xm_mode & PERIPH_CAP_TQING))
903 ti->flags |= T_TAG;
904 else
905 ti->flags &= ~T_TAG;
906
907 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
908 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
909 sc->sc_dev.dv_xname, xm->xm_target));
910 if (sc->sc_rev == NCR_VARIANT_FAS366) {
911 ti->flags |= T_WIDE;
912 ti->width = 1;
913 }
914 }
915
916 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
917 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
918 NCR_MISC(("%s: target %d: sync negotiation\n",
919 sc->sc_dev.dv_xname, xm->xm_target));
920 ti->flags |= T_NEGOTIATE;
921 ti->period = sc->sc_minsync;
922 }
923 /*
924 * If we're not going to negotiate, send the notification
925 * now, since it won't happen later.
926 */
927 if ((ti->flags & T_NEGOTIATE) == 0)
928 ncr53c9x_update_xfer_mode(sc, xm->xm_target);
929 return;
930 }
931 }
932 }
933
934 void
935 ncr53c9x_update_xfer_mode(sc, target)
936 struct ncr53c9x_softc *sc;
937 int target;
938 {
939 struct scsipi_xfer_mode xm;
940 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
941
942 xm.xm_target = target;
943 xm.xm_mode = 0;
944 xm.xm_period = 0;
945 xm.xm_offset = 0;
946
947 if (ti->flags & T_SYNCMODE) {
948 xm.xm_mode |= PERIPH_CAP_SYNC;
949 xm.xm_period = ti->period;
950 xm.xm_offset = ti->offset;
951 }
952 if (ti->width)
953 xm.xm_mode |= PERIPH_CAP_WIDE16;
954
955 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
956 xm.xm_mode |= PERIPH_CAP_TQING;
957
958 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
959 }
960
961 /*
962 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
963 */
964 int
965 ncr53c9x_poll(sc, xs, count)
966 struct ncr53c9x_softc *sc;
967 struct scsipi_xfer *xs;
968 int count;
969 {
970
971 NCR_TRACE(("[ncr53c9x_poll] "));
972 while (count) {
973 if (NCRDMA_ISINTR(sc)) {
974 ncr53c9x_intr(sc);
975 }
976 #if alternatively
977 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
978 ncr53c9x_intr(sc);
979 #endif
980 if ((xs->xs_status & XS_STS_DONE) != 0)
981 return (0);
982 if (sc->sc_state == NCR_IDLE) {
983 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
984 ncr53c9x_sched(sc);
985 }
986 DELAY(1000);
987 count--;
988 }
989 return (1);
990 }
991
992 int
993 ncr53c9x_ioctl(chan, cmd, arg, flag, p)
994 struct scsipi_channel *chan;
995 u_long cmd;
996 caddr_t arg;
997 int flag;
998 struct proc *p;
999 {
1000 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */
1001 int s, error = 0;
1002
1003 s = splbio();
1004
1005 switch (cmd) {
1006 default:
1007 error = ENOTTY;
1008 break;
1009 }
1010 splx(s);
1011 return (error);
1012 }
1013
1014
1015 /*
1016 * LOW LEVEL SCSI UTILITIES
1017 */
1018
1019 /*
1020 * Schedule a scsi operation. This has now been pulled out of the interrupt
1021 * handler so that we may call it from ncr53c9x_scsipi_request and
1022 * ncr53c9x_done. This may save us an unecessary interrupt just to get
1023 * things going. Should only be called when state == NCR_IDLE and at bio pl.
1024 */
1025 void
1026 ncr53c9x_sched(sc)
1027 struct ncr53c9x_softc *sc;
1028 {
1029 struct ncr53c9x_ecb *ecb;
1030 struct scsipi_periph *periph;
1031 struct ncr53c9x_tinfo *ti;
1032 int lun;
1033 struct ncr53c9x_linfo *li;
1034 int s, tag;
1035
1036 NCR_TRACE(("[ncr53c9x_sched] "));
1037 if (sc->sc_state != NCR_IDLE)
1038 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1039
1040 /*
1041 * Find first ecb in ready queue that is for a target/lunit
1042 * combinations that is not busy.
1043 */
1044 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1045 ecb = TAILQ_NEXT(ecb, chain)) {
1046 periph = ecb->xs->xs_periph;
1047 ti = &sc->sc_tinfo[periph->periph_target];
1048 lun = periph->periph_lun;
1049
1050 /* Select type of tag for this command */
1051 if ((ti->flags & (T_RSELECTOFF)) != 0)
1052 tag = 0;
1053 else if ((ti->flags & (T_TAG)) == 0)
1054 tag = 0;
1055 else if ((ecb->flags & ECB_SENSE) != 0)
1056 tag = 0;
1057 else
1058 tag = ecb->xs->xs_tag_type;
1059 #if 0
1060 /* XXXX Use tags for polled commands? */
1061 if (ecb->xs->xs_control & XS_CTL_POLL)
1062 tag = 0;
1063 #endif
1064
1065 s = splbio();
1066 li = TINFO_LUN(ti, lun);
1067 if (li == NULL) {
1068 int wait = M_NOWAIT;
1069 int flags = ecb->xs->xs_control;
1070
1071 /* Initialize LUN info and add to list. */
1072 if ((curproc != NULL) &&
1073 ((flags & XS_CTL_NOSLEEP) == 0))
1074 wait = M_WAITOK;
1075 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT))
1076 == NULL) {
1077 splx(s);
1078 continue;
1079 }
1080 bzero(li, sizeof(*li));
1081 li->lun = lun;
1082
1083 LIST_INSERT_HEAD(&ti->luns, li, link);
1084 if (lun < NCR_NLUN)
1085 ti->lun[lun] = li;
1086 }
1087 li->last_used = time.tv_sec;
1088 if (tag == 0) {
1089 /* Try to issue this as an un-tagged command */
1090 if (li->untagged == NULL)
1091 li->untagged = ecb;
1092 }
1093 if (li->untagged != NULL) {
1094 tag = 0;
1095 if ((li->busy != 1) && li->used == 0) {
1096 /* We need to issue this untagged command now */
1097 ecb = li->untagged;
1098 periph = ecb->xs->xs_periph;
1099 } else {
1100 /* Not ready yet */
1101 splx(s);
1102 continue;
1103 }
1104 }
1105 ecb->tag[0] = tag;
1106 if (tag != 0) {
1107 li->queued[ecb->xs->xs_tag_id] = ecb;
1108 ecb->tag[1] = ecb->xs->xs_tag_id;
1109 }
1110 splx(s);
1111 if (li->untagged != NULL && (li->busy != 1)) {
1112 li->busy = 1;
1113 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1114 ecb->flags &= ~ECB_READY;
1115 sc->sc_nexus = ecb;
1116 ncr53c9x_select(sc, ecb);
1117 break;
1118 }
1119 if (li->untagged == NULL && tag != 0) {
1120 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1121 ecb->flags &= ~ECB_READY;
1122 sc->sc_nexus = ecb;
1123 ncr53c9x_select(sc, ecb);
1124 break;
1125 } else
1126 NCR_MISC(("%d:%d busy\n",
1127 periph->periph_target,
1128 periph->periph_lun));
1129 }
1130 }
1131
1132 void
1133 ncr53c9x_sense(sc, ecb)
1134 struct ncr53c9x_softc *sc;
1135 struct ncr53c9x_ecb *ecb;
1136 {
1137 struct scsipi_xfer *xs = ecb->xs;
1138 struct scsipi_periph *periph = xs->xs_periph;
1139 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1140 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1141 struct ncr53c9x_linfo *li;
1142 int lun = periph->periph_lun;
1143
1144 NCR_MISC(("requesting sense "));
1145 /* Next, setup a request sense command block */
1146 bzero(ss, sizeof(*ss));
1147 ss->opcode = REQUEST_SENSE;
1148 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1149 ss->length = sizeof(struct scsipi_sense_data);
1150 ecb->clen = sizeof(*ss);
1151 ecb->daddr = (char *)&xs->sense.scsi_sense;
1152 ecb->dleft = sizeof(struct scsipi_sense_data);
1153 ecb->flags |= ECB_SENSE;
1154 ecb->timeout = NCR_SENSE_TIMEOUT;
1155 ti->senses++;
1156 li = TINFO_LUN(ti, lun);
1157 if (li->busy)
1158 li->busy = 0;
1159 ncr53c9x_dequeue(sc, ecb);
1160 li->untagged = ecb; /* must be executed first to fix C/A */
1161 li->busy = 2;
1162 if (ecb == sc->sc_nexus) {
1163 ncr53c9x_select(sc, ecb);
1164 } else {
1165 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1166 ecb->flags |= ECB_READY;
1167 if (sc->sc_state == NCR_IDLE)
1168 ncr53c9x_sched(sc);
1169 }
1170 }
1171
1172 /*
1173 * POST PROCESSING OF SCSI_CMD (usually current)
1174 */
1175 void
1176 ncr53c9x_done(sc, ecb)
1177 struct ncr53c9x_softc *sc;
1178 struct ncr53c9x_ecb *ecb;
1179 {
1180 struct scsipi_xfer *xs = ecb->xs;
1181 struct scsipi_periph *periph = xs->xs_periph;
1182 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1183 int lun = periph->periph_lun;
1184 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1185
1186 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1187
1188 callout_stop(&ecb->xs->xs_callout);
1189
1190 /*
1191 * Now, if we've come here with no error code, i.e. we've kept the
1192 * initial XS_NOERROR, and the status code signals that we should
1193 * check sense, we'll need to set up a request sense cmd block and
1194 * push the command back into the ready queue *before* any other
1195 * commands for this target/lunit, else we lose the sense info.
1196 * We don't support chk sense conditions for the request sense cmd.
1197 */
1198 if (xs->error == XS_NOERROR) {
1199 xs->status = ecb->stat;
1200 if ((ecb->flags & ECB_ABORT) != 0) {
1201 xs->error = XS_TIMEOUT;
1202 } else if ((ecb->flags & ECB_SENSE) != 0) {
1203 xs->error = XS_SENSE;
1204 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1205 /* First, save the return values */
1206 xs->resid = ecb->dleft;
1207 ncr53c9x_sense(sc, ecb);
1208 return;
1209 } else {
1210 xs->resid = ecb->dleft;
1211 }
1212 if (xs->status == SCSI_QUEUE_FULL)
1213 xs->error = XS_BUSY;
1214 }
1215
1216 #ifdef NCR53C9X_DEBUG
1217 if (ncr53c9x_debug & NCR_SHOWMISC) {
1218 if (xs->resid != 0)
1219 printf("resid=%d ", xs->resid);
1220 if (xs->error == XS_SENSE)
1221 printf("sense=0x%02x\n",
1222 xs->sense.scsi_sense.error_code);
1223 else
1224 printf("error=%d\n", xs->error);
1225 }
1226 #endif
1227
1228 /*
1229 * Remove the ECB from whatever queue it's on.
1230 */
1231 ncr53c9x_dequeue(sc, ecb);
1232 if (ecb == sc->sc_nexus) {
1233 sc->sc_nexus = NULL;
1234 if (sc->sc_state != NCR_CLEANING) {
1235 sc->sc_state = NCR_IDLE;
1236 ncr53c9x_sched(sc);
1237 }
1238 }
1239
1240 if (xs->error == XS_SELTIMEOUT) {
1241 /* Selection timeout -- discard this LUN if empty */
1242 if (li->untagged == NULL && li->used == 0) {
1243 if (lun < NCR_NLUN)
1244 ti->lun[lun] = NULL;
1245 LIST_REMOVE(li, link);
1246 free(li, M_DEVBUF);
1247 }
1248 }
1249
1250 ncr53c9x_free_ecb(sc, ecb);
1251 ti->cmds++;
1252 scsipi_done(xs);
1253 }
1254
1255 void
1256 ncr53c9x_dequeue(sc, ecb)
1257 struct ncr53c9x_softc *sc;
1258 struct ncr53c9x_ecb *ecb;
1259 {
1260 struct ncr53c9x_tinfo *ti =
1261 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1262 struct ncr53c9x_linfo *li;
1263 int64_t lun = ecb->xs->xs_periph->periph_lun;
1264
1265 li = TINFO_LUN(ti, lun);
1266 #ifdef DIAGNOSTIC
1267 if (li == NULL || li->lun != lun)
1268 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1269 (long long) lun, ecb);
1270 #endif
1271 if (li->untagged == ecb) {
1272 li->busy = 0;
1273 li->untagged = NULL;
1274 }
1275 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1276 #ifdef DIAGNOSTIC
1277 if (li->queued[ecb->tag[1]] != NULL &&
1278 (li->queued[ecb->tag[1]] != ecb))
1279 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1280 "instead of ecb %p\n", ecb->tag[1],
1281 (long long) lun,
1282 li->queued[ecb->tag[1]], ecb);
1283 #endif
1284 li->queued[ecb->tag[1]] = NULL;
1285 li->used--;
1286 }
1287
1288 if ((ecb->flags & ECB_READY) != 0) {
1289 ecb->flags &= ~ECB_READY;
1290 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1291 }
1292 }
1293
1294 /*
1295 * INTERRUPT/PROTOCOL ENGINE
1296 */
1297
1298 /*
1299 * Schedule an outgoing message by prioritizing it, and asserting
1300 * attention on the bus. We can only do this when we are the initiator
1301 * else there will be an illegal command interrupt.
1302 */
1303 #define ncr53c9x_sched_msgout(m) \
1304 do { \
1305 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1306 NCRCMD(sc, NCRCMD_SETATN); \
1307 sc->sc_flags |= NCR_ATN; \
1308 sc->sc_msgpriq |= (m); \
1309 } while (0)
1310
1311 static void
1312 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1313 {
1314 NCR_MISC(("[flushfifo] "));
1315
1316 NCRCMD(sc, NCRCMD_FLUSH);
1317
1318 if (sc->sc_phase == COMMAND_PHASE ||
1319 sc->sc_phase == MESSAGE_OUT_PHASE)
1320 DELAY(2);
1321 }
1322
1323 static int
1324 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1325 {
1326 int i, n;
1327 u_char *buf;
1328
1329 switch(how) {
1330 case NCR_RDFIFO_START:
1331 buf = sc->sc_imess;
1332 sc->sc_imlen = 0;
1333 break;
1334 case NCR_RDFIFO_CONTINUE:
1335 buf = sc->sc_imess + sc->sc_imlen;
1336 break;
1337 default:
1338 panic("ncr53c9x_rdfifo: bad flag\n");
1339 break;
1340 }
1341
1342 /*
1343 * XXX buffer (sc_imess) size for message
1344 */
1345
1346 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1347
1348 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1349 n *= 2;
1350
1351 for (i = 0; i < n; i++)
1352 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1353
1354 if (sc->sc_espstat2 & FAS_STAT2_ISHUTTLE) {
1355
1356 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1357 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1358
1359 NCR_READ_REG(sc, NCR_FIFO);
1360
1361 ncr53c9x_flushfifo(sc);
1362 }
1363 } else {
1364 for (i = 0; i < n; i++)
1365 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1366 }
1367
1368 sc->sc_imlen += i;
1369
1370 #ifdef NCR53C9X_DEBUG
1371 {
1372 int j;
1373
1374 NCR_TRACE(("\n[rdfifo %s (%d):",
1375 (how == NCR_RDFIFO_START) ? "start" : "cont",
1376 (int)sc->sc_imlen));
1377 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1378 for (j = 0; j < sc->sc_imlen; j++)
1379 printf(" %02x", sc->sc_imess[j]);
1380 printf("]\n");
1381 }
1382 }
1383 #endif
1384 return sc->sc_imlen;
1385 }
1386
1387 static void
1388 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1389 {
1390 int i;
1391
1392 #ifdef NCR53C9X_DEBUG
1393 NCR_MISC(("[wrfifo(%d):", len));
1394 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1395 for (i = 0; i < len; i++)
1396 printf(" %02x", p[i]);
1397 printf("]\n");
1398 }
1399 #endif
1400
1401 for (i = 0; i < len; i++) {
1402 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1403
1404 if (sc->sc_rev == NCR_VARIANT_FAS366)
1405 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1406 }
1407 }
1408
1409 int
1410 ncr53c9x_reselect(sc, message, tagtype, tagid)
1411 struct ncr53c9x_softc *sc;
1412 int message;
1413 int tagtype, tagid;
1414 {
1415 u_char selid, target, lun;
1416 struct ncr53c9x_ecb *ecb = NULL;
1417 struct ncr53c9x_tinfo *ti;
1418 struct ncr53c9x_linfo *li;
1419
1420
1421 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1422 target = sc->sc_selid;
1423 } else {
1424 /*
1425 * The SCSI chip made a snapshot of the data bus
1426 * while the reselection was being negotiated.
1427 * This enables us to determine which target did
1428 * the reselect.
1429 */
1430 selid = sc->sc_selid & ~(1 << sc->sc_id);
1431 if (selid & (selid - 1)) {
1432 printf("%s: reselect with invalid selid %02x;"
1433 " sending DEVICE RESET\n",
1434 sc->sc_dev.dv_xname, selid);
1435 goto reset;
1436 }
1437
1438 target = ffs(selid) - 1;
1439 }
1440 lun = message & 0x07;
1441
1442 /*
1443 * Search wait queue for disconnected cmd
1444 * The list should be short, so I haven't bothered with
1445 * any more sophisticated structures than a simple
1446 * singly linked list.
1447 */
1448 ti = &sc->sc_tinfo[target];
1449 li = TINFO_LUN(ti, lun);
1450
1451 /*
1452 * We can get as far as the LUN with the IDENTIFY
1453 * message. Check to see if we're running an
1454 * un-tagged command. Otherwise ack the IDENTIFY
1455 * and wait for a tag message.
1456 */
1457 if (li != NULL) {
1458 if (li->untagged != NULL && li->busy)
1459 ecb = li->untagged;
1460 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1461 /* Wait for tag to come by */
1462 sc->sc_state = NCR_IDENTIFIED;
1463 return (0);
1464 } else if (tagtype)
1465 ecb = li->queued[tagid];
1466 }
1467 if (ecb == NULL) {
1468 printf("%s: reselect from target %d lun %d tag %x:%x "
1469 "with no nexus; sending ABORT\n",
1470 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1471 goto abort;
1472 }
1473
1474 /* Make this nexus active again. */
1475 sc->sc_state = NCR_CONNECTED;
1476 sc->sc_nexus = ecb;
1477 ncr53c9x_setsync(sc, ti);
1478
1479 if (ecb->flags & ECB_RESET)
1480 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1481 else if (ecb->flags & ECB_ABORT)
1482 ncr53c9x_sched_msgout(SEND_ABORT);
1483
1484 /* Do an implicit RESTORE POINTERS. */
1485 sc->sc_dp = ecb->daddr;
1486 sc->sc_dleft = ecb->dleft;
1487
1488 return (0);
1489
1490 reset:
1491 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1492 return (1);
1493
1494 abort:
1495 ncr53c9x_sched_msgout(SEND_ABORT);
1496 return (1);
1497 }
1498
1499
1500 /*
1501 * XXX this might be common thing(check with scsipi)
1502 */
1503 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1504 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1505 #define ISEXTMSG(m) ((m) == 1)
1506
1507 static inline int
1508 __verify_msg_format(u_char *p, int len)
1509 {
1510
1511 if (len == 1 && IS1BYTEMSG(p[0]))
1512 return 1;
1513 if (len == 2 && IS2BYTEMSG(p[0]))
1514 return 1;
1515 if (len >= 3 && ISEXTMSG(p[0]) &&
1516 len == p[1] + 2)
1517 return 1;
1518
1519 return 0;
1520 }
1521
1522 /*
1523 * Get an incoming message as initiator.
1524 *
1525 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1526 * byte in the FIFO
1527 */
1528 void
1529 ncr53c9x_msgin(sc)
1530 struct ncr53c9x_softc *sc;
1531 {
1532
1533 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1534
1535 if (sc->sc_imlen == 0) {
1536 printf("%s: msgin: no msg byte available\n",
1537 sc->sc_dev.dv_xname);
1538 return;
1539 }
1540
1541 /*
1542 * Prepare for a new message. A message should (according
1543 * to the SCSI standard) be transmitted in one single
1544 * MESSAGE_IN_PHASE. If we have been in some other phase,
1545 * then this is a new message.
1546 */
1547 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1548 sc->sc_state != NCR_RESELECTED) {
1549 printf("%s: phase change, dropping message, "
1550 "prev %d, state %d\n",
1551 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1552 sc->sc_flags &= ~NCR_DROP_MSGI;
1553 sc->sc_imlen = 0;
1554 }
1555
1556 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1557
1558 /*
1559 * If we're going to reject the message, don't bother storing
1560 * the incoming bytes. But still, we need to ACK them.
1561 */
1562 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1563 NCRCMD(sc, NCRCMD_MSGOK);
1564 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1565 return;
1566 }
1567
1568 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1569 ncr53c9x_sched_msgout(SEND_REJECT);
1570 sc->sc_flags |= NCR_DROP_MSGI;
1571 } else {
1572 u_char *pb;
1573 int plen;
1574
1575 switch (sc->sc_state) {
1576 /*
1577 * if received message is the first of reselection
1578 * then first byte is selid, and then message
1579 */
1580 case NCR_RESELECTED:
1581 pb = sc->sc_imess + 1;
1582 plen = sc->sc_imlen - 1;
1583 break;
1584 default:
1585 pb = sc->sc_imess;
1586 plen = sc->sc_imlen;
1587 break;
1588 }
1589
1590 if (__verify_msg_format(pb, plen))
1591 goto gotit;
1592 }
1593
1594 /* Ack what we have so far */
1595 NCRCMD(sc, NCRCMD_MSGOK);
1596 return;
1597
1598 gotit:
1599 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1600 /* we got complete message, flush the imess, */
1601 /* XXX nobody uses imlen below */
1602 sc->sc_imlen = 0;
1603 /*
1604 * Now we should have a complete message (1 byte, 2 byte
1605 * and moderately long extended messages). We only handle
1606 * extended messages which total length is shorter than
1607 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1608 */
1609 switch (sc->sc_state) {
1610 struct ncr53c9x_ecb *ecb;
1611 struct ncr53c9x_tinfo *ti;
1612 struct ncr53c9x_linfo *li;
1613 int lun;
1614
1615 case NCR_CONNECTED:
1616 ecb = sc->sc_nexus;
1617 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1618
1619 switch (sc->sc_imess[0]) {
1620 case MSG_CMDCOMPLETE:
1621 NCR_MSGS(("cmdcomplete "));
1622 if (sc->sc_dleft < 0) {
1623 scsipi_printaddr(ecb->xs->xs_periph);
1624 printf("got %ld extra bytes\n",
1625 -(long)sc->sc_dleft);
1626 sc->sc_dleft = 0;
1627 }
1628 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1629 0 : sc->sc_dleft;
1630 if ((ecb->flags & ECB_SENSE) == 0)
1631 ecb->xs->resid = ecb->dleft;
1632 sc->sc_state = NCR_CMDCOMPLETE;
1633 break;
1634
1635 case MSG_MESSAGE_REJECT:
1636 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1637 switch (sc->sc_msgout) {
1638 case SEND_TAG:
1639 /*
1640 * Target does not like tagged queuing.
1641 * - Flush the command queue
1642 * - Disable tagged queuing for the target
1643 * - Dequeue ecb from the queued array.
1644 */
1645 printf("%s: tagged queuing rejected: "
1646 "target %d\n",
1647 sc->sc_dev.dv_xname,
1648 ecb->xs->xs_periph->periph_target);
1649
1650 NCR_MSGS(("(rejected sent tag)"));
1651 NCRCMD(sc, NCRCMD_FLUSH);
1652 DELAY(1);
1653 ti->flags &= ~T_TAG;
1654 lun = ecb->xs->xs_periph->periph_lun;
1655 li = TINFO_LUN(ti, lun);
1656 if (ecb->tag[0] &&
1657 li->queued[ecb->tag[1]] != NULL) {
1658 li->queued[ecb->tag[1]] = NULL;
1659 li->used--;
1660 }
1661 ecb->tag[0] = ecb->tag[1] = 0;
1662 li->untagged = ecb;
1663 li->busy = 1;
1664 break;
1665
1666 case SEND_SDTR:
1667 printf("%s: sync transfer rejected: "
1668 "target %d\n",
1669 sc->sc_dev.dv_xname,
1670 ecb->xs->xs_periph->periph_target);
1671
1672 sc->sc_flags &= ~NCR_SYNCHNEGO;
1673 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1674 ncr53c9x_setsync(sc, ti);
1675 ncr53c9x_update_xfer_mode(sc,
1676 ecb->xs->xs_periph->periph_target);
1677 break;
1678
1679 case SEND_WDTR:
1680 printf("%s: wide transfer rejected: "
1681 "target %d\n",
1682 sc->sc_dev.dv_xname,
1683 ecb->xs->xs_periph->periph_target);
1684 ti->flags &= ~T_WIDE;
1685 ti->width = 0;
1686 break;
1687
1688 case SEND_INIT_DET_ERR:
1689 goto abort;
1690 }
1691 break;
1692
1693 case MSG_NOOP:
1694 NCR_MSGS(("noop "));
1695 break;
1696
1697 case MSG_HEAD_OF_Q_TAG:
1698 case MSG_SIMPLE_Q_TAG:
1699 case MSG_ORDERED_Q_TAG:
1700 NCR_MSGS(("TAG %x:%x",
1701 sc->sc_imess[0], sc->sc_imess[1]));
1702 break;
1703
1704 case MSG_DISCONNECT:
1705 NCR_MSGS(("disconnect "));
1706 ti->dconns++;
1707 sc->sc_state = NCR_DISCONNECT;
1708
1709 /*
1710 * Mark the fact that all bytes have moved. The
1711 * target may not bother to do a SAVE POINTERS
1712 * at this stage. This flag will set the residual
1713 * count to zero on MSG COMPLETE.
1714 */
1715 if (sc->sc_dleft == 0)
1716 ecb->flags |= ECB_TENTATIVE_DONE;
1717
1718 break;
1719
1720 case MSG_SAVEDATAPOINTER:
1721 NCR_MSGS(("save datapointer "));
1722 ecb->daddr = sc->sc_dp;
1723 ecb->dleft = sc->sc_dleft;
1724 break;
1725
1726 case MSG_RESTOREPOINTERS:
1727 NCR_MSGS(("restore datapointer "));
1728 sc->sc_dp = ecb->daddr;
1729 sc->sc_dleft = ecb->dleft;
1730 break;
1731
1732 case MSG_EXTENDED:
1733 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1734 switch (sc->sc_imess[2]) {
1735 case MSG_EXT_SDTR:
1736 NCR_MSGS(("SDTR period %d, offset %d ",
1737 sc->sc_imess[3], sc->sc_imess[4]));
1738 if (sc->sc_imess[1] != 3)
1739 goto reject;
1740 ti->period = sc->sc_imess[3];
1741 ti->offset = sc->sc_imess[4];
1742 ti->flags &= ~T_NEGOTIATE;
1743 if (sc->sc_minsync == 0 ||
1744 ti->offset == 0 ||
1745 ti->period > 124) {
1746 #if 0
1747 #ifdef NCR53C9X_DEBUG
1748 scsipi_printaddr(ecb->xs->xs_periph);
1749 printf("async mode\n");
1750 #endif
1751 #endif
1752 ti->flags &= ~T_SYNCMODE;
1753 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1754 /*
1755 * target initiated negotiation
1756 */
1757 ti->offset = 0;
1758 ncr53c9x_sched_msgout(
1759 SEND_SDTR);
1760 }
1761 } else {
1762 #if 0
1763 int r = 250/ti->period;
1764 int s = (100*250)/ti->period - 100*r;
1765 #endif
1766 int p;
1767
1768 p = ncr53c9x_stp2cpb(sc, ti->period);
1769 ti->period = ncr53c9x_cpb2stp(sc, p);
1770 #if 0
1771 #ifdef NCR53C9X_DEBUG
1772 scsipi_printaddr(ecb->xs->xs_periph);
1773 printf("max sync rate %d.%02dMB/s\n",
1774 r, s);
1775 #endif
1776 #endif
1777 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1778 /*
1779 * target initiated negotiation
1780 */
1781 if (ti->period <
1782 sc->sc_minsync)
1783 ti->period =
1784 sc->sc_minsync;
1785 if (ti->offset > 15)
1786 ti->offset = 15;
1787 ti->flags &= ~T_SYNCMODE;
1788 ncr53c9x_sched_msgout(
1789 SEND_SDTR);
1790 } else {
1791 /* we are sync */
1792 ti->flags |= T_SYNCMODE;
1793 }
1794 }
1795 ncr53c9x_update_xfer_mode(sc,
1796 ecb->xs->xs_periph->periph_target);
1797 sc->sc_flags &= ~NCR_SYNCHNEGO;
1798 ncr53c9x_setsync(sc, ti);
1799 break;
1800
1801 case MSG_EXT_WDTR:
1802 printf("%s: wide mode %d\n",
1803 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1804 if (sc->sc_imess[3] == 1) {
1805 ti->cfg3 |= NCRFASCFG3_EWIDE;
1806 ncr53c9x_setsync(sc, ti);
1807 } else
1808 ti->width = 0;
1809 ti->flags &= ~T_WIDE;
1810 break;
1811 default:
1812 scsipi_printaddr(ecb->xs->xs_periph);
1813 printf("unrecognized MESSAGE EXTENDED;"
1814 " sending REJECT\n");
1815 goto reject;
1816 }
1817 break;
1818
1819 default:
1820 NCR_MSGS(("ident "));
1821 scsipi_printaddr(ecb->xs->xs_periph);
1822 printf("unrecognized MESSAGE; sending REJECT\n");
1823 reject:
1824 ncr53c9x_sched_msgout(SEND_REJECT);
1825 break;
1826 }
1827 break;
1828
1829 case NCR_IDENTIFIED:
1830 /*
1831 * IDENTIFY message was received and queue tag is expected now
1832 */
1833 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1834 (sc->sc_msgify == 0)) {
1835 printf("%s: TAG reselect without IDENTIFY;"
1836 " MSG %x;"
1837 " sending DEVICE RESET\n",
1838 sc->sc_dev.dv_xname,
1839 sc->sc_imess[0]);
1840 goto reset;
1841 }
1842 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1843 sc->sc_imess[0], sc->sc_imess[1]);
1844 break;
1845
1846 case NCR_RESELECTED:
1847 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1848 sc->sc_msgify = sc->sc_imess[1];
1849 } else {
1850 printf("%s: reselect without IDENTIFY;"
1851 " MSG %x;"
1852 " sending DEVICE RESET\n",
1853 sc->sc_dev.dv_xname,
1854 sc->sc_imess[1]);
1855 goto reset;
1856 }
1857 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1858 break;
1859
1860 default:
1861 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1862 sc->sc_dev.dv_xname);
1863 reset:
1864 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1865 break;
1866
1867 abort:
1868 ncr53c9x_sched_msgout(SEND_ABORT);
1869 break;
1870 }
1871
1872 /* if we have more messages to send set ATN */
1873 if (sc->sc_msgpriq)
1874 NCRCMD(sc, NCRCMD_SETATN);
1875
1876 /* Ack last message byte */
1877 NCRCMD(sc, NCRCMD_MSGOK);
1878
1879 /* Done, reset message pointer. */
1880 sc->sc_flags &= ~NCR_DROP_MSGI;
1881 sc->sc_imlen = 0;
1882 }
1883
1884
1885 /*
1886 * Send the highest priority, scheduled message
1887 */
1888 void
1889 ncr53c9x_msgout(sc)
1890 struct ncr53c9x_softc *sc;
1891 {
1892 struct ncr53c9x_tinfo *ti;
1893 struct ncr53c9x_ecb *ecb;
1894 size_t size;
1895
1896 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1897 sc->sc_msgpriq, sc->sc_prevphase));
1898
1899 /*
1900 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1901 * condition on the SCSI bus. The 53c9x chip
1902 * automatically turns off ATN before sending the
1903 * message byte. (see also the comment below in the
1904 * default case when picking out a message to send)
1905 */
1906 if (sc->sc_flags & NCR_ATN) {
1907 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1908 new:
1909 NCRCMD(sc, NCRCMD_FLUSH);
1910 /* DELAY(1); */
1911 sc->sc_msgoutq = 0;
1912 sc->sc_omlen = 0;
1913 }
1914 } else {
1915 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1916 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1917 goto new;
1918 } else {
1919 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1920 sc->sc_dev.dv_xname, __LINE__);
1921 }
1922 }
1923
1924 if (sc->sc_omlen == 0) {
1925 /* Pick up highest priority message */
1926 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1927 sc->sc_msgoutq |= sc->sc_msgout;
1928 sc->sc_msgpriq &= ~sc->sc_msgout;
1929 sc->sc_omlen = 1; /* "Default" message len */
1930 switch (sc->sc_msgout) {
1931 case SEND_SDTR:
1932 ecb = sc->sc_nexus;
1933 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1934 sc->sc_omess[0] = MSG_EXTENDED;
1935 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1936 sc->sc_omess[2] = MSG_EXT_SDTR;
1937 sc->sc_omess[3] = ti->period;
1938 sc->sc_omess[4] = ti->offset;
1939 sc->sc_omlen = 5;
1940 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1941 ti->flags |= T_SYNCMODE;
1942 ncr53c9x_setsync(sc, ti);
1943 }
1944 break;
1945 case SEND_WDTR:
1946 ecb = sc->sc_nexus;
1947 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1948 sc->sc_omess[0] = MSG_EXTENDED;
1949 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1950 sc->sc_omess[2] = MSG_EXT_WDTR;
1951 sc->sc_omess[3] = ti->width;
1952 sc->sc_omlen = 4;
1953 break;
1954 case SEND_IDENTIFY:
1955 if (sc->sc_state != NCR_CONNECTED) {
1956 printf("%s at line %d: no nexus\n",
1957 sc->sc_dev.dv_xname, __LINE__);
1958 }
1959 ecb = sc->sc_nexus;
1960 sc->sc_omess[0] =
1961 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1962 break;
1963 case SEND_TAG:
1964 if (sc->sc_state != NCR_CONNECTED) {
1965 printf("%s at line %d: no nexus\n",
1966 sc->sc_dev.dv_xname, __LINE__);
1967 }
1968 ecb = sc->sc_nexus;
1969 sc->sc_omess[0] = ecb->tag[0];
1970 sc->sc_omess[1] = ecb->tag[1];
1971 sc->sc_omlen = 2;
1972 break;
1973 case SEND_DEV_RESET:
1974 sc->sc_flags |= NCR_ABORTING;
1975 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1976 ecb = sc->sc_nexus;
1977 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1978 ti->flags &= ~T_SYNCMODE;
1979 ncr53c9x_update_xfer_mode(sc,
1980 ecb->xs->xs_periph->periph_target);
1981 if ((ti->flags & T_SYNCHOFF) == 0)
1982 /* We can re-start sync negotiation */
1983 ti->flags |= T_NEGOTIATE;
1984 break;
1985 case SEND_PARITY_ERROR:
1986 sc->sc_omess[0] = MSG_PARITY_ERROR;
1987 break;
1988 case SEND_ABORT:
1989 sc->sc_flags |= NCR_ABORTING;
1990 sc->sc_omess[0] = MSG_ABORT;
1991 break;
1992 case SEND_INIT_DET_ERR:
1993 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1994 break;
1995 case SEND_REJECT:
1996 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1997 break;
1998 default:
1999 /*
2000 * We normally do not get here, since the chip
2001 * automatically turns off ATN before the last
2002 * byte of a message is sent to the target.
2003 * However, if the target rejects our (multi-byte)
2004 * message early by switching to MSG IN phase
2005 * ATN remains on, so the target may return to
2006 * MSG OUT phase. If there are no scheduled messages
2007 * left we send a NO-OP.
2008 *
2009 * XXX - Note that this leaves no useful purpose for
2010 * the NCR_ATN flag.
2011 */
2012 sc->sc_flags &= ~NCR_ATN;
2013 sc->sc_omess[0] = MSG_NOOP;
2014 break;
2015 }
2016 sc->sc_omp = sc->sc_omess;
2017 }
2018
2019 #ifdef DEBUG
2020 {
2021 int i;
2022
2023 NCR_MISC(("<msgout:"));
2024 for (i = 0; i < sc->sc_omlen; i++)
2025 NCR_MISC((" %02x", sc->sc_omess[i]));
2026 NCR_MISC(("> "));
2027 }
2028 #endif
2029 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2030 /*
2031 * XXX fifo size
2032 */
2033 ncr53c9x_flushfifo(sc);
2034 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2035 NCRCMD(sc, NCRCMD_TRANS);
2036 } else {
2037 /* (re)send the message */
2038 size = min(sc->sc_omlen, sc->sc_maxxfer);
2039 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2040 /* Program the SCSI counter */
2041 NCR_SET_COUNT(sc, size);
2042
2043 /* Load the count in and start the message-out transfer */
2044 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2045 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2046 NCRDMA_GO(sc);
2047 }
2048 }
2049
2050 /*
2051 * This is the most critical part of the driver, and has to know
2052 * how to deal with *all* error conditions and phases from the SCSI
2053 * bus. If there are no errors and the DMA was active, then call the
2054 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2055 * and we can return from here without further processing.
2056 *
2057 * Most of this needs verifying.
2058 */
2059 int
2060 ncr53c9x_intr(arg)
2061 void *arg;
2062 {
2063 struct ncr53c9x_softc *sc = arg;
2064 struct ncr53c9x_ecb *ecb;
2065 struct scsipi_periph *periph;
2066 struct ncr53c9x_tinfo *ti;
2067 size_t size;
2068 int nfifo;
2069
2070 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2071
2072 if (!NCRDMA_ISINTR(sc))
2073 return (0);
2074
2075 again:
2076 /* and what do the registers say... */
2077 ncr53c9x_readregs(sc);
2078
2079 sc->sc_intrcnt.ev_count++;
2080
2081 /*
2082 * At the moment, only a SCSI Bus Reset or Illegal
2083 * Command are classed as errors. A disconnect is a
2084 * valid condition, and we let the code check is the
2085 * "NCR_BUSFREE_OK" flag was set before declaring it
2086 * and error.
2087 *
2088 * Also, the status register tells us about "Gross
2089 * Errors" and "Parity errors". Only the Gross Error
2090 * is really bad, and the parity errors are dealt
2091 * with later
2092 *
2093 * TODO
2094 * If there are too many parity error, go to slow
2095 * cable mode ?
2096 */
2097
2098 /* SCSI Reset */
2099 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2100 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2101 NCRCMD(sc, NCRCMD_FLUSH);
2102 DELAY(1);
2103 }
2104 if (sc->sc_state != NCR_SBR) {
2105 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2106 ncr53c9x_init(sc, 0); /* Restart everything */
2107 return (1);
2108 }
2109 #if 0
2110 /*XXX*/ printf("<expected bus reset: "
2111 "[intr %x, stat %x, step %d]>\n",
2112 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2113 #endif
2114 if (sc->sc_nexus != NULL)
2115 panic("%s: nexus in reset state",
2116 sc->sc_dev.dv_xname);
2117 goto sched;
2118 }
2119
2120 ecb = sc->sc_nexus;
2121
2122 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2123 if (sc->sc_espintr & NCRINTR_ERR ||
2124 sc->sc_espstat & NCRSTAT_GE) {
2125
2126 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2127 /* Gross Error; no target ? */
2128 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2129 NCRCMD(sc, NCRCMD_FLUSH);
2130 DELAY(1);
2131 }
2132 if (sc->sc_state == NCR_CONNECTED ||
2133 sc->sc_state == NCR_SELECTING) {
2134 ecb->xs->error = XS_TIMEOUT;
2135 ncr53c9x_done(sc, ecb);
2136 }
2137 return (1);
2138 }
2139
2140 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2141 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2142 /*
2143 * Eat away "Illegal command" interrupt
2144 * on a ESP100 caused by a re-selection
2145 * while we were trying to select
2146 * another target.
2147 */
2148 #ifdef DEBUG
2149 printf("%s: ESP100 work-around activated\n",
2150 sc->sc_dev.dv_xname);
2151 #endif
2152 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2153 return (1);
2154 }
2155 /* illegal command, out of sync ? */
2156 printf("%s: illegal command: 0x%x "
2157 "(state %d, phase %x, prevphase %x)\n",
2158 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2159 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2160 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2161 NCRCMD(sc, NCRCMD_FLUSH);
2162 DELAY(1);
2163 }
2164 ncr53c9x_init(sc, 1); /* Restart everything */
2165 return (1);
2166 }
2167 }
2168 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2169
2170 /*
2171 * Call if DMA is active.
2172 *
2173 * If DMA_INTR returns true, then maybe go 'round the loop
2174 * again in case there is no more DMA queued, but a phase
2175 * change is expected.
2176 */
2177 if (NCRDMA_ISACTIVE(sc)) {
2178 int r = NCRDMA_INTR(sc);
2179 if (r == -1) {
2180 printf("%s: DMA error; resetting\n",
2181 sc->sc_dev.dv_xname);
2182 ncr53c9x_init(sc, 1);
2183 }
2184 /* If DMA active here, then go back to work... */
2185 if (NCRDMA_ISACTIVE(sc))
2186 return (1);
2187
2188 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2189 /*
2190 * DMA not completed. If we can not find a
2191 * acceptable explanation, print a diagnostic.
2192 */
2193 if (sc->sc_state == NCR_SELECTING)
2194 /*
2195 * This can happen if we are reselected
2196 * while using DMA to select a target.
2197 */
2198 /*void*/;
2199 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2200 /*
2201 * Our (multi-byte) message (eg SDTR) was
2202 * interrupted by the target to send
2203 * a MSG REJECT.
2204 * Print diagnostic if current phase
2205 * is not MESSAGE IN.
2206 */
2207 if (sc->sc_phase != MESSAGE_IN_PHASE)
2208 printf("%s: !TC on MSG OUT"
2209 " [intr %x, stat %x, step %d]"
2210 " prevphase %x, resid %lx\n",
2211 sc->sc_dev.dv_xname,
2212 sc->sc_espintr,
2213 sc->sc_espstat,
2214 sc->sc_espstep,
2215 sc->sc_prevphase,
2216 (u_long)sc->sc_omlen);
2217 } else if (sc->sc_dleft == 0) {
2218 /*
2219 * The DMA operation was started for
2220 * a DATA transfer. Print a diagnostic
2221 * if the DMA counter and TC bit
2222 * appear to be out of sync.
2223 */
2224 printf("%s: !TC on DATA XFER"
2225 " [intr %x, stat %x, step %d]"
2226 " prevphase %x, resid %x\n",
2227 sc->sc_dev.dv_xname,
2228 sc->sc_espintr,
2229 sc->sc_espstat,
2230 sc->sc_espstep,
2231 sc->sc_prevphase,
2232 ecb ? ecb->dleft : -1);
2233 }
2234 }
2235 }
2236
2237 /*
2238 * Check for less serious errors.
2239 */
2240 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2241 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2242 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2243 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2244 else
2245 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2246 }
2247
2248 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2249 sc->sc_msgify = 0;
2250 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2251 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2252 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2253 NCRCMD(sc, NCRCMD_FLUSH);
2254 /* DELAY(1); */
2255 }
2256 /*
2257 * This command must (apparently) be issued within
2258 * 250mS of a disconnect. So here you are...
2259 */
2260 NCRCMD(sc, NCRCMD_ENSEL);
2261
2262 switch (sc->sc_state) {
2263 case NCR_RESELECTED:
2264 goto sched;
2265
2266 case NCR_SELECTING:
2267 {
2268 struct ncr53c9x_linfo *li;
2269
2270 ecb->xs->error = XS_SELTIMEOUT;
2271
2272 /* Selection timeout -- discard all LUNs if empty */
2273 periph = ecb->xs->xs_periph;
2274 ti = &sc->sc_tinfo[periph->periph_target];
2275 li = LIST_FIRST(&ti->luns);
2276 while (li != NULL) {
2277 if (li->untagged == NULL && li->used == 0) {
2278 if (li->lun < NCR_NLUN)
2279 ti->lun[li->lun] = NULL;
2280 LIST_REMOVE(li, link);
2281 free(li, M_DEVBUF);
2282 /*
2283 * Restart the search at the beginning
2284 */
2285 li = LIST_FIRST(&ti->luns);
2286 continue;
2287 }
2288 li = LIST_NEXT(li, link);
2289 }
2290 goto finish;
2291 }
2292 case NCR_CONNECTED:
2293 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2294 #ifdef NCR53C9X_DEBUG
2295 if (ecb != NULL)
2296 scsipi_printaddr(ecb->xs->xs_periph);
2297 printf("sync nego not completed!\n");
2298 #endif
2299 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2300 sc->sc_flags &= ~NCR_SYNCHNEGO;
2301 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2302 }
2303
2304 /* it may be OK to disconnect */
2305 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2306 /*
2307 * Section 5.1.1 of the SCSI 2 spec
2308 * suggests issuing a REQUEST SENSE
2309 * following an unexpected disconnect.
2310 * Some devices go into a contingent
2311 * allegiance condition when
2312 * disconnecting, and this is necessary
2313 * to clean up their state.
2314 */
2315 printf("%s: unexpected disconnect; ",
2316 sc->sc_dev.dv_xname);
2317 if ((ecb->flags & ECB_SENSE) != 0) {
2318 printf("resetting\n");
2319 goto reset;
2320 }
2321 printf("sending REQUEST SENSE\n");
2322 callout_stop(&ecb->xs->xs_callout);
2323 ncr53c9x_sense(sc, ecb);
2324 goto out;
2325 }
2326
2327 ecb->xs->error = XS_TIMEOUT;
2328 goto finish;
2329
2330 case NCR_DISCONNECT:
2331 sc->sc_nexus = NULL;
2332 goto sched;
2333
2334 case NCR_CMDCOMPLETE:
2335 goto finish;
2336 }
2337 }
2338
2339 switch (sc->sc_state) {
2340
2341 case NCR_SBR:
2342 printf("%s: waiting for SCSI Bus Reset to happen\n",
2343 sc->sc_dev.dv_xname);
2344 return (1);
2345
2346 case NCR_RESELECTED:
2347 /*
2348 * we must be continuing a message ?
2349 */
2350 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2351 printf("%s: target didn't identify\n",
2352 sc->sc_dev.dv_xname);
2353 ncr53c9x_init(sc, 1);
2354 return (1);
2355 }
2356 printf("<<RESELECT CONT'd>>");
2357 #if XXXX
2358 ncr53c9x_msgin(sc);
2359 if (sc->sc_state != NCR_CONNECTED) {
2360 /* IDENTIFY fail?! */
2361 printf("%s: identify failed\n",
2362 sc->sc_dev.dv_xname, sc->sc_state);
2363 ncr53c9x_init(sc, 1);
2364 return (1);
2365 }
2366 #endif
2367 break;
2368
2369 case NCR_IDENTIFIED:
2370 ecb = sc->sc_nexus;
2371 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2372 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2373 /*
2374 * Things are seriously fucked up.
2375 * Pull the brakes, i.e. reset
2376 */
2377 printf("%s: target didn't send tag: %d bytes in fifo\n",
2378 sc->sc_dev.dv_xname, i);
2379 /* Drain and display fifo */
2380 while (i-- > 0)
2381 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2382
2383 ncr53c9x_init(sc, 1);
2384 return (1);
2385 } else
2386 goto msgin;
2387
2388 break;
2389
2390 case NCR_IDLE:
2391 case NCR_SELECTING:
2392 ecb = sc->sc_nexus;
2393 if (sc->sc_espintr & NCRINTR_RESEL) {
2394 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2395 sc->sc_flags = 0;
2396 /*
2397 * If we're trying to select a
2398 * target ourselves, push our command
2399 * back into the ready list.
2400 */
2401 if (sc->sc_state == NCR_SELECTING) {
2402 NCR_MISC(("backoff selector "));
2403 callout_stop(&ecb->xs->xs_callout);
2404 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2405 ecb->flags |= ECB_READY;
2406 ecb = sc->sc_nexus = NULL;
2407 }
2408 sc->sc_state = NCR_RESELECTED;
2409 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2410 /*
2411 * Things are seriously fucked up.
2412 * Pull the brakes, i.e. reset
2413 */
2414 printf("%s: target didn't identify\n",
2415 sc->sc_dev.dv_xname);
2416 ncr53c9x_init(sc, 1);
2417 return (1);
2418 }
2419 /*
2420 * The C90 only inhibits FIFO writes until
2421 * reselection is complete, instead of
2422 * waiting until the interrupt status register
2423 * has been read. So, if the reselect happens
2424 * while we were entering a command bytes (for
2425 * another target) some of those bytes can
2426 * appear in the FIFO here, after the
2427 * interrupt is taken.
2428 */
2429 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2430
2431 if (nfifo < 2 ||
2432 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) {
2433 printf("%s: RESELECT: %d bytes in FIFO! "
2434 "[intr %x, stat %x, step %d, "
2435 "prevphase %x]\n",
2436 sc->sc_dev.dv_xname,
2437 nfifo,
2438 sc->sc_espintr,
2439 sc->sc_espstat,
2440 sc->sc_espstep,
2441 sc->sc_prevphase);
2442 ncr53c9x_init(sc, 1);
2443 return (1);
2444 }
2445 sc->sc_selid = sc->sc_imess[0];
2446 NCR_MISC(("selid=%02x ", sc->sc_selid));
2447
2448 /* Handle identify message */
2449 ncr53c9x_msgin(sc);
2450 if (nfifo != 2) {
2451 /*
2452 * Note: this should not happen
2453 * with `dmaselect' on.
2454 */
2455 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2456 NCRCMD(sc, NCRCMD_FLUSH);
2457 } else if (sc->sc_features & NCR_F_DMASELECT &&
2458 sc->sc_rev == NCR_VARIANT_ESP100) {
2459 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2460 }
2461
2462 if (sc->sc_state != NCR_CONNECTED &&
2463 sc->sc_state != NCR_IDENTIFIED) {
2464 /* IDENTIFY fail?! */
2465 printf("%s: identify failed, "
2466 "state %d, intr %02x\n",
2467 sc->sc_dev.dv_xname, sc->sc_state,
2468 sc->sc_espintr);
2469 ncr53c9x_init(sc, 1);
2470 return (1);
2471 }
2472 goto shortcut; /* ie. next phase expected soon */
2473 }
2474
2475 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2476 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2477 /*
2478 * Arbitration won; examine the `step' register
2479 * to determine how far the selection could progress.
2480 */
2481 ecb = sc->sc_nexus;
2482 if (ecb == NULL)
2483 panic("ncr53c9x: no nexus");
2484
2485 periph = ecb->xs->xs_periph;
2486 ti = &sc->sc_tinfo[periph->periph_target];
2487
2488 switch (sc->sc_espstep) {
2489 case 0:
2490 /*
2491 * The target did not respond with a
2492 * message out phase - probably an old
2493 * device that doesn't recognize ATN.
2494 * Clear ATN and just continue, the
2495 * target should be in the command
2496 * phase.
2497 * XXXX check for command phase?
2498 */
2499 NCRCMD(sc, NCRCMD_RSTATN);
2500 break;
2501 case 1:
2502 if ((ti->flags & T_NEGOTIATE) == 0 &&
2503 ecb->tag[0] == 0) {
2504 printf("%s: step 1 & !NEG\n",
2505 sc->sc_dev.dv_xname);
2506 goto reset;
2507 }
2508 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2509 printf("%s: !MSGOUT\n",
2510 sc->sc_dev.dv_xname);
2511 goto reset;
2512 }
2513 if (ti->flags & T_WIDE) {
2514 ncr53c9x_sched_msgout(SEND_WDTR);
2515 }
2516 if (ti->flags & T_NEGOTIATE) {
2517 /* Start negotiating */
2518 ti->period = sc->sc_minsync;
2519 ti->offset = 15;
2520 sc->sc_flags |= NCR_SYNCHNEGO;
2521 if (ecb->tag[0])
2522 ncr53c9x_sched_msgout(
2523 SEND_TAG|SEND_SDTR);
2524 else
2525 ncr53c9x_sched_msgout(
2526 SEND_SDTR);
2527 } else {
2528 /* Could not do ATN3 so send TAG */
2529 ncr53c9x_sched_msgout(SEND_TAG);
2530 }
2531 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2532 break;
2533 case 3:
2534 /*
2535 * Grr, this is supposed to mean
2536 * "target left command phase prematurely".
2537 * It seems to happen regularly when
2538 * sync mode is on.
2539 * Look at FIFO to see if command went out.
2540 * (Timing problems?)
2541 */
2542 if (sc->sc_features & NCR_F_DMASELECT) {
2543 if (sc->sc_cmdlen == 0)
2544 /* Hope for the best.. */
2545 break;
2546 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2547 & NCRFIFO_FF) == 0) {
2548 /* Hope for the best.. */
2549 break;
2550 }
2551 printf("(%s:%d:%d): selection failed;"
2552 " %d left in FIFO "
2553 "[intr %x, stat %x, step %d]\n",
2554 sc->sc_dev.dv_xname,
2555 periph->periph_target,
2556 periph->periph_lun,
2557 NCR_READ_REG(sc, NCR_FFLAG)
2558 & NCRFIFO_FF,
2559 sc->sc_espintr, sc->sc_espstat,
2560 sc->sc_espstep);
2561 NCRCMD(sc, NCRCMD_FLUSH);
2562 ncr53c9x_sched_msgout(SEND_ABORT);
2563 return (1);
2564 case 2:
2565 /* Select stuck at Command Phase */
2566 NCRCMD(sc, NCRCMD_FLUSH);
2567 break;
2568 case 4:
2569 if (sc->sc_features & NCR_F_DMASELECT &&
2570 sc->sc_cmdlen != 0)
2571 printf("(%s:%d:%d): select; "
2572 "%lu left in DMA buffer "
2573 "[intr %x, stat %x, step %d]\n",
2574 sc->sc_dev.dv_xname,
2575 periph->periph_target,
2576 periph->periph_lun,
2577 (u_long)sc->sc_cmdlen,
2578 sc->sc_espintr,
2579 sc->sc_espstat,
2580 sc->sc_espstep);
2581 /* So far, everything went fine */
2582 break;
2583 }
2584
2585 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2586 /* Do an implicit RESTORE POINTERS. */
2587 sc->sc_dp = ecb->daddr;
2588 sc->sc_dleft = ecb->dleft;
2589 sc->sc_state = NCR_CONNECTED;
2590 break;
2591
2592 } else {
2593
2594 printf("%s: unexpected status after select"
2595 ": [intr %x, stat %x, step %x]\n",
2596 sc->sc_dev.dv_xname,
2597 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2598 NCRCMD(sc, NCRCMD_FLUSH);
2599 DELAY(1);
2600 goto reset;
2601 }
2602 if (sc->sc_state == NCR_IDLE) {
2603 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2604 return (0);
2605 }
2606 break;
2607
2608 case NCR_CONNECTED:
2609 if ((sc->sc_flags & NCR_ICCS) != 0) {
2610 /* "Initiate Command Complete Steps" in progress */
2611 u_char msg;
2612
2613 sc->sc_flags &= ~NCR_ICCS;
2614
2615 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2616 printf("%s: ICCS: "
2617 ": [intr %x, stat %x, step %x]\n",
2618 sc->sc_dev.dv_xname,
2619 sc->sc_espintr, sc->sc_espstat,
2620 sc->sc_espstep);
2621 }
2622 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2623 if (sc->sc_imlen < 2)
2624 printf("%s: can't get status, only %d bytes\n",
2625 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2626 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2627 msg = sc->sc_imess[sc->sc_imlen - 1];
2628 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2629 if (msg == MSG_CMDCOMPLETE) {
2630 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2631 ? 0 : sc->sc_dleft;
2632 if ((ecb->flags & ECB_SENSE) == 0)
2633 ecb->xs->resid = ecb->dleft;
2634 sc->sc_state = NCR_CMDCOMPLETE;
2635 } else
2636 printf("%s: STATUS_PHASE: msg %d\n",
2637 sc->sc_dev.dv_xname, msg);
2638 sc->sc_imlen = 0;
2639 NCRCMD(sc, NCRCMD_MSGOK);
2640 goto shortcut; /* ie. wait for disconnect */
2641 }
2642 break;
2643
2644 default:
2645 /* Don't panic: reset. */
2646 printf("%s: invalid state: %d",
2647 sc->sc_dev.dv_xname, sc->sc_state);
2648 ncr53c9x_scsi_reset(sc);
2649 goto out;
2650 #if 0
2651 panic("%s: invalid state: %d",
2652 sc->sc_dev.dv_xname, sc->sc_state);
2653 #endif
2654 break;
2655 }
2656
2657 /*
2658 * Driver is now in state NCR_CONNECTED, i.e. we
2659 * have a current command working the SCSI bus.
2660 */
2661 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2662 panic("ncr53c9x: no nexus");
2663 }
2664
2665 switch (sc->sc_phase) {
2666 case MESSAGE_OUT_PHASE:
2667 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2668 ncr53c9x_msgout(sc);
2669 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2670 break;
2671
2672 case MESSAGE_IN_PHASE:
2673 msgin:
2674 NCR_PHASE(("MESSAGE_IN_PHASE "));
2675 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2676 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2677 !(sc->sc_espstat2 & FAS_STAT2_EMPTY)) {
2678 NCRCMD(sc, NCRCMD_FLUSH);
2679 }
2680 sc->sc_flags |= NCR_WAITI;
2681 NCRCMD(sc, NCRCMD_TRANS);
2682 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2683 if ((sc->sc_flags & NCR_WAITI) == 0) {
2684 printf("%s: MSGIN: unexpected FC bit: "
2685 "[intr %x, stat %x, step %x]\n",
2686 sc->sc_dev.dv_xname,
2687 sc->sc_espintr, sc->sc_espstat,
2688 sc->sc_espstep);
2689 }
2690 sc->sc_flags &= ~NCR_WAITI;
2691 ncr53c9x_rdfifo(sc,
2692 (sc->sc_prevphase == sc->sc_phase) ?
2693 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2694 ncr53c9x_msgin(sc);
2695 } else {
2696 printf("%s: MSGIN: weird bits: "
2697 "[intr %x, stat %x, step %x]\n",
2698 sc->sc_dev.dv_xname,
2699 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2700 }
2701 sc->sc_prevphase = MESSAGE_IN_PHASE;
2702 goto shortcut; /* i.e. expect data to be ready */
2703 break;
2704
2705 case COMMAND_PHASE:
2706 /*
2707 * Send the command block. Normally we don't see this
2708 * phase because the SEL_ATN command takes care of
2709 * all this. However, we end up here if either the
2710 * target or we wanted to exchange some more messages
2711 * first (e.g. to start negotiations).
2712 */
2713
2714 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2715 ecb->cmd.cmd.opcode, ecb->clen));
2716 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2717 NCRCMD(sc, NCRCMD_FLUSH);
2718 /* DELAY(1);*/
2719 }
2720 if (sc->sc_features & NCR_F_DMASELECT) {
2721 size_t size;
2722 /* setup DMA transfer for command */
2723 size = ecb->clen;
2724 sc->sc_cmdlen = size;
2725 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2726 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2727 0, &size);
2728 /* Program the SCSI counter */
2729 NCR_SET_COUNT(sc, size);
2730
2731 /* load the count in */
2732 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2733
2734 /* start the command transfer */
2735 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2736 NCRDMA_GO(sc);
2737 } else {
2738 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2739 NCRCMD(sc, NCRCMD_TRANS);
2740 }
2741 sc->sc_prevphase = COMMAND_PHASE;
2742 break;
2743
2744 case DATA_OUT_PHASE:
2745 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2746 NCRCMD(sc, NCRCMD_FLUSH);
2747 size = min(sc->sc_dleft, sc->sc_maxxfer);
2748 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2749 sc->sc_prevphase = DATA_OUT_PHASE;
2750 goto setup_xfer;
2751
2752 case DATA_IN_PHASE:
2753 NCR_PHASE(("DATA_IN_PHASE "));
2754 if (sc->sc_rev == NCR_VARIANT_ESP100)
2755 NCRCMD(sc, NCRCMD_FLUSH);
2756 size = min(sc->sc_dleft, sc->sc_maxxfer);
2757 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2758 sc->sc_prevphase = DATA_IN_PHASE;
2759 setup_xfer:
2760 /* Target returned to data phase: wipe "done" memory */
2761 ecb->flags &= ~ECB_TENTATIVE_DONE;
2762
2763 /* Program the SCSI counter */
2764 NCR_SET_COUNT(sc, size);
2765
2766 /* load the count in */
2767 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2768
2769 /*
2770 * Note that if `size' is 0, we've already transceived
2771 * all the bytes we want but we're still in DATA PHASE.
2772 * Apparently, the device needs padding. Also, a
2773 * transfer size of 0 means "maximum" to the chip
2774 * DMA logic.
2775 */
2776 NCRCMD(sc,
2777 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2778 NCRDMA_GO(sc);
2779 return (1);
2780
2781 case STATUS_PHASE:
2782 NCR_PHASE(("STATUS_PHASE "));
2783 sc->sc_flags |= NCR_ICCS;
2784 NCRCMD(sc, NCRCMD_ICCS);
2785 sc->sc_prevphase = STATUS_PHASE;
2786 goto shortcut; /* i.e. expect status results soon */
2787 break;
2788
2789 case INVALID_PHASE:
2790 break;
2791
2792 default:
2793 printf("%s: unexpected bus phase; resetting\n",
2794 sc->sc_dev.dv_xname);
2795 goto reset;
2796 }
2797
2798 out:
2799 return (1);
2800
2801 reset:
2802 ncr53c9x_init(sc, 1);
2803 goto out;
2804
2805 finish:
2806 ncr53c9x_done(sc, ecb);
2807 goto out;
2808
2809 sched:
2810 sc->sc_state = NCR_IDLE;
2811 ncr53c9x_sched(sc);
2812 goto out;
2813
2814 shortcut:
2815 /*
2816 * The idea is that many of the SCSI operations take very little
2817 * time, and going away and getting interrupted is too high an
2818 * overhead to pay. For example, selecting, sending a message
2819 * and command and then doing some work can be done in one "pass".
2820 *
2821 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2822 * at 40MHz. This needs testing.
2823 */
2824 {
2825 struct timeval wait, cur;
2826
2827 microtime(&wait);
2828 wait.tv_usec += 50 / sc->sc_freq;
2829 if (wait.tv_usec > 1000000) {
2830 wait.tv_sec++;
2831 wait.tv_usec -= 1000000;
2832 }
2833 do {
2834 if (NCRDMA_ISINTR(sc))
2835 goto again;
2836 microtime(&cur);
2837 } while (cur.tv_sec <= wait.tv_sec &&
2838 cur.tv_usec <= wait.tv_usec);
2839 }
2840 goto out;
2841 }
2842
2843 void
2844 ncr53c9x_abort(sc, ecb)
2845 struct ncr53c9x_softc *sc;
2846 struct ncr53c9x_ecb *ecb;
2847 {
2848
2849 /* 2 secs for the abort */
2850 ecb->timeout = NCR_ABORT_TIMEOUT;
2851 ecb->flags |= ECB_ABORT;
2852
2853 if (ecb == sc->sc_nexus) {
2854 int timeout;
2855
2856 /*
2857 * If we're still selecting, the message will be scheduled
2858 * after selection is complete.
2859 */
2860 if (sc->sc_state == NCR_CONNECTED)
2861 ncr53c9x_sched_msgout(SEND_ABORT);
2862
2863 /*
2864 * Reschedule timeout.
2865 */
2866 timeout = ecb->timeout;
2867 if (hz > 100 && timeout > 1000)
2868 timeout = (timeout / 1000) * hz;
2869 else
2870 timeout = (timeout * hz) / 1000;
2871 callout_reset(&ecb->xs->xs_callout, timeout,
2872 ncr53c9x_timeout, ecb);
2873 } else {
2874 /*
2875 * Just leave the command where it is.
2876 * XXX - what choice do we have but to reset the SCSI
2877 * eventually?
2878 */
2879 if (sc->sc_state == NCR_IDLE)
2880 ncr53c9x_sched(sc);
2881 }
2882 }
2883
2884 void
2885 ncr53c9x_timeout(arg)
2886 void *arg;
2887 {
2888 struct ncr53c9x_ecb *ecb = arg;
2889 struct scsipi_xfer *xs = ecb->xs;
2890 struct scsipi_periph *periph = xs->xs_periph;
2891 struct ncr53c9x_softc *sc =
2892 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2893 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2894 int s;
2895
2896 scsipi_printaddr(periph);
2897 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2898 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2899 "msg(q %x,o %x) %s>",
2900 sc->sc_dev.dv_xname,
2901 ecb, ecb->flags, ecb->dleft, ecb->stat,
2902 sc->sc_state, sc->sc_nexus,
2903 NCR_READ_REG(sc, NCR_STAT),
2904 sc->sc_phase, sc->sc_prevphase,
2905 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2906 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2907 #if NCR53C9X_DEBUG > 1
2908 printf("TRACE: %s.", ecb->trace);
2909 #endif
2910
2911 s = splbio();
2912
2913 if (ecb->flags & ECB_ABORT) {
2914 /* abort timed out */
2915 printf(" AGAIN\n");
2916
2917 ncr53c9x_init(sc, 1);
2918 } else {
2919 /* abort the operation that has timed out */
2920 printf("\n");
2921 xs->error = XS_TIMEOUT;
2922 ncr53c9x_abort(sc, ecb);
2923
2924 /* Disable sync mode if stuck in a data phase */
2925 if (ecb == sc->sc_nexus &&
2926 (ti->flags & T_SYNCMODE) != 0 &&
2927 (sc->sc_phase & (MSGI|CDI)) == 0) {
2928 /* XXX ASYNC CALLBACK! */
2929 scsipi_printaddr(periph);
2930 printf("sync negotiation disabled\n");
2931 sc->sc_cfflags |= (1 << (periph->periph_target + 8));
2932 ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2933 }
2934 }
2935
2936 splx(s);
2937 }
2938
2939 void
2940 ncr53c9x_watch(arg)
2941 void *arg;
2942 {
2943 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2944 struct ncr53c9x_tinfo *ti;
2945 struct ncr53c9x_linfo *li;
2946 int t, s;
2947 /* Delete any structures that have not been used in 10min. */
2948 time_t old = time.tv_sec - (10 * 60);
2949
2950 s = splbio();
2951 for (t = 0; t < NCR_NTARG; t++) {
2952 ti = &sc->sc_tinfo[t];
2953 li = LIST_FIRST(&ti->luns);
2954 while (li) {
2955 if (li->last_used < old &&
2956 li->untagged == NULL &&
2957 li->used == 0) {
2958 if (li->lun < NCR_NLUN)
2959 ti->lun[li->lun] = NULL;
2960 LIST_REMOVE(li, link);
2961 free(li, M_DEVBUF);
2962 /* Restart the search at the beginning */
2963 li = LIST_FIRST(&ti->luns);
2964 continue;
2965 }
2966 li = LIST_NEXT(li, link);
2967 }
2968 }
2969 splx(s);
2970 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2971 }
2972
2973