ncr53c9x.c revision 1.55 1 /* $NetBSD: ncr53c9x.c,v 1.55 2000/11/30 09:58:03 pk Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/proc.h>
90 #include <sys/user.h>
91 #include <sys/queue.h>
92 #include <sys/pool.h>
93 #include <sys/scsiio.h>
94
95 #include <dev/scsipi/scsi_all.h>
96 #include <dev/scsipi/scsipi_all.h>
97 #include <dev/scsipi/scsiconf.h>
98 #include <dev/scsipi/scsi_message.h>
99
100 #include <machine/cpu.h>
101
102 #include <dev/ic/ncr53c9xreg.h>
103 #include <dev/ic/ncr53c9xvar.h>
104
105 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
106 #ifdef DEBUG
107 int ncr53c9x_notag = 0;
108 #endif
109
110 /*static*/ void ncr53c9x_readregs __P((struct ncr53c9x_softc *));
111 /*static*/ void ncr53c9x_select __P((struct ncr53c9x_softc *,
112 struct ncr53c9x_ecb *));
113 /*static*/ int ncr53c9x_reselect __P((struct ncr53c9x_softc *, int, int, int));
114 /*static*/ void ncr53c9x_scsi_reset __P((struct ncr53c9x_softc *));
115 /*static*/ int ncr53c9x_poll __P((struct ncr53c9x_softc *,
116 struct scsipi_xfer *, int));
117 /*static*/ void ncr53c9x_sched __P((struct ncr53c9x_softc *));
118 /*static*/ void ncr53c9x_done __P((struct ncr53c9x_softc *,
119 struct ncr53c9x_ecb *));
120 /*static*/ void ncr53c9x_msgin __P((struct ncr53c9x_softc *));
121 /*static*/ void ncr53c9x_msgout __P((struct ncr53c9x_softc *));
122 /*static*/ void ncr53c9x_timeout __P((void *arg));
123 /*static*/ void ncr53c9x_watch __P((void *arg));
124 /*static*/ void ncr53c9x_abort __P((struct ncr53c9x_softc *,
125 struct ncr53c9x_ecb *));
126 /*static*/ void ncr53c9x_dequeue __P((struct ncr53c9x_softc *,
127 struct ncr53c9x_ecb *));
128 /*static*/ int ncr53c9x_ioctl __P((struct scsipi_link *, u_long,
129 caddr_t, int, struct proc *));
130
131 void ncr53c9x_sense __P((struct ncr53c9x_softc *,
132 struct ncr53c9x_ecb *));
133 void ncr53c9x_free_ecb __P((struct ncr53c9x_softc *,
134 struct ncr53c9x_ecb *, int));
135 struct ncr53c9x_ecb *ncr53c9x_get_ecb __P((struct ncr53c9x_softc *, int));
136
137 static inline int ncr53c9x_stp2cpb __P((struct ncr53c9x_softc *, int));
138 static inline void ncr53c9x_setsync __P((struct ncr53c9x_softc *,
139 struct ncr53c9x_tinfo *));
140 static struct ncr53c9x_linfo *ncr53c9x_lunsearch __P((struct ncr53c9x_tinfo *,
141 int64_t lun));
142 static int ecb_pool_initialized = 0;
143 static struct pool ecb_pool;
144
145 /*
146 * Names for the NCR53c9x variants, correspnding to the variant tags
147 * in ncr53c9xvar.h.
148 */
149 static const char *ncr53c9x_variant_names[] = {
150 "ESP100",
151 "ESP100A",
152 "ESP200",
153 "NCR53C94",
154 "NCR53C96",
155 "ESP406",
156 "FAS408",
157 "FAS216",
158 "AM53C974",
159 };
160
161 static struct scsipi_adapter ncr53c9x_adapter = {
162 0, /* adapter refcnt */
163 ncr53c9x_scsi_cmd, /* cmd */
164 minphys, /* minphys */
165 ncr53c9x_ioctl, /* ioctl */
166 NULL, /* enable */
167 NULL, /* getgeom */
168 };
169
170 static struct scsipi_device ncr53c9x_device = {
171 NULL, /* use default error handler */
172 NULL, /* have a queue, served by this */
173 NULL, /* have no async handler */
174 NULL, /* use default 'done' routine */
175 };
176
177 /*
178 * Search linked list for LUN info by LUN id.
179 */
180 static struct ncr53c9x_linfo *
181 ncr53c9x_lunsearch(ti, lun)
182 struct ncr53c9x_tinfo *ti;
183 int64_t lun;
184 {
185 struct ncr53c9x_linfo *li;
186 LIST_FOREACH(li, &ti->luns, link)
187 if (li->lun == lun)
188 return (li);
189 return (NULL);
190 }
191
192 /*
193 * Attach this instance, and then all the sub-devices
194 */
195 void
196 ncr53c9x_attach(sc, adapter, device)
197 struct ncr53c9x_softc *sc;
198 struct scsipi_adapter *adapter;
199 struct scsipi_device *device;
200 {
201
202 callout_init(&sc->sc_watchdog);
203 /*
204 * Allocate SCSI message buffers.
205 * Front-ends can override allocation to avoid alignment
206 * handling in the DMA engines. Note that that ncr53c9x_msgout()
207 * can request a 1 byte DMA transfer.
208 */
209 if (sc->sc_omess == NULL)
210 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
211
212 if (sc->sc_imess == NULL)
213 sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT);
214
215 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
216 printf("out of memory\n");
217 return;
218 }
219
220 /*
221 * Note, the front-end has set us up to print the chip variation.
222 */
223 if (sc->sc_rev >= NCR_VARIANT_MAX) {
224 printf("\n%s: unknown variant %d, devices not attached\n",
225 sc->sc_dev.dv_xname, sc->sc_rev);
226 return;
227 }
228
229 printf(": %s, %dMHz, SCSI ID %d\n",
230 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
231
232 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
233
234 /* The value *must not* be == 1. Make it 2 */
235 if (sc->sc_ccf == 1)
236 sc->sc_ccf = 2;
237
238 /*
239 * The recommended timeout is 250ms. This register is loaded
240 * with a value calculated as follows, from the docs:
241 *
242 * (timout period) x (CLK frequency)
243 * reg = -------------------------------------
244 * 8192 x (Clock Conversion Factor)
245 *
246 * Since CCF has a linear relation to CLK, this generally computes
247 * to the constant of 153.
248 */
249 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
250
251 /* CCF register only has 3 bits; 0 is actually 8 */
252 sc->sc_ccf &= 7;
253
254 /*
255 * fill in the prototype scsipi_link.
256 */
257 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
258 sc->sc_link.adapter_softc = sc;
259 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_id;
260 sc->sc_link.adapter = (adapter) ? adapter : &ncr53c9x_adapter;
261 sc->sc_link.device = (device) ? device : &ncr53c9x_device;
262 sc->sc_link.openings = 32;
263 sc->sc_link.scsipi_scsi.max_target = 7;
264 sc->sc_link.scsipi_scsi.max_lun = 7;
265 sc->sc_link.type = BUS_SCSI;
266
267 /*
268 * Add reference to adapter so that we drop the reference after
269 * config_found() to make sure the adatper is disabled.
270 */
271 if (scsipi_adapter_addref(&sc->sc_link) != 0) {
272 printf("%s: unable to enable controller\n",
273 sc->sc_dev.dv_xname);
274 return;
275 }
276
277 /* Reset state & bus */
278 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
279 sc->sc_state = 0;
280 ncr53c9x_init(sc, 1);
281
282 /*
283 * Now try to attach all the sub-devices
284 */
285 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
286
287 scsipi_adapter_delref(&sc->sc_link);
288 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
289 }
290
291 int
292 ncr53c9x_detach(sc, flags)
293 struct ncr53c9x_softc *sc;
294 int flags;
295 {
296 int error;
297
298 if (sc->sc_child) {
299 error = config_detach(sc->sc_child, flags);
300 if (error)
301 return (error);
302 }
303
304 free(sc->sc_imess, M_DEVBUF);
305 free(sc->sc_omess, M_DEVBUF);
306
307 return (0);
308 }
309
310 /*
311 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
312 * only this controller, but kills any on-going commands, and also stops
313 * and resets the DMA.
314 *
315 * After reset, registers are loaded with the defaults from the attach
316 * routine above.
317 */
318 void
319 ncr53c9x_reset(sc)
320 struct ncr53c9x_softc *sc;
321 {
322
323 /* reset DMA first */
324 NCRDMA_RESET(sc);
325
326 /* reset SCSI chip */
327 NCRCMD(sc, NCRCMD_RSTCHIP);
328 NCRCMD(sc, NCRCMD_NOP);
329 DELAY(500);
330
331 /* do these backwards, and fall through */
332 switch (sc->sc_rev) {
333 case NCR_VARIANT_ESP406:
334 case NCR_VARIANT_FAS408:
335 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
336 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
337 case NCR_VARIANT_AM53C974:
338 case NCR_VARIANT_FAS216:
339 case NCR_VARIANT_NCR53C94:
340 case NCR_VARIANT_NCR53C96:
341 case NCR_VARIANT_ESP200:
342 sc->sc_features |= NCR_F_HASCFG3;
343 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
344 case NCR_VARIANT_ESP100A:
345 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
346 case NCR_VARIANT_ESP100:
347 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
348 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
349 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
350 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
351 break;
352 default:
353 printf("%s: unknown revision code, assuming ESP100\n",
354 sc->sc_dev.dv_xname);
355 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
356 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
357 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
358 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
359 }
360
361 if (sc->sc_rev == NCR_VARIANT_AM53C974)
362 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
363 }
364
365 /*
366 * Reset the SCSI bus, but not the chip
367 */
368 void
369 ncr53c9x_scsi_reset(sc)
370 struct ncr53c9x_softc *sc;
371 {
372
373 (*sc->sc_glue->gl_dma_stop)(sc);
374
375 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
376 NCRCMD(sc, NCRCMD_RSTSCSI);
377 }
378
379 /*
380 * Initialize ncr53c9x state machine
381 */
382 void
383 ncr53c9x_init(sc, doreset)
384 struct ncr53c9x_softc *sc;
385 int doreset;
386 {
387 struct ncr53c9x_ecb *ecb;
388 struct ncr53c9x_linfo *li;
389 int i, r;
390
391 NCR_TRACE(("[NCR_INIT(%d)] ", doreset));
392
393 if (!ecb_pool_initialized) {
394 /* All instances share this pool */
395 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
396 "ncr53c9x_ecb", 0, NULL, NULL, 0);
397 ecb_pool_initialized = 1;
398 }
399
400 if (sc->sc_state == 0) {
401 /* First time through; initialize. */
402
403 TAILQ_INIT(&sc->ready_list);
404 sc->sc_nexus = NULL;
405 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
406 for (r=0; r<NCR_NTARG; r++) {
407 LIST_INIT(&sc->sc_tinfo[r].luns);
408 }
409 } else {
410 /* Cancel any active commands. */
411 sc->sc_state = NCR_CLEANING;
412 sc->sc_msgify = 0;
413 if ((ecb = sc->sc_nexus) != NULL) {
414 ecb->xs->error = XS_TIMEOUT;
415 ncr53c9x_done(sc, ecb);
416 }
417 /* Cancel outstanding disconnected commands on each LUN */
418 for (r=0; r<8; r++) {
419 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
420 if ((ecb = li->untagged)) {
421 li->untagged = NULL;
422 /*
423 * XXXXXXX
424 *
425 * Should we terminate a command
426 * that never reached the disk?
427 */
428 li->busy = 0;
429 ecb->xs->error = XS_TIMEOUT;
430 ncr53c9x_done(sc, ecb);
431 }
432 for (i=0; i<256; i++)
433 if ((ecb = li->queued[i])) {
434 li->queued[i] = NULL;
435 ecb->xs->error = XS_TIMEOUT;
436 ncr53c9x_done(sc, ecb);
437 }
438 li->used = 0;
439 }
440 }
441 }
442
443 /*
444 * reset the chip to a known state
445 */
446 ncr53c9x_reset(sc);
447
448 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
449 for (r = 0; r < 8; r++) {
450 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
451 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
452
453 ti->flags = ((sc->sc_cfflags & (1<<(r+16))) ? T_TAGOFF : 0) |
454 ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
455 ? T_SYNCHOFF : 0) |
456 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
457 T_NEED_TO_RESET;
458 #ifdef DEBUG
459 if (ncr53c9x_notag)
460 ti->flags |= T_TAGOFF;
461 #endif
462 ti->period = sc->sc_minsync;
463 ti->offset = 0;
464 }
465
466 if (doreset) {
467 sc->sc_state = NCR_SBR;
468 NCRCMD(sc, NCRCMD_RSTSCSI);
469 } else {
470 sc->sc_state = NCR_IDLE;
471 ncr53c9x_sched(sc);
472 }
473 }
474
475 /*
476 * Read the NCR registers, and save their contents for later use.
477 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
478 * NCR_INTR - so make sure it is the last read.
479 *
480 * I think that (from reading the docs) most bits in these registers
481 * only make sense when he DMA CSR has an interrupt showing. Call only
482 * if an interrupt is pending.
483 */
484 __inline__ void
485 ncr53c9x_readregs(sc)
486 struct ncr53c9x_softc *sc;
487 {
488
489 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
490 /* Only the stepo bits are of interest */
491 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
492 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
493
494 if (sc->sc_glue->gl_clear_latched_intr != NULL)
495 (*sc->sc_glue->gl_clear_latched_intr)(sc);
496
497 /*
498 * Determine the SCSI bus phase, return either a real SCSI bus phase
499 * or some pseudo phase we use to detect certain exceptions.
500 */
501
502 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS)
503 ? /* Disconnected */ BUSFREE_PHASE
504 : sc->sc_espstat & NCRSTAT_PHASE;
505
506 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ",
507 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep));
508 }
509
510 /*
511 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
512 */
513 static inline int
514 ncr53c9x_stp2cpb(sc, period)
515 struct ncr53c9x_softc *sc;
516 int period;
517 {
518 int v;
519 v = (sc->sc_freq * period) / 250;
520 if (ncr53c9x_cpb2stp(sc, v) < period)
521 /* Correct round-down error */
522 v++;
523 return (v);
524 }
525
526 static inline void
527 ncr53c9x_setsync(sc, ti)
528 struct ncr53c9x_softc *sc;
529 struct ncr53c9x_tinfo *ti;
530 {
531 u_char syncoff, synctp, cfg3 = sc->sc_cfg3;
532
533 if (ti->flags & T_SYNCMODE) {
534 syncoff = ti->offset;
535 synctp = ncr53c9x_stp2cpb(sc, ti->period);
536 if (sc->sc_features & NCR_F_FASTSCSI) {
537 /*
538 * If the period is 200ns or less (ti->period <= 50),
539 * put the chip in Fast SCSI mode.
540 */
541 if (ti->period <= 50)
542 /*
543 * There are (at least) 4 variations of the
544 * configuration 3 register. The drive attach
545 * routine sets the appropriate bit to put the
546 * chip into Fast SCSI mode so that it doesn't
547 * have to be figured out here each time.
548 */
549 cfg3 |= sc->sc_cfg3_fscsi;
550 }
551
552 /*
553 * Am53c974 requires different SYNCTP values when the
554 * FSCSI bit is off.
555 */
556 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
557 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
558 synctp--;
559 } else {
560 syncoff = 0;
561 synctp = 0;
562 }
563
564 if (sc->sc_features & NCR_F_HASCFG3)
565 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
566
567 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
568 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
569 }
570
571 int ncr53c9x_dmaselect = 0;
572 /*
573 * Send a command to a target, set the driver state to NCR_SELECTING
574 * and let the caller take care of the rest.
575 *
576 * Keeping this as a function allows me to say that this may be done
577 * by DMA instead of programmed I/O soon.
578 */
579 void
580 ncr53c9x_select(sc, ecb)
581 struct ncr53c9x_softc *sc;
582 struct ncr53c9x_ecb *ecb;
583 {
584 struct scsipi_link *sc_link = ecb->xs->sc_link;
585 int target = sc_link->scsipi_scsi.target;
586 int lun = sc_link->scsipi_scsi.lun;
587 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
588 int tiflags = ti->flags;
589 u_char *cmd;
590 int clen;
591 size_t dmasize;
592
593 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
594 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
595
596 sc->sc_state = NCR_SELECTING;
597 /*
598 * Schedule the timeout now, the first time we will go away
599 * expecting to come back due to an interrupt, because it is
600 * always possible that the interrupt may never happen.
601 */
602 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
603 int timeout = ecb->timeout;
604
605 if (hz > 100 && timeout > 1000)
606 timeout = (timeout / 1000) * hz;
607 else
608 timeout = (timeout * hz) / 1000;
609 callout_reset(&ecb->xs->xs_callout, timeout,
610 ncr53c9x_timeout, ecb);
611 }
612
613 /*
614 * The docs say the target register is never reset, and I
615 * can't think of a better place to set it
616 */
617 NCR_WRITE_REG(sc, NCR_SELID, target);
618 ncr53c9x_setsync(sc, ti);
619
620 if (ecb->flags & ECB_SENSE) {
621 /*
622 * For REQUEST SENSE, we should not send an IDENTIFY or
623 * otherwise mangle the target. There should be no MESSAGE IN
624 * phase.
625 */
626 if (ncr53c9x_dmaselect) {
627 /* setup DMA transfer for command */
628 dmasize = clen = ecb->clen;
629 sc->sc_cmdlen = clen;
630 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
631 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
632
633 /* Program the SCSI counter */
634 NCR_WRITE_REG(sc, NCR_TCL, dmasize);
635 NCR_WRITE_REG(sc, NCR_TCM, dmasize >> 8);
636 if (sc->sc_cfg2 & NCRCFG2_FE) {
637 NCR_WRITE_REG(sc, NCR_TCH, dmasize >> 16);
638 }
639
640 /* load the count in */
641 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
642
643 /* And get the targets attention */
644 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
645 NCRDMA_GO(sc);
646 } else {
647 /* Now get the command into the FIFO */
648 cmd = (u_char *)&ecb->cmd.cmd;
649 clen = ecb->clen;
650 while (clen--)
651 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
652
653 NCRCMD(sc, NCRCMD_SELNATN);
654 }
655 return;
656 }
657
658 if (ecb->tag[0]) {
659 /* We'll use tags */
660 ecb->cmd.msg[0] = MSG_IDENTIFY(lun, 1);
661 ecb->cmd.msg[1] = ecb->tag[0];
662 ecb->cmd.msg[2] = ecb->tag[1];
663 cmd = (u_char *)&ecb->cmd.msg[0];
664 clen = ecb->clen + 3;
665 } else {
666 ecb->cmd.msg[2] =
667 MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF)?0:1);
668 cmd = (u_char *)&ecb->cmd.msg[2];
669 clen = ecb->clen + 1;
670 }
671
672 if (ncr53c9x_dmaselect && (tiflags & T_NEGOTIATE) == 0) {
673
674 /* setup DMA transfer for command */
675 dmasize = clen;
676 sc->sc_cmdlen = clen;
677 sc->sc_cmdp = cmd;
678 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
679
680 /* Program the SCSI counter */
681 NCR_WRITE_REG(sc, NCR_TCL, dmasize);
682 NCR_WRITE_REG(sc, NCR_TCM, dmasize >> 8);
683 if (sc->sc_cfg2 & NCRCFG2_FE) {
684 NCR_WRITE_REG(sc, NCR_TCH, dmasize >> 16);
685 }
686
687 /* load the count in */
688 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
689
690 /* And get the targets attention */
691 if (ecb->tag[0])
692 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
693 else
694 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
695 NCRDMA_GO(sc);
696 return;
697 }
698
699 /*
700 * Who am I. This is where we tell the target that we are
701 * happy for it to disconnect etc.
702 */
703 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
704 clen --;
705
706 if (ti->flags & T_NEGOTIATE) {
707 /* Arbitrate, select and stop after IDENTIFY message */
708 NCRCMD(sc, NCRCMD_SELATNS);
709 return;
710 }
711
712 /* If we want to send a tag, get it into the fifo */
713 if (ecb->tag[0]) {
714 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
715 clen --;
716 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
717 clen --;
718 }
719
720 /* Now get the command into the FIFO */
721 while (clen--)
722 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
723
724 /* And get the targets attention */
725 if (ecb->tag[0])
726 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
727 else
728 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
729 }
730
731 void
732 ncr53c9x_free_ecb(sc, ecb, flags)
733 struct ncr53c9x_softc *sc;
734 struct ncr53c9x_ecb *ecb;
735 int flags;
736 {
737 int s;
738
739 s = splbio();
740 ecb->flags = 0;
741 pool_put(&ecb_pool, (void *)ecb);
742 splx(s);
743 return;
744 }
745
746 struct ncr53c9x_ecb *
747 ncr53c9x_get_ecb(sc, flags)
748 struct ncr53c9x_softc *sc;
749 int flags;
750 {
751 struct ncr53c9x_ecb *ecb;
752 int s, wait = 0;
753
754 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
755 wait = PR_WAITOK;
756
757 s = splbio();
758 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, wait);
759 splx(s);
760 bzero(ecb, sizeof(*ecb));
761 if (ecb)
762 ecb->flags |= ECB_ALLOC;
763 return (ecb);
764 }
765
766 /*
767 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
768 */
769
770 /*
771 * Start a SCSI-command
772 * This function is called by the higher level SCSI-driver to queue/run
773 * SCSI-commands.
774 */
775 int
776 ncr53c9x_scsi_cmd(xs)
777 struct scsipi_xfer *xs;
778 {
779 struct scsipi_link *sc_link = xs->sc_link;
780 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
781 struct ncr53c9x_ecb *ecb;
782 struct ncr53c9x_tinfo *ti;
783 struct ncr53c9x_linfo *li;
784 int64_t lun = sc_link->scsipi_scsi.lun;
785 int s, flags;
786
787 NCR_TRACE(("[ncr53c9x_scsi_cmd] "));
788 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
789 sc_link->scsipi_scsi.target));
790
791 /*
792 * Find the LUN info structure and allocate one if it does
793 * not exist.
794 */
795 flags = xs->xs_control;
796 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
797 li = TINFO_LUN(ti, lun);
798 if (li == NULL) {
799 int wait = M_NOWAIT;
800
801 /* Initialize LUN info and add to list. */
802 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
803 wait = M_WAITOK;
804 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
805 return (TRY_AGAIN_LATER);
806 }
807 bzero(li, sizeof(*li));
808 li->last_used = time.tv_sec;
809 li->lun = lun;
810 s = splbio();
811 LIST_INSERT_HEAD(&ti->luns, li, link);
812 if (lun < NCR_NLUN)
813 ti->lun[lun] = li;
814 splx(s);
815 }
816
817 if ((ecb = ncr53c9x_get_ecb(sc, flags)) == NULL)
818 return (TRY_AGAIN_LATER);
819
820 /* Initialize ecb */
821 ecb->xs = xs;
822 ecb->timeout = xs->timeout;
823
824 if (flags & XS_CTL_RESET) {
825 ecb->flags |= ECB_RESET;
826 ecb->clen = 0;
827 ecb->dleft = 0;
828 } else {
829 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
830 ecb->clen = xs->cmdlen;
831 ecb->daddr = xs->data;
832 ecb->dleft = xs->datalen;
833 }
834 ecb->stat = 0;
835
836 s = splbio();
837
838 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
839 ecb->flags |= ECB_READY;
840 if (sc->sc_state == NCR_IDLE)
841 ncr53c9x_sched(sc);
842
843 splx(s);
844
845 if ((flags & XS_CTL_POLL) == 0)
846 return (SUCCESSFULLY_QUEUED);
847
848 /* Not allowed to use interrupts, use polling instead */
849 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
850 ncr53c9x_timeout(ecb);
851 if (ncr53c9x_poll(sc, xs, ecb->timeout))
852 ncr53c9x_timeout(ecb);
853 }
854 return (COMPLETE);
855 }
856
857 /*
858 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
859 */
860 int
861 ncr53c9x_poll(sc, xs, count)
862 struct ncr53c9x_softc *sc;
863 struct scsipi_xfer *xs;
864 int count;
865 {
866
867 NCR_TRACE(("[ncr53c9x_poll] "));
868 while (count) {
869 if (NCRDMA_ISINTR(sc)) {
870 ncr53c9x_intr(sc);
871 }
872 #if alternatively
873 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
874 ncr53c9x_intr(sc);
875 #endif
876 if ((xs->xs_status & XS_STS_DONE) != 0)
877 return (0);
878 if (sc->sc_state == NCR_IDLE) {
879 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
880 ncr53c9x_sched(sc);
881 }
882 DELAY(1000);
883 count--;
884 }
885 return (1);
886 }
887
888 int
889 ncr53c9x_ioctl(link, cmd, arg, flag, p)
890 struct scsipi_link *link;
891 u_long cmd;
892 caddr_t arg;
893 int flag;
894 struct proc *p;
895 {
896 struct ncr53c9x_softc *sc = link->adapter_softc;
897 int s, error;
898
899 s = splbio();
900
901 switch (cmd) {
902 case SCBUSACCEL: {
903 struct scbusaccel_args *sp = (struct scbusaccel_args *)arg;
904 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sp->sa_target];
905
906 if (sp->sa_lun != 0)
907 break;
908
909 if ((sp->sa_flags & SC_ACCEL_SYNC) != 0) {
910 /* If this adapter can't do sync; drop it */
911 if (sc->sc_minsync == 0)
912 break;
913
914 /*
915 * Check whether target is already clamped at
916 * non-sync operation on user request.
917 */
918 if ((ti->flags & T_SYNCHOFF) != 0)
919 break;
920
921 printf("%s: target %d: sync negotiation\n",
922 sc->sc_dev.dv_xname, sp->sa_target);
923 ti->flags |= T_NEGOTIATE;
924 }
925 break;
926 }
927 default:
928 error = ENOTTY;
929 break;
930 }
931 splx(s);
932 return (error);
933 }
934
935
936 /*
937 * LOW LEVEL SCSI UTILITIES
938 */
939
940 /*
941 * Schedule a scsi operation. This has now been pulled out of the interrupt
942 * handler so that we may call it from ncr53c9x_scsi_cmd and ncr53c9x_done.
943 * This may save us an unecessary interrupt just to get things going.
944 * Should only be called when state == NCR_IDLE and at bio pl.
945 */
946 void
947 ncr53c9x_sched(sc)
948 struct ncr53c9x_softc *sc;
949 {
950 struct ncr53c9x_ecb *ecb;
951 struct scsipi_link *sc_link;
952 struct ncr53c9x_tinfo *ti;
953 int lun;
954 struct ncr53c9x_linfo *li;
955 int s, tag;
956
957 NCR_TRACE(("[ncr53c9x_sched] "));
958 if (sc->sc_state != NCR_IDLE)
959 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
960
961 /*
962 * Find first ecb in ready queue that is for a target/lunit
963 * combinations that is not busy.
964 */
965 for (ecb = sc->ready_list.tqh_first; ecb; ecb = ecb->chain.tqe_next) {
966 sc_link = ecb->xs->sc_link;
967 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
968 lun = sc_link->scsipi_scsi.lun;
969
970 /* Select type of tag for this command */
971 if (ecb->xs->xs_control & XS_CTL_URGENT)
972 tag = MSG_HEAD_OF_Q_TAG;
973 else
974 tag = MSG_SIMPLE_Q_TAG;
975 if (ti->flags & (T_RSELECTOFF|T_TAGOFF))
976 tag = 0;
977 #if 0
978 /* XXXX Use tags for polled commands? */
979 if (ecb->xs->xs_control & XS_CTL_POLL)
980 tag = 0;
981 #endif
982 if (ecb->flags & ECB_SENSE)
983 tag = 0;
984 s = splbio();
985 li = TINFO_LUN(ti, lun);
986 if (!li) {
987 int wait = M_NOWAIT;
988 int flags = ecb->xs->xs_control;
989
990 /* Initialize LUN info and add to list. */
991 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
992 wait = M_WAITOK;
993 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
994 splx(s);
995 continue;
996 }
997 bzero(li, sizeof(*li));
998 li->lun = lun;
999
1000 LIST_INSERT_HEAD(&ti->luns, li, link);
1001 if (lun < NCR_NLUN)
1002 ti->lun[lun] = li;
1003 }
1004 li->last_used = time.tv_sec;
1005 if (!tag) {
1006 /* Try to issue this as an un-tagged command */
1007 if (!li->untagged)
1008 li->untagged = ecb;
1009 }
1010 if (li->untagged) {
1011 tag = 0;
1012 if ((li->busy != 1) && !li->used) {
1013 /* We need to issue this untagged command now */
1014 ecb = li->untagged;
1015 sc_link = ecb->xs->sc_link;
1016 }
1017 else {
1018 /* Not ready yet */
1019 splx(s);
1020 continue;
1021 }
1022 }
1023 ecb->tag[0] = tag;
1024 if (tag) {
1025 int i;
1026
1027 /* Allocate a tag */
1028 if (li->used == 255) {
1029 /* no free tags */
1030 splx(s);
1031 continue;
1032 }
1033 /* Start from the last used location */
1034 for (i=li->avail; i<256; i++) {
1035 if (li->queued[i] == NULL)
1036 break;
1037 }
1038 /* Couldn't find one, start again from the beginning */
1039 if (i == 256) {
1040 for (i=0; i<256; i++) {
1041 if (li->queued[i] == NULL)
1042 break;
1043 }
1044 }
1045 #ifdef DIAGNOSTIC
1046 /* There's supposed to be at least 1 tag avail */
1047 if (i == 256)
1048 panic("ncr53c9x_sched: tag alloc failure\n");
1049 #endif
1050
1051 /* Save where to start next time. */
1052 li->avail = i+1;
1053 li->used ++;
1054
1055 li->queued[i] = ecb;
1056 ecb->tag[1] = i;
1057 }
1058 splx(s);
1059 if (li->untagged && (li->busy != 1)) {
1060 li->busy = 1;
1061 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1062 ecb->flags &= ~ECB_READY;
1063 sc->sc_nexus = ecb;
1064 ncr53c9x_select(sc, ecb);
1065 break;
1066 }
1067 if (!li->untagged && tag) {
1068 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1069 ecb->flags &= ~ECB_READY;
1070 sc->sc_nexus = ecb;
1071 ncr53c9x_select(sc, ecb);
1072 break;
1073 } else
1074 NCR_MISC(("%d:%d busy\n",
1075 sc_link->scsipi_scsi.target,
1076 sc_link->scsipi_scsi.lun));
1077 }
1078 }
1079
1080 void
1081 ncr53c9x_sense(sc, ecb)
1082 struct ncr53c9x_softc *sc;
1083 struct ncr53c9x_ecb *ecb;
1084 {
1085 struct scsipi_xfer *xs = ecb->xs;
1086 struct scsipi_link *sc_link = xs->sc_link;
1087 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1088 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1089 struct ncr53c9x_linfo *li;
1090 int lun = sc_link->scsipi_scsi.lun;
1091
1092 NCR_MISC(("requesting sense "));
1093 /* Next, setup a request sense command block */
1094 bzero(ss, sizeof(*ss));
1095 ss->opcode = REQUEST_SENSE;
1096 ss->byte2 = sc_link->scsipi_scsi.lun << 5;
1097 ss->length = sizeof(struct scsipi_sense_data);
1098 ecb->clen = sizeof(*ss);
1099 ecb->daddr = (char *)&xs->sense.scsi_sense;
1100 ecb->dleft = sizeof(struct scsipi_sense_data);
1101 ecb->flags |= ECB_SENSE;
1102 ecb->timeout = NCR_SENSE_TIMEOUT;
1103 ti->senses++;
1104 li = TINFO_LUN(ti, lun);
1105 if (li->busy) li->busy = 0;
1106 ncr53c9x_dequeue(sc, ecb);
1107 li->untagged = ecb; /* must be executed first to fix C/A */
1108 li->busy = 2;
1109 if (ecb == sc->sc_nexus) {
1110 ncr53c9x_select(sc, ecb);
1111 } else {
1112 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1113 ecb->flags |= ECB_READY;
1114 if (sc->sc_state == NCR_IDLE)
1115 ncr53c9x_sched(sc);
1116 }
1117 }
1118
1119 /*
1120 * POST PROCESSING OF SCSI_CMD (usually current)
1121 */
1122 void
1123 ncr53c9x_done(sc, ecb)
1124 struct ncr53c9x_softc *sc;
1125 struct ncr53c9x_ecb *ecb;
1126 {
1127 struct scsipi_xfer *xs = ecb->xs;
1128 struct scsipi_link *sc_link = xs->sc_link;
1129 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1130 int lun = sc_link->scsipi_scsi.lun;
1131 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1132
1133 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1134
1135 callout_stop(&ecb->xs->xs_callout);
1136
1137
1138 if (ecb->stat == SCSI_QUEUE_FULL) {
1139 /*
1140 * Set current throttle -- we should reset
1141 * this periodically
1142 */
1143 sc_link->openings = li->used - 1;
1144 printf("\n%s: QFULL -- throttling to %d commands\n",
1145 sc->sc_dev.dv_xname, sc_link->openings);
1146
1147 }
1148
1149 /*
1150 * Now, if we've come here with no error code, i.e. we've kept the
1151 * initial XS_NOERROR, and the status code signals that we should
1152 * check sense, we'll need to set up a request sense cmd block and
1153 * push the command back into the ready queue *before* any other
1154 * commands for this target/lunit, else we lose the sense info.
1155 * We don't support chk sense conditions for the request sense cmd.
1156 */
1157 if (xs->error == XS_NOERROR) {
1158 xs->status = ecb->stat;
1159 if ((ecb->flags & ECB_ABORT) != 0) {
1160 xs->error = XS_TIMEOUT;
1161 } else if ((ecb->flags & ECB_SENSE) != 0) {
1162 xs->error = XS_SENSE;
1163 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1164 /* First, save the return values */
1165 xs->resid = ecb->dleft;
1166 ncr53c9x_sense(sc, ecb);
1167 return;
1168 } else {
1169 xs->resid = ecb->dleft;
1170 }
1171 }
1172
1173 xs->xs_status |= XS_STS_DONE;
1174
1175 #ifdef NCR53C9X_DEBUG
1176 if (ncr53c9x_debug & NCR_SHOWMISC) {
1177 if (xs->resid != 0)
1178 printf("resid=%d ", xs->resid);
1179 if (xs->error == XS_SENSE)
1180 printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
1181 else
1182 printf("error=%d\n", xs->error);
1183 }
1184 #endif
1185
1186 /*
1187 * Remove the ECB from whatever queue it's on.
1188 */
1189 ncr53c9x_dequeue(sc, ecb);
1190 if (ecb == sc->sc_nexus) {
1191 sc->sc_nexus = NULL;
1192 if (sc->sc_state != NCR_CLEANING) {
1193 sc->sc_state = NCR_IDLE;
1194 ncr53c9x_sched(sc);
1195 }
1196 }
1197
1198 if (xs->error == XS_SELTIMEOUT) {
1199 /* Selection timeout -- discard this LUN if empty */
1200 if (!li->untagged && !li->used) {
1201 printf("ncr53c9x_done: deleting LUN %d target %d\n",
1202 (int)li->lun, sc_link->scsipi_scsi.target);
1203 if (lun < NCR_NLUN)
1204 ti->lun[lun] = NULL;
1205 LIST_REMOVE(li, link);
1206 free(li, M_DEVBUF);
1207 }
1208 }
1209
1210 ncr53c9x_free_ecb(sc, ecb, xs->xs_control);
1211 ti->cmds++;
1212 scsipi_done(xs);
1213 }
1214
1215 void
1216 ncr53c9x_dequeue(sc, ecb)
1217 struct ncr53c9x_softc *sc;
1218 struct ncr53c9x_ecb *ecb;
1219 {
1220 struct ncr53c9x_tinfo *ti =
1221 &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1222 struct ncr53c9x_linfo *li;
1223 int64_t lun = ecb->xs->sc_link->scsipi_scsi.lun;
1224
1225 li = TINFO_LUN(ti, lun);
1226 #ifdef DIAGNOSTIC
1227 if ((!li) || (li->lun != lun))
1228 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1229 lun, ecb);
1230 #endif
1231 if (li->untagged == ecb) {
1232 li->busy = 0;
1233 li->untagged = NULL;
1234 }
1235 if (ecb->tag[0] && li->queued[ecb->tag[1]]) {
1236 #ifdef DIAGNOSTIC
1237 if (li->queued[ecb->tag[1]] && (li->queued[ecb->tag[1]] != ecb))
1238 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1239 "instead of ecb %p\n", ecb->tag[1], (quad_t)lun,
1240 li->queued[ecb->tag[1]], ecb);
1241 #endif
1242 li->queued[ecb->tag[1]] = NULL;
1243 li->used --;
1244
1245 }
1246 if (ecb->flags & ECB_READY) {
1247 ecb->flags &= ~ECB_READY;
1248 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1249 }
1250 }
1251
1252 /*
1253 * INTERRUPT/PROTOCOL ENGINE
1254 */
1255
1256 /*
1257 * Schedule an outgoing message by prioritizing it, and asserting
1258 * attention on the bus. We can only do this when we are the initiator
1259 * else there will be an illegal command interrupt.
1260 */
1261 #define ncr53c9x_sched_msgout(m) \
1262 do { \
1263 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1264 NCRCMD(sc, NCRCMD_SETATN); \
1265 sc->sc_flags |= NCR_ATN; \
1266 sc->sc_msgpriq |= (m); \
1267 } while (0)
1268
1269 int
1270 ncr53c9x_reselect(sc, message, tagtype, tagid)
1271 struct ncr53c9x_softc *sc;
1272 int message;
1273 int tagtype, tagid;
1274 {
1275 u_char selid, target, lun;
1276 struct ncr53c9x_ecb *ecb = NULL;
1277 struct ncr53c9x_tinfo *ti;
1278 struct ncr53c9x_linfo *li;
1279
1280 /*
1281 * The SCSI chip made a snapshot of the data bus while the reselection
1282 * was being negotiated. This enables us to determine which target did
1283 * the reselect.
1284 */
1285 selid = sc->sc_selid & ~(1 << sc->sc_id);
1286 if (selid & (selid - 1)) {
1287 printf("%s: reselect with invalid selid %02x;"
1288 " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
1289 goto reset;
1290 }
1291
1292 /*
1293 * Search wait queue for disconnected cmd
1294 * The list should be short, so I haven't bothered with
1295 * any more sophisticated structures than a simple
1296 * singly linked list.
1297 */
1298 target = ffs(selid) - 1;
1299 lun = message & 0x07;
1300 ti = &sc->sc_tinfo[target];
1301 li = TINFO_LUN(ti, lun);
1302
1303 /*
1304 * We can get as far as the LUN with the IDENTIFY
1305 * message. Check to see if we're running an
1306 * un-tagged command. Otherwise ack the IDENTIFY
1307 * and wait for a tag message.
1308 */
1309
1310 if (li) {
1311 if (li->untagged && li->busy) ecb = li->untagged;
1312 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1313 /* Wait for tag to come by */
1314 sc->sc_state = NCR_IDENTIFIED;
1315 return (0);
1316 } else if (tagtype) ecb = li->queued[tagid];
1317 }
1318 if (ecb == NULL) {
1319 printf("%s: reselect from target %d lun %d tag %x:%x with no nexus;"
1320 " sending ABORT\n", sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1321 goto abort;
1322 }
1323
1324 /* Make this nexus active again. */
1325 sc->sc_state = NCR_CONNECTED;
1326 sc->sc_nexus = ecb;
1327 ncr53c9x_setsync(sc, ti);
1328
1329 if (ecb->flags & ECB_RESET)
1330 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1331 else if (ecb->flags & ECB_ABORT)
1332 ncr53c9x_sched_msgout(SEND_ABORT);
1333
1334 /* Do an implicit RESTORE POINTERS. */
1335 sc->sc_dp = ecb->daddr;
1336 sc->sc_dleft = ecb->dleft;
1337
1338 return (0);
1339
1340 reset:
1341 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1342 return (1);
1343
1344 abort:
1345 ncr53c9x_sched_msgout(SEND_ABORT);
1346 return (1);
1347 }
1348
1349 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1350 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1351 #define ISEXTMSG(m) ((m) == 1)
1352
1353 /*
1354 * Get an incoming message as initiator.
1355 *
1356 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1357 * byte in the FIFO
1358 */
1359 void
1360 ncr53c9x_msgin(sc)
1361 struct ncr53c9x_softc *sc;
1362 {
1363 int v;
1364
1365 v = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
1366 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld fifo:%d)] ",
1367 (long)sc->sc_imlen, v));
1368
1369 if (v == 0) {
1370 printf("%s: msgin: no msg byte available\n",
1371 sc->sc_dev.dv_xname);
1372 return;
1373 }
1374
1375 /*
1376 * Prepare for a new message. A message should (according
1377 * to the SCSI standard) be transmitted in one single
1378 * MESSAGE_IN_PHASE. If we have been in some other phase,
1379 * then this is a new message.
1380 */
1381 if (sc->sc_prevphase != MESSAGE_IN_PHASE) {
1382 sc->sc_flags &= ~NCR_DROP_MSGI;
1383 sc->sc_imlen = 0;
1384 }
1385
1386 v = NCR_READ_REG(sc, NCR_FIFO);
1387 NCR_MISC(("<msgbyte:0x%02x>", v));
1388
1389 #if 0
1390 if (sc->sc_state == NCR_RESELECTED && sc->sc_imlen == 0) {
1391 /*
1392 * Which target is reselecting us? (The ID bit really)
1393 */
1394 sc->sc_selid = v;
1395 NCR_MISC(("selid=0x%2x ", sc->sc_selid));
1396 return;
1397 }
1398 #endif
1399
1400 sc->sc_imess[sc->sc_imlen] = v;
1401
1402 /*
1403 * If we're going to reject the message, don't bother storing
1404 * the incoming bytes. But still, we need to ACK them.
1405 */
1406
1407 if ((sc->sc_flags & NCR_DROP_MSGI)) {
1408 NCRCMD(sc, NCRCMD_MSGOK);
1409 printf("<dropping msg byte %x>",
1410 sc->sc_imess[sc->sc_imlen]);
1411 return;
1412 }
1413
1414 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1415 ncr53c9x_sched_msgout(SEND_REJECT);
1416 sc->sc_flags |= NCR_DROP_MSGI;
1417 } else {
1418 sc->sc_imlen++;
1419 /*
1420 * This testing is suboptimal, but most
1421 * messages will be of the one byte variety, so
1422 * it should not effect performance
1423 * significantly.
1424 */
1425 if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1426 goto gotit;
1427 if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1428 goto gotit;
1429 if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1430 sc->sc_imlen == sc->sc_imess[1] + 2)
1431 goto gotit;
1432 }
1433 /* Ack what we have so far */
1434 NCRCMD(sc, NCRCMD_MSGOK);
1435 return;
1436
1437 gotit:
1438 NCR_MSGS(("gotmsg(%x)", sc->sc_imess[0]));
1439 /*
1440 * Now we should have a complete message (1 byte, 2 byte
1441 * and moderately long extended messages). We only handle
1442 * extended messages which total length is shorter than
1443 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1444 */
1445 switch (sc->sc_state) {
1446 struct ncr53c9x_ecb *ecb;
1447 struct ncr53c9x_tinfo *ti;
1448
1449 case NCR_CONNECTED:
1450 ecb = sc->sc_nexus;
1451 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1452
1453 switch (sc->sc_imess[0]) {
1454 case MSG_CMDCOMPLETE:
1455 NCR_MSGS(("cmdcomplete "));
1456 if (sc->sc_dleft < 0) {
1457 scsi_print_addr(ecb->xs->sc_link);
1458 printf("got %ld extra bytes\n",
1459 -(long)sc->sc_dleft);
1460 sc->sc_dleft = 0;
1461 }
1462 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
1463 ? 0
1464 : sc->sc_dleft;
1465 if ((ecb->flags & ECB_SENSE) == 0)
1466 ecb->xs->resid = ecb->dleft;
1467 sc->sc_state = NCR_CMDCOMPLETE;
1468 break;
1469
1470 case MSG_MESSAGE_REJECT:
1471 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1472 switch (sc->sc_msgout) {
1473 case SEND_SDTR:
1474 sc->sc_flags &= ~NCR_SYNCHNEGO;
1475 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1476 ncr53c9x_setsync(sc, ti);
1477 break;
1478 case SEND_INIT_DET_ERR:
1479 goto abort;
1480 }
1481 break;
1482
1483 case MSG_NOOP:
1484 NCR_MSGS(("noop "));
1485 break;
1486
1487 case MSG_HEAD_OF_Q_TAG:
1488 case MSG_SIMPLE_Q_TAG:
1489 case MSG_ORDERED_Q_TAG:
1490 NCR_MSGS(("TAG %x:%x", sc->sc_imess[0], sc->sc_imess[1]));
1491 break;
1492
1493 case MSG_DISCONNECT:
1494 NCR_MSGS(("disconnect "));
1495 ti->dconns++;
1496 sc->sc_state = NCR_DISCONNECT;
1497
1498 /*
1499 * Mark the fact that all bytes have moved. The
1500 * target may not bother to do a SAVE POINTERS
1501 * at this stage. This flag will set the residual
1502 * count to zero on MSG COMPLETE.
1503 */
1504 if (sc->sc_dleft == 0)
1505 ecb->flags |= ECB_TENTATIVE_DONE;
1506
1507 break;
1508
1509 case MSG_SAVEDATAPOINTER:
1510 NCR_MSGS(("save datapointer "));
1511 ecb->daddr = sc->sc_dp;
1512 ecb->dleft = sc->sc_dleft;
1513 break;
1514
1515 case MSG_RESTOREPOINTERS:
1516 NCR_MSGS(("restore datapointer "));
1517 sc->sc_dp = ecb->daddr;
1518 sc->sc_dleft = ecb->dleft;
1519 break;
1520
1521 case MSG_EXTENDED:
1522 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1523 switch (sc->sc_imess[2]) {
1524 case MSG_EXT_SDTR:
1525 NCR_MSGS(("SDTR period %d, offset %d ",
1526 sc->sc_imess[3], sc->sc_imess[4]));
1527 if (sc->sc_imess[1] != 3)
1528 goto reject;
1529 ti->period = sc->sc_imess[3];
1530 ti->offset = sc->sc_imess[4];
1531 ti->flags &= ~T_NEGOTIATE;
1532 if (sc->sc_minsync == 0 ||
1533 ti->offset == 0 ||
1534 ti->period > 124) {
1535 #ifdef NCR53C9X_DEBUG
1536 scsi_print_addr(ecb->xs->sc_link);
1537 printf("async mode\n");
1538 #endif
1539 if ((sc->sc_flags&NCR_SYNCHNEGO)
1540 == 0) {
1541 /*
1542 * target initiated negotiation
1543 */
1544 ti->offset = 0;
1545 ti->flags &= ~T_SYNCMODE;
1546 ncr53c9x_sched_msgout(
1547 SEND_SDTR);
1548 } else {
1549 /* we are async */
1550 ti->flags &= ~T_SYNCMODE;
1551 }
1552 } else {
1553 int r = 250/ti->period;
1554 int s = (100*250)/ti->period - 100*r;
1555 int p;
1556
1557 p = ncr53c9x_stp2cpb(sc, ti->period);
1558 ti->period = ncr53c9x_cpb2stp(sc, p);
1559 #ifdef NCR53C9X_DEBUG
1560 scsi_print_addr(ecb->xs->sc_link);
1561 printf("max sync rate %d.%02dMB/s\n",
1562 r, s);
1563 #endif
1564 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1565 /*
1566 * target initiated negotiation
1567 */
1568 if (ti->period <
1569 sc->sc_minsync)
1570 ti->period =
1571 sc->sc_minsync;
1572 if (ti->offset > 15)
1573 ti->offset = 15;
1574 ti->flags &= ~T_SYNCMODE;
1575 ncr53c9x_sched_msgout(
1576 SEND_SDTR);
1577 } else {
1578 /* we are sync */
1579 ti->flags |= T_SYNCMODE;
1580 }
1581 }
1582 sc->sc_flags &= ~NCR_SYNCHNEGO;
1583 ncr53c9x_setsync(sc, ti);
1584 break;
1585
1586 default:
1587 scsi_print_addr(ecb->xs->sc_link);
1588 printf("unrecognized MESSAGE EXTENDED;"
1589 " sending REJECT\n");
1590 goto reject;
1591 }
1592 break;
1593
1594 default:
1595 NCR_MSGS(("ident "));
1596 scsi_print_addr(ecb->xs->sc_link);
1597 printf("unrecognized MESSAGE; sending REJECT\n");
1598 reject:
1599 ncr53c9x_sched_msgout(SEND_REJECT);
1600 break;
1601 }
1602 break;
1603
1604 case NCR_RESELECTED:
1605 case NCR_IDENTIFIED:
1606 if (MSG_ISIDENTIFY(sc->sc_imess[0])) {
1607 sc->sc_msgify = sc->sc_imess[0];
1608 } else if (sc->sc_imess[0] == MSG_SIMPLE_Q_TAG) {
1609 if (!sc->sc_msgify) {
1610 printf("%s: TAG reselect without IDENTIFY;"
1611 " MSG %x;"
1612 " sending DEVICE RESET\n",
1613 sc->sc_dev.dv_xname,
1614 sc->sc_imess[0]);
1615 goto reset;
1616 }
1617 } else {
1618 printf("%s: reselect without IDENTIFY;"
1619 " MSG %x;"
1620 " sending DEVICE RESET\n",
1621 sc->sc_dev.dv_xname,
1622 sc->sc_imess[0]);
1623 goto reset;
1624 }
1625
1626 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1627 sc->sc_imess[0],
1628 sc->sc_imess[1]);
1629 break;
1630
1631 default:
1632 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1633 sc->sc_dev.dv_xname);
1634 reset:
1635 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1636 break;
1637
1638 abort:
1639 ncr53c9x_sched_msgout(SEND_ABORT);
1640 break;
1641 }
1642
1643 /* Ack last message byte */
1644 NCRCMD(sc, NCRCMD_MSGOK);
1645
1646 /* Done, reset message pointer. */
1647 sc->sc_flags &= ~NCR_DROP_MSGI;
1648 sc->sc_imlen = 0;
1649 }
1650
1651
1652 /*
1653 * Send the highest priority, scheduled message
1654 */
1655 void
1656 ncr53c9x_msgout(sc)
1657 struct ncr53c9x_softc *sc;
1658 {
1659 struct ncr53c9x_tinfo *ti;
1660 struct ncr53c9x_ecb *ecb;
1661 size_t size;
1662
1663 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1664 sc->sc_msgpriq, sc->sc_prevphase));
1665
1666 /*
1667 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1668 * condition on the SCSI bus. The 53c9x chip
1669 * automatically turns off ATN before sending the
1670 * message byte. (see also the comment below in the
1671 * default case when picking out a message to send)
1672 */
1673 if (sc->sc_flags & NCR_ATN) {
1674 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1675 new:
1676 NCRCMD(sc, NCRCMD_FLUSH);
1677 DELAY(1);
1678 sc->sc_msgoutq = 0;
1679 sc->sc_omlen = 0;
1680 }
1681 } else {
1682 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1683 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1684 goto new;
1685 } else {
1686 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1687 sc->sc_dev.dv_xname, __LINE__);
1688 }
1689 }
1690
1691 if (sc->sc_omlen == 0) {
1692 /* Pick up highest priority message */
1693 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1694 sc->sc_msgoutq |= sc->sc_msgout;
1695 sc->sc_msgpriq &= ~sc->sc_msgout;
1696 sc->sc_omlen = 1; /* "Default" message len */
1697 switch (sc->sc_msgout) {
1698 case SEND_SDTR:
1699 ecb = sc->sc_nexus;
1700 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1701 sc->sc_omess[0] = MSG_EXTENDED;
1702 sc->sc_omess[1] = 3;
1703 sc->sc_omess[2] = MSG_EXT_SDTR;
1704 sc->sc_omess[3] = ti->period;
1705 sc->sc_omess[4] = ti->offset;
1706 sc->sc_omlen = 5;
1707 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1708 ti->flags |= T_SYNCMODE;
1709 ncr53c9x_setsync(sc, ti);
1710 }
1711 break;
1712 case SEND_IDENTIFY:
1713 if (sc->sc_state != NCR_CONNECTED) {
1714 printf("%s at line %d: no nexus\n",
1715 sc->sc_dev.dv_xname, __LINE__);
1716 }
1717 ecb = sc->sc_nexus;
1718 sc->sc_omess[0] =
1719 MSG_IDENTIFY(ecb->xs->sc_link->scsipi_scsi.lun, 0);
1720 break;
1721 case SEND_TAG:
1722 if (sc->sc_state != NCR_CONNECTED) {
1723 printf("%s at line %d: no nexus\n",
1724 sc->sc_dev.dv_xname, __LINE__);
1725 }
1726 ecb = sc->sc_nexus;
1727 sc->sc_omess[0] = ecb->tag[0];
1728 sc->sc_omess[1] = ecb->tag[1];
1729 sc->sc_omlen = 2;
1730 break;
1731 case SEND_DEV_RESET:
1732 sc->sc_flags |= NCR_ABORTING;
1733 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1734 ecb = sc->sc_nexus;
1735 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1736 ti->flags &= ~T_SYNCMODE;
1737 if ((ti->flags & T_SYNCHOFF) == 0)
1738 /* We can re-start sync negotiation */
1739 ti->flags |= T_NEGOTIATE;
1740 break;
1741 case SEND_PARITY_ERROR:
1742 sc->sc_omess[0] = MSG_PARITY_ERROR;
1743 break;
1744 case SEND_ABORT:
1745 sc->sc_flags |= NCR_ABORTING;
1746 sc->sc_omess[0] = MSG_ABORT;
1747 break;
1748 case SEND_INIT_DET_ERR:
1749 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1750 break;
1751 case SEND_REJECT:
1752 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1753 break;
1754 default:
1755 /*
1756 * We normally do not get here, since the chip
1757 * automatically turns off ATN before the last
1758 * byte of a message is sent to the target.
1759 * However, if the target rejects our (multi-byte)
1760 * message early by switching to MSG IN phase
1761 * ATN remains on, so the target may return to
1762 * MSG OUT phase. If there are no scheduled messages
1763 * left we send a NO-OP.
1764 *
1765 * XXX - Note that this leaves no useful purpose for
1766 * the NCR_ATN flag.
1767 */
1768 sc->sc_flags &= ~NCR_ATN;
1769 sc->sc_omess[0] = MSG_NOOP;
1770 break;
1771 }
1772 sc->sc_omp = sc->sc_omess;
1773 }
1774
1775 #ifdef DEBUG
1776 {
1777 int i;
1778
1779 for (i=0; i<sc->sc_omlen; i++)
1780 NCR_MISC(("<msgbyte:0x%02x>", sc->sc_omess[i]));
1781 }
1782 #endif
1783 /* (re)send the message */
1784 size = min(sc->sc_omlen, sc->sc_maxxfer);
1785 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
1786 /* Program the SCSI counter */
1787 NCR_WRITE_REG(sc, NCR_TCL, size);
1788 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
1789 if (sc->sc_cfg2 & NCRCFG2_FE) {
1790 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
1791 }
1792 /* Load the count in and start the message-out transfer */
1793 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
1794 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
1795 NCRDMA_GO(sc);
1796 }
1797
1798 /*
1799 * This is the most critical part of the driver, and has to know
1800 * how to deal with *all* error conditions and phases from the SCSI
1801 * bus. If there are no errors and the DMA was active, then call the
1802 * DMA pseudo-interrupt handler. If this returns 1, then that was it
1803 * and we can return from here without further processing.
1804 *
1805 * Most of this needs verifying.
1806 */
1807 int sdebug = 0;
1808 int
1809 ncr53c9x_intr(arg)
1810 void *arg;
1811 {
1812 struct ncr53c9x_softc *sc = arg;
1813 struct ncr53c9x_ecb *ecb;
1814 struct scsipi_link *sc_link;
1815 struct ncr53c9x_tinfo *ti;
1816 size_t size;
1817 int nfifo;
1818
1819 NCR_TRACE(("[ncr53c9x_intr] "));
1820
1821 if (!NCRDMA_ISINTR(sc))
1822 return (0);
1823
1824 again:
1825 /* and what do the registers say... */
1826 ncr53c9x_readregs(sc);
1827
1828 sc->sc_intrcnt.ev_count++;
1829
1830 /*
1831 * At the moment, only a SCSI Bus Reset or Illegal
1832 * Command are classed as errors. A disconnect is a
1833 * valid condition, and we let the code check is the
1834 * "NCR_BUSFREE_OK" flag was set before declaring it
1835 * and error.
1836 *
1837 * Also, the status register tells us about "Gross
1838 * Errors" and "Parity errors". Only the Gross Error
1839 * is really bad, and the parity errors are dealt
1840 * with later
1841 *
1842 * TODO
1843 * If there are too many parity error, go to slow
1844 * cable mode ?
1845 */
1846
1847 /* SCSI Reset */
1848 if (sc->sc_espintr & NCRINTR_SBR) {
1849 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1850 NCRCMD(sc, NCRCMD_FLUSH);
1851 DELAY(1);
1852 }
1853 if (sc->sc_state != NCR_SBR) {
1854 printf("%s: SCSI bus reset\n",
1855 sc->sc_dev.dv_xname);
1856 ncr53c9x_init(sc, 0); /* Restart everything */
1857 return (1);
1858 }
1859 #if 0
1860 /*XXX*/ printf("<expected bus reset: "
1861 "[intr %x, stat %x, step %d]>\n",
1862 sc->sc_espintr, sc->sc_espstat,
1863 sc->sc_espstep);
1864 #endif
1865 if (sc->sc_nexus)
1866 panic("%s: nexus in reset state",
1867 sc->sc_dev.dv_xname);
1868 goto sched;
1869 }
1870
1871 ecb = sc->sc_nexus;
1872
1873 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
1874 if (sc->sc_espintr & NCRINTR_ERR ||
1875 sc->sc_espstat & NCRSTAT_GE) {
1876
1877 if (sc->sc_espstat & NCRSTAT_GE) {
1878 /* Gross Error; no target ? */
1879 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1880 NCRCMD(sc, NCRCMD_FLUSH);
1881 DELAY(1);
1882 }
1883 if (sc->sc_state == NCR_CONNECTED ||
1884 sc->sc_state == NCR_SELECTING) {
1885 ecb->xs->error = XS_TIMEOUT;
1886 ncr53c9x_done(sc, ecb);
1887 }
1888 return (1);
1889 }
1890
1891 if (sc->sc_espintr & NCRINTR_ILL) {
1892 if (sc->sc_flags & NCR_EXPECT_ILLCMD) {
1893 /*
1894 * Eat away "Illegal command" interrupt
1895 * on a ESP100 caused by a re-selection
1896 * while we were trying to select
1897 * another target.
1898 */
1899 #ifdef DEBUG
1900 printf("%s: ESP100 work-around activated\n",
1901 sc->sc_dev.dv_xname);
1902 #endif
1903 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1904 return (1);
1905 }
1906 /* illegal command, out of sync ? */
1907 printf("%s: illegal command: 0x%x "
1908 "(state %d, phase %x, prevphase %x)\n",
1909 sc->sc_dev.dv_xname, sc->sc_lastcmd,
1910 sc->sc_state, sc->sc_phase,
1911 sc->sc_prevphase);
1912 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1913 NCRCMD(sc, NCRCMD_FLUSH);
1914 DELAY(1);
1915 }
1916 ncr53c9x_init(sc, 1); /* Restart everything */
1917 return (1);
1918 }
1919 }
1920 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1921
1922 /*
1923 * Call if DMA is active.
1924 *
1925 * If DMA_INTR returns true, then maybe go 'round the loop
1926 * again in case there is no more DMA queued, but a phase
1927 * change is expected.
1928 */
1929 if (NCRDMA_ISACTIVE(sc)) {
1930 int r = NCRDMA_INTR(sc);
1931 if (r == -1) {
1932 printf("%s: DMA error; resetting\n",
1933 sc->sc_dev.dv_xname);
1934 ncr53c9x_init(sc, 1);
1935 }
1936 /* If DMA active here, then go back to work... */
1937 if (NCRDMA_ISACTIVE(sc))
1938 return (1);
1939
1940 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
1941 /*
1942 * DMA not completed. If we can not find a
1943 * acceptable explanation, print a diagnostic.
1944 */
1945 if (sc->sc_state == NCR_SELECTING)
1946 /*
1947 * This can happen if we are reselected
1948 * while using DMA to select a target.
1949 */
1950 /*void*/;
1951 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1952 /*
1953 * Our (multi-byte) message (eg SDTR) was
1954 * interrupted by the target to send
1955 * a MSG REJECT.
1956 * Print diagnostic if current phase
1957 * is not MESSAGE IN.
1958 */
1959 if (sc->sc_phase != MESSAGE_IN_PHASE)
1960 printf("%s: !TC on MSG OUT"
1961 " [intr %x, stat %x, step %d]"
1962 " prevphase %x, resid %lx\n",
1963 sc->sc_dev.dv_xname,
1964 sc->sc_espintr,
1965 sc->sc_espstat,
1966 sc->sc_espstep,
1967 sc->sc_prevphase,
1968 (u_long)sc->sc_omlen);
1969 } else if (sc->sc_dleft == 0) {
1970 /*
1971 * The DMA operation was started for
1972 * a DATA transfer. Print a diagnostic
1973 * if the DMA counter and TC bit
1974 * appear to be out of sync.
1975 */
1976 printf("%s: !TC on DATA XFER"
1977 " [intr %x, stat %x, step %d]"
1978 " prevphase %x, resid %x\n",
1979 sc->sc_dev.dv_xname,
1980 sc->sc_espintr,
1981 sc->sc_espstat,
1982 sc->sc_espstep,
1983 sc->sc_prevphase,
1984 ecb?ecb->dleft:-1);
1985 }
1986 }
1987 }
1988
1989 /*
1990 * Check for less serious errors.
1991 */
1992 if (sc->sc_espstat & NCRSTAT_PE) {
1993 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1994 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
1995 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
1996 else
1997 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
1998 }
1999
2000 if (sc->sc_espintr & NCRINTR_DIS) {
2001 sc->sc_msgify = 0;
2002 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2003 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2004 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2005 NCRCMD(sc, NCRCMD_FLUSH);
2006 DELAY(1);
2007 }
2008 /*
2009 * This command must (apparently) be issued within
2010 * 250mS of a disconnect. So here you are...
2011 */
2012 NCRCMD(sc, NCRCMD_ENSEL);
2013
2014 switch (sc->sc_state) {
2015 case NCR_RESELECTED:
2016 goto sched;
2017
2018 case NCR_SELECTING:
2019 {
2020 struct ncr53c9x_linfo *li;
2021
2022 ecb->xs->error = XS_SELTIMEOUT;
2023
2024 /* Selection timeout -- discard all LUNs if empty */
2025 sc_link = ecb->xs->sc_link;
2026 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2027 li = ti->luns.lh_first;
2028 while (li) {
2029 if (!li->untagged && !li->used) {
2030 if (li->lun < NCR_NLUN)
2031 ti->lun[li->lun] = NULL;
2032 LIST_REMOVE(li, link);
2033 free(li, M_DEVBUF);
2034 /* Restart the search at the beginning */
2035 li = ti->luns.lh_first;
2036 continue;
2037 }
2038 li = li->link.le_next;
2039 }
2040 goto finish;
2041 }
2042 case NCR_CONNECTED:
2043 if ((sc->sc_flags & NCR_SYNCHNEGO)) {
2044 #ifdef NCR53C9X_DEBUG
2045 if (ecb)
2046 scsi_print_addr(ecb->xs->sc_link);
2047 printf("sync nego not completed!\n");
2048 #endif
2049 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
2050 sc->sc_flags &= ~NCR_SYNCHNEGO;
2051 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2052 }
2053
2054 /* it may be OK to disconnect */
2055 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2056 /*
2057 * Section 5.1.1 of the SCSI 2 spec
2058 * suggests issuing a REQUEST SENSE
2059 * following an unexpected disconnect.
2060 * Some devices go into a contingent
2061 * allegiance condition when
2062 * disconnecting, and this is necessary
2063 * to clean up their state.
2064 */
2065 printf("%s: unexpected disconnect; ",
2066 sc->sc_dev.dv_xname);
2067 if (ecb->flags & ECB_SENSE) {
2068 printf("resetting\n");
2069 goto reset;
2070 }
2071 printf("sending REQUEST SENSE\n");
2072 callout_stop(&ecb->xs->xs_callout);
2073 ncr53c9x_sense(sc, ecb);
2074 goto out;
2075 }
2076
2077 ecb->xs->error = XS_TIMEOUT;
2078 goto finish;
2079
2080 case NCR_DISCONNECT:
2081 sc->sc_nexus = NULL;
2082 goto sched;
2083
2084 case NCR_CMDCOMPLETE:
2085 goto finish;
2086 }
2087 }
2088
2089 switch (sc->sc_state) {
2090
2091 case NCR_SBR:
2092 printf("%s: waiting for SCSI Bus Reset to happen\n",
2093 sc->sc_dev.dv_xname);
2094 return (1);
2095
2096 case NCR_RESELECTED:
2097 /*
2098 * we must be continuing a message ?
2099 */
2100 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2101 printf("%s: target didn't identify\n",
2102 sc->sc_dev.dv_xname);
2103 ncr53c9x_init(sc, 1);
2104 return (1);
2105 }
2106 printf("<<RESELECT CONT'd>>");
2107 #if XXXX
2108 ncr53c9x_msgin(sc);
2109 if (sc->sc_state != NCR_CONNECTED) {
2110 /* IDENTIFY fail?! */
2111 printf("%s: identify failed\n",
2112 sc->sc_dev.dv_xname);
2113 ncr53c9x_init(sc, 1);
2114 return (1);
2115 }
2116 #endif
2117 break;
2118
2119 case NCR_IDENTIFIED:
2120 ecb = sc->sc_nexus;
2121 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2122 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2123 & NCRFIFO_FF);
2124 /*
2125 * Things are seriously fucked up.
2126 * Pull the brakes, i.e. reset
2127 */
2128 printf("%s: target didn't send tag: %d bytes in fifo\n",
2129 sc->sc_dev.dv_xname, i);
2130 /* Drain and display fifo */
2131 while (i-- > 0)
2132 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2133
2134 ncr53c9x_init(sc, 1);
2135 return (1);
2136 } else
2137 goto msgin;
2138
2139 break;
2140 case NCR_IDLE:
2141 case NCR_SELECTING:
2142 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2143 sc->sc_flags = 0;
2144 ecb = sc->sc_nexus;
2145 if (sc->sc_espintr & NCRINTR_RESEL) {
2146 /*
2147 * If we're trying to select a
2148 * target ourselves, push our command
2149 * back into the ready list.
2150 */
2151 if (sc->sc_state == NCR_SELECTING) {
2152 NCR_MISC(("backoff selector "));
2153 callout_stop(&ecb->xs->xs_callout);
2154 ncr53c9x_dequeue(sc, ecb);
2155 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2156 ecb->flags |= ECB_READY;
2157 ecb = sc->sc_nexus = NULL;
2158 }
2159 sc->sc_state = NCR_RESELECTED;
2160 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2161 /*
2162 * Things are seriously fucked up.
2163 * Pull the brakes, i.e. reset
2164 */
2165 printf("%s: target didn't identify\n",
2166 sc->sc_dev.dv_xname);
2167 ncr53c9x_init(sc, 1);
2168 return (1);
2169 }
2170 /*
2171 * The C90 only inhibits FIFO writes until
2172 * reselection is complete, instead of
2173 * waiting until the interrupt status register
2174 * has been read. So, if the reselect happens
2175 * while we were entering a command bytes (for
2176 * another target) some of those bytes can
2177 * appear in the FIFO here, after the
2178 * interrupt is taken.
2179 */
2180 nfifo = NCR_READ_REG(sc,NCR_FFLAG) & NCRFIFO_FF;
2181 if (nfifo < 2 ||
2182 (nfifo > 2 &&
2183 sc->sc_rev != NCR_VARIANT_ESP100)) {
2184 printf("%s: RESELECT: %d bytes in FIFO! "
2185 "[intr %x, stat %x, step %d, prevphase %x]\n",
2186 sc->sc_dev.dv_xname,
2187 nfifo,
2188 sc->sc_espintr,
2189 sc->sc_espstat,
2190 sc->sc_espstep,
2191 sc->sc_prevphase);
2192 ncr53c9x_init(sc, 1);
2193 return (1);
2194 }
2195 sc->sc_selid = NCR_READ_REG(sc, NCR_FIFO);
2196 NCR_MISC(("selid=0x%2x ", sc->sc_selid));
2197
2198 /* Handle identify message */
2199 ncr53c9x_msgin(sc);
2200 if (nfifo != 2) {
2201 /*
2202 * Note: this should not happen
2203 * with `dmaselect' on.
2204 */
2205 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2206 NCRCMD(sc, NCRCMD_FLUSH);
2207 } else if (ncr53c9x_dmaselect &&
2208 sc->sc_rev == NCR_VARIANT_ESP100) {
2209 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2210 }
2211
2212 if (sc->sc_state != NCR_CONNECTED &&
2213 sc->sc_state != NCR_IDENTIFIED) {
2214 /* IDENTIFY fail?! */
2215 printf("%s: identify failed\n",
2216 sc->sc_dev.dv_xname);
2217 ncr53c9x_init(sc, 1);
2218 return (1);
2219 }
2220 goto shortcut; /* ie. next phase expected soon */
2221 }
2222
2223 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2224 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2225 /*
2226 * Arbitration won; examine the `step' register
2227 * to determine how far the selection could progress.
2228 */
2229 ecb = sc->sc_nexus;
2230 if (!ecb)
2231 panic("ncr53c9x: no nexus");
2232
2233 sc_link = ecb->xs->sc_link;
2234 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2235
2236 switch (sc->sc_espstep) {
2237 case 0:
2238 /*
2239 * The target did not respond with a
2240 * message out phase - probably an old
2241 * device that doesn't recognize ATN.
2242 * Clear ATN and just continue, the
2243 * target should be in the command
2244 * phase.
2245 * XXXX check for command phase?
2246 */
2247 NCRCMD(sc, NCRCMD_RSTATN);
2248 break;
2249 case 1:
2250 if ((ti->flags & T_NEGOTIATE) == 0) {
2251 printf("%s: step 1 & !NEG\n",
2252 sc->sc_dev.dv_xname);
2253 goto reset;
2254 }
2255 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2256 printf("%s: !MSGOUT\n",
2257 sc->sc_dev.dv_xname);
2258 goto reset;
2259 }
2260 /* Start negotiating */
2261 ti->period = sc->sc_minsync;
2262 ti->offset = 15;
2263 sc->sc_flags |= NCR_SYNCHNEGO;
2264 if (ecb->tag[0])
2265 ncr53c9x_sched_msgout(SEND_TAG|SEND_SDTR);
2266 else
2267 ncr53c9x_sched_msgout(SEND_SDTR);
2268 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2269 break;
2270 case 3:
2271 /*
2272 * Grr, this is supposed to mean
2273 * "target left command phase prematurely".
2274 * It seems to happen regularly when
2275 * sync mode is on.
2276 * Look at FIFO to see if command went out.
2277 * (Timing problems?)
2278 */
2279 if (ncr53c9x_dmaselect) {
2280 if (sc->sc_cmdlen == 0)
2281 /* Hope for the best.. */
2282 break;
2283 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2284 & NCRFIFO_FF) == 0) {
2285 /* Hope for the best.. */
2286 break;
2287 }
2288 printf("(%s:%d:%d): selection failed;"
2289 " %d left in FIFO "
2290 "[intr %x, stat %x, step %d]\n",
2291 sc->sc_dev.dv_xname,
2292 sc_link->scsipi_scsi.target,
2293 sc_link->scsipi_scsi.lun,
2294 NCR_READ_REG(sc, NCR_FFLAG)
2295 & NCRFIFO_FF,
2296 sc->sc_espintr, sc->sc_espstat,
2297 sc->sc_espstep);
2298 NCRCMD(sc, NCRCMD_FLUSH);
2299 ncr53c9x_sched_msgout(SEND_ABORT);
2300 return (1);
2301 case 2:
2302 /* Select stuck at Command Phase */
2303 NCRCMD(sc, NCRCMD_FLUSH);
2304 break;
2305 case 4:
2306 if (ncr53c9x_dmaselect &&
2307 sc->sc_cmdlen != 0)
2308 printf("(%s:%d:%d): select; "
2309 "%lu left in DMA buffer "
2310 "[intr %x, stat %x, step %d]\n",
2311 sc->sc_dev.dv_xname,
2312 sc_link->scsipi_scsi.target,
2313 sc_link->scsipi_scsi.lun,
2314 (u_long)sc->sc_cmdlen,
2315 sc->sc_espintr,
2316 sc->sc_espstat,
2317 sc->sc_espstep);
2318 /* So far, everything went fine */
2319 break;
2320 }
2321
2322 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2323 /* Do an implicit RESTORE POINTERS. */
2324 sc->sc_dp = ecb->daddr;
2325 sc->sc_dleft = ecb->dleft;
2326 sc->sc_state = NCR_CONNECTED;
2327 break;
2328
2329 } else {
2330
2331 printf("%s: unexpected status after select"
2332 ": [intr %x, stat %x, step %x]\n",
2333 sc->sc_dev.dv_xname,
2334 sc->sc_espintr, sc->sc_espstat,
2335 sc->sc_espstep);
2336 NCRCMD(sc, NCRCMD_FLUSH);
2337 DELAY(1);
2338 goto reset;
2339 }
2340 if (sc->sc_state == NCR_IDLE) {
2341 printf("%s: stray interrupt\n",
2342 sc->sc_dev.dv_xname);
2343 return (0);
2344 }
2345 break;
2346
2347 case NCR_CONNECTED:
2348 if (sc->sc_flags & NCR_ICCS) {
2349 /* "Initiate Command Complete Steps" in progress */
2350 u_char msg;
2351
2352 sc->sc_flags &= ~NCR_ICCS;
2353
2354 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2355 printf("%s: ICCS: "
2356 ": [intr %x, stat %x, step %x]\n",
2357 sc->sc_dev.dv_xname,
2358 sc->sc_espintr, sc->sc_espstat,
2359 sc->sc_espstep);
2360 }
2361 if ((NCR_READ_REG(sc, NCR_FFLAG)
2362 & NCRFIFO_FF) != 2) {
2363 /* Drop excess bytes from the queue */
2364 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2365 & NCRFIFO_FF) - 2;
2366 while (i-- > 0)
2367 (void) NCR_READ_REG(sc, NCR_FIFO);
2368 }
2369 ecb->stat = NCR_READ_REG(sc, NCR_FIFO);
2370 msg = NCR_READ_REG(sc, NCR_FIFO);
2371 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2372 if (msg == MSG_CMDCOMPLETE) {
2373 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2374 ? 0
2375 : sc->sc_dleft;
2376 if ((ecb->flags & ECB_SENSE) == 0)
2377 ecb->xs->resid = ecb->dleft;
2378 sc->sc_state = NCR_CMDCOMPLETE;
2379 } else
2380 printf("%s: STATUS_PHASE: msg %d\n",
2381 sc->sc_dev.dv_xname, msg);
2382 NCRCMD(sc, NCRCMD_MSGOK);
2383 goto shortcut; /* ie. wait for disconnect */
2384 }
2385 break;
2386 default:
2387 panic("%s: invalid state: %d",
2388 sc->sc_dev.dv_xname,
2389 sc->sc_state);
2390 }
2391
2392 /*
2393 * Driver is now in state NCR_CONNECTED, i.e. we
2394 * have a current command working the SCSI bus.
2395 */
2396 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2397 panic("ncr53c9x: no nexus");
2398 }
2399
2400 switch (sc->sc_phase) {
2401 case MESSAGE_OUT_PHASE:
2402 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2403 ncr53c9x_msgout(sc);
2404 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2405 break;
2406 case MESSAGE_IN_PHASE:
2407 msgin:
2408 NCR_PHASE(("MESSAGE_IN_PHASE "));
2409 sc->sc_prevphase = MESSAGE_IN_PHASE;
2410 if (sc->sc_espintr & NCRINTR_BS) {
2411 NCRCMD(sc, NCRCMD_FLUSH);
2412 sc->sc_flags |= NCR_WAITI;
2413 NCRCMD(sc, NCRCMD_TRANS);
2414 } else if (sc->sc_espintr & NCRINTR_FC) {
2415 if ((sc->sc_flags & NCR_WAITI) == 0) {
2416 printf("%s: MSGIN: unexpected FC bit: "
2417 "[intr %x, stat %x, step %x]\n",
2418 sc->sc_dev.dv_xname,
2419 sc->sc_espintr, sc->sc_espstat,
2420 sc->sc_espstep);
2421 }
2422 sc->sc_flags &= ~NCR_WAITI;
2423 ncr53c9x_msgin(sc);
2424 } else {
2425 printf("%s: MSGIN: weird bits: "
2426 "[intr %x, stat %x, step %x]\n",
2427 sc->sc_dev.dv_xname,
2428 sc->sc_espintr, sc->sc_espstat,
2429 sc->sc_espstep);
2430 }
2431 goto shortcut; /* i.e. expect data to be ready */
2432 break;
2433 case COMMAND_PHASE:
2434 /*
2435 * Send the command block. Normally we don't see this
2436 * phase because the SEL_ATN command takes care of
2437 * all this. However, we end up here if either the
2438 * target or we wanted to exchange some more messages
2439 * first (e.g. to start negotiations).
2440 */
2441
2442 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2443 ecb->cmd.cmd.opcode, ecb->clen));
2444 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2445 NCRCMD(sc, NCRCMD_FLUSH);
2446 DELAY(1);
2447 }
2448 if (ncr53c9x_dmaselect) {
2449 size_t size;
2450 /* setup DMA transfer for command */
2451 size = ecb->clen;
2452 sc->sc_cmdlen = size;
2453 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2454 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2455 0, &size);
2456 /* Program the SCSI counter */
2457 NCR_WRITE_REG(sc, NCR_TCL, size);
2458 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
2459 if (sc->sc_cfg2 & NCRCFG2_FE) {
2460 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
2461 }
2462
2463 /* load the count in */
2464 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2465
2466 /* start the command transfer */
2467 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2468 NCRDMA_GO(sc);
2469 } else {
2470 u_char *cmd = (u_char *)&ecb->cmd.cmd;
2471 int i;
2472 /* Now the command into the FIFO */
2473 for (i = 0; i < ecb->clen; i++)
2474 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
2475 NCRCMD(sc, NCRCMD_TRANS);
2476 }
2477 sc->sc_prevphase = COMMAND_PHASE;
2478 break;
2479 case DATA_OUT_PHASE:
2480 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2481 NCRCMD(sc, NCRCMD_FLUSH);
2482 size = min(sc->sc_dleft, sc->sc_maxxfer);
2483 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2484 0, &size);
2485 sc->sc_prevphase = DATA_OUT_PHASE;
2486 goto setup_xfer;
2487 case DATA_IN_PHASE:
2488 NCR_PHASE(("DATA_IN_PHASE "));
2489 if (sc->sc_rev == NCR_VARIANT_ESP100)
2490 NCRCMD(sc, NCRCMD_FLUSH);
2491 size = min(sc->sc_dleft, sc->sc_maxxfer);
2492 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2493 1, &size);
2494 sc->sc_prevphase = DATA_IN_PHASE;
2495 setup_xfer:
2496 /* Target returned to data phase: wipe "done" memory */
2497 ecb->flags &= ~ECB_TENTATIVE_DONE;
2498
2499 /* Program the SCSI counter */
2500 NCR_WRITE_REG(sc, NCR_TCL, size);
2501 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
2502 if (sc->sc_cfg2 & NCRCFG2_FE) {
2503 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
2504 }
2505 /* load the count in */
2506 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2507
2508 /*
2509 * Note that if `size' is 0, we've already transceived
2510 * all the bytes we want but we're still in DATA PHASE.
2511 * Apparently, the device needs padding. Also, a
2512 * transfer size of 0 means "maximum" to the chip
2513 * DMA logic.
2514 */
2515 NCRCMD(sc,
2516 (size==0?NCRCMD_TRPAD:NCRCMD_TRANS)|NCRCMD_DMA);
2517 NCRDMA_GO(sc);
2518 return (1);
2519 case STATUS_PHASE:
2520 NCR_PHASE(("STATUS_PHASE "));
2521 sc->sc_flags |= NCR_ICCS;
2522 NCRCMD(sc, NCRCMD_ICCS);
2523 sc->sc_prevphase = STATUS_PHASE;
2524 goto shortcut; /* i.e. expect status results soon */
2525 break;
2526 case INVALID_PHASE:
2527 break;
2528 default:
2529 printf("%s: unexpected bus phase; resetting\n",
2530 sc->sc_dev.dv_xname);
2531 goto reset;
2532 }
2533
2534 out:
2535 return (1);
2536
2537 reset:
2538 ncr53c9x_init(sc, 1);
2539 goto out;
2540
2541 finish:
2542 ncr53c9x_done(sc, ecb);
2543 goto out;
2544
2545 sched:
2546 sc->sc_state = NCR_IDLE;
2547 ncr53c9x_sched(sc);
2548 goto out;
2549
2550 shortcut:
2551 /*
2552 * The idea is that many of the SCSI operations take very little
2553 * time, and going away and getting interrupted is too high an
2554 * overhead to pay. For example, selecting, sending a message
2555 * and command and then doing some work can be done in one "pass".
2556 *
2557 * The delay is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1
2558 * at 40Mhz. This needs testing.
2559 */
2560 DELAY(50/sc->sc_freq);
2561 if (NCRDMA_ISINTR(sc))
2562 goto again;
2563 goto out;
2564 }
2565
2566 void
2567 ncr53c9x_abort(sc, ecb)
2568 struct ncr53c9x_softc *sc;
2569 struct ncr53c9x_ecb *ecb;
2570 {
2571
2572 /* 2 secs for the abort */
2573 ecb->timeout = NCR_ABORT_TIMEOUT;
2574 ecb->flags |= ECB_ABORT;
2575
2576 if (ecb == sc->sc_nexus) {
2577 int timeout;
2578
2579 /*
2580 * If we're still selecting, the message will be scheduled
2581 * after selection is complete.
2582 */
2583 if (sc->sc_state == NCR_CONNECTED)
2584 ncr53c9x_sched_msgout(SEND_ABORT);
2585
2586 /*
2587 * Reschedule timeout.
2588 */
2589 timeout = ecb->timeout;
2590 if (hz > 100 && timeout > 1000)
2591 timeout = (timeout / 1000) * hz;
2592 else
2593 timeout = (timeout * hz) / 1000;
2594 callout_reset(&ecb->xs->xs_callout, timeout,
2595 ncr53c9x_timeout, ecb);
2596 } else {
2597 /*
2598 * Just leave the command where it is.
2599 * XXX - what choice do we have but to reset the SCSI
2600 * eventually?
2601 */
2602 if (sc->sc_state == NCR_IDLE)
2603 ncr53c9x_sched(sc);
2604 }
2605 }
2606
2607 void
2608 ncr53c9x_timeout(arg)
2609 void *arg;
2610 {
2611 struct ncr53c9x_ecb *ecb = arg;
2612 struct scsipi_xfer *xs = ecb->xs;
2613 struct scsipi_link *sc_link = xs->sc_link;
2614 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
2615 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2616 int s;
2617
2618 scsi_print_addr(sc_link);
2619 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2620 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2621 "msg(q %x,o %x) %s>",
2622 sc->sc_dev.dv_xname,
2623 ecb, ecb->flags, ecb->dleft, ecb->stat,
2624 sc->sc_state, sc->sc_nexus,
2625 NCR_READ_REG(sc, NCR_STAT),
2626 sc->sc_phase, sc->sc_prevphase,
2627 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2628 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2629 #if NCR53C9X_DEBUG > 1
2630 printf("TRACE: %s.", ecb->trace);
2631 #endif
2632
2633 s = splbio();
2634
2635 if (ecb->flags & ECB_ABORT) {
2636 /* abort timed out */
2637 printf(" AGAIN\n");
2638
2639 ncr53c9x_init(sc, 1);
2640 } else {
2641 /* abort the operation that has timed out */
2642 printf("\n");
2643 xs->error = XS_TIMEOUT;
2644 ncr53c9x_abort(sc, ecb);
2645
2646 /* Disable sync mode if stuck in a data phase */
2647 if (ecb == sc->sc_nexus &&
2648 (ti->flags & T_SYNCMODE) != 0 &&
2649 (sc->sc_phase & (MSGI|CDI)) == 0) {
2650 scsi_print_addr(sc_link);
2651 printf("sync negotiation disabled\n");
2652 sc->sc_cfflags |= (1<<(sc_link->scsipi_scsi.target+8));
2653 }
2654 }
2655
2656 splx(s);
2657 }
2658
2659 void
2660 ncr53c9x_watch(arg)
2661 void *arg;
2662 {
2663 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2664 struct ncr53c9x_tinfo *ti;
2665 struct ncr53c9x_linfo *li;
2666 int t, s;
2667 /* Delete any structures that have not been used in 10min. */
2668 time_t old = time.tv_sec - (10*60);
2669
2670 s = splbio();
2671 for (t=0; t<NCR_NTARG; t++) {
2672 ti = &sc->sc_tinfo[t];
2673 li = ti->luns.lh_first;
2674 while (li) {
2675 if (li->last_used < old && !li->untagged && !li->used) {
2676 if (li->lun < NCR_NLUN)
2677 ti->lun[li->lun] = NULL;
2678 LIST_REMOVE(li, link);
2679 free(li, M_DEVBUF);
2680 /* Restart the search at the beginning */
2681 li = ti->luns.lh_first;
2682 continue;
2683 }
2684 li = li->link.le_next;
2685 }
2686 }
2687 splx(s);
2688 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
2689 }
2690
2691
2692 #include "opt_ddb.h"
2693 #ifdef DDB
2694 #include <machine/db_machdep.h>
2695 #include <machine/autoconf.h>
2696 #include <ddb/db_output.h>
2697
2698 void db_esp __P((db_expr_t, int, db_expr_t, char*));
2699
2700 void
2701 db_esp(addr, have_addr, count, modif)
2702 db_expr_t addr;
2703 int have_addr;
2704 db_expr_t count;
2705 char *modif;
2706 {
2707 struct ncr53c9x_softc *sc;
2708 struct ncr53c9x_ecb *ecb;
2709 struct ncr53c9x_linfo *li;
2710 int u, t, i;
2711
2712 for (u=0; u<10; u++) {
2713 sc = (struct ncr53c9x_softc *)
2714 getdevunit("esp", u);
2715 if (!sc) continue;
2716
2717 db_printf("esp%d: nexus %p phase %x prev %x dp %p dleft %lx ify %x\n",
2718 u, sc->sc_nexus, sc->sc_phase, sc->sc_prevphase,
2719 sc->sc_dp, sc->sc_dleft, sc->sc_msgify);
2720 db_printf("\tmsgout %x msgpriq %x msgin %x:%x:%x:%x:%x\n",
2721 sc->sc_msgout, sc->sc_msgpriq, sc->sc_imess[0],
2722 sc->sc_imess[1], sc->sc_imess[2], sc->sc_imess[3],
2723 sc->sc_imess[0]);
2724 db_printf("ready: ");
2725 for (ecb = sc->ready_list.tqh_first; ecb; ecb = ecb->chain.tqe_next) {
2726 db_printf("ecb %p ", ecb);
2727 if (ecb == ecb->chain.tqe_next) {
2728 db_printf("\nWARNING: tailq loop on ecb %p", ecb);
2729 break;
2730 }
2731 }
2732 db_printf("\n");
2733
2734 for (t=0; t<NCR_NTARG; t++) {
2735 LIST_FOREACH(li, &sc->sc_tinfo[t].luns, link) {
2736 db_printf("t%d lun %d untagged %p busy %d used %x\n",
2737 t, (int)li->lun, li->untagged, li->busy,
2738 li->used);
2739 for (i=0; i<256; i++)
2740 if ((ecb = li->queued[i])) {
2741 db_printf("ecb %p tag %x\n", ecb, i);
2742 }
2743 }
2744 }
2745 }
2746 }
2747 #endif
2748