ncr53c9x.c revision 1.59 1 /* $NetBSD: ncr53c9x.c,v 1.59 2000/11/30 23:21:39 pk Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/queue.h>
90 #include <sys/pool.h>
91 #include <sys/scsiio.h>
92
93 #include <dev/scsipi/scsi_all.h>
94 #include <dev/scsipi/scsipi_all.h>
95 #include <dev/scsipi/scsiconf.h>
96 #include <dev/scsipi/scsi_message.h>
97
98 #include <dev/ic/ncr53c9xreg.h>
99 #include <dev/ic/ncr53c9xvar.h>
100
101 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
102 #ifdef DEBUG
103 int ncr53c9x_notag = 0;
104 #endif
105
106 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
107 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
108 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
109 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
110 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
111 struct scsipi_xfer *, int);
112 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
113 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
114 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
115 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_timeout(void *arg);
117 /*static*/ void ncr53c9x_watch(void *arg);
118 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
119 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
120 /*static*/ int ncr53c9x_ioctl(struct scsipi_link *, u_long,
121 caddr_t, int, struct proc *);
122
123 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
124 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *, int);
125 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
126
127 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
128 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
129 struct ncr53c9x_tinfo *);
130 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
131 int64_t lun);
132
133 static int ecb_pool_initialized = 0;
134 static struct pool ecb_pool;
135
136 /*
137 * Names for the NCR53c9x variants, correspnding to the variant tags
138 * in ncr53c9xvar.h.
139 */
140 static const char *ncr53c9x_variant_names[] = {
141 "ESP100",
142 "ESP100A",
143 "ESP200",
144 "NCR53C94",
145 "NCR53C96",
146 "ESP406",
147 "FAS408",
148 "FAS216",
149 "AM53C974",
150 };
151
152 static struct scsipi_adapter ncr53c9x_adapter = {
153 0, /* adapter refcnt */
154 ncr53c9x_scsi_cmd, /* cmd */
155 minphys, /* minphys */
156 ncr53c9x_ioctl, /* ioctl */
157 NULL, /* enable */
158 NULL, /* getgeom */
159 };
160
161 static struct scsipi_device ncr53c9x_device = {
162 NULL, /* use default error handler */
163 NULL, /* have a queue, served by this */
164 NULL, /* have no async handler */
165 NULL, /* use default 'done' routine */
166 };
167
168 /*
169 * Search linked list for LUN info by LUN id.
170 */
171 static struct ncr53c9x_linfo *
172 ncr53c9x_lunsearch(ti, lun)
173 struct ncr53c9x_tinfo *ti;
174 int64_t lun;
175 {
176 struct ncr53c9x_linfo *li;
177 LIST_FOREACH(li, &ti->luns, link)
178 if (li->lun == lun)
179 return (li);
180 return (NULL);
181 }
182
183 /*
184 * Attach this instance, and then all the sub-devices
185 */
186 void
187 ncr53c9x_attach(sc, adapter, device)
188 struct ncr53c9x_softc *sc;
189 struct scsipi_adapter *adapter;
190 struct scsipi_device *device;
191 {
192
193 callout_init(&sc->sc_watchdog);
194 /*
195 * Allocate SCSI message buffers.
196 * Front-ends can override allocation to avoid alignment
197 * handling in the DMA engines. Note that that ncr53c9x_msgout()
198 * can request a 1 byte DMA transfer.
199 */
200 if (sc->sc_omess == NULL)
201 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
202
203 if (sc->sc_imess == NULL)
204 sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT);
205
206 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
207 printf("out of memory\n");
208 return;
209 }
210
211 /*
212 * Note, the front-end has set us up to print the chip variation.
213 */
214 if (sc->sc_rev >= NCR_VARIANT_MAX) {
215 printf("\n%s: unknown variant %d, devices not attached\n",
216 sc->sc_dev.dv_xname, sc->sc_rev);
217 return;
218 }
219
220 printf(": %s, %dMHz, SCSI ID %d\n",
221 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
222
223 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
224
225 /* The value *must not* be == 1. Make it 2 */
226 if (sc->sc_ccf == 1)
227 sc->sc_ccf = 2;
228
229 /*
230 * The recommended timeout is 250ms. This register is loaded
231 * with a value calculated as follows, from the docs:
232 *
233 * (timout period) x (CLK frequency)
234 * reg = -------------------------------------
235 * 8192 x (Clock Conversion Factor)
236 *
237 * Since CCF has a linear relation to CLK, this generally computes
238 * to the constant of 153.
239 */
240 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
241
242 /* CCF register only has 3 bits; 0 is actually 8 */
243 sc->sc_ccf &= 7;
244
245 /*
246 * fill in the prototype scsipi_link.
247 */
248 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
249 sc->sc_link.adapter_softc = sc;
250 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_id;
251 sc->sc_link.adapter = (adapter) ? adapter : &ncr53c9x_adapter;
252 sc->sc_link.device = (device) ? device : &ncr53c9x_device;
253 sc->sc_link.openings = 32;
254 sc->sc_link.scsipi_scsi.max_target = 7;
255 sc->sc_link.scsipi_scsi.max_lun = 7;
256 sc->sc_link.type = BUS_SCSI;
257
258 /*
259 * Add reference to adapter so that we drop the reference after
260 * config_found() to make sure the adatper is disabled.
261 */
262 if (scsipi_adapter_addref(&sc->sc_link) != 0) {
263 printf("%s: unable to enable controller\n",
264 sc->sc_dev.dv_xname);
265 return;
266 }
267
268 /* Reset state & bus */
269 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
270 sc->sc_state = 0;
271 ncr53c9x_init(sc, 1);
272
273 /*
274 * Now try to attach all the sub-devices
275 */
276 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
277
278 scsipi_adapter_delref(&sc->sc_link);
279 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
280 }
281
282 int
283 ncr53c9x_detach(sc, flags)
284 struct ncr53c9x_softc *sc;
285 int flags;
286 {
287 int error;
288
289 if (sc->sc_child) {
290 error = config_detach(sc->sc_child, flags);
291 if (error)
292 return (error);
293 }
294
295 free(sc->sc_imess, M_DEVBUF);
296 free(sc->sc_omess, M_DEVBUF);
297
298 return (0);
299 }
300
301 /*
302 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
303 * only this controller, but kills any on-going commands, and also stops
304 * and resets the DMA.
305 *
306 * After reset, registers are loaded with the defaults from the attach
307 * routine above.
308 */
309 void
310 ncr53c9x_reset(sc)
311 struct ncr53c9x_softc *sc;
312 {
313
314 /* reset DMA first */
315 NCRDMA_RESET(sc);
316
317 /* reset SCSI chip */
318 NCRCMD(sc, NCRCMD_RSTCHIP);
319 NCRCMD(sc, NCRCMD_NOP);
320 DELAY(500);
321
322 /* do these backwards, and fall through */
323 switch (sc->sc_rev) {
324 case NCR_VARIANT_ESP406:
325 case NCR_VARIANT_FAS408:
326 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
327 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
328 case NCR_VARIANT_AM53C974:
329 case NCR_VARIANT_FAS216:
330 case NCR_VARIANT_NCR53C94:
331 case NCR_VARIANT_NCR53C96:
332 case NCR_VARIANT_ESP200:
333 sc->sc_features |= NCR_F_HASCFG3;
334 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
335 case NCR_VARIANT_ESP100A:
336 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
337 case NCR_VARIANT_ESP100:
338 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
339 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
340 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
341 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
342 break;
343 default:
344 printf("%s: unknown revision code, assuming ESP100\n",
345 sc->sc_dev.dv_xname);
346 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
347 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
348 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
349 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
350 }
351
352 if (sc->sc_rev == NCR_VARIANT_AM53C974)
353 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
354 }
355
356 /*
357 * Reset the SCSI bus, but not the chip
358 */
359 void
360 ncr53c9x_scsi_reset(sc)
361 struct ncr53c9x_softc *sc;
362 {
363
364 (*sc->sc_glue->gl_dma_stop)(sc);
365
366 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
367 NCRCMD(sc, NCRCMD_RSTSCSI);
368 }
369
370 /*
371 * Initialize ncr53c9x state machine
372 */
373 void
374 ncr53c9x_init(sc, doreset)
375 struct ncr53c9x_softc *sc;
376 int doreset;
377 {
378 struct ncr53c9x_ecb *ecb;
379 struct ncr53c9x_linfo *li;
380 int i, r;
381
382 NCR_TRACE(("[NCR_INIT(%d)] ", doreset));
383
384 if (!ecb_pool_initialized) {
385 /* All instances share this pool */
386 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
387 "ncr53c9x_ecb", 0, NULL, NULL, 0);
388 ecb_pool_initialized = 1;
389 }
390
391 if (sc->sc_state == 0) {
392 /* First time through; initialize. */
393
394 TAILQ_INIT(&sc->ready_list);
395 sc->sc_nexus = NULL;
396 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
397 for (r = 0; r < NCR_NTARG; r++) {
398 LIST_INIT(&sc->sc_tinfo[r].luns);
399 }
400 } else {
401 /* Cancel any active commands. */
402 sc->sc_state = NCR_CLEANING;
403 sc->sc_msgify = 0;
404 if ((ecb = sc->sc_nexus) != NULL) {
405 ecb->xs->error = XS_TIMEOUT;
406 ncr53c9x_done(sc, ecb);
407 }
408 /* Cancel outstanding disconnected commands on each LUN */
409 for (r = 0; r < 8; r++) {
410 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
411 if ((ecb = li->untagged) != NULL) {
412 li->untagged = NULL;
413 /*
414 * XXXXXXX
415 *
416 * Should we terminate a command
417 * that never reached the disk?
418 */
419 li->busy = 0;
420 ecb->xs->error = XS_TIMEOUT;
421 ncr53c9x_done(sc, ecb);
422 }
423 for (i = 0; i < 256; i++)
424 if ((ecb = li->queued[i])) {
425 li->queued[i] = NULL;
426 ecb->xs->error = XS_TIMEOUT;
427 ncr53c9x_done(sc, ecb);
428 }
429 li->used = 0;
430 }
431 }
432 }
433
434 /*
435 * reset the chip to a known state
436 */
437 ncr53c9x_reset(sc);
438
439 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
440 for (r = 0; r < 8; r++) {
441 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
442 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
443
444 ti->flags = ((sc->sc_cfflags & (1<<(r+16))) ? T_TAGOFF : 0) |
445 ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
446 ? T_SYNCHOFF : 0) |
447 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
448 T_NEED_TO_RESET;
449 #ifdef DEBUG
450 if (ncr53c9x_notag)
451 ti->flags |= T_TAGOFF;
452 #endif
453 ti->period = sc->sc_minsync;
454 ti->offset = 0;
455 }
456
457 if (doreset) {
458 sc->sc_state = NCR_SBR;
459 NCRCMD(sc, NCRCMD_RSTSCSI);
460 } else {
461 sc->sc_state = NCR_IDLE;
462 ncr53c9x_sched(sc);
463 }
464 }
465
466 /*
467 * Read the NCR registers, and save their contents for later use.
468 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
469 * NCR_INTR - so make sure it is the last read.
470 *
471 * I think that (from reading the docs) most bits in these registers
472 * only make sense when he DMA CSR has an interrupt showing. Call only
473 * if an interrupt is pending.
474 */
475 __inline__ void
476 ncr53c9x_readregs(sc)
477 struct ncr53c9x_softc *sc;
478 {
479
480 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
481 /* Only the stepo bits are of interest */
482 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
483 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
484
485 if (sc->sc_glue->gl_clear_latched_intr != NULL)
486 (*sc->sc_glue->gl_clear_latched_intr)(sc);
487
488 /*
489 * Determine the SCSI bus phase, return either a real SCSI bus phase
490 * or some pseudo phase we use to detect certain exceptions.
491 */
492
493 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS)
494 ? /* Disconnected */ BUSFREE_PHASE
495 : sc->sc_espstat & NCRSTAT_PHASE;
496
497 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ",
498 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep));
499 }
500
501 /*
502 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
503 */
504 static inline int
505 ncr53c9x_stp2cpb(sc, period)
506 struct ncr53c9x_softc *sc;
507 int period;
508 {
509 int v;
510 v = (sc->sc_freq * period) / 250;
511 if (ncr53c9x_cpb2stp(sc, v) < period)
512 /* Correct round-down error */
513 v++;
514 return (v);
515 }
516
517 static inline void
518 ncr53c9x_setsync(sc, ti)
519 struct ncr53c9x_softc *sc;
520 struct ncr53c9x_tinfo *ti;
521 {
522 u_char syncoff, synctp, cfg3 = sc->sc_cfg3;
523
524 if (ti->flags & T_SYNCMODE) {
525 syncoff = ti->offset;
526 synctp = ncr53c9x_stp2cpb(sc, ti->period);
527 if (sc->sc_features & NCR_F_FASTSCSI) {
528 /*
529 * If the period is 200ns or less (ti->period <= 50),
530 * put the chip in Fast SCSI mode.
531 */
532 if (ti->period <= 50)
533 /*
534 * There are (at least) 4 variations of the
535 * configuration 3 register. The drive attach
536 * routine sets the appropriate bit to put the
537 * chip into Fast SCSI mode so that it doesn't
538 * have to be figured out here each time.
539 */
540 cfg3 |= sc->sc_cfg3_fscsi;
541 }
542
543 /*
544 * Am53c974 requires different SYNCTP values when the
545 * FSCSI bit is off.
546 */
547 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
548 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
549 synctp--;
550 } else {
551 syncoff = 0;
552 synctp = 0;
553 }
554
555 if (sc->sc_features & NCR_F_HASCFG3)
556 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
557
558 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
559 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
560 }
561
562 int ncr53c9x_dmaselect = 0;
563 /*
564 * Send a command to a target, set the driver state to NCR_SELECTING
565 * and let the caller take care of the rest.
566 *
567 * Keeping this as a function allows me to say that this may be done
568 * by DMA instead of programmed I/O soon.
569 */
570 void
571 ncr53c9x_select(sc, ecb)
572 struct ncr53c9x_softc *sc;
573 struct ncr53c9x_ecb *ecb;
574 {
575 struct scsipi_link *sc_link = ecb->xs->sc_link;
576 int target = sc_link->scsipi_scsi.target;
577 int lun = sc_link->scsipi_scsi.lun;
578 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
579 int tiflags = ti->flags;
580 u_char *cmd;
581 int clen;
582 size_t dmasize;
583
584 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
585 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
586
587 sc->sc_state = NCR_SELECTING;
588 /*
589 * Schedule the timeout now, the first time we will go away
590 * expecting to come back due to an interrupt, because it is
591 * always possible that the interrupt may never happen.
592 */
593 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
594 int timeout = ecb->timeout;
595
596 if (hz > 100 && timeout > 1000)
597 timeout = (timeout / 1000) * hz;
598 else
599 timeout = (timeout * hz) / 1000;
600
601 callout_reset(&ecb->xs->xs_callout, timeout,
602 ncr53c9x_timeout, ecb);
603 }
604
605 /*
606 * The docs say the target register is never reset, and I
607 * can't think of a better place to set it
608 */
609 NCR_WRITE_REG(sc, NCR_SELID, target);
610 ncr53c9x_setsync(sc, ti);
611
612 if ((ecb->flags & ECB_SENSE) != 0) {
613 /*
614 * For REQUEST SENSE, we should not send an IDENTIFY or
615 * otherwise mangle the target. There should be no MESSAGE IN
616 * phase.
617 */
618 if (ncr53c9x_dmaselect) {
619 /* setup DMA transfer for command */
620 dmasize = clen = ecb->clen;
621 sc->sc_cmdlen = clen;
622 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
623 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
624 &dmasize);
625
626 /* Program the SCSI counter */
627 NCR_WRITE_REG(sc, NCR_TCL, dmasize);
628 NCR_WRITE_REG(sc, NCR_TCM, dmasize >> 8);
629 if (sc->sc_cfg2 & NCRCFG2_FE) {
630 NCR_WRITE_REG(sc, NCR_TCH, dmasize >> 16);
631 }
632
633 /* load the count in */
634 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
635
636 /* And get the targets attention */
637 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
638 NCRDMA_GO(sc);
639 } else {
640 /* Now get the command into the FIFO */
641 cmd = (u_char *)&ecb->cmd.cmd;
642 clen = ecb->clen;
643 while (clen--)
644 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
645
646 NCRCMD(sc, NCRCMD_SELNATN);
647 }
648 return;
649 }
650
651 if (ecb->tag[0]) {
652 /* We'll use tags */
653 ecb->cmd.msg[0] = MSG_IDENTIFY(lun, 1);
654 ecb->cmd.msg[1] = ecb->tag[0];
655 ecb->cmd.msg[2] = ecb->tag[1];
656 cmd = (u_char *)&ecb->cmd.msg[0];
657 clen = ecb->clen + 3;
658 } else {
659 ecb->cmd.msg[2] =
660 MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF)?0:1);
661 cmd = (u_char *)&ecb->cmd.msg[2];
662 clen = ecb->clen + 1;
663 }
664
665 if (ncr53c9x_dmaselect && (tiflags & T_NEGOTIATE) == 0) {
666
667 /* setup DMA transfer for command */
668 dmasize = clen;
669 sc->sc_cmdlen = clen;
670 sc->sc_cmdp = cmd;
671 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
672
673 /* Program the SCSI counter */
674 NCR_WRITE_REG(sc, NCR_TCL, dmasize);
675 NCR_WRITE_REG(sc, NCR_TCM, dmasize >> 8);
676 if (sc->sc_cfg2 & NCRCFG2_FE) {
677 NCR_WRITE_REG(sc, NCR_TCH, dmasize >> 16);
678 }
679
680 /* load the count in */
681 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
682
683 /* And get the targets attention */
684 if (ecb->tag[0])
685 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
686 else
687 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
688 NCRDMA_GO(sc);
689 return;
690 }
691
692 /*
693 * Who am I. This is where we tell the target that we are
694 * happy for it to disconnect etc.
695 */
696 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
697 clen --;
698
699 if (ti->flags & T_NEGOTIATE) {
700 /* Arbitrate, select and stop after IDENTIFY message */
701 NCRCMD(sc, NCRCMD_SELATNS);
702 return;
703 }
704
705 /* If we want to send a tag, get it into the fifo */
706 if (ecb->tag[0]) {
707 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
708 clen --;
709 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
710 clen --;
711 }
712
713 /* Now get the command into the FIFO */
714 while (clen--)
715 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
716
717 /* And get the targets attention */
718 if (ecb->tag[0])
719 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
720 else
721 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
722 }
723
724 void
725 ncr53c9x_free_ecb(sc, ecb, flags)
726 struct ncr53c9x_softc *sc;
727 struct ncr53c9x_ecb *ecb;
728 int flags;
729 {
730 int s;
731
732 s = splbio();
733 ecb->flags = 0;
734 pool_put(&ecb_pool, (void *)ecb);
735 splx(s);
736 return;
737 }
738
739 struct ncr53c9x_ecb *
740 ncr53c9x_get_ecb(sc, flags)
741 struct ncr53c9x_softc *sc;
742 int flags;
743 {
744 struct ncr53c9x_ecb *ecb;
745 int s, wait = 0;
746
747 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
748 wait = PR_WAITOK;
749
750 s = splbio();
751 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, wait);
752 splx(s);
753 bzero(ecb, sizeof(*ecb));
754 if (ecb)
755 ecb->flags |= ECB_ALLOC;
756 return (ecb);
757 }
758
759 /*
760 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
761 */
762
763 /*
764 * Start a SCSI-command
765 * This function is called by the higher level SCSI-driver to queue/run
766 * SCSI-commands.
767 */
768 int
769 ncr53c9x_scsi_cmd(xs)
770 struct scsipi_xfer *xs;
771 {
772 struct scsipi_link *sc_link = xs->sc_link;
773 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
774 struct ncr53c9x_ecb *ecb;
775 struct ncr53c9x_tinfo *ti;
776 struct ncr53c9x_linfo *li;
777 int64_t lun = sc_link->scsipi_scsi.lun;
778 int s, flags;
779
780 NCR_TRACE(("[ncr53c9x_scsi_cmd] "));
781 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
782 sc_link->scsipi_scsi.target));
783
784 /*
785 * Find the LUN info structure and allocate one if it does
786 * not exist.
787 */
788 flags = xs->xs_control;
789 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
790 li = TINFO_LUN(ti, lun);
791 if (li == NULL) {
792 int wait = M_NOWAIT;
793
794 /* Initialize LUN info and add to list. */
795 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
796 wait = M_WAITOK;
797 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
798 return (TRY_AGAIN_LATER);
799 }
800 bzero(li, sizeof(*li));
801 li->last_used = time.tv_sec;
802 li->lun = lun;
803 s = splbio();
804 LIST_INSERT_HEAD(&ti->luns, li, link);
805 if (lun < NCR_NLUN)
806 ti->lun[lun] = li;
807 splx(s);
808 }
809
810 if ((ecb = ncr53c9x_get_ecb(sc, flags)) == NULL)
811 return (TRY_AGAIN_LATER);
812
813 /* Initialize ecb */
814 ecb->xs = xs;
815 ecb->timeout = xs->timeout;
816
817 if (flags & XS_CTL_RESET) {
818 ecb->flags |= ECB_RESET;
819 ecb->clen = 0;
820 ecb->dleft = 0;
821 } else {
822 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
823 ecb->clen = xs->cmdlen;
824 ecb->daddr = xs->data;
825 ecb->dleft = xs->datalen;
826 }
827 ecb->stat = 0;
828
829 s = splbio();
830
831 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
832 ecb->flags |= ECB_READY;
833 if (sc->sc_state == NCR_IDLE)
834 ncr53c9x_sched(sc);
835
836 splx(s);
837
838 if ((flags & XS_CTL_POLL) == 0)
839 return (SUCCESSFULLY_QUEUED);
840
841 /* Not allowed to use interrupts, use polling instead */
842 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
843 ncr53c9x_timeout(ecb);
844 if (ncr53c9x_poll(sc, xs, ecb->timeout))
845 ncr53c9x_timeout(ecb);
846 }
847 return (COMPLETE);
848 }
849
850 /*
851 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
852 */
853 int
854 ncr53c9x_poll(sc, xs, count)
855 struct ncr53c9x_softc *sc;
856 struct scsipi_xfer *xs;
857 int count;
858 {
859
860 NCR_TRACE(("[ncr53c9x_poll] "));
861 while (count) {
862 if (NCRDMA_ISINTR(sc)) {
863 ncr53c9x_intr(sc);
864 }
865 #if alternatively
866 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
867 ncr53c9x_intr(sc);
868 #endif
869 if ((xs->xs_status & XS_STS_DONE) != 0)
870 return (0);
871 if (sc->sc_state == NCR_IDLE) {
872 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
873 ncr53c9x_sched(sc);
874 }
875 DELAY(1000);
876 count--;
877 }
878 return (1);
879 }
880
881 int
882 ncr53c9x_ioctl(link, cmd, arg, flag, p)
883 struct scsipi_link *link;
884 u_long cmd;
885 caddr_t arg;
886 int flag;
887 struct proc *p;
888 {
889 struct ncr53c9x_softc *sc = link->adapter_softc;
890 int s, error;
891
892 s = splbio();
893
894 switch (cmd) {
895 case SCBUSACCEL: {
896 struct scbusaccel_args *sp = (struct scbusaccel_args *)arg;
897 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sp->sa_target];
898
899 if (sp->sa_lun != 0)
900 break;
901
902 if ((sp->sa_flags & SC_ACCEL_SYNC) != 0) {
903 /* If this adapter can't do sync; drop it */
904 if (sc->sc_minsync == 0)
905 break;
906
907 /*
908 * Check whether target is already clamped at
909 * non-sync operation on user request.
910 */
911 if ((ti->flags & T_SYNCHOFF) != 0)
912 break;
913
914 printf("%s: target %d: sync negotiation\n",
915 sc->sc_dev.dv_xname, sp->sa_target);
916 ti->flags |= T_NEGOTIATE;
917 }
918 break;
919 }
920 default:
921 error = ENOTTY;
922 break;
923 }
924 splx(s);
925 return (error);
926 }
927
928
929 /*
930 * LOW LEVEL SCSI UTILITIES
931 */
932
933 /*
934 * Schedule a scsi operation. This has now been pulled out of the interrupt
935 * handler so that we may call it from ncr53c9x_scsi_cmd and ncr53c9x_done.
936 * This may save us an unecessary interrupt just to get things going.
937 * Should only be called when state == NCR_IDLE and at bio pl.
938 */
939 void
940 ncr53c9x_sched(sc)
941 struct ncr53c9x_softc *sc;
942 {
943 struct ncr53c9x_ecb *ecb;
944 struct scsipi_link *sc_link;
945 struct ncr53c9x_tinfo *ti;
946 int lun;
947 struct ncr53c9x_linfo *li;
948 int s, tag;
949
950 NCR_TRACE(("[ncr53c9x_sched] "));
951 if (sc->sc_state != NCR_IDLE)
952 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
953
954 /*
955 * Find first ecb in ready queue that is for a target/lunit
956 * combinations that is not busy.
957 */
958 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
959 ecb = TAILQ_NEXT(ecb, chain)) {
960 sc_link = ecb->xs->sc_link;
961 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
962 lun = sc_link->scsipi_scsi.lun;
963
964 /* Select type of tag for this command */
965 if ((ti->flags & (T_RSELECTOFF|T_TAGOFF)) != 0)
966 tag = 0;
967 else if ((ecb->flags & ECB_SENSE) != 0)
968 tag = 0;
969 else if (ecb->xs->xs_control & XS_CTL_URGENT)
970 tag = MSG_HEAD_OF_Q_TAG;
971 else
972 tag = MSG_SIMPLE_Q_TAG;
973 #if 0
974 /* XXXX Use tags for polled commands? */
975 if (ecb->xs->xs_control & XS_CTL_POLL)
976 tag = 0;
977 #endif
978
979 s = splbio();
980 li = TINFO_LUN(ti, lun);
981 if (li == NULL) {
982 int wait = M_NOWAIT;
983 int flags = ecb->xs->xs_control;
984
985 /* Initialize LUN info and add to list. */
986 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
987 wait = M_WAITOK;
988 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
989 splx(s);
990 continue;
991 }
992 bzero(li, sizeof(*li));
993 li->lun = lun;
994
995 LIST_INSERT_HEAD(&ti->luns, li, link);
996 if (lun < NCR_NLUN)
997 ti->lun[lun] = li;
998 }
999 li->last_used = time.tv_sec;
1000 if (tag == 0) {
1001 /* Try to issue this as an un-tagged command */
1002 if (li->untagged == NULL)
1003 li->untagged = ecb;
1004 }
1005 if (li->untagged != NULL) {
1006 tag = 0;
1007 if ((li->busy != 1) && li->used == 0) {
1008 /* We need to issue this untagged command now */
1009 ecb = li->untagged;
1010 sc_link = ecb->xs->sc_link;
1011 }
1012 else {
1013 /* Not ready yet */
1014 splx(s);
1015 continue;
1016 }
1017 }
1018 ecb->tag[0] = tag;
1019 if (tag != 0) {
1020 int i;
1021
1022 /* Allocate a tag */
1023 if (li->used == 255) {
1024 /* no free tags */
1025 splx(s);
1026 continue;
1027 }
1028 /* Start from the last used location */
1029 for (i = li->avail; i < 256; i++) {
1030 if (li->queued[i] == NULL)
1031 break;
1032 }
1033 /* Couldn't find one, start again from the beginning */
1034 if (i == 256) {
1035 for (i = 0; i < 256; i++) {
1036 if (li->queued[i] == NULL)
1037 break;
1038 }
1039 }
1040 #ifdef DIAGNOSTIC
1041 /* There's supposed to be at least 1 tag avail */
1042 if (i == 256)
1043 panic("ncr53c9x_sched: tag alloc failure\n");
1044 #endif
1045
1046 /* Save where to start next time. */
1047 li->avail = i+1;
1048 li->used ++;
1049
1050 li->queued[i] = ecb;
1051 ecb->tag[1] = i;
1052 }
1053 splx(s);
1054 if (li->untagged != NULL && (li->busy != 1)) {
1055 li->busy = 1;
1056 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1057 ecb->flags &= ~ECB_READY;
1058 sc->sc_nexus = ecb;
1059 ncr53c9x_select(sc, ecb);
1060 break;
1061 }
1062 if (li->untagged == NULL && tag != 0) {
1063 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1064 ecb->flags &= ~ECB_READY;
1065 sc->sc_nexus = ecb;
1066 ncr53c9x_select(sc, ecb);
1067 break;
1068 } else
1069 NCR_MISC(("%d:%d busy\n",
1070 sc_link->scsipi_scsi.target,
1071 sc_link->scsipi_scsi.lun));
1072 }
1073 }
1074
1075 void
1076 ncr53c9x_sense(sc, ecb)
1077 struct ncr53c9x_softc *sc;
1078 struct ncr53c9x_ecb *ecb;
1079 {
1080 struct scsipi_xfer *xs = ecb->xs;
1081 struct scsipi_link *sc_link = xs->sc_link;
1082 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1083 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1084 struct ncr53c9x_linfo *li;
1085 int lun = sc_link->scsipi_scsi.lun;
1086
1087 NCR_MISC(("requesting sense "));
1088 /* Next, setup a request sense command block */
1089 bzero(ss, sizeof(*ss));
1090 ss->opcode = REQUEST_SENSE;
1091 ss->byte2 = sc_link->scsipi_scsi.lun << 5;
1092 ss->length = sizeof(struct scsipi_sense_data);
1093 ecb->clen = sizeof(*ss);
1094 ecb->daddr = (char *)&xs->sense.scsi_sense;
1095 ecb->dleft = sizeof(struct scsipi_sense_data);
1096 ecb->flags |= ECB_SENSE;
1097 ecb->timeout = NCR_SENSE_TIMEOUT;
1098 ti->senses++;
1099 li = TINFO_LUN(ti, lun);
1100 if (li->busy) li->busy = 0;
1101 ncr53c9x_dequeue(sc, ecb);
1102 li->untagged = ecb; /* must be executed first to fix C/A */
1103 li->busy = 2;
1104 if (ecb == sc->sc_nexus) {
1105 ncr53c9x_select(sc, ecb);
1106 } else {
1107 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1108 ecb->flags |= ECB_READY;
1109 if (sc->sc_state == NCR_IDLE)
1110 ncr53c9x_sched(sc);
1111 }
1112 }
1113
1114 /*
1115 * POST PROCESSING OF SCSI_CMD (usually current)
1116 */
1117 void
1118 ncr53c9x_done(sc, ecb)
1119 struct ncr53c9x_softc *sc;
1120 struct ncr53c9x_ecb *ecb;
1121 {
1122 struct scsipi_xfer *xs = ecb->xs;
1123 struct scsipi_link *sc_link = xs->sc_link;
1124 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1125 int lun = sc_link->scsipi_scsi.lun;
1126 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1127
1128 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1129
1130 callout_stop(&ecb->xs->xs_callout);
1131
1132 if (ecb->stat == SCSI_QUEUE_FULL) {
1133 /*
1134 * Set current throttle -- we should reset
1135 * this periodically
1136 */
1137 sc_link->openings = li->used - 1;
1138 printf("\n%s: QFULL -- throttling to %d commands\n",
1139 sc->sc_dev.dv_xname, sc_link->openings);
1140
1141 }
1142
1143 /*
1144 * Now, if we've come here with no error code, i.e. we've kept the
1145 * initial XS_NOERROR, and the status code signals that we should
1146 * check sense, we'll need to set up a request sense cmd block and
1147 * push the command back into the ready queue *before* any other
1148 * commands for this target/lunit, else we lose the sense info.
1149 * We don't support chk sense conditions for the request sense cmd.
1150 */
1151 if (xs->error == XS_NOERROR) {
1152 xs->status = ecb->stat;
1153 if ((ecb->flags & ECB_ABORT) != 0) {
1154 xs->error = XS_TIMEOUT;
1155 } else if ((ecb->flags & ECB_SENSE) != 0) {
1156 xs->error = XS_SENSE;
1157 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1158 /* First, save the return values */
1159 xs->resid = ecb->dleft;
1160 ncr53c9x_sense(sc, ecb);
1161 return;
1162 } else {
1163 xs->resid = ecb->dleft;
1164 }
1165 }
1166
1167 xs->xs_status |= XS_STS_DONE;
1168
1169 #ifdef NCR53C9X_DEBUG
1170 if (ncr53c9x_debug & NCR_SHOWMISC) {
1171 if (xs->resid != 0)
1172 printf("resid=%d ", xs->resid);
1173 if (xs->error == XS_SENSE)
1174 printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
1175 else
1176 printf("error=%d\n", xs->error);
1177 }
1178 #endif
1179
1180 /*
1181 * Remove the ECB from whatever queue it's on.
1182 */
1183 ncr53c9x_dequeue(sc, ecb);
1184 if (ecb == sc->sc_nexus) {
1185 sc->sc_nexus = NULL;
1186 if (sc->sc_state != NCR_CLEANING) {
1187 sc->sc_state = NCR_IDLE;
1188 ncr53c9x_sched(sc);
1189 }
1190 }
1191
1192 if (xs->error == XS_SELTIMEOUT) {
1193 /* Selection timeout -- discard this LUN if empty */
1194 if (li->untagged == NULL && li->used == 0) {
1195 if (lun < NCR_NLUN)
1196 ti->lun[lun] = NULL;
1197 LIST_REMOVE(li, link);
1198 free(li, M_DEVBUF);
1199 }
1200 }
1201
1202 ncr53c9x_free_ecb(sc, ecb, xs->xs_control);
1203 ti->cmds++;
1204 scsipi_done(xs);
1205 }
1206
1207 void
1208 ncr53c9x_dequeue(sc, ecb)
1209 struct ncr53c9x_softc *sc;
1210 struct ncr53c9x_ecb *ecb;
1211 {
1212 struct ncr53c9x_tinfo *ti =
1213 &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1214 struct ncr53c9x_linfo *li;
1215 int64_t lun = ecb->xs->sc_link->scsipi_scsi.lun;
1216
1217 li = TINFO_LUN(ti, lun);
1218 #ifdef DIAGNOSTIC
1219 if (li == NULL || li->lun != lun)
1220 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1221 (long long) lun, ecb);
1222 #endif
1223 if (li->untagged == ecb) {
1224 li->busy = 0;
1225 li->untagged = NULL;
1226 }
1227 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1228 #ifdef DIAGNOSTIC
1229 if (li->queued[ecb->tag[1]] != NULL &&
1230 (li->queued[ecb->tag[1]] != ecb))
1231 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1232 "instead of ecb %p\n", ecb->tag[1],
1233 (long long) lun,
1234 li->queued[ecb->tag[1]], ecb);
1235 #endif
1236 li->queued[ecb->tag[1]] = NULL;
1237 li->used --;
1238 }
1239
1240 if ((ecb->flags & ECB_READY) != 0) {
1241 ecb->flags &= ~ECB_READY;
1242 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1243 }
1244 }
1245
1246 /*
1247 * INTERRUPT/PROTOCOL ENGINE
1248 */
1249
1250 /*
1251 * Schedule an outgoing message by prioritizing it, and asserting
1252 * attention on the bus. We can only do this when we are the initiator
1253 * else there will be an illegal command interrupt.
1254 */
1255 #define ncr53c9x_sched_msgout(m) \
1256 do { \
1257 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1258 NCRCMD(sc, NCRCMD_SETATN); \
1259 sc->sc_flags |= NCR_ATN; \
1260 sc->sc_msgpriq |= (m); \
1261 } while (0)
1262
1263 int
1264 ncr53c9x_reselect(sc, message, tagtype, tagid)
1265 struct ncr53c9x_softc *sc;
1266 int message;
1267 int tagtype, tagid;
1268 {
1269 u_char selid, target, lun;
1270 struct ncr53c9x_ecb *ecb = NULL;
1271 struct ncr53c9x_tinfo *ti;
1272 struct ncr53c9x_linfo *li;
1273
1274 /*
1275 * The SCSI chip made a snapshot of the data bus while the reselection
1276 * was being negotiated. This enables us to determine which target did
1277 * the reselect.
1278 */
1279 selid = sc->sc_selid & ~(1 << sc->sc_id);
1280 if (selid & (selid - 1)) {
1281 printf("%s: reselect with invalid selid %02x;"
1282 " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
1283 goto reset;
1284 }
1285
1286 /*
1287 * Search wait queue for disconnected cmd
1288 * The list should be short, so I haven't bothered with
1289 * any more sophisticated structures than a simple
1290 * singly linked list.
1291 */
1292 target = ffs(selid) - 1;
1293 lun = message & 0x07;
1294 ti = &sc->sc_tinfo[target];
1295 li = TINFO_LUN(ti, lun);
1296
1297 /*
1298 * We can get as far as the LUN with the IDENTIFY
1299 * message. Check to see if we're running an
1300 * un-tagged command. Otherwise ack the IDENTIFY
1301 * and wait for a tag message.
1302 */
1303
1304 if (li != NULL) {
1305 if (li->untagged != NULL && li->busy)
1306 ecb = li->untagged;
1307 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1308 /* Wait for tag to come by */
1309 sc->sc_state = NCR_IDENTIFIED;
1310 return (0);
1311 } else if (tagtype)
1312 ecb = li->queued[tagid];
1313 }
1314 if (ecb == NULL) {
1315 printf("%s: reselect from target %d lun %d tag %x:%x with no nexus;"
1316 " sending ABORT\n",
1317 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1318 goto abort;
1319 }
1320
1321 /* Make this nexus active again. */
1322 sc->sc_state = NCR_CONNECTED;
1323 sc->sc_nexus = ecb;
1324 ncr53c9x_setsync(sc, ti);
1325
1326 if (ecb->flags & ECB_RESET)
1327 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1328 else if (ecb->flags & ECB_ABORT)
1329 ncr53c9x_sched_msgout(SEND_ABORT);
1330
1331 /* Do an implicit RESTORE POINTERS. */
1332 sc->sc_dp = ecb->daddr;
1333 sc->sc_dleft = ecb->dleft;
1334
1335 return (0);
1336
1337 reset:
1338 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1339 return (1);
1340
1341 abort:
1342 ncr53c9x_sched_msgout(SEND_ABORT);
1343 return (1);
1344 }
1345
1346 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1347 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1348 #define ISEXTMSG(m) ((m) == 1)
1349
1350 /*
1351 * Get an incoming message as initiator.
1352 *
1353 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1354 * byte in the FIFO
1355 */
1356 void
1357 ncr53c9x_msgin(sc)
1358 struct ncr53c9x_softc *sc;
1359 {
1360 int v;
1361
1362 v = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
1363 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld fifo:%d)] ",
1364 (long)sc->sc_imlen, v));
1365
1366 if (v == 0) {
1367 printf("%s: msgin: no msg byte available\n",
1368 sc->sc_dev.dv_xname);
1369 return;
1370 }
1371
1372 /*
1373 * Prepare for a new message. A message should (according
1374 * to the SCSI standard) be transmitted in one single
1375 * MESSAGE_IN_PHASE. If we have been in some other phase,
1376 * then this is a new message.
1377 */
1378 if (sc->sc_prevphase != MESSAGE_IN_PHASE) {
1379 sc->sc_flags &= ~NCR_DROP_MSGI;
1380 sc->sc_imlen = 0;
1381 }
1382
1383 v = NCR_READ_REG(sc, NCR_FIFO);
1384 NCR_MISC(("<msgbyte:0x%02x>", v));
1385
1386 #if 0
1387 if (sc->sc_state == NCR_RESELECTED && sc->sc_imlen == 0) {
1388 /*
1389 * Which target is reselecting us? (The ID bit really)
1390 */
1391 sc->sc_selid = v;
1392 NCR_MISC(("selid=0x%2x ", sc->sc_selid));
1393 return;
1394 }
1395 #endif
1396
1397 sc->sc_imess[sc->sc_imlen] = v;
1398
1399 /*
1400 * If we're going to reject the message, don't bother storing
1401 * the incoming bytes. But still, we need to ACK them.
1402 */
1403
1404 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1405 NCRCMD(sc, NCRCMD_MSGOK);
1406 printf("<dropping msg byte %x>",
1407 sc->sc_imess[sc->sc_imlen]);
1408 return;
1409 }
1410
1411 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1412 ncr53c9x_sched_msgout(SEND_REJECT);
1413 sc->sc_flags |= NCR_DROP_MSGI;
1414 } else {
1415 sc->sc_imlen++;
1416 /*
1417 * This testing is suboptimal, but most
1418 * messages will be of the one byte variety, so
1419 * it should not effect performance
1420 * significantly.
1421 */
1422 if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1423 goto gotit;
1424 if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1425 goto gotit;
1426 if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1427 sc->sc_imlen == sc->sc_imess[1] + 2)
1428 goto gotit;
1429 }
1430 /* Ack what we have so far */
1431 NCRCMD(sc, NCRCMD_MSGOK);
1432 return;
1433
1434 gotit:
1435 NCR_MSGS(("gotmsg(%x)", sc->sc_imess[0]));
1436 /*
1437 * Now we should have a complete message (1 byte, 2 byte
1438 * and moderately long extended messages). We only handle
1439 * extended messages which total length is shorter than
1440 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1441 */
1442 switch (sc->sc_state) {
1443 struct ncr53c9x_ecb *ecb;
1444 struct ncr53c9x_tinfo *ti;
1445
1446 case NCR_CONNECTED:
1447 ecb = sc->sc_nexus;
1448 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1449
1450 switch (sc->sc_imess[0]) {
1451 case MSG_CMDCOMPLETE:
1452 NCR_MSGS(("cmdcomplete "));
1453 if (sc->sc_dleft < 0) {
1454 scsi_print_addr(ecb->xs->sc_link);
1455 printf("got %ld extra bytes\n",
1456 -(long)sc->sc_dleft);
1457 sc->sc_dleft = 0;
1458 }
1459 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
1460 ? 0
1461 : sc->sc_dleft;
1462 if ((ecb->flags & ECB_SENSE) == 0)
1463 ecb->xs->resid = ecb->dleft;
1464 sc->sc_state = NCR_CMDCOMPLETE;
1465 break;
1466
1467 case MSG_MESSAGE_REJECT:
1468 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1469 switch (sc->sc_msgout) {
1470 case SEND_SDTR:
1471 sc->sc_flags &= ~NCR_SYNCHNEGO;
1472 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1473 ncr53c9x_setsync(sc, ti);
1474 break;
1475 case SEND_INIT_DET_ERR:
1476 goto abort;
1477 }
1478 break;
1479
1480 case MSG_NOOP:
1481 NCR_MSGS(("noop "));
1482 break;
1483
1484 case MSG_HEAD_OF_Q_TAG:
1485 case MSG_SIMPLE_Q_TAG:
1486 case MSG_ORDERED_Q_TAG:
1487 NCR_MSGS(("TAG %x:%x", sc->sc_imess[0], sc->sc_imess[1]));
1488 break;
1489
1490 case MSG_DISCONNECT:
1491 NCR_MSGS(("disconnect "));
1492 ti->dconns++;
1493 sc->sc_state = NCR_DISCONNECT;
1494
1495 /*
1496 * Mark the fact that all bytes have moved. The
1497 * target may not bother to do a SAVE POINTERS
1498 * at this stage. This flag will set the residual
1499 * count to zero on MSG COMPLETE.
1500 */
1501 if (sc->sc_dleft == 0)
1502 ecb->flags |= ECB_TENTATIVE_DONE;
1503
1504 break;
1505
1506 case MSG_SAVEDATAPOINTER:
1507 NCR_MSGS(("save datapointer "));
1508 ecb->daddr = sc->sc_dp;
1509 ecb->dleft = sc->sc_dleft;
1510 break;
1511
1512 case MSG_RESTOREPOINTERS:
1513 NCR_MSGS(("restore datapointer "));
1514 sc->sc_dp = ecb->daddr;
1515 sc->sc_dleft = ecb->dleft;
1516 break;
1517
1518 case MSG_EXTENDED:
1519 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1520 switch (sc->sc_imess[2]) {
1521 case MSG_EXT_SDTR:
1522 NCR_MSGS(("SDTR period %d, offset %d ",
1523 sc->sc_imess[3], sc->sc_imess[4]));
1524 if (sc->sc_imess[1] != 3)
1525 goto reject;
1526 ti->period = sc->sc_imess[3];
1527 ti->offset = sc->sc_imess[4];
1528 ti->flags &= ~T_NEGOTIATE;
1529 if (sc->sc_minsync == 0 ||
1530 ti->offset == 0 ||
1531 ti->period > 124) {
1532 #ifdef NCR53C9X_DEBUG
1533 scsi_print_addr(ecb->xs->sc_link);
1534 printf("async mode\n");
1535 #endif
1536 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1537 /*
1538 * target initiated negotiation
1539 */
1540 ti->offset = 0;
1541 ti->flags &= ~T_SYNCMODE;
1542 ncr53c9x_sched_msgout(
1543 SEND_SDTR);
1544 } else {
1545 /* we are async */
1546 ti->flags &= ~T_SYNCMODE;
1547 }
1548 } else {
1549 int r = 250/ti->period;
1550 int s = (100*250)/ti->period - 100*r;
1551 int p;
1552
1553 p = ncr53c9x_stp2cpb(sc, ti->period);
1554 ti->period = ncr53c9x_cpb2stp(sc, p);
1555 #ifdef NCR53C9X_DEBUG
1556 scsi_print_addr(ecb->xs->sc_link);
1557 printf("max sync rate %d.%02dMB/s\n",
1558 r, s);
1559 #endif
1560 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1561 /*
1562 * target initiated negotiation
1563 */
1564 if (ti->period <
1565 sc->sc_minsync)
1566 ti->period =
1567 sc->sc_minsync;
1568 if (ti->offset > 15)
1569 ti->offset = 15;
1570 ti->flags &= ~T_SYNCMODE;
1571 ncr53c9x_sched_msgout(
1572 SEND_SDTR);
1573 } else {
1574 /* we are sync */
1575 ti->flags |= T_SYNCMODE;
1576 }
1577 }
1578 sc->sc_flags &= ~NCR_SYNCHNEGO;
1579 ncr53c9x_setsync(sc, ti);
1580 break;
1581
1582 default:
1583 scsi_print_addr(ecb->xs->sc_link);
1584 printf("unrecognized MESSAGE EXTENDED;"
1585 " sending REJECT\n");
1586 goto reject;
1587 }
1588 break;
1589
1590 default:
1591 NCR_MSGS(("ident "));
1592 scsi_print_addr(ecb->xs->sc_link);
1593 printf("unrecognized MESSAGE; sending REJECT\n");
1594 reject:
1595 ncr53c9x_sched_msgout(SEND_REJECT);
1596 break;
1597 }
1598 break;
1599
1600 case NCR_RESELECTED:
1601 case NCR_IDENTIFIED:
1602 if (MSG_ISIDENTIFY(sc->sc_imess[0])) {
1603 sc->sc_msgify = sc->sc_imess[0];
1604 } else if (sc->sc_imess[0] == MSG_SIMPLE_Q_TAG) {
1605 if (sc->sc_msgify == 0) {
1606 printf("%s: TAG reselect without IDENTIFY;"
1607 " MSG %x;"
1608 " sending DEVICE RESET\n",
1609 sc->sc_dev.dv_xname,
1610 sc->sc_imess[0]);
1611 goto reset;
1612 }
1613 } else {
1614 printf("%s: reselect without IDENTIFY;"
1615 " MSG %x;"
1616 " sending DEVICE RESET\n",
1617 sc->sc_dev.dv_xname,
1618 sc->sc_imess[0]);
1619 goto reset;
1620 }
1621
1622 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1623 sc->sc_imess[0],
1624 sc->sc_imess[1]);
1625 break;
1626
1627 default:
1628 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1629 sc->sc_dev.dv_xname);
1630 reset:
1631 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1632 break;
1633
1634 abort:
1635 ncr53c9x_sched_msgout(SEND_ABORT);
1636 break;
1637 }
1638
1639 /* Ack last message byte */
1640 NCRCMD(sc, NCRCMD_MSGOK);
1641
1642 /* Done, reset message pointer. */
1643 sc->sc_flags &= ~NCR_DROP_MSGI;
1644 sc->sc_imlen = 0;
1645 }
1646
1647
1648 /*
1649 * Send the highest priority, scheduled message
1650 */
1651 void
1652 ncr53c9x_msgout(sc)
1653 struct ncr53c9x_softc *sc;
1654 {
1655 struct ncr53c9x_tinfo *ti;
1656 struct ncr53c9x_ecb *ecb;
1657 size_t size;
1658
1659 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1660 sc->sc_msgpriq, sc->sc_prevphase));
1661
1662 /*
1663 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1664 * condition on the SCSI bus. The 53c9x chip
1665 * automatically turns off ATN before sending the
1666 * message byte. (see also the comment below in the
1667 * default case when picking out a message to send)
1668 */
1669 if (sc->sc_flags & NCR_ATN) {
1670 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1671 new:
1672 NCRCMD(sc, NCRCMD_FLUSH);
1673 DELAY(1);
1674 sc->sc_msgoutq = 0;
1675 sc->sc_omlen = 0;
1676 }
1677 } else {
1678 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1679 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1680 goto new;
1681 } else {
1682 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1683 sc->sc_dev.dv_xname, __LINE__);
1684 }
1685 }
1686
1687 if (sc->sc_omlen == 0) {
1688 /* Pick up highest priority message */
1689 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1690 sc->sc_msgoutq |= sc->sc_msgout;
1691 sc->sc_msgpriq &= ~sc->sc_msgout;
1692 sc->sc_omlen = 1; /* "Default" message len */
1693 switch (sc->sc_msgout) {
1694 case SEND_SDTR:
1695 ecb = sc->sc_nexus;
1696 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1697 sc->sc_omess[0] = MSG_EXTENDED;
1698 sc->sc_omess[1] = 3;
1699 sc->sc_omess[2] = MSG_EXT_SDTR;
1700 sc->sc_omess[3] = ti->period;
1701 sc->sc_omess[4] = ti->offset;
1702 sc->sc_omlen = 5;
1703 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1704 ti->flags |= T_SYNCMODE;
1705 ncr53c9x_setsync(sc, ti);
1706 }
1707 break;
1708 case SEND_IDENTIFY:
1709 if (sc->sc_state != NCR_CONNECTED) {
1710 printf("%s at line %d: no nexus\n",
1711 sc->sc_dev.dv_xname, __LINE__);
1712 }
1713 ecb = sc->sc_nexus;
1714 sc->sc_omess[0] =
1715 MSG_IDENTIFY(ecb->xs->sc_link->scsipi_scsi.lun, 0);
1716 break;
1717 case SEND_TAG:
1718 if (sc->sc_state != NCR_CONNECTED) {
1719 printf("%s at line %d: no nexus\n",
1720 sc->sc_dev.dv_xname, __LINE__);
1721 }
1722 ecb = sc->sc_nexus;
1723 sc->sc_omess[0] = ecb->tag[0];
1724 sc->sc_omess[1] = ecb->tag[1];
1725 sc->sc_omlen = 2;
1726 break;
1727 case SEND_DEV_RESET:
1728 sc->sc_flags |= NCR_ABORTING;
1729 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1730 ecb = sc->sc_nexus;
1731 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1732 ti->flags &= ~T_SYNCMODE;
1733 if ((ti->flags & T_SYNCHOFF) == 0)
1734 /* We can re-start sync negotiation */
1735 ti->flags |= T_NEGOTIATE;
1736 break;
1737 case SEND_PARITY_ERROR:
1738 sc->sc_omess[0] = MSG_PARITY_ERROR;
1739 break;
1740 case SEND_ABORT:
1741 sc->sc_flags |= NCR_ABORTING;
1742 sc->sc_omess[0] = MSG_ABORT;
1743 break;
1744 case SEND_INIT_DET_ERR:
1745 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1746 break;
1747 case SEND_REJECT:
1748 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1749 break;
1750 default:
1751 /*
1752 * We normally do not get here, since the chip
1753 * automatically turns off ATN before the last
1754 * byte of a message is sent to the target.
1755 * However, if the target rejects our (multi-byte)
1756 * message early by switching to MSG IN phase
1757 * ATN remains on, so the target may return to
1758 * MSG OUT phase. If there are no scheduled messages
1759 * left we send a NO-OP.
1760 *
1761 * XXX - Note that this leaves no useful purpose for
1762 * the NCR_ATN flag.
1763 */
1764 sc->sc_flags &= ~NCR_ATN;
1765 sc->sc_omess[0] = MSG_NOOP;
1766 break;
1767 }
1768 sc->sc_omp = sc->sc_omess;
1769 }
1770
1771 #ifdef DEBUG
1772 {
1773 int i;
1774
1775 for (i = 0; i < sc->sc_omlen; i++)
1776 NCR_MISC(("<msgbyte:0x%02x>", sc->sc_omess[i]));
1777 }
1778 #endif
1779 /* (re)send the message */
1780 size = min(sc->sc_omlen, sc->sc_maxxfer);
1781 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
1782 /* Program the SCSI counter */
1783 NCR_WRITE_REG(sc, NCR_TCL, size);
1784 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
1785 if (sc->sc_cfg2 & NCRCFG2_FE) {
1786 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
1787 }
1788 /* Load the count in and start the message-out transfer */
1789 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
1790 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
1791 NCRDMA_GO(sc);
1792 }
1793
1794 /*
1795 * This is the most critical part of the driver, and has to know
1796 * how to deal with *all* error conditions and phases from the SCSI
1797 * bus. If there are no errors and the DMA was active, then call the
1798 * DMA pseudo-interrupt handler. If this returns 1, then that was it
1799 * and we can return from here without further processing.
1800 *
1801 * Most of this needs verifying.
1802 */
1803 int
1804 ncr53c9x_intr(arg)
1805 void *arg;
1806 {
1807 struct ncr53c9x_softc *sc = arg;
1808 struct ncr53c9x_ecb *ecb;
1809 struct scsipi_link *sc_link;
1810 struct ncr53c9x_tinfo *ti;
1811 size_t size;
1812 int nfifo;
1813
1814 NCR_TRACE(("[ncr53c9x_intr] "));
1815
1816 if (!NCRDMA_ISINTR(sc))
1817 return (0);
1818
1819 again:
1820 /* and what do the registers say... */
1821 ncr53c9x_readregs(sc);
1822
1823 sc->sc_intrcnt.ev_count++;
1824
1825 /*
1826 * At the moment, only a SCSI Bus Reset or Illegal
1827 * Command are classed as errors. A disconnect is a
1828 * valid condition, and we let the code check is the
1829 * "NCR_BUSFREE_OK" flag was set before declaring it
1830 * and error.
1831 *
1832 * Also, the status register tells us about "Gross
1833 * Errors" and "Parity errors". Only the Gross Error
1834 * is really bad, and the parity errors are dealt
1835 * with later
1836 *
1837 * TODO
1838 * If there are too many parity error, go to slow
1839 * cable mode ?
1840 */
1841
1842 /* SCSI Reset */
1843 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
1844 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
1845 NCRCMD(sc, NCRCMD_FLUSH);
1846 DELAY(1);
1847 }
1848 if (sc->sc_state != NCR_SBR) {
1849 printf("%s: SCSI bus reset\n",
1850 sc->sc_dev.dv_xname);
1851 ncr53c9x_init(sc, 0); /* Restart everything */
1852 return (1);
1853 }
1854 #if 0
1855 /*XXX*/ printf("<expected bus reset: "
1856 "[intr %x, stat %x, step %d]>\n",
1857 sc->sc_espintr, sc->sc_espstat,
1858 sc->sc_espstep);
1859 #endif
1860 if (sc->sc_nexus != NULL)
1861 panic("%s: nexus in reset state",
1862 sc->sc_dev.dv_xname);
1863 goto sched;
1864 }
1865
1866 ecb = sc->sc_nexus;
1867
1868 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
1869 if (sc->sc_espintr & NCRINTR_ERR ||
1870 sc->sc_espstat & NCRSTAT_GE) {
1871
1872 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
1873 /* Gross Error; no target ? */
1874 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1875 NCRCMD(sc, NCRCMD_FLUSH);
1876 DELAY(1);
1877 }
1878 if (sc->sc_state == NCR_CONNECTED ||
1879 sc->sc_state == NCR_SELECTING) {
1880 ecb->xs->error = XS_TIMEOUT;
1881 ncr53c9x_done(sc, ecb);
1882 }
1883 return (1);
1884 }
1885
1886 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
1887 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
1888 /*
1889 * Eat away "Illegal command" interrupt
1890 * on a ESP100 caused by a re-selection
1891 * while we were trying to select
1892 * another target.
1893 */
1894 #ifdef DEBUG
1895 printf("%s: ESP100 work-around activated\n",
1896 sc->sc_dev.dv_xname);
1897 #endif
1898 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1899 return (1);
1900 }
1901 /* illegal command, out of sync ? */
1902 printf("%s: illegal command: 0x%x "
1903 "(state %d, phase %x, prevphase %x)\n",
1904 sc->sc_dev.dv_xname, sc->sc_lastcmd,
1905 sc->sc_state, sc->sc_phase,
1906 sc->sc_prevphase);
1907 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1908 NCRCMD(sc, NCRCMD_FLUSH);
1909 DELAY(1);
1910 }
1911 ncr53c9x_init(sc, 1); /* Restart everything */
1912 return (1);
1913 }
1914 }
1915 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1916
1917 /*
1918 * Call if DMA is active.
1919 *
1920 * If DMA_INTR returns true, then maybe go 'round the loop
1921 * again in case there is no more DMA queued, but a phase
1922 * change is expected.
1923 */
1924 if (NCRDMA_ISACTIVE(sc)) {
1925 int r = NCRDMA_INTR(sc);
1926 if (r == -1) {
1927 printf("%s: DMA error; resetting\n",
1928 sc->sc_dev.dv_xname);
1929 ncr53c9x_init(sc, 1);
1930 }
1931 /* If DMA active here, then go back to work... */
1932 if (NCRDMA_ISACTIVE(sc))
1933 return (1);
1934
1935 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
1936 /*
1937 * DMA not completed. If we can not find a
1938 * acceptable explanation, print a diagnostic.
1939 */
1940 if (sc->sc_state == NCR_SELECTING)
1941 /*
1942 * This can happen if we are reselected
1943 * while using DMA to select a target.
1944 */
1945 /*void*/;
1946 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1947 /*
1948 * Our (multi-byte) message (eg SDTR) was
1949 * interrupted by the target to send
1950 * a MSG REJECT.
1951 * Print diagnostic if current phase
1952 * is not MESSAGE IN.
1953 */
1954 if (sc->sc_phase != MESSAGE_IN_PHASE)
1955 printf("%s: !TC on MSG OUT"
1956 " [intr %x, stat %x, step %d]"
1957 " prevphase %x, resid %lx\n",
1958 sc->sc_dev.dv_xname,
1959 sc->sc_espintr,
1960 sc->sc_espstat,
1961 sc->sc_espstep,
1962 sc->sc_prevphase,
1963 (u_long)sc->sc_omlen);
1964 } else if (sc->sc_dleft == 0) {
1965 /*
1966 * The DMA operation was started for
1967 * a DATA transfer. Print a diagnostic
1968 * if the DMA counter and TC bit
1969 * appear to be out of sync.
1970 */
1971 printf("%s: !TC on DATA XFER"
1972 " [intr %x, stat %x, step %d]"
1973 " prevphase %x, resid %x\n",
1974 sc->sc_dev.dv_xname,
1975 sc->sc_espintr,
1976 sc->sc_espstat,
1977 sc->sc_espstep,
1978 sc->sc_prevphase,
1979 ecb?ecb->dleft:-1);
1980 }
1981 }
1982 }
1983
1984 /*
1985 * Check for less serious errors.
1986 */
1987 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
1988 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1989 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
1990 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
1991 else
1992 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
1993 }
1994
1995 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
1996 sc->sc_msgify = 0;
1997 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
1998 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
1999 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2000 NCRCMD(sc, NCRCMD_FLUSH);
2001 DELAY(1);
2002 }
2003 /*
2004 * This command must (apparently) be issued within
2005 * 250mS of a disconnect. So here you are...
2006 */
2007 NCRCMD(sc, NCRCMD_ENSEL);
2008
2009 switch (sc->sc_state) {
2010 case NCR_RESELECTED:
2011 goto sched;
2012
2013 case NCR_SELECTING:
2014 {
2015 struct ncr53c9x_linfo *li;
2016
2017 ecb->xs->error = XS_SELTIMEOUT;
2018
2019 /* Selection timeout -- discard all LUNs if empty */
2020 sc_link = ecb->xs->sc_link;
2021 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2022 li = LIST_FIRST(&ti->luns);
2023 while (li != NULL) {
2024 if (li->untagged == NULL && li->used == 0) {
2025 if (li->lun < NCR_NLUN)
2026 ti->lun[li->lun] = NULL;
2027 LIST_REMOVE(li, link);
2028 free(li, M_DEVBUF);
2029 /* Restart the search at the beginning */
2030 li = LIST_FIRST(&ti->luns);
2031 continue;
2032 }
2033 li = LIST_NEXT(li, link);
2034 }
2035 goto finish;
2036 }
2037 case NCR_CONNECTED:
2038 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2039 #ifdef NCR53C9X_DEBUG
2040 if (ecb != NULL)
2041 scsi_print_addr(ecb->xs->sc_link);
2042 printf("sync nego not completed!\n");
2043 #endif
2044 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
2045 sc->sc_flags &= ~NCR_SYNCHNEGO;
2046 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2047 }
2048
2049 /* it may be OK to disconnect */
2050 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2051 /*
2052 * Section 5.1.1 of the SCSI 2 spec
2053 * suggests issuing a REQUEST SENSE
2054 * following an unexpected disconnect.
2055 * Some devices go into a contingent
2056 * allegiance condition when
2057 * disconnecting, and this is necessary
2058 * to clean up their state.
2059 */
2060 printf("%s: unexpected disconnect; ",
2061 sc->sc_dev.dv_xname);
2062 if ((ecb->flags & ECB_SENSE) != 0) {
2063 printf("resetting\n");
2064 goto reset;
2065 }
2066 printf("sending REQUEST SENSE\n");
2067 callout_stop(&ecb->xs->xs_callout);
2068 ncr53c9x_sense(sc, ecb);
2069 goto out;
2070 }
2071
2072 ecb->xs->error = XS_TIMEOUT;
2073 goto finish;
2074
2075 case NCR_DISCONNECT:
2076 sc->sc_nexus = NULL;
2077 goto sched;
2078
2079 case NCR_CMDCOMPLETE:
2080 goto finish;
2081 }
2082 }
2083
2084 switch (sc->sc_state) {
2085
2086 case NCR_SBR:
2087 printf("%s: waiting for SCSI Bus Reset to happen\n",
2088 sc->sc_dev.dv_xname);
2089 return (1);
2090
2091 case NCR_RESELECTED:
2092 /*
2093 * we must be continuing a message ?
2094 */
2095 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2096 printf("%s: target didn't identify\n",
2097 sc->sc_dev.dv_xname);
2098 ncr53c9x_init(sc, 1);
2099 return (1);
2100 }
2101 printf("<<RESELECT CONT'd>>");
2102 #if XXXX
2103 ncr53c9x_msgin(sc);
2104 if (sc->sc_state != NCR_CONNECTED) {
2105 /* IDENTIFY fail?! */
2106 printf("%s: identify failed\n",
2107 sc->sc_dev.dv_xname);
2108 ncr53c9x_init(sc, 1);
2109 return (1);
2110 }
2111 #endif
2112 break;
2113
2114 case NCR_IDENTIFIED:
2115 ecb = sc->sc_nexus;
2116 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2117 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2118 & NCRFIFO_FF);
2119 /*
2120 * Things are seriously fucked up.
2121 * Pull the brakes, i.e. reset
2122 */
2123 printf("%s: target didn't send tag: %d bytes in fifo\n",
2124 sc->sc_dev.dv_xname, i);
2125 /* Drain and display fifo */
2126 while (i-- > 0)
2127 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2128
2129 ncr53c9x_init(sc, 1);
2130 return (1);
2131 } else
2132 goto msgin;
2133
2134 break;
2135
2136 case NCR_IDLE:
2137 case NCR_SELECTING:
2138 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2139 sc->sc_flags = 0;
2140 ecb = sc->sc_nexus;
2141 if (sc->sc_espintr & NCRINTR_RESEL) {
2142 /*
2143 * If we're trying to select a
2144 * target ourselves, push our command
2145 * back into the ready list.
2146 */
2147 if (sc->sc_state == NCR_SELECTING) {
2148 NCR_MISC(("backoff selector "));
2149 callout_stop(&ecb->xs->xs_callout);
2150 ncr53c9x_dequeue(sc, ecb);
2151 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2152 ecb->flags |= ECB_READY;
2153 ecb = sc->sc_nexus = NULL;
2154 }
2155 sc->sc_state = NCR_RESELECTED;
2156 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2157 /*
2158 * Things are seriously fucked up.
2159 * Pull the brakes, i.e. reset
2160 */
2161 printf("%s: target didn't identify\n",
2162 sc->sc_dev.dv_xname);
2163 ncr53c9x_init(sc, 1);
2164 return (1);
2165 }
2166 /*
2167 * The C90 only inhibits FIFO writes until
2168 * reselection is complete, instead of
2169 * waiting until the interrupt status register
2170 * has been read. So, if the reselect happens
2171 * while we were entering a command bytes (for
2172 * another target) some of those bytes can
2173 * appear in the FIFO here, after the
2174 * interrupt is taken.
2175 */
2176 nfifo = NCR_READ_REG(sc,NCR_FFLAG) & NCRFIFO_FF;
2177 if (nfifo < 2 ||
2178 (nfifo > 2 &&
2179 sc->sc_rev != NCR_VARIANT_ESP100)) {
2180 printf("%s: RESELECT: %d bytes in FIFO! "
2181 "[intr %x, stat %x, step %d, prevphase %x]\n",
2182 sc->sc_dev.dv_xname,
2183 nfifo,
2184 sc->sc_espintr,
2185 sc->sc_espstat,
2186 sc->sc_espstep,
2187 sc->sc_prevphase);
2188 ncr53c9x_init(sc, 1);
2189 return (1);
2190 }
2191 sc->sc_selid = NCR_READ_REG(sc, NCR_FIFO);
2192 NCR_MISC(("selid=0x%2x ", sc->sc_selid));
2193
2194 /* Handle identify message */
2195 ncr53c9x_msgin(sc);
2196 if (nfifo != 2) {
2197 /*
2198 * Note: this should not happen
2199 * with `dmaselect' on.
2200 */
2201 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2202 NCRCMD(sc, NCRCMD_FLUSH);
2203 } else if (ncr53c9x_dmaselect &&
2204 sc->sc_rev == NCR_VARIANT_ESP100) {
2205 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2206 }
2207
2208 if (sc->sc_state != NCR_CONNECTED &&
2209 sc->sc_state != NCR_IDENTIFIED) {
2210 /* IDENTIFY fail?! */
2211 printf("%s: identify failed\n",
2212 sc->sc_dev.dv_xname);
2213 ncr53c9x_init(sc, 1);
2214 return (1);
2215 }
2216 goto shortcut; /* ie. next phase expected soon */
2217 }
2218
2219 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2220 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2221 /*
2222 * Arbitration won; examine the `step' register
2223 * to determine how far the selection could progress.
2224 */
2225 ecb = sc->sc_nexus;
2226 if (ecb == NULL)
2227 panic("ncr53c9x: no nexus");
2228
2229 sc_link = ecb->xs->sc_link;
2230 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2231
2232 switch (sc->sc_espstep) {
2233 case 0:
2234 /*
2235 * The target did not respond with a
2236 * message out phase - probably an old
2237 * device that doesn't recognize ATN.
2238 * Clear ATN and just continue, the
2239 * target should be in the command
2240 * phase.
2241 * XXXX check for command phase?
2242 */
2243 NCRCMD(sc, NCRCMD_RSTATN);
2244 break;
2245 case 1:
2246 if ((ti->flags & T_NEGOTIATE) == 0) {
2247 printf("%s: step 1 & !NEG\n",
2248 sc->sc_dev.dv_xname);
2249 goto reset;
2250 }
2251 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2252 printf("%s: !MSGOUT\n",
2253 sc->sc_dev.dv_xname);
2254 goto reset;
2255 }
2256 /* Start negotiating */
2257 ti->period = sc->sc_minsync;
2258 ti->offset = 15;
2259 sc->sc_flags |= NCR_SYNCHNEGO;
2260 if (ecb->tag[0])
2261 ncr53c9x_sched_msgout(SEND_TAG|SEND_SDTR);
2262 else
2263 ncr53c9x_sched_msgout(SEND_SDTR);
2264 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2265 break;
2266 case 3:
2267 /*
2268 * Grr, this is supposed to mean
2269 * "target left command phase prematurely".
2270 * It seems to happen regularly when
2271 * sync mode is on.
2272 * Look at FIFO to see if command went out.
2273 * (Timing problems?)
2274 */
2275 if (ncr53c9x_dmaselect) {
2276 if (sc->sc_cmdlen == 0)
2277 /* Hope for the best.. */
2278 break;
2279 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2280 & NCRFIFO_FF) == 0) {
2281 /* Hope for the best.. */
2282 break;
2283 }
2284 printf("(%s:%d:%d): selection failed;"
2285 " %d left in FIFO "
2286 "[intr %x, stat %x, step %d]\n",
2287 sc->sc_dev.dv_xname,
2288 sc_link->scsipi_scsi.target,
2289 sc_link->scsipi_scsi.lun,
2290 NCR_READ_REG(sc, NCR_FFLAG)
2291 & NCRFIFO_FF,
2292 sc->sc_espintr, sc->sc_espstat,
2293 sc->sc_espstep);
2294 NCRCMD(sc, NCRCMD_FLUSH);
2295 ncr53c9x_sched_msgout(SEND_ABORT);
2296 return (1);
2297 case 2:
2298 /* Select stuck at Command Phase */
2299 NCRCMD(sc, NCRCMD_FLUSH);
2300 break;
2301 case 4:
2302 if (ncr53c9x_dmaselect &&
2303 sc->sc_cmdlen != 0)
2304 printf("(%s:%d:%d): select; "
2305 "%lu left in DMA buffer "
2306 "[intr %x, stat %x, step %d]\n",
2307 sc->sc_dev.dv_xname,
2308 sc_link->scsipi_scsi.target,
2309 sc_link->scsipi_scsi.lun,
2310 (u_long)sc->sc_cmdlen,
2311 sc->sc_espintr,
2312 sc->sc_espstat,
2313 sc->sc_espstep);
2314 /* So far, everything went fine */
2315 break;
2316 }
2317
2318 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2319 /* Do an implicit RESTORE POINTERS. */
2320 sc->sc_dp = ecb->daddr;
2321 sc->sc_dleft = ecb->dleft;
2322 sc->sc_state = NCR_CONNECTED;
2323 break;
2324
2325 } else {
2326
2327 printf("%s: unexpected status after select"
2328 ": [intr %x, stat %x, step %x]\n",
2329 sc->sc_dev.dv_xname,
2330 sc->sc_espintr, sc->sc_espstat,
2331 sc->sc_espstep);
2332 NCRCMD(sc, NCRCMD_FLUSH);
2333 DELAY(1);
2334 goto reset;
2335 }
2336 if (sc->sc_state == NCR_IDLE) {
2337 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2338 return (0);
2339 }
2340 break;
2341
2342 case NCR_CONNECTED:
2343 if ((sc->sc_flags & NCR_ICCS) != 0) {
2344 /* "Initiate Command Complete Steps" in progress */
2345 u_char msg;
2346
2347 sc->sc_flags &= ~NCR_ICCS;
2348
2349 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2350 printf("%s: ICCS: "
2351 ": [intr %x, stat %x, step %x]\n",
2352 sc->sc_dev.dv_xname,
2353 sc->sc_espintr, sc->sc_espstat,
2354 sc->sc_espstep);
2355 }
2356 if ((NCR_READ_REG(sc, NCR_FFLAG)
2357 & NCRFIFO_FF) != 2) {
2358 /* Drop excess bytes from the queue */
2359 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2360 & NCRFIFO_FF) - 2;
2361 while (i-- > 0)
2362 (void) NCR_READ_REG(sc, NCR_FIFO);
2363 }
2364 ecb->stat = NCR_READ_REG(sc, NCR_FIFO);
2365 msg = NCR_READ_REG(sc, NCR_FIFO);
2366 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2367 if (msg == MSG_CMDCOMPLETE) {
2368 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2369 ? 0
2370 : sc->sc_dleft;
2371 if ((ecb->flags & ECB_SENSE) == 0)
2372 ecb->xs->resid = ecb->dleft;
2373 sc->sc_state = NCR_CMDCOMPLETE;
2374 } else
2375 printf("%s: STATUS_PHASE: msg %d\n",
2376 sc->sc_dev.dv_xname, msg);
2377 NCRCMD(sc, NCRCMD_MSGOK);
2378 goto shortcut; /* ie. wait for disconnect */
2379 }
2380 break;
2381
2382 default:
2383 panic("%s: invalid state: %d",
2384 sc->sc_dev.dv_xname,
2385 sc->sc_state);
2386 }
2387
2388 /*
2389 * Driver is now in state NCR_CONNECTED, i.e. we
2390 * have a current command working the SCSI bus.
2391 */
2392 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2393 panic("ncr53c9x: no nexus");
2394 }
2395
2396 switch (sc->sc_phase) {
2397 case MESSAGE_OUT_PHASE:
2398 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2399 ncr53c9x_msgout(sc);
2400 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2401 break;
2402
2403 case MESSAGE_IN_PHASE:
2404 msgin:
2405 NCR_PHASE(("MESSAGE_IN_PHASE "));
2406 sc->sc_prevphase = MESSAGE_IN_PHASE;
2407 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2408 NCRCMD(sc, NCRCMD_FLUSH);
2409 sc->sc_flags |= NCR_WAITI;
2410 NCRCMD(sc, NCRCMD_TRANS);
2411 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2412 if ((sc->sc_flags & NCR_WAITI) == 0) {
2413 printf("%s: MSGIN: unexpected FC bit: "
2414 "[intr %x, stat %x, step %x]\n",
2415 sc->sc_dev.dv_xname,
2416 sc->sc_espintr, sc->sc_espstat,
2417 sc->sc_espstep);
2418 }
2419 sc->sc_flags &= ~NCR_WAITI;
2420 ncr53c9x_msgin(sc);
2421 } else {
2422 printf("%s: MSGIN: weird bits: "
2423 "[intr %x, stat %x, step %x]\n",
2424 sc->sc_dev.dv_xname,
2425 sc->sc_espintr, sc->sc_espstat,
2426 sc->sc_espstep);
2427 }
2428 goto shortcut; /* i.e. expect data to be ready */
2429 break;
2430
2431 case COMMAND_PHASE:
2432 /*
2433 * Send the command block. Normally we don't see this
2434 * phase because the SEL_ATN command takes care of
2435 * all this. However, we end up here if either the
2436 * target or we wanted to exchange some more messages
2437 * first (e.g. to start negotiations).
2438 */
2439
2440 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2441 ecb->cmd.cmd.opcode, ecb->clen));
2442 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2443 NCRCMD(sc, NCRCMD_FLUSH);
2444 DELAY(1);
2445 }
2446 if (ncr53c9x_dmaselect) {
2447 size_t size;
2448 /* setup DMA transfer for command */
2449 size = ecb->clen;
2450 sc->sc_cmdlen = size;
2451 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2452 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2453 0, &size);
2454 /* Program the SCSI counter */
2455 NCR_WRITE_REG(sc, NCR_TCL, size);
2456 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
2457 if (sc->sc_cfg2 & NCRCFG2_FE) {
2458 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
2459 }
2460
2461 /* load the count in */
2462 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2463
2464 /* start the command transfer */
2465 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2466 NCRDMA_GO(sc);
2467 } else {
2468 u_char *cmd = (u_char *)&ecb->cmd.cmd;
2469 int i;
2470 /* Now the command into the FIFO */
2471 for (i = 0; i < ecb->clen; i++)
2472 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
2473 NCRCMD(sc, NCRCMD_TRANS);
2474 }
2475 sc->sc_prevphase = COMMAND_PHASE;
2476 break;
2477
2478 case DATA_OUT_PHASE:
2479 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2480 NCRCMD(sc, NCRCMD_FLUSH);
2481 size = min(sc->sc_dleft, sc->sc_maxxfer);
2482 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2483 0, &size);
2484 sc->sc_prevphase = DATA_OUT_PHASE;
2485 goto setup_xfer;
2486
2487 case DATA_IN_PHASE:
2488 NCR_PHASE(("DATA_IN_PHASE "));
2489 if (sc->sc_rev == NCR_VARIANT_ESP100)
2490 NCRCMD(sc, NCRCMD_FLUSH);
2491 size = min(sc->sc_dleft, sc->sc_maxxfer);
2492 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2493 1, &size);
2494 sc->sc_prevphase = DATA_IN_PHASE;
2495 setup_xfer:
2496 /* Target returned to data phase: wipe "done" memory */
2497 ecb->flags &= ~ECB_TENTATIVE_DONE;
2498
2499 /* Program the SCSI counter */
2500 NCR_WRITE_REG(sc, NCR_TCL, size);
2501 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
2502 if ((sc->sc_cfg2 & NCRCFG2_FE) != 0) {
2503 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
2504 }
2505 /* load the count in */
2506 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2507
2508 /*
2509 * Note that if `size' is 0, we've already transceived
2510 * all the bytes we want but we're still in DATA PHASE.
2511 * Apparently, the device needs padding. Also, a
2512 * transfer size of 0 means "maximum" to the chip
2513 * DMA logic.
2514 */
2515 NCRCMD(sc,
2516 (size==0?NCRCMD_TRPAD:NCRCMD_TRANS)|NCRCMD_DMA);
2517 NCRDMA_GO(sc);
2518 return (1);
2519
2520 case STATUS_PHASE:
2521 NCR_PHASE(("STATUS_PHASE "));
2522 sc->sc_flags |= NCR_ICCS;
2523 NCRCMD(sc, NCRCMD_ICCS);
2524 sc->sc_prevphase = STATUS_PHASE;
2525 goto shortcut; /* i.e. expect status results soon */
2526 break;
2527
2528 case INVALID_PHASE:
2529 break;
2530
2531 default:
2532 printf("%s: unexpected bus phase; resetting\n",
2533 sc->sc_dev.dv_xname);
2534 goto reset;
2535 }
2536
2537 out:
2538 return (1);
2539
2540 reset:
2541 ncr53c9x_init(sc, 1);
2542 goto out;
2543
2544 finish:
2545 ncr53c9x_done(sc, ecb);
2546 goto out;
2547
2548 sched:
2549 sc->sc_state = NCR_IDLE;
2550 ncr53c9x_sched(sc);
2551 goto out;
2552
2553 shortcut:
2554 /*
2555 * The idea is that many of the SCSI operations take very little
2556 * time, and going away and getting interrupted is too high an
2557 * overhead to pay. For example, selecting, sending a message
2558 * and command and then doing some work can be done in one "pass".
2559 *
2560 * The delay is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1
2561 * at 40Mhz. This needs testing.
2562 */
2563 DELAY(50/sc->sc_freq);
2564 if (NCRDMA_ISINTR(sc))
2565 goto again;
2566 goto out;
2567 }
2568
2569 void
2570 ncr53c9x_abort(sc, ecb)
2571 struct ncr53c9x_softc *sc;
2572 struct ncr53c9x_ecb *ecb;
2573 {
2574
2575 /* 2 secs for the abort */
2576 ecb->timeout = NCR_ABORT_TIMEOUT;
2577 ecb->flags |= ECB_ABORT;
2578
2579 if (ecb == sc->sc_nexus) {
2580 int timeout;
2581
2582 /*
2583 * If we're still selecting, the message will be scheduled
2584 * after selection is complete.
2585 */
2586 if (sc->sc_state == NCR_CONNECTED)
2587 ncr53c9x_sched_msgout(SEND_ABORT);
2588
2589 /*
2590 * Reschedule timeout.
2591 */
2592 timeout = ecb->timeout;
2593 if (hz > 100 && timeout > 1000)
2594 timeout = (timeout / 1000) * hz;
2595 else
2596 timeout = (timeout * hz) / 1000;
2597 callout_reset(&ecb->xs->xs_callout, timeout,
2598 ncr53c9x_timeout, ecb);
2599 } else {
2600 /*
2601 * Just leave the command where it is.
2602 * XXX - what choice do we have but to reset the SCSI
2603 * eventually?
2604 */
2605 if (sc->sc_state == NCR_IDLE)
2606 ncr53c9x_sched(sc);
2607 }
2608 }
2609
2610 void
2611 ncr53c9x_timeout(arg)
2612 void *arg;
2613 {
2614 struct ncr53c9x_ecb *ecb = arg;
2615 struct scsipi_xfer *xs = ecb->xs;
2616 struct scsipi_link *sc_link = xs->sc_link;
2617 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
2618 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2619 int s;
2620
2621 scsi_print_addr(sc_link);
2622 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2623 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2624 "msg(q %x,o %x) %s>",
2625 sc->sc_dev.dv_xname,
2626 ecb, ecb->flags, ecb->dleft, ecb->stat,
2627 sc->sc_state, sc->sc_nexus,
2628 NCR_READ_REG(sc, NCR_STAT),
2629 sc->sc_phase, sc->sc_prevphase,
2630 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2631 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2632 #if NCR53C9X_DEBUG > 1
2633 printf("TRACE: %s.", ecb->trace);
2634 #endif
2635
2636 s = splbio();
2637
2638 if (ecb->flags & ECB_ABORT) {
2639 /* abort timed out */
2640 printf(" AGAIN\n");
2641
2642 ncr53c9x_init(sc, 1);
2643 } else {
2644 /* abort the operation that has timed out */
2645 printf("\n");
2646 xs->error = XS_TIMEOUT;
2647 ncr53c9x_abort(sc, ecb);
2648
2649 /* Disable sync mode if stuck in a data phase */
2650 if (ecb == sc->sc_nexus &&
2651 (ti->flags & T_SYNCMODE) != 0 &&
2652 (sc->sc_phase & (MSGI|CDI)) == 0) {
2653 scsi_print_addr(sc_link);
2654 printf("sync negotiation disabled\n");
2655 sc->sc_cfflags |= (1<<(sc_link->scsipi_scsi.target+8));
2656 }
2657 }
2658
2659 splx(s);
2660 }
2661
2662 void
2663 ncr53c9x_watch(arg)
2664 void *arg;
2665 {
2666 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2667 struct ncr53c9x_tinfo *ti;
2668 struct ncr53c9x_linfo *li;
2669 int t, s;
2670 /* Delete any structures that have not been used in 10min. */
2671 time_t old = time.tv_sec - (10*60);
2672
2673 s = splbio();
2674 for (t=0; t<NCR_NTARG; t++) {
2675 ti = &sc->sc_tinfo[t];
2676 li = LIST_FIRST(&ti->luns);
2677 while (li) {
2678 if (li->last_used < old && li->untagged == NULL &&
2679 li->used == 0) {
2680 if (li->lun < NCR_NLUN)
2681 ti->lun[li->lun] = NULL;
2682 LIST_REMOVE(li, link);
2683 free(li, M_DEVBUF);
2684 /* Restart the search at the beginning */
2685 li = LIST_FIRST(&ti->luns);
2686 continue;
2687 }
2688 li = LIST_NEXT(li, link);
2689 }
2690 }
2691 splx(s);
2692 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
2693 }
2694