ncr53c9x.c revision 1.62 1 /* $NetBSD: ncr53c9x.c,v 1.62 2000/12/04 11:18:49 fvdl Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/proc.h>
90 #include <sys/queue.h>
91 #include <sys/pool.h>
92 #include <sys/scsiio.h>
93
94 #include <dev/scsipi/scsi_all.h>
95 #include <dev/scsipi/scsipi_all.h>
96 #include <dev/scsipi/scsiconf.h>
97 #include <dev/scsipi/scsi_message.h>
98
99 #include <dev/ic/ncr53c9xreg.h>
100 #include <dev/ic/ncr53c9xvar.h>
101
102 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
103 #ifdef DEBUG
104 int ncr53c9x_notag = 0;
105 #endif
106
107 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
108 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
109 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
110 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
111 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
112 struct scsipi_xfer *, int);
113 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
114 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
115 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
117 /*static*/ void ncr53c9x_timeout(void *arg);
118 /*static*/ void ncr53c9x_watch(void *arg);
119 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
120 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
121 /*static*/ int ncr53c9x_ioctl(struct scsipi_link *, u_long,
122 caddr_t, int, struct proc *);
123
124 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
125 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *, int);
126 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
127
128 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
129 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
130 struct ncr53c9x_tinfo *);
131 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
132 int64_t lun);
133
134 static int ecb_pool_initialized = 0;
135 static struct pool ecb_pool;
136
137 /*
138 * Names for the NCR53c9x variants, correspnding to the variant tags
139 * in ncr53c9xvar.h.
140 */
141 static const char *ncr53c9x_variant_names[] = {
142 "ESP100",
143 "ESP100A",
144 "ESP200",
145 "NCR53C94",
146 "NCR53C96",
147 "ESP406",
148 "FAS408",
149 "FAS216",
150 "AM53C974",
151 };
152
153 static struct scsipi_adapter ncr53c9x_adapter = {
154 0, /* adapter refcnt */
155 ncr53c9x_scsi_cmd, /* cmd */
156 minphys, /* minphys */
157 ncr53c9x_ioctl, /* ioctl */
158 NULL, /* enable */
159 NULL, /* getgeom */
160 };
161
162 static struct scsipi_device ncr53c9x_device = {
163 NULL, /* use default error handler */
164 NULL, /* have a queue, served by this */
165 NULL, /* have no async handler */
166 NULL, /* use default 'done' routine */
167 };
168
169 /*
170 * Search linked list for LUN info by LUN id.
171 */
172 static struct ncr53c9x_linfo *
173 ncr53c9x_lunsearch(ti, lun)
174 struct ncr53c9x_tinfo *ti;
175 int64_t lun;
176 {
177 struct ncr53c9x_linfo *li;
178 LIST_FOREACH(li, &ti->luns, link)
179 if (li->lun == lun)
180 return (li);
181 return (NULL);
182 }
183
184 /*
185 * Attach this instance, and then all the sub-devices
186 */
187 void
188 ncr53c9x_attach(sc, adapter, device)
189 struct ncr53c9x_softc *sc;
190 struct scsipi_adapter *adapter;
191 struct scsipi_device *device;
192 {
193
194 callout_init(&sc->sc_watchdog);
195 /*
196 * Allocate SCSI message buffers.
197 * Front-ends can override allocation to avoid alignment
198 * handling in the DMA engines. Note that that ncr53c9x_msgout()
199 * can request a 1 byte DMA transfer.
200 */
201 if (sc->sc_omess == NULL)
202 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
203
204 if (sc->sc_imess == NULL)
205 sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT);
206
207 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
208 printf("out of memory\n");
209 return;
210 }
211
212 /*
213 * Note, the front-end has set us up to print the chip variation.
214 */
215 if (sc->sc_rev >= NCR_VARIANT_MAX) {
216 printf("\n%s: unknown variant %d, devices not attached\n",
217 sc->sc_dev.dv_xname, sc->sc_rev);
218 return;
219 }
220
221 printf(": %s, %dMHz, SCSI ID %d\n",
222 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
223
224 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
225
226 /* The value *must not* be == 1. Make it 2 */
227 if (sc->sc_ccf == 1)
228 sc->sc_ccf = 2;
229
230 /*
231 * The recommended timeout is 250ms. This register is loaded
232 * with a value calculated as follows, from the docs:
233 *
234 * (timout period) x (CLK frequency)
235 * reg = -------------------------------------
236 * 8192 x (Clock Conversion Factor)
237 *
238 * Since CCF has a linear relation to CLK, this generally computes
239 * to the constant of 153.
240 */
241 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
242
243 /* CCF register only has 3 bits; 0 is actually 8 */
244 sc->sc_ccf &= 7;
245
246 /*
247 * fill in the prototype scsipi_link.
248 */
249 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
250 sc->sc_link.adapter_softc = sc;
251 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_id;
252 sc->sc_link.adapter = (adapter) ? adapter : &ncr53c9x_adapter;
253 sc->sc_link.device = (device) ? device : &ncr53c9x_device;
254 sc->sc_link.openings = 32;
255 sc->sc_link.scsipi_scsi.max_target = 7;
256 sc->sc_link.scsipi_scsi.max_lun = 7;
257 sc->sc_link.type = BUS_SCSI;
258
259 /*
260 * Add reference to adapter so that we drop the reference after
261 * config_found() to make sure the adatper is disabled.
262 */
263 if (scsipi_adapter_addref(&sc->sc_link) != 0) {
264 printf("%s: unable to enable controller\n",
265 sc->sc_dev.dv_xname);
266 return;
267 }
268
269 /* Reset state & bus */
270 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
271 sc->sc_state = 0;
272 ncr53c9x_init(sc, 1);
273
274 /*
275 * Now try to attach all the sub-devices
276 */
277 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
278
279 scsipi_adapter_delref(&sc->sc_link);
280 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
281 }
282
283 int
284 ncr53c9x_detach(sc, flags)
285 struct ncr53c9x_softc *sc;
286 int flags;
287 {
288 int error;
289
290 if (sc->sc_child) {
291 error = config_detach(sc->sc_child, flags);
292 if (error)
293 return (error);
294 }
295
296 free(sc->sc_imess, M_DEVBUF);
297 free(sc->sc_omess, M_DEVBUF);
298
299 return (0);
300 }
301
302 /*
303 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
304 * only this controller, but kills any on-going commands, and also stops
305 * and resets the DMA.
306 *
307 * After reset, registers are loaded with the defaults from the attach
308 * routine above.
309 */
310 void
311 ncr53c9x_reset(sc)
312 struct ncr53c9x_softc *sc;
313 {
314
315 /* reset DMA first */
316 NCRDMA_RESET(sc);
317
318 /* reset SCSI chip */
319 NCRCMD(sc, NCRCMD_RSTCHIP);
320 NCRCMD(sc, NCRCMD_NOP);
321 DELAY(500);
322
323 /* do these backwards, and fall through */
324 switch (sc->sc_rev) {
325 case NCR_VARIANT_ESP406:
326 case NCR_VARIANT_FAS408:
327 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
328 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
329 case NCR_VARIANT_AM53C974:
330 case NCR_VARIANT_FAS216:
331 case NCR_VARIANT_NCR53C94:
332 case NCR_VARIANT_NCR53C96:
333 case NCR_VARIANT_ESP200:
334 sc->sc_features |= NCR_F_HASCFG3;
335 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
336 case NCR_VARIANT_ESP100A:
337 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
338 case NCR_VARIANT_ESP100:
339 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
340 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
341 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
342 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
343 break;
344 default:
345 printf("%s: unknown revision code, assuming ESP100\n",
346 sc->sc_dev.dv_xname);
347 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
348 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
349 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
350 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
351 }
352
353 if (sc->sc_rev == NCR_VARIANT_AM53C974)
354 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
355 }
356
357 /*
358 * Reset the SCSI bus, but not the chip
359 */
360 void
361 ncr53c9x_scsi_reset(sc)
362 struct ncr53c9x_softc *sc;
363 {
364
365 (*sc->sc_glue->gl_dma_stop)(sc);
366
367 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
368 NCRCMD(sc, NCRCMD_RSTSCSI);
369 }
370
371 /*
372 * Initialize ncr53c9x state machine
373 */
374 void
375 ncr53c9x_init(sc, doreset)
376 struct ncr53c9x_softc *sc;
377 int doreset;
378 {
379 struct ncr53c9x_ecb *ecb;
380 struct ncr53c9x_linfo *li;
381 int i, r;
382
383 NCR_TRACE(("[NCR_INIT(%d)] ", doreset));
384
385 if (!ecb_pool_initialized) {
386 /* All instances share this pool */
387 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
388 "ncr53c9x_ecb", 0, NULL, NULL, 0);
389 ecb_pool_initialized = 1;
390 }
391
392 if (sc->sc_state == 0) {
393 /* First time through; initialize. */
394
395 TAILQ_INIT(&sc->ready_list);
396 sc->sc_nexus = NULL;
397 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
398 for (r = 0; r < NCR_NTARG; r++) {
399 LIST_INIT(&sc->sc_tinfo[r].luns);
400 }
401 } else {
402 /* Cancel any active commands. */
403 sc->sc_state = NCR_CLEANING;
404 sc->sc_msgify = 0;
405 if ((ecb = sc->sc_nexus) != NULL) {
406 ecb->xs->error = XS_TIMEOUT;
407 ncr53c9x_done(sc, ecb);
408 }
409 /* Cancel outstanding disconnected commands on each LUN */
410 for (r = 0; r < 8; r++) {
411 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
412 if ((ecb = li->untagged) != NULL) {
413 li->untagged = NULL;
414 /*
415 * XXXXXXX
416 *
417 * Should we terminate a command
418 * that never reached the disk?
419 */
420 li->busy = 0;
421 ecb->xs->error = XS_TIMEOUT;
422 ncr53c9x_done(sc, ecb);
423 }
424 for (i = 0; i < 256; i++)
425 if ((ecb = li->queued[i])) {
426 li->queued[i] = NULL;
427 ecb->xs->error = XS_TIMEOUT;
428 ncr53c9x_done(sc, ecb);
429 }
430 li->used = 0;
431 }
432 }
433 }
434
435 /*
436 * reset the chip to a known state
437 */
438 ncr53c9x_reset(sc);
439
440 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
441 for (r = 0; r < 8; r++) {
442 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
443 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
444
445 ti->flags = ((sc->sc_cfflags & (1<<(r+16))) ? T_TAGOFF : 0) |
446 ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
447 ? T_SYNCHOFF : 0) |
448 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
449 T_NEED_TO_RESET;
450 #ifdef DEBUG
451 if (ncr53c9x_notag)
452 ti->flags |= T_TAGOFF;
453 #endif
454 ti->period = sc->sc_minsync;
455 ti->offset = 0;
456 }
457
458 if (doreset) {
459 sc->sc_state = NCR_SBR;
460 NCRCMD(sc, NCRCMD_RSTSCSI);
461 } else {
462 sc->sc_state = NCR_IDLE;
463 ncr53c9x_sched(sc);
464 }
465 }
466
467 /*
468 * Read the NCR registers, and save their contents for later use.
469 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
470 * NCR_INTR - so make sure it is the last read.
471 *
472 * I think that (from reading the docs) most bits in these registers
473 * only make sense when he DMA CSR has an interrupt showing. Call only
474 * if an interrupt is pending.
475 */
476 __inline__ void
477 ncr53c9x_readregs(sc)
478 struct ncr53c9x_softc *sc;
479 {
480
481 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
482 /* Only the stepo bits are of interest */
483 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
484 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
485
486 if (sc->sc_glue->gl_clear_latched_intr != NULL)
487 (*sc->sc_glue->gl_clear_latched_intr)(sc);
488
489 /*
490 * Determine the SCSI bus phase, return either a real SCSI bus phase
491 * or some pseudo phase we use to detect certain exceptions.
492 */
493
494 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS)
495 ? /* Disconnected */ BUSFREE_PHASE
496 : sc->sc_espstat & NCRSTAT_PHASE;
497
498 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ",
499 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep));
500 }
501
502 /*
503 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
504 */
505 static inline int
506 ncr53c9x_stp2cpb(sc, period)
507 struct ncr53c9x_softc *sc;
508 int period;
509 {
510 int v;
511 v = (sc->sc_freq * period) / 250;
512 if (ncr53c9x_cpb2stp(sc, v) < period)
513 /* Correct round-down error */
514 v++;
515 return (v);
516 }
517
518 static inline void
519 ncr53c9x_setsync(sc, ti)
520 struct ncr53c9x_softc *sc;
521 struct ncr53c9x_tinfo *ti;
522 {
523 u_char syncoff, synctp, cfg3 = sc->sc_cfg3;
524
525 if (ti->flags & T_SYNCMODE) {
526 syncoff = ti->offset;
527 synctp = ncr53c9x_stp2cpb(sc, ti->period);
528 if (sc->sc_features & NCR_F_FASTSCSI) {
529 /*
530 * If the period is 200ns or less (ti->period <= 50),
531 * put the chip in Fast SCSI mode.
532 */
533 if (ti->period <= 50)
534 /*
535 * There are (at least) 4 variations of the
536 * configuration 3 register. The drive attach
537 * routine sets the appropriate bit to put the
538 * chip into Fast SCSI mode so that it doesn't
539 * have to be figured out here each time.
540 */
541 cfg3 |= sc->sc_cfg3_fscsi;
542 }
543
544 /*
545 * Am53c974 requires different SYNCTP values when the
546 * FSCSI bit is off.
547 */
548 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
549 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
550 synctp--;
551 } else {
552 syncoff = 0;
553 synctp = 0;
554 }
555
556 if (sc->sc_features & NCR_F_HASCFG3)
557 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
558
559 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
560 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
561 }
562
563 int ncr53c9x_dmaselect = 0;
564 /*
565 * Send a command to a target, set the driver state to NCR_SELECTING
566 * and let the caller take care of the rest.
567 *
568 * Keeping this as a function allows me to say that this may be done
569 * by DMA instead of programmed I/O soon.
570 */
571 void
572 ncr53c9x_select(sc, ecb)
573 struct ncr53c9x_softc *sc;
574 struct ncr53c9x_ecb *ecb;
575 {
576 struct scsipi_link *sc_link = ecb->xs->sc_link;
577 int target = sc_link->scsipi_scsi.target;
578 int lun = sc_link->scsipi_scsi.lun;
579 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
580 int tiflags = ti->flags;
581 u_char *cmd;
582 int clen;
583 size_t dmasize;
584
585 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
586 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
587
588 sc->sc_state = NCR_SELECTING;
589 /*
590 * Schedule the timeout now, the first time we will go away
591 * expecting to come back due to an interrupt, because it is
592 * always possible that the interrupt may never happen.
593 */
594 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
595 int timeout = ecb->timeout;
596
597 if (hz > 100 && timeout > 1000)
598 timeout = (timeout / 1000) * hz;
599 else
600 timeout = (timeout * hz) / 1000;
601
602 callout_reset(&ecb->xs->xs_callout, timeout,
603 ncr53c9x_timeout, ecb);
604 }
605
606 /*
607 * The docs say the target register is never reset, and I
608 * can't think of a better place to set it
609 */
610 NCR_WRITE_REG(sc, NCR_SELID, target);
611 ncr53c9x_setsync(sc, ti);
612
613 if ((ecb->flags & ECB_SENSE) != 0) {
614 /*
615 * For REQUEST SENSE, we should not send an IDENTIFY or
616 * otherwise mangle the target. There should be no MESSAGE IN
617 * phase.
618 */
619 if (ncr53c9x_dmaselect) {
620 /* setup DMA transfer for command */
621 dmasize = clen = ecb->clen;
622 sc->sc_cmdlen = clen;
623 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
624 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
625 &dmasize);
626
627 /* Program the SCSI counter */
628 NCR_WRITE_REG(sc, NCR_TCL, dmasize);
629 NCR_WRITE_REG(sc, NCR_TCM, dmasize >> 8);
630 if (sc->sc_cfg2 & NCRCFG2_FE) {
631 NCR_WRITE_REG(sc, NCR_TCH, dmasize >> 16);
632 }
633
634 /* load the count in */
635 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
636
637 /* And get the targets attention */
638 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
639 NCRDMA_GO(sc);
640 } else {
641 /* Now get the command into the FIFO */
642 cmd = (u_char *)&ecb->cmd.cmd;
643 clen = ecb->clen;
644 while (clen--)
645 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
646
647 NCRCMD(sc, NCRCMD_SELNATN);
648 }
649 return;
650 }
651
652 if (ecb->tag[0]) {
653 /* We'll use tags */
654 ecb->cmd.msg[0] = MSG_IDENTIFY(lun, 1);
655 ecb->cmd.msg[1] = ecb->tag[0];
656 ecb->cmd.msg[2] = ecb->tag[1];
657 cmd = (u_char *)&ecb->cmd.msg[0];
658 clen = ecb->clen + 3;
659 } else {
660 ecb->cmd.msg[2] =
661 MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF)?0:1);
662 cmd = (u_char *)&ecb->cmd.msg[2];
663 clen = ecb->clen + 1;
664 }
665
666 if (ncr53c9x_dmaselect && (tiflags & T_NEGOTIATE) == 0) {
667
668 /* setup DMA transfer for command */
669 dmasize = clen;
670 sc->sc_cmdlen = clen;
671 sc->sc_cmdp = cmd;
672 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
673
674 /* Program the SCSI counter */
675 NCR_WRITE_REG(sc, NCR_TCL, dmasize);
676 NCR_WRITE_REG(sc, NCR_TCM, dmasize >> 8);
677 if (sc->sc_cfg2 & NCRCFG2_FE) {
678 NCR_WRITE_REG(sc, NCR_TCH, dmasize >> 16);
679 }
680
681 /* load the count in */
682 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
683
684 /* And get the targets attention */
685 if (ecb->tag[0])
686 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
687 else
688 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
689 NCRDMA_GO(sc);
690 return;
691 }
692
693 /*
694 * Who am I. This is where we tell the target that we are
695 * happy for it to disconnect etc.
696 */
697 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
698 clen --;
699
700 if (ti->flags & T_NEGOTIATE) {
701 /* Arbitrate, select and stop after IDENTIFY message */
702 NCRCMD(sc, NCRCMD_SELATNS);
703 return;
704 }
705
706 /* If we want to send a tag, get it into the fifo */
707 if (ecb->tag[0]) {
708 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
709 clen --;
710 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
711 clen --;
712 }
713
714 /* Now get the command into the FIFO */
715 while (clen--)
716 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
717
718 /* And get the targets attention */
719 if (ecb->tag[0])
720 NCRCMD(sc, NCRCMD_SELATN3);
721 else
722 NCRCMD(sc, NCRCMD_SELATN);
723 }
724
725 void
726 ncr53c9x_free_ecb(sc, ecb, flags)
727 struct ncr53c9x_softc *sc;
728 struct ncr53c9x_ecb *ecb;
729 int flags;
730 {
731 int s;
732
733 s = splbio();
734 ecb->flags = 0;
735 pool_put(&ecb_pool, (void *)ecb);
736 splx(s);
737 return;
738 }
739
740 struct ncr53c9x_ecb *
741 ncr53c9x_get_ecb(sc, flags)
742 struct ncr53c9x_softc *sc;
743 int flags;
744 {
745 struct ncr53c9x_ecb *ecb;
746 int s, wait = 0;
747
748 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
749 wait = PR_WAITOK;
750
751 s = splbio();
752 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, wait);
753 splx(s);
754 bzero(ecb, sizeof(*ecb));
755 if (ecb)
756 ecb->flags |= ECB_ALLOC;
757 return (ecb);
758 }
759
760 /*
761 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
762 */
763
764 /*
765 * Start a SCSI-command
766 * This function is called by the higher level SCSI-driver to queue/run
767 * SCSI-commands.
768 */
769 int
770 ncr53c9x_scsi_cmd(xs)
771 struct scsipi_xfer *xs;
772 {
773 struct scsipi_link *sc_link = xs->sc_link;
774 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
775 struct ncr53c9x_ecb *ecb;
776 struct ncr53c9x_tinfo *ti;
777 struct ncr53c9x_linfo *li;
778 int64_t lun = sc_link->scsipi_scsi.lun;
779 int s, flags;
780
781 NCR_TRACE(("[ncr53c9x_scsi_cmd] "));
782 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
783 sc_link->scsipi_scsi.target));
784
785 /*
786 * Find the LUN info structure and allocate one if it does
787 * not exist.
788 */
789 flags = xs->xs_control;
790 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
791 li = TINFO_LUN(ti, lun);
792 if (li == NULL) {
793 int wait = M_NOWAIT;
794
795 /* Initialize LUN info and add to list. */
796 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
797 wait = M_WAITOK;
798 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
799 return (TRY_AGAIN_LATER);
800 }
801 bzero(li, sizeof(*li));
802 li->last_used = time.tv_sec;
803 li->lun = lun;
804 s = splbio();
805 LIST_INSERT_HEAD(&ti->luns, li, link);
806 if (lun < NCR_NLUN)
807 ti->lun[lun] = li;
808 splx(s);
809 }
810
811 if ((ecb = ncr53c9x_get_ecb(sc, flags)) == NULL)
812 return (TRY_AGAIN_LATER);
813
814 /* Initialize ecb */
815 ecb->xs = xs;
816 ecb->timeout = xs->timeout;
817
818 if (flags & XS_CTL_RESET) {
819 ecb->flags |= ECB_RESET;
820 ecb->clen = 0;
821 ecb->dleft = 0;
822 } else {
823 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
824 ecb->clen = xs->cmdlen;
825 ecb->daddr = xs->data;
826 ecb->dleft = xs->datalen;
827 }
828 ecb->stat = 0;
829
830 s = splbio();
831
832 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
833 ecb->flags |= ECB_READY;
834 if (sc->sc_state == NCR_IDLE)
835 ncr53c9x_sched(sc);
836
837 splx(s);
838
839 if ((flags & XS_CTL_POLL) == 0)
840 return (SUCCESSFULLY_QUEUED);
841
842 /* Not allowed to use interrupts, use polling instead */
843 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
844 ncr53c9x_timeout(ecb);
845 if (ncr53c9x_poll(sc, xs, ecb->timeout))
846 ncr53c9x_timeout(ecb);
847 }
848 return (COMPLETE);
849 }
850
851 /*
852 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
853 */
854 int
855 ncr53c9x_poll(sc, xs, count)
856 struct ncr53c9x_softc *sc;
857 struct scsipi_xfer *xs;
858 int count;
859 {
860
861 NCR_TRACE(("[ncr53c9x_poll] "));
862 while (count) {
863 if (NCRDMA_ISINTR(sc)) {
864 ncr53c9x_intr(sc);
865 }
866 #if alternatively
867 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
868 ncr53c9x_intr(sc);
869 #endif
870 if ((xs->xs_status & XS_STS_DONE) != 0)
871 return (0);
872 if (sc->sc_state == NCR_IDLE) {
873 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
874 ncr53c9x_sched(sc);
875 }
876 DELAY(1000);
877 count--;
878 }
879 return (1);
880 }
881
882 int
883 ncr53c9x_ioctl(link, cmd, arg, flag, p)
884 struct scsipi_link *link;
885 u_long cmd;
886 caddr_t arg;
887 int flag;
888 struct proc *p;
889 {
890 struct ncr53c9x_softc *sc = link->adapter_softc;
891 int s, error = 0;
892
893 s = splbio();
894
895 switch (cmd) {
896 case SCBUSACCEL: {
897 struct scbusaccel_args *sp = (struct scbusaccel_args *)arg;
898 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sp->sa_target];
899
900 if (sp->sa_lun != 0)
901 break;
902
903 if ((sp->sa_flags & SC_ACCEL_SYNC) != 0) {
904 /* If this adapter can't do sync; drop it */
905 if (sc->sc_minsync == 0)
906 break;
907
908 /*
909 * Check whether target is already clamped at
910 * non-sync operation on user request.
911 */
912 if ((ti->flags & T_SYNCHOFF) != 0)
913 break;
914
915 printf("%s: target %d: sync negotiation\n",
916 sc->sc_dev.dv_xname, sp->sa_target);
917 ti->flags |= T_NEGOTIATE;
918 }
919 break;
920 }
921 default:
922 error = ENOTTY;
923 break;
924 }
925 splx(s);
926 return (error);
927 }
928
929
930 /*
931 * LOW LEVEL SCSI UTILITIES
932 */
933
934 /*
935 * Schedule a scsi operation. This has now been pulled out of the interrupt
936 * handler so that we may call it from ncr53c9x_scsi_cmd and ncr53c9x_done.
937 * This may save us an unecessary interrupt just to get things going.
938 * Should only be called when state == NCR_IDLE and at bio pl.
939 */
940 void
941 ncr53c9x_sched(sc)
942 struct ncr53c9x_softc *sc;
943 {
944 struct ncr53c9x_ecb *ecb;
945 struct scsipi_link *sc_link;
946 struct ncr53c9x_tinfo *ti;
947 int lun;
948 struct ncr53c9x_linfo *li;
949 int s, tag;
950
951 NCR_TRACE(("[ncr53c9x_sched] "));
952 if (sc->sc_state != NCR_IDLE)
953 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
954
955 /*
956 * Find first ecb in ready queue that is for a target/lunit
957 * combinations that is not busy.
958 */
959 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
960 ecb = TAILQ_NEXT(ecb, chain)) {
961 sc_link = ecb->xs->sc_link;
962 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
963 lun = sc_link->scsipi_scsi.lun;
964
965 /* Select type of tag for this command */
966 if ((ti->flags & (T_RSELECTOFF|T_TAGOFF)) != 0)
967 tag = 0;
968 else if ((ecb->flags & ECB_SENSE) != 0)
969 tag = 0;
970 else if (ecb->xs->xs_control & XS_CTL_URGENT)
971 tag = MSG_HEAD_OF_Q_TAG;
972 else
973 tag = MSG_SIMPLE_Q_TAG;
974 #if 0
975 /* XXXX Use tags for polled commands? */
976 if (ecb->xs->xs_control & XS_CTL_POLL)
977 tag = 0;
978 #endif
979
980 s = splbio();
981 li = TINFO_LUN(ti, lun);
982 if (li == NULL) {
983 int wait = M_NOWAIT;
984 int flags = ecb->xs->xs_control;
985
986 /* Initialize LUN info and add to list. */
987 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
988 wait = M_WAITOK;
989 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
990 splx(s);
991 continue;
992 }
993 bzero(li, sizeof(*li));
994 li->lun = lun;
995
996 LIST_INSERT_HEAD(&ti->luns, li, link);
997 if (lun < NCR_NLUN)
998 ti->lun[lun] = li;
999 }
1000 li->last_used = time.tv_sec;
1001 if (tag == 0) {
1002 /* Try to issue this as an un-tagged command */
1003 if (li->untagged == NULL)
1004 li->untagged = ecb;
1005 }
1006 if (li->untagged != NULL) {
1007 tag = 0;
1008 if ((li->busy != 1) && li->used == 0) {
1009 /* We need to issue this untagged command now */
1010 ecb = li->untagged;
1011 sc_link = ecb->xs->sc_link;
1012 }
1013 else {
1014 /* Not ready yet */
1015 splx(s);
1016 continue;
1017 }
1018 }
1019 ecb->tag[0] = tag;
1020 if (tag != 0) {
1021 int i;
1022
1023 /* Allocate a tag */
1024 if (li->used == 255) {
1025 /* no free tags */
1026 splx(s);
1027 continue;
1028 }
1029 /* Start from the last used location */
1030 for (i = li->avail; i < 256; i++) {
1031 if (li->queued[i] == NULL)
1032 break;
1033 }
1034 /* Couldn't find one, start again from the beginning */
1035 if (i == 256) {
1036 for (i = 0; i < 256; i++) {
1037 if (li->queued[i] == NULL)
1038 break;
1039 }
1040 }
1041 #ifdef DIAGNOSTIC
1042 /* There's supposed to be at least 1 tag avail */
1043 if (i == 256)
1044 panic("ncr53c9x_sched: tag alloc failure\n");
1045 #endif
1046
1047 /* Save where to start next time. */
1048 li->avail = i+1;
1049 li->used ++;
1050
1051 li->queued[i] = ecb;
1052 ecb->tag[1] = i;
1053 }
1054 splx(s);
1055 if (li->untagged != NULL && (li->busy != 1)) {
1056 li->busy = 1;
1057 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1058 ecb->flags &= ~ECB_READY;
1059 sc->sc_nexus = ecb;
1060 ncr53c9x_select(sc, ecb);
1061 break;
1062 }
1063 if (li->untagged == NULL && tag != 0) {
1064 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1065 ecb->flags &= ~ECB_READY;
1066 sc->sc_nexus = ecb;
1067 ncr53c9x_select(sc, ecb);
1068 break;
1069 } else
1070 NCR_MISC(("%d:%d busy\n",
1071 sc_link->scsipi_scsi.target,
1072 sc_link->scsipi_scsi.lun));
1073 }
1074 }
1075
1076 void
1077 ncr53c9x_sense(sc, ecb)
1078 struct ncr53c9x_softc *sc;
1079 struct ncr53c9x_ecb *ecb;
1080 {
1081 struct scsipi_xfer *xs = ecb->xs;
1082 struct scsipi_link *sc_link = xs->sc_link;
1083 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1084 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1085 struct ncr53c9x_linfo *li;
1086 int lun = sc_link->scsipi_scsi.lun;
1087
1088 NCR_MISC(("requesting sense "));
1089 /* Next, setup a request sense command block */
1090 bzero(ss, sizeof(*ss));
1091 ss->opcode = REQUEST_SENSE;
1092 ss->byte2 = sc_link->scsipi_scsi.lun << 5;
1093 ss->length = sizeof(struct scsipi_sense_data);
1094 ecb->clen = sizeof(*ss);
1095 ecb->daddr = (char *)&xs->sense.scsi_sense;
1096 ecb->dleft = sizeof(struct scsipi_sense_data);
1097 ecb->flags |= ECB_SENSE;
1098 ecb->timeout = NCR_SENSE_TIMEOUT;
1099 ti->senses++;
1100 li = TINFO_LUN(ti, lun);
1101 if (li->busy) li->busy = 0;
1102 ncr53c9x_dequeue(sc, ecb);
1103 li->untagged = ecb; /* must be executed first to fix C/A */
1104 li->busy = 2;
1105 if (ecb == sc->sc_nexus) {
1106 ncr53c9x_select(sc, ecb);
1107 } else {
1108 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1109 ecb->flags |= ECB_READY;
1110 if (sc->sc_state == NCR_IDLE)
1111 ncr53c9x_sched(sc);
1112 }
1113 }
1114
1115 /*
1116 * POST PROCESSING OF SCSI_CMD (usually current)
1117 */
1118 void
1119 ncr53c9x_done(sc, ecb)
1120 struct ncr53c9x_softc *sc;
1121 struct ncr53c9x_ecb *ecb;
1122 {
1123 struct scsipi_xfer *xs = ecb->xs;
1124 struct scsipi_link *sc_link = xs->sc_link;
1125 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1126 int lun = sc_link->scsipi_scsi.lun;
1127 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1128
1129 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1130
1131 callout_stop(&ecb->xs->xs_callout);
1132
1133 if (ecb->stat == SCSI_QUEUE_FULL) {
1134 /*
1135 * Set current throttle -- we should reset
1136 * this periodically
1137 */
1138 sc_link->openings = li->used - 1;
1139 printf("\n%s: QFULL -- throttling to %d commands\n",
1140 sc->sc_dev.dv_xname, sc_link->openings);
1141
1142 }
1143
1144 /*
1145 * Now, if we've come here with no error code, i.e. we've kept the
1146 * initial XS_NOERROR, and the status code signals that we should
1147 * check sense, we'll need to set up a request sense cmd block and
1148 * push the command back into the ready queue *before* any other
1149 * commands for this target/lunit, else we lose the sense info.
1150 * We don't support chk sense conditions for the request sense cmd.
1151 */
1152 if (xs->error == XS_NOERROR) {
1153 xs->status = ecb->stat;
1154 if ((ecb->flags & ECB_ABORT) != 0) {
1155 xs->error = XS_TIMEOUT;
1156 } else if ((ecb->flags & ECB_SENSE) != 0) {
1157 xs->error = XS_SENSE;
1158 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1159 /* First, save the return values */
1160 xs->resid = ecb->dleft;
1161 ncr53c9x_sense(sc, ecb);
1162 return;
1163 } else {
1164 xs->resid = ecb->dleft;
1165 }
1166 }
1167
1168 xs->xs_status |= XS_STS_DONE;
1169
1170 #ifdef NCR53C9X_DEBUG
1171 if (ncr53c9x_debug & NCR_SHOWMISC) {
1172 if (xs->resid != 0)
1173 printf("resid=%d ", xs->resid);
1174 if (xs->error == XS_SENSE)
1175 printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
1176 else
1177 printf("error=%d\n", xs->error);
1178 }
1179 #endif
1180
1181 /*
1182 * Remove the ECB from whatever queue it's on.
1183 */
1184 ncr53c9x_dequeue(sc, ecb);
1185 if (ecb == sc->sc_nexus) {
1186 sc->sc_nexus = NULL;
1187 if (sc->sc_state != NCR_CLEANING) {
1188 sc->sc_state = NCR_IDLE;
1189 ncr53c9x_sched(sc);
1190 }
1191 }
1192
1193 if (xs->error == XS_SELTIMEOUT) {
1194 /* Selection timeout -- discard this LUN if empty */
1195 if (li->untagged == NULL && li->used == 0) {
1196 if (lun < NCR_NLUN)
1197 ti->lun[lun] = NULL;
1198 LIST_REMOVE(li, link);
1199 free(li, M_DEVBUF);
1200 }
1201 }
1202
1203 ncr53c9x_free_ecb(sc, ecb, xs->xs_control);
1204 ti->cmds++;
1205 scsipi_done(xs);
1206 }
1207
1208 void
1209 ncr53c9x_dequeue(sc, ecb)
1210 struct ncr53c9x_softc *sc;
1211 struct ncr53c9x_ecb *ecb;
1212 {
1213 struct ncr53c9x_tinfo *ti =
1214 &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1215 struct ncr53c9x_linfo *li;
1216 int64_t lun = ecb->xs->sc_link->scsipi_scsi.lun;
1217
1218 li = TINFO_LUN(ti, lun);
1219 #ifdef DIAGNOSTIC
1220 if (li == NULL || li->lun != lun)
1221 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1222 (long long) lun, ecb);
1223 #endif
1224 if (li->untagged == ecb) {
1225 li->busy = 0;
1226 li->untagged = NULL;
1227 }
1228 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1229 #ifdef DIAGNOSTIC
1230 if (li->queued[ecb->tag[1]] != NULL &&
1231 (li->queued[ecb->tag[1]] != ecb))
1232 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1233 "instead of ecb %p\n", ecb->tag[1],
1234 (long long) lun,
1235 li->queued[ecb->tag[1]], ecb);
1236 #endif
1237 li->queued[ecb->tag[1]] = NULL;
1238 li->used --;
1239 }
1240
1241 if ((ecb->flags & ECB_READY) != 0) {
1242 ecb->flags &= ~ECB_READY;
1243 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1244 }
1245 }
1246
1247 /*
1248 * INTERRUPT/PROTOCOL ENGINE
1249 */
1250
1251 /*
1252 * Schedule an outgoing message by prioritizing it, and asserting
1253 * attention on the bus. We can only do this when we are the initiator
1254 * else there will be an illegal command interrupt.
1255 */
1256 #define ncr53c9x_sched_msgout(m) \
1257 do { \
1258 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1259 NCRCMD(sc, NCRCMD_SETATN); \
1260 sc->sc_flags |= NCR_ATN; \
1261 sc->sc_msgpriq |= (m); \
1262 } while (0)
1263
1264 int
1265 ncr53c9x_reselect(sc, message, tagtype, tagid)
1266 struct ncr53c9x_softc *sc;
1267 int message;
1268 int tagtype, tagid;
1269 {
1270 u_char selid, target, lun;
1271 struct ncr53c9x_ecb *ecb = NULL;
1272 struct ncr53c9x_tinfo *ti;
1273 struct ncr53c9x_linfo *li;
1274
1275 /*
1276 * The SCSI chip made a snapshot of the data bus while the reselection
1277 * was being negotiated. This enables us to determine which target did
1278 * the reselect.
1279 */
1280 selid = sc->sc_selid & ~(1 << sc->sc_id);
1281 if (selid & (selid - 1)) {
1282 printf("%s: reselect with invalid selid %02x;"
1283 " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
1284 goto reset;
1285 }
1286
1287 /*
1288 * Search wait queue for disconnected cmd
1289 * The list should be short, so I haven't bothered with
1290 * any more sophisticated structures than a simple
1291 * singly linked list.
1292 */
1293 target = ffs(selid) - 1;
1294 lun = message & 0x07;
1295 ti = &sc->sc_tinfo[target];
1296 li = TINFO_LUN(ti, lun);
1297
1298 /*
1299 * We can get as far as the LUN with the IDENTIFY
1300 * message. Check to see if we're running an
1301 * un-tagged command. Otherwise ack the IDENTIFY
1302 * and wait for a tag message.
1303 */
1304
1305 if (li != NULL) {
1306 if (li->untagged != NULL && li->busy)
1307 ecb = li->untagged;
1308 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1309 /* Wait for tag to come by */
1310 sc->sc_state = NCR_IDENTIFIED;
1311 return (0);
1312 } else if (tagtype)
1313 ecb = li->queued[tagid];
1314 }
1315 if (ecb == NULL) {
1316 printf("%s: reselect from target %d lun %d tag %x:%x with no nexus;"
1317 " sending ABORT\n",
1318 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1319 goto abort;
1320 }
1321
1322 /* Make this nexus active again. */
1323 sc->sc_state = NCR_CONNECTED;
1324 sc->sc_nexus = ecb;
1325 ncr53c9x_setsync(sc, ti);
1326
1327 if (ecb->flags & ECB_RESET)
1328 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1329 else if (ecb->flags & ECB_ABORT)
1330 ncr53c9x_sched_msgout(SEND_ABORT);
1331
1332 /* Do an implicit RESTORE POINTERS. */
1333 sc->sc_dp = ecb->daddr;
1334 sc->sc_dleft = ecb->dleft;
1335
1336 return (0);
1337
1338 reset:
1339 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1340 return (1);
1341
1342 abort:
1343 ncr53c9x_sched_msgout(SEND_ABORT);
1344 return (1);
1345 }
1346
1347 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1348 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1349 #define ISEXTMSG(m) ((m) == 1)
1350
1351 /*
1352 * Get an incoming message as initiator.
1353 *
1354 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1355 * byte in the FIFO
1356 */
1357 void
1358 ncr53c9x_msgin(sc)
1359 struct ncr53c9x_softc *sc;
1360 {
1361 int v;
1362
1363 v = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
1364 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld fifo:%d)] ",
1365 (long)sc->sc_imlen, v));
1366
1367 if (v == 0) {
1368 printf("%s: msgin: no msg byte available\n",
1369 sc->sc_dev.dv_xname);
1370 return;
1371 }
1372
1373 /*
1374 * Prepare for a new message. A message should (according
1375 * to the SCSI standard) be transmitted in one single
1376 * MESSAGE_IN_PHASE. If we have been in some other phase,
1377 * then this is a new message.
1378 */
1379 if (sc->sc_prevphase != MESSAGE_IN_PHASE) {
1380 sc->sc_flags &= ~NCR_DROP_MSGI;
1381 sc->sc_imlen = 0;
1382 }
1383
1384 v = NCR_READ_REG(sc, NCR_FIFO);
1385 NCR_MISC(("<msgbyte:0x%02x>", v));
1386
1387 #if 0
1388 if (sc->sc_state == NCR_RESELECTED && sc->sc_imlen == 0) {
1389 /*
1390 * Which target is reselecting us? (The ID bit really)
1391 */
1392 sc->sc_selid = v;
1393 NCR_MISC(("selid=0x%2x ", sc->sc_selid));
1394 return;
1395 }
1396 #endif
1397
1398 sc->sc_imess[sc->sc_imlen] = v;
1399
1400 /*
1401 * If we're going to reject the message, don't bother storing
1402 * the incoming bytes. But still, we need to ACK them.
1403 */
1404
1405 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1406 NCRCMD(sc, NCRCMD_MSGOK);
1407 printf("<dropping msg byte %x>",
1408 sc->sc_imess[sc->sc_imlen]);
1409 return;
1410 }
1411
1412 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1413 ncr53c9x_sched_msgout(SEND_REJECT);
1414 sc->sc_flags |= NCR_DROP_MSGI;
1415 } else {
1416 sc->sc_imlen++;
1417 /*
1418 * This testing is suboptimal, but most
1419 * messages will be of the one byte variety, so
1420 * it should not effect performance
1421 * significantly.
1422 */
1423 if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1424 goto gotit;
1425 if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1426 goto gotit;
1427 if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1428 sc->sc_imlen == sc->sc_imess[1] + 2)
1429 goto gotit;
1430 }
1431 /* Ack what we have so far */
1432 NCRCMD(sc, NCRCMD_MSGOK);
1433 return;
1434
1435 gotit:
1436 NCR_MSGS(("gotmsg(%x)", sc->sc_imess[0]));
1437 /*
1438 * Now we should have a complete message (1 byte, 2 byte
1439 * and moderately long extended messages). We only handle
1440 * extended messages which total length is shorter than
1441 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1442 */
1443 switch (sc->sc_state) {
1444 struct ncr53c9x_ecb *ecb;
1445 struct ncr53c9x_tinfo *ti;
1446
1447 case NCR_CONNECTED:
1448 ecb = sc->sc_nexus;
1449 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1450
1451 switch (sc->sc_imess[0]) {
1452 case MSG_CMDCOMPLETE:
1453 NCR_MSGS(("cmdcomplete "));
1454 if (sc->sc_dleft < 0) {
1455 scsi_print_addr(ecb->xs->sc_link);
1456 printf("got %ld extra bytes\n",
1457 -(long)sc->sc_dleft);
1458 sc->sc_dleft = 0;
1459 }
1460 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
1461 ? 0
1462 : sc->sc_dleft;
1463 if ((ecb->flags & ECB_SENSE) == 0)
1464 ecb->xs->resid = ecb->dleft;
1465 sc->sc_state = NCR_CMDCOMPLETE;
1466 break;
1467
1468 case MSG_MESSAGE_REJECT:
1469 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1470 switch (sc->sc_msgout) {
1471 case SEND_SDTR:
1472 sc->sc_flags &= ~NCR_SYNCHNEGO;
1473 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1474 ncr53c9x_setsync(sc, ti);
1475 break;
1476 case SEND_INIT_DET_ERR:
1477 goto abort;
1478 }
1479 break;
1480
1481 case MSG_NOOP:
1482 NCR_MSGS(("noop "));
1483 break;
1484
1485 case MSG_HEAD_OF_Q_TAG:
1486 case MSG_SIMPLE_Q_TAG:
1487 case MSG_ORDERED_Q_TAG:
1488 NCR_MSGS(("TAG %x:%x", sc->sc_imess[0], sc->sc_imess[1]));
1489 break;
1490
1491 case MSG_DISCONNECT:
1492 NCR_MSGS(("disconnect "));
1493 ti->dconns++;
1494 sc->sc_state = NCR_DISCONNECT;
1495
1496 /*
1497 * Mark the fact that all bytes have moved. The
1498 * target may not bother to do a SAVE POINTERS
1499 * at this stage. This flag will set the residual
1500 * count to zero on MSG COMPLETE.
1501 */
1502 if (sc->sc_dleft == 0)
1503 ecb->flags |= ECB_TENTATIVE_DONE;
1504
1505 break;
1506
1507 case MSG_SAVEDATAPOINTER:
1508 NCR_MSGS(("save datapointer "));
1509 ecb->daddr = sc->sc_dp;
1510 ecb->dleft = sc->sc_dleft;
1511 break;
1512
1513 case MSG_RESTOREPOINTERS:
1514 NCR_MSGS(("restore datapointer "));
1515 sc->sc_dp = ecb->daddr;
1516 sc->sc_dleft = ecb->dleft;
1517 break;
1518
1519 case MSG_EXTENDED:
1520 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1521 switch (sc->sc_imess[2]) {
1522 case MSG_EXT_SDTR:
1523 NCR_MSGS(("SDTR period %d, offset %d ",
1524 sc->sc_imess[3], sc->sc_imess[4]));
1525 if (sc->sc_imess[1] != 3)
1526 goto reject;
1527 ti->period = sc->sc_imess[3];
1528 ti->offset = sc->sc_imess[4];
1529 ti->flags &= ~T_NEGOTIATE;
1530 if (sc->sc_minsync == 0 ||
1531 ti->offset == 0 ||
1532 ti->period > 124) {
1533 #ifdef NCR53C9X_DEBUG
1534 scsi_print_addr(ecb->xs->sc_link);
1535 printf("async mode\n");
1536 #endif
1537 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1538 /*
1539 * target initiated negotiation
1540 */
1541 ti->offset = 0;
1542 ti->flags &= ~T_SYNCMODE;
1543 ncr53c9x_sched_msgout(
1544 SEND_SDTR);
1545 } else {
1546 /* we are async */
1547 ti->flags &= ~T_SYNCMODE;
1548 }
1549 } else {
1550 int r = 250/ti->period;
1551 int s = (100*250)/ti->period - 100*r;
1552 int p;
1553
1554 p = ncr53c9x_stp2cpb(sc, ti->period);
1555 ti->period = ncr53c9x_cpb2stp(sc, p);
1556 #ifdef NCR53C9X_DEBUG
1557 scsi_print_addr(ecb->xs->sc_link);
1558 printf("max sync rate %d.%02dMB/s\n",
1559 r, s);
1560 #endif
1561 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1562 /*
1563 * target initiated negotiation
1564 */
1565 if (ti->period <
1566 sc->sc_minsync)
1567 ti->period =
1568 sc->sc_minsync;
1569 if (ti->offset > 15)
1570 ti->offset = 15;
1571 ti->flags &= ~T_SYNCMODE;
1572 ncr53c9x_sched_msgout(
1573 SEND_SDTR);
1574 } else {
1575 /* we are sync */
1576 ti->flags |= T_SYNCMODE;
1577 }
1578 }
1579 sc->sc_flags &= ~NCR_SYNCHNEGO;
1580 ncr53c9x_setsync(sc, ti);
1581 break;
1582
1583 default:
1584 scsi_print_addr(ecb->xs->sc_link);
1585 printf("unrecognized MESSAGE EXTENDED;"
1586 " sending REJECT\n");
1587 goto reject;
1588 }
1589 break;
1590
1591 default:
1592 NCR_MSGS(("ident "));
1593 scsi_print_addr(ecb->xs->sc_link);
1594 printf("unrecognized MESSAGE; sending REJECT\n");
1595 reject:
1596 ncr53c9x_sched_msgout(SEND_REJECT);
1597 break;
1598 }
1599 break;
1600
1601 case NCR_RESELECTED:
1602 case NCR_IDENTIFIED:
1603 if (MSG_ISIDENTIFY(sc->sc_imess[0])) {
1604 sc->sc_msgify = sc->sc_imess[0];
1605 } else if (sc->sc_imess[0] == MSG_SIMPLE_Q_TAG) {
1606 if (sc->sc_msgify == 0) {
1607 printf("%s: TAG reselect without IDENTIFY;"
1608 " MSG %x;"
1609 " sending DEVICE RESET\n",
1610 sc->sc_dev.dv_xname,
1611 sc->sc_imess[0]);
1612 goto reset;
1613 }
1614 } else {
1615 printf("%s: reselect without IDENTIFY;"
1616 " MSG %x;"
1617 " sending DEVICE RESET\n",
1618 sc->sc_dev.dv_xname,
1619 sc->sc_imess[0]);
1620 goto reset;
1621 }
1622
1623 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1624 sc->sc_imess[0],
1625 sc->sc_imess[1]);
1626 break;
1627
1628 default:
1629 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1630 sc->sc_dev.dv_xname);
1631 reset:
1632 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1633 break;
1634
1635 abort:
1636 ncr53c9x_sched_msgout(SEND_ABORT);
1637 break;
1638 }
1639
1640 /* Ack last message byte */
1641 NCRCMD(sc, NCRCMD_MSGOK);
1642
1643 /* Done, reset message pointer. */
1644 sc->sc_flags &= ~NCR_DROP_MSGI;
1645 sc->sc_imlen = 0;
1646 }
1647
1648
1649 /*
1650 * Send the highest priority, scheduled message
1651 */
1652 void
1653 ncr53c9x_msgout(sc)
1654 struct ncr53c9x_softc *sc;
1655 {
1656 struct ncr53c9x_tinfo *ti;
1657 struct ncr53c9x_ecb *ecb;
1658 size_t size;
1659
1660 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1661 sc->sc_msgpriq, sc->sc_prevphase));
1662
1663 /*
1664 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1665 * condition on the SCSI bus. The 53c9x chip
1666 * automatically turns off ATN before sending the
1667 * message byte. (see also the comment below in the
1668 * default case when picking out a message to send)
1669 */
1670 if (sc->sc_flags & NCR_ATN) {
1671 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1672 new:
1673 NCRCMD(sc, NCRCMD_FLUSH);
1674 DELAY(1);
1675 sc->sc_msgoutq = 0;
1676 sc->sc_omlen = 0;
1677 }
1678 } else {
1679 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1680 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1681 goto new;
1682 } else {
1683 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1684 sc->sc_dev.dv_xname, __LINE__);
1685 }
1686 }
1687
1688 if (sc->sc_omlen == 0) {
1689 /* Pick up highest priority message */
1690 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1691 sc->sc_msgoutq |= sc->sc_msgout;
1692 sc->sc_msgpriq &= ~sc->sc_msgout;
1693 sc->sc_omlen = 1; /* "Default" message len */
1694 switch (sc->sc_msgout) {
1695 case SEND_SDTR:
1696 ecb = sc->sc_nexus;
1697 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1698 sc->sc_omess[0] = MSG_EXTENDED;
1699 sc->sc_omess[1] = 3;
1700 sc->sc_omess[2] = MSG_EXT_SDTR;
1701 sc->sc_omess[3] = ti->period;
1702 sc->sc_omess[4] = ti->offset;
1703 sc->sc_omlen = 5;
1704 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1705 ti->flags |= T_SYNCMODE;
1706 ncr53c9x_setsync(sc, ti);
1707 }
1708 break;
1709 case SEND_IDENTIFY:
1710 if (sc->sc_state != NCR_CONNECTED) {
1711 printf("%s at line %d: no nexus\n",
1712 sc->sc_dev.dv_xname, __LINE__);
1713 }
1714 ecb = sc->sc_nexus;
1715 sc->sc_omess[0] =
1716 MSG_IDENTIFY(ecb->xs->sc_link->scsipi_scsi.lun, 0);
1717 break;
1718 case SEND_TAG:
1719 if (sc->sc_state != NCR_CONNECTED) {
1720 printf("%s at line %d: no nexus\n",
1721 sc->sc_dev.dv_xname, __LINE__);
1722 }
1723 ecb = sc->sc_nexus;
1724 sc->sc_omess[0] = ecb->tag[0];
1725 sc->sc_omess[1] = ecb->tag[1];
1726 sc->sc_omlen = 2;
1727 break;
1728 case SEND_DEV_RESET:
1729 sc->sc_flags |= NCR_ABORTING;
1730 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1731 ecb = sc->sc_nexus;
1732 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1733 ti->flags &= ~T_SYNCMODE;
1734 if ((ti->flags & T_SYNCHOFF) == 0)
1735 /* We can re-start sync negotiation */
1736 ti->flags |= T_NEGOTIATE;
1737 break;
1738 case SEND_PARITY_ERROR:
1739 sc->sc_omess[0] = MSG_PARITY_ERROR;
1740 break;
1741 case SEND_ABORT:
1742 sc->sc_flags |= NCR_ABORTING;
1743 sc->sc_omess[0] = MSG_ABORT;
1744 break;
1745 case SEND_INIT_DET_ERR:
1746 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1747 break;
1748 case SEND_REJECT:
1749 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1750 break;
1751 default:
1752 /*
1753 * We normally do not get here, since the chip
1754 * automatically turns off ATN before the last
1755 * byte of a message is sent to the target.
1756 * However, if the target rejects our (multi-byte)
1757 * message early by switching to MSG IN phase
1758 * ATN remains on, so the target may return to
1759 * MSG OUT phase. If there are no scheduled messages
1760 * left we send a NO-OP.
1761 *
1762 * XXX - Note that this leaves no useful purpose for
1763 * the NCR_ATN flag.
1764 */
1765 sc->sc_flags &= ~NCR_ATN;
1766 sc->sc_omess[0] = MSG_NOOP;
1767 break;
1768 }
1769 sc->sc_omp = sc->sc_omess;
1770 }
1771
1772 #ifdef DEBUG
1773 {
1774 int i;
1775
1776 for (i = 0; i < sc->sc_omlen; i++)
1777 NCR_MISC(("<msgbyte:0x%02x>", sc->sc_omess[i]));
1778 }
1779 #endif
1780 /* (re)send the message */
1781 size = min(sc->sc_omlen, sc->sc_maxxfer);
1782 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
1783 /* Program the SCSI counter */
1784 NCR_WRITE_REG(sc, NCR_TCL, size);
1785 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
1786 if (sc->sc_cfg2 & NCRCFG2_FE) {
1787 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
1788 }
1789 /* Load the count in and start the message-out transfer */
1790 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
1791 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
1792 NCRDMA_GO(sc);
1793 }
1794
1795 /*
1796 * This is the most critical part of the driver, and has to know
1797 * how to deal with *all* error conditions and phases from the SCSI
1798 * bus. If there are no errors and the DMA was active, then call the
1799 * DMA pseudo-interrupt handler. If this returns 1, then that was it
1800 * and we can return from here without further processing.
1801 *
1802 * Most of this needs verifying.
1803 */
1804 int
1805 ncr53c9x_intr(arg)
1806 void *arg;
1807 {
1808 struct ncr53c9x_softc *sc = arg;
1809 struct ncr53c9x_ecb *ecb;
1810 struct scsipi_link *sc_link;
1811 struct ncr53c9x_tinfo *ti;
1812 size_t size;
1813 int nfifo;
1814
1815 NCR_TRACE(("[ncr53c9x_intr] "));
1816
1817 if (!NCRDMA_ISINTR(sc))
1818 return (0);
1819
1820 again:
1821 /* and what do the registers say... */
1822 ncr53c9x_readregs(sc);
1823
1824 sc->sc_intrcnt.ev_count++;
1825
1826 /*
1827 * At the moment, only a SCSI Bus Reset or Illegal
1828 * Command are classed as errors. A disconnect is a
1829 * valid condition, and we let the code check is the
1830 * "NCR_BUSFREE_OK" flag was set before declaring it
1831 * and error.
1832 *
1833 * Also, the status register tells us about "Gross
1834 * Errors" and "Parity errors". Only the Gross Error
1835 * is really bad, and the parity errors are dealt
1836 * with later
1837 *
1838 * TODO
1839 * If there are too many parity error, go to slow
1840 * cable mode ?
1841 */
1842
1843 /* SCSI Reset */
1844 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
1845 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
1846 NCRCMD(sc, NCRCMD_FLUSH);
1847 DELAY(1);
1848 }
1849 if (sc->sc_state != NCR_SBR) {
1850 printf("%s: SCSI bus reset\n",
1851 sc->sc_dev.dv_xname);
1852 ncr53c9x_init(sc, 0); /* Restart everything */
1853 return (1);
1854 }
1855 #if 0
1856 /*XXX*/ printf("<expected bus reset: "
1857 "[intr %x, stat %x, step %d]>\n",
1858 sc->sc_espintr, sc->sc_espstat,
1859 sc->sc_espstep);
1860 #endif
1861 if (sc->sc_nexus != NULL)
1862 panic("%s: nexus in reset state",
1863 sc->sc_dev.dv_xname);
1864 goto sched;
1865 }
1866
1867 ecb = sc->sc_nexus;
1868
1869 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
1870 if (sc->sc_espintr & NCRINTR_ERR ||
1871 sc->sc_espstat & NCRSTAT_GE) {
1872
1873 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
1874 /* Gross Error; no target ? */
1875 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1876 NCRCMD(sc, NCRCMD_FLUSH);
1877 DELAY(1);
1878 }
1879 if (sc->sc_state == NCR_CONNECTED ||
1880 sc->sc_state == NCR_SELECTING) {
1881 ecb->xs->error = XS_TIMEOUT;
1882 ncr53c9x_done(sc, ecb);
1883 }
1884 return (1);
1885 }
1886
1887 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
1888 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
1889 /*
1890 * Eat away "Illegal command" interrupt
1891 * on a ESP100 caused by a re-selection
1892 * while we were trying to select
1893 * another target.
1894 */
1895 #ifdef DEBUG
1896 printf("%s: ESP100 work-around activated\n",
1897 sc->sc_dev.dv_xname);
1898 #endif
1899 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1900 return (1);
1901 }
1902 /* illegal command, out of sync ? */
1903 printf("%s: illegal command: 0x%x "
1904 "(state %d, phase %x, prevphase %x)\n",
1905 sc->sc_dev.dv_xname, sc->sc_lastcmd,
1906 sc->sc_state, sc->sc_phase,
1907 sc->sc_prevphase);
1908 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1909 NCRCMD(sc, NCRCMD_FLUSH);
1910 DELAY(1);
1911 }
1912 ncr53c9x_init(sc, 1); /* Restart everything */
1913 return (1);
1914 }
1915 }
1916 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1917
1918 /*
1919 * Call if DMA is active.
1920 *
1921 * If DMA_INTR returns true, then maybe go 'round the loop
1922 * again in case there is no more DMA queued, but a phase
1923 * change is expected.
1924 */
1925 if (NCRDMA_ISACTIVE(sc)) {
1926 int r = NCRDMA_INTR(sc);
1927 if (r == -1) {
1928 printf("%s: DMA error; resetting\n",
1929 sc->sc_dev.dv_xname);
1930 ncr53c9x_init(sc, 1);
1931 }
1932 /* If DMA active here, then go back to work... */
1933 if (NCRDMA_ISACTIVE(sc))
1934 return (1);
1935
1936 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
1937 /*
1938 * DMA not completed. If we can not find a
1939 * acceptable explanation, print a diagnostic.
1940 */
1941 if (sc->sc_state == NCR_SELECTING)
1942 /*
1943 * This can happen if we are reselected
1944 * while using DMA to select a target.
1945 */
1946 /*void*/;
1947 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1948 /*
1949 * Our (multi-byte) message (eg SDTR) was
1950 * interrupted by the target to send
1951 * a MSG REJECT.
1952 * Print diagnostic if current phase
1953 * is not MESSAGE IN.
1954 */
1955 if (sc->sc_phase != MESSAGE_IN_PHASE)
1956 printf("%s: !TC on MSG OUT"
1957 " [intr %x, stat %x, step %d]"
1958 " prevphase %x, resid %lx\n",
1959 sc->sc_dev.dv_xname,
1960 sc->sc_espintr,
1961 sc->sc_espstat,
1962 sc->sc_espstep,
1963 sc->sc_prevphase,
1964 (u_long)sc->sc_omlen);
1965 } else if (sc->sc_dleft == 0) {
1966 /*
1967 * The DMA operation was started for
1968 * a DATA transfer. Print a diagnostic
1969 * if the DMA counter and TC bit
1970 * appear to be out of sync.
1971 */
1972 printf("%s: !TC on DATA XFER"
1973 " [intr %x, stat %x, step %d]"
1974 " prevphase %x, resid %x\n",
1975 sc->sc_dev.dv_xname,
1976 sc->sc_espintr,
1977 sc->sc_espstat,
1978 sc->sc_espstep,
1979 sc->sc_prevphase,
1980 ecb?ecb->dleft:-1);
1981 }
1982 }
1983 }
1984
1985 /*
1986 * Check for less serious errors.
1987 */
1988 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
1989 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1990 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
1991 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
1992 else
1993 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
1994 }
1995
1996 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
1997 sc->sc_msgify = 0;
1998 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
1999 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2000 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2001 NCRCMD(sc, NCRCMD_FLUSH);
2002 DELAY(1);
2003 }
2004 /*
2005 * This command must (apparently) be issued within
2006 * 250mS of a disconnect. So here you are...
2007 */
2008 NCRCMD(sc, NCRCMD_ENSEL);
2009
2010 switch (sc->sc_state) {
2011 case NCR_RESELECTED:
2012 goto sched;
2013
2014 case NCR_SELECTING:
2015 {
2016 struct ncr53c9x_linfo *li;
2017
2018 ecb->xs->error = XS_SELTIMEOUT;
2019
2020 /* Selection timeout -- discard all LUNs if empty */
2021 sc_link = ecb->xs->sc_link;
2022 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2023 li = LIST_FIRST(&ti->luns);
2024 while (li != NULL) {
2025 if (li->untagged == NULL && li->used == 0) {
2026 if (li->lun < NCR_NLUN)
2027 ti->lun[li->lun] = NULL;
2028 LIST_REMOVE(li, link);
2029 free(li, M_DEVBUF);
2030 /* Restart the search at the beginning */
2031 li = LIST_FIRST(&ti->luns);
2032 continue;
2033 }
2034 li = LIST_NEXT(li, link);
2035 }
2036 goto finish;
2037 }
2038 case NCR_CONNECTED:
2039 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2040 #ifdef NCR53C9X_DEBUG
2041 if (ecb != NULL)
2042 scsi_print_addr(ecb->xs->sc_link);
2043 printf("sync nego not completed!\n");
2044 #endif
2045 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
2046 sc->sc_flags &= ~NCR_SYNCHNEGO;
2047 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2048 }
2049
2050 /* it may be OK to disconnect */
2051 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2052 /*
2053 * Section 5.1.1 of the SCSI 2 spec
2054 * suggests issuing a REQUEST SENSE
2055 * following an unexpected disconnect.
2056 * Some devices go into a contingent
2057 * allegiance condition when
2058 * disconnecting, and this is necessary
2059 * to clean up their state.
2060 */
2061 printf("%s: unexpected disconnect; ",
2062 sc->sc_dev.dv_xname);
2063 if ((ecb->flags & ECB_SENSE) != 0) {
2064 printf("resetting\n");
2065 goto reset;
2066 }
2067 printf("sending REQUEST SENSE\n");
2068 callout_stop(&ecb->xs->xs_callout);
2069 ncr53c9x_sense(sc, ecb);
2070 goto out;
2071 }
2072
2073 ecb->xs->error = XS_TIMEOUT;
2074 goto finish;
2075
2076 case NCR_DISCONNECT:
2077 sc->sc_nexus = NULL;
2078 goto sched;
2079
2080 case NCR_CMDCOMPLETE:
2081 goto finish;
2082 }
2083 }
2084
2085 switch (sc->sc_state) {
2086
2087 case NCR_SBR:
2088 printf("%s: waiting for SCSI Bus Reset to happen\n",
2089 sc->sc_dev.dv_xname);
2090 return (1);
2091
2092 case NCR_RESELECTED:
2093 /*
2094 * we must be continuing a message ?
2095 */
2096 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2097 printf("%s: target didn't identify\n",
2098 sc->sc_dev.dv_xname);
2099 ncr53c9x_init(sc, 1);
2100 return (1);
2101 }
2102 printf("<<RESELECT CONT'd>>");
2103 #if XXXX
2104 ncr53c9x_msgin(sc);
2105 if (sc->sc_state != NCR_CONNECTED) {
2106 /* IDENTIFY fail?! */
2107 printf("%s: identify failed\n",
2108 sc->sc_dev.dv_xname);
2109 ncr53c9x_init(sc, 1);
2110 return (1);
2111 }
2112 #endif
2113 break;
2114
2115 case NCR_IDENTIFIED:
2116 ecb = sc->sc_nexus;
2117 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2118 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2119 & NCRFIFO_FF);
2120 /*
2121 * Things are seriously fucked up.
2122 * Pull the brakes, i.e. reset
2123 */
2124 printf("%s: target didn't send tag: %d bytes in fifo\n",
2125 sc->sc_dev.dv_xname, i);
2126 /* Drain and display fifo */
2127 while (i-- > 0)
2128 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2129
2130 ncr53c9x_init(sc, 1);
2131 return (1);
2132 } else
2133 goto msgin;
2134
2135 break;
2136
2137 case NCR_IDLE:
2138 case NCR_SELECTING:
2139 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2140 sc->sc_flags = 0;
2141 ecb = sc->sc_nexus;
2142 if (sc->sc_espintr & NCRINTR_RESEL) {
2143 /*
2144 * If we're trying to select a
2145 * target ourselves, push our command
2146 * back into the ready list.
2147 */
2148 if (sc->sc_state == NCR_SELECTING) {
2149 NCR_MISC(("backoff selector "));
2150 callout_stop(&ecb->xs->xs_callout);
2151 ncr53c9x_dequeue(sc, ecb);
2152 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2153 ecb->flags |= ECB_READY;
2154 ecb = sc->sc_nexus = NULL;
2155 }
2156 sc->sc_state = NCR_RESELECTED;
2157 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2158 /*
2159 * Things are seriously fucked up.
2160 * Pull the brakes, i.e. reset
2161 */
2162 printf("%s: target didn't identify\n",
2163 sc->sc_dev.dv_xname);
2164 ncr53c9x_init(sc, 1);
2165 return (1);
2166 }
2167 /*
2168 * The C90 only inhibits FIFO writes until
2169 * reselection is complete, instead of
2170 * waiting until the interrupt status register
2171 * has been read. So, if the reselect happens
2172 * while we were entering a command bytes (for
2173 * another target) some of those bytes can
2174 * appear in the FIFO here, after the
2175 * interrupt is taken.
2176 */
2177 nfifo = NCR_READ_REG(sc,NCR_FFLAG) & NCRFIFO_FF;
2178 if (nfifo < 2 ||
2179 (nfifo > 2 &&
2180 sc->sc_rev != NCR_VARIANT_ESP100)) {
2181 printf("%s: RESELECT: %d bytes in FIFO! "
2182 "[intr %x, stat %x, step %d, prevphase %x]\n",
2183 sc->sc_dev.dv_xname,
2184 nfifo,
2185 sc->sc_espintr,
2186 sc->sc_espstat,
2187 sc->sc_espstep,
2188 sc->sc_prevphase);
2189 ncr53c9x_init(sc, 1);
2190 return (1);
2191 }
2192 sc->sc_selid = NCR_READ_REG(sc, NCR_FIFO);
2193 NCR_MISC(("selid=0x%2x ", sc->sc_selid));
2194
2195 /* Handle identify message */
2196 ncr53c9x_msgin(sc);
2197 if (nfifo != 2) {
2198 /*
2199 * Note: this should not happen
2200 * with `dmaselect' on.
2201 */
2202 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2203 NCRCMD(sc, NCRCMD_FLUSH);
2204 } else if (ncr53c9x_dmaselect &&
2205 sc->sc_rev == NCR_VARIANT_ESP100) {
2206 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2207 }
2208
2209 if (sc->sc_state != NCR_CONNECTED &&
2210 sc->sc_state != NCR_IDENTIFIED) {
2211 /* IDENTIFY fail?! */
2212 printf("%s: identify failed\n",
2213 sc->sc_dev.dv_xname);
2214 ncr53c9x_init(sc, 1);
2215 return (1);
2216 }
2217 goto shortcut; /* ie. next phase expected soon */
2218 }
2219
2220 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2221 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2222 /*
2223 * Arbitration won; examine the `step' register
2224 * to determine how far the selection could progress.
2225 */
2226 ecb = sc->sc_nexus;
2227 if (ecb == NULL)
2228 panic("ncr53c9x: no nexus");
2229
2230 sc_link = ecb->xs->sc_link;
2231 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2232
2233 switch (sc->sc_espstep) {
2234 case 0:
2235 /*
2236 * The target did not respond with a
2237 * message out phase - probably an old
2238 * device that doesn't recognize ATN.
2239 * Clear ATN and just continue, the
2240 * target should be in the command
2241 * phase.
2242 * XXXX check for command phase?
2243 */
2244 NCRCMD(sc, NCRCMD_RSTATN);
2245 break;
2246 case 1:
2247 if ((ti->flags & T_NEGOTIATE) == 0) {
2248 printf("%s: step 1 & !NEG\n",
2249 sc->sc_dev.dv_xname);
2250 goto reset;
2251 }
2252 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2253 printf("%s: !MSGOUT\n",
2254 sc->sc_dev.dv_xname);
2255 goto reset;
2256 }
2257 /* Start negotiating */
2258 ti->period = sc->sc_minsync;
2259 ti->offset = 15;
2260 sc->sc_flags |= NCR_SYNCHNEGO;
2261 if (ecb->tag[0])
2262 ncr53c9x_sched_msgout(SEND_TAG|SEND_SDTR);
2263 else
2264 ncr53c9x_sched_msgout(SEND_SDTR);
2265 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2266 break;
2267 case 3:
2268 /*
2269 * Grr, this is supposed to mean
2270 * "target left command phase prematurely".
2271 * It seems to happen regularly when
2272 * sync mode is on.
2273 * Look at FIFO to see if command went out.
2274 * (Timing problems?)
2275 */
2276 if (ncr53c9x_dmaselect) {
2277 if (sc->sc_cmdlen == 0)
2278 /* Hope for the best.. */
2279 break;
2280 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2281 & NCRFIFO_FF) == 0) {
2282 /* Hope for the best.. */
2283 break;
2284 }
2285 printf("(%s:%d:%d): selection failed;"
2286 " %d left in FIFO "
2287 "[intr %x, stat %x, step %d]\n",
2288 sc->sc_dev.dv_xname,
2289 sc_link->scsipi_scsi.target,
2290 sc_link->scsipi_scsi.lun,
2291 NCR_READ_REG(sc, NCR_FFLAG)
2292 & NCRFIFO_FF,
2293 sc->sc_espintr, sc->sc_espstat,
2294 sc->sc_espstep);
2295 NCRCMD(sc, NCRCMD_FLUSH);
2296 ncr53c9x_sched_msgout(SEND_ABORT);
2297 return (1);
2298 case 2:
2299 /* Select stuck at Command Phase */
2300 NCRCMD(sc, NCRCMD_FLUSH);
2301 break;
2302 case 4:
2303 if (ncr53c9x_dmaselect &&
2304 sc->sc_cmdlen != 0)
2305 printf("(%s:%d:%d): select; "
2306 "%lu left in DMA buffer "
2307 "[intr %x, stat %x, step %d]\n",
2308 sc->sc_dev.dv_xname,
2309 sc_link->scsipi_scsi.target,
2310 sc_link->scsipi_scsi.lun,
2311 (u_long)sc->sc_cmdlen,
2312 sc->sc_espintr,
2313 sc->sc_espstat,
2314 sc->sc_espstep);
2315 /* So far, everything went fine */
2316 break;
2317 }
2318
2319 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2320 /* Do an implicit RESTORE POINTERS. */
2321 sc->sc_dp = ecb->daddr;
2322 sc->sc_dleft = ecb->dleft;
2323 sc->sc_state = NCR_CONNECTED;
2324 break;
2325
2326 } else {
2327
2328 printf("%s: unexpected status after select"
2329 ": [intr %x, stat %x, step %x]\n",
2330 sc->sc_dev.dv_xname,
2331 sc->sc_espintr, sc->sc_espstat,
2332 sc->sc_espstep);
2333 NCRCMD(sc, NCRCMD_FLUSH);
2334 DELAY(1);
2335 goto reset;
2336 }
2337 if (sc->sc_state == NCR_IDLE) {
2338 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2339 return (0);
2340 }
2341 break;
2342
2343 case NCR_CONNECTED:
2344 if ((sc->sc_flags & NCR_ICCS) != 0) {
2345 /* "Initiate Command Complete Steps" in progress */
2346 u_char msg;
2347
2348 sc->sc_flags &= ~NCR_ICCS;
2349
2350 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2351 printf("%s: ICCS: "
2352 ": [intr %x, stat %x, step %x]\n",
2353 sc->sc_dev.dv_xname,
2354 sc->sc_espintr, sc->sc_espstat,
2355 sc->sc_espstep);
2356 }
2357 if ((NCR_READ_REG(sc, NCR_FFLAG)
2358 & NCRFIFO_FF) != 2) {
2359 /* Drop excess bytes from the queue */
2360 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2361 & NCRFIFO_FF) - 2;
2362 while (i-- > 0)
2363 (void) NCR_READ_REG(sc, NCR_FIFO);
2364 }
2365 ecb->stat = NCR_READ_REG(sc, NCR_FIFO);
2366 msg = NCR_READ_REG(sc, NCR_FIFO);
2367 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2368 if (msg == MSG_CMDCOMPLETE) {
2369 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2370 ? 0
2371 : sc->sc_dleft;
2372 if ((ecb->flags & ECB_SENSE) == 0)
2373 ecb->xs->resid = ecb->dleft;
2374 sc->sc_state = NCR_CMDCOMPLETE;
2375 } else
2376 printf("%s: STATUS_PHASE: msg %d\n",
2377 sc->sc_dev.dv_xname, msg);
2378 NCRCMD(sc, NCRCMD_MSGOK);
2379 goto shortcut; /* ie. wait for disconnect */
2380 }
2381 break;
2382
2383 default:
2384 panic("%s: invalid state: %d",
2385 sc->sc_dev.dv_xname,
2386 sc->sc_state);
2387 }
2388
2389 /*
2390 * Driver is now in state NCR_CONNECTED, i.e. we
2391 * have a current command working the SCSI bus.
2392 */
2393 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2394 panic("ncr53c9x: no nexus");
2395 }
2396
2397 switch (sc->sc_phase) {
2398 case MESSAGE_OUT_PHASE:
2399 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2400 ncr53c9x_msgout(sc);
2401 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2402 break;
2403
2404 case MESSAGE_IN_PHASE:
2405 msgin:
2406 NCR_PHASE(("MESSAGE_IN_PHASE "));
2407 sc->sc_prevphase = MESSAGE_IN_PHASE;
2408 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2409 NCRCMD(sc, NCRCMD_FLUSH);
2410 sc->sc_flags |= NCR_WAITI;
2411 NCRCMD(sc, NCRCMD_TRANS);
2412 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2413 if ((sc->sc_flags & NCR_WAITI) == 0) {
2414 printf("%s: MSGIN: unexpected FC bit: "
2415 "[intr %x, stat %x, step %x]\n",
2416 sc->sc_dev.dv_xname,
2417 sc->sc_espintr, sc->sc_espstat,
2418 sc->sc_espstep);
2419 }
2420 sc->sc_flags &= ~NCR_WAITI;
2421 ncr53c9x_msgin(sc);
2422 } else {
2423 printf("%s: MSGIN: weird bits: "
2424 "[intr %x, stat %x, step %x]\n",
2425 sc->sc_dev.dv_xname,
2426 sc->sc_espintr, sc->sc_espstat,
2427 sc->sc_espstep);
2428 }
2429 goto shortcut; /* i.e. expect data to be ready */
2430 break;
2431
2432 case COMMAND_PHASE:
2433 /*
2434 * Send the command block. Normally we don't see this
2435 * phase because the SEL_ATN command takes care of
2436 * all this. However, we end up here if either the
2437 * target or we wanted to exchange some more messages
2438 * first (e.g. to start negotiations).
2439 */
2440
2441 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2442 ecb->cmd.cmd.opcode, ecb->clen));
2443 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2444 NCRCMD(sc, NCRCMD_FLUSH);
2445 DELAY(1);
2446 }
2447 if (ncr53c9x_dmaselect) {
2448 size_t size;
2449 /* setup DMA transfer for command */
2450 size = ecb->clen;
2451 sc->sc_cmdlen = size;
2452 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2453 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2454 0, &size);
2455 /* Program the SCSI counter */
2456 NCR_WRITE_REG(sc, NCR_TCL, size);
2457 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
2458 if (sc->sc_cfg2 & NCRCFG2_FE) {
2459 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
2460 }
2461
2462 /* load the count in */
2463 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2464
2465 /* start the command transfer */
2466 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2467 NCRDMA_GO(sc);
2468 } else {
2469 u_char *cmd = (u_char *)&ecb->cmd.cmd;
2470 int i;
2471 /* Now the command into the FIFO */
2472 for (i = 0; i < ecb->clen; i++)
2473 NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
2474 NCRCMD(sc, NCRCMD_TRANS);
2475 }
2476 sc->sc_prevphase = COMMAND_PHASE;
2477 break;
2478
2479 case DATA_OUT_PHASE:
2480 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2481 NCRCMD(sc, NCRCMD_FLUSH);
2482 size = min(sc->sc_dleft, sc->sc_maxxfer);
2483 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2484 0, &size);
2485 sc->sc_prevphase = DATA_OUT_PHASE;
2486 goto setup_xfer;
2487
2488 case DATA_IN_PHASE:
2489 NCR_PHASE(("DATA_IN_PHASE "));
2490 if (sc->sc_rev == NCR_VARIANT_ESP100)
2491 NCRCMD(sc, NCRCMD_FLUSH);
2492 size = min(sc->sc_dleft, sc->sc_maxxfer);
2493 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2494 1, &size);
2495 sc->sc_prevphase = DATA_IN_PHASE;
2496 setup_xfer:
2497 /* Target returned to data phase: wipe "done" memory */
2498 ecb->flags &= ~ECB_TENTATIVE_DONE;
2499
2500 /* Program the SCSI counter */
2501 NCR_WRITE_REG(sc, NCR_TCL, size);
2502 NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
2503 if ((sc->sc_cfg2 & NCRCFG2_FE) != 0) {
2504 NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
2505 }
2506 /* load the count in */
2507 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2508
2509 /*
2510 * Note that if `size' is 0, we've already transceived
2511 * all the bytes we want but we're still in DATA PHASE.
2512 * Apparently, the device needs padding. Also, a
2513 * transfer size of 0 means "maximum" to the chip
2514 * DMA logic.
2515 */
2516 NCRCMD(sc,
2517 (size==0?NCRCMD_TRPAD:NCRCMD_TRANS)|NCRCMD_DMA);
2518 NCRDMA_GO(sc);
2519 return (1);
2520
2521 case STATUS_PHASE:
2522 NCR_PHASE(("STATUS_PHASE "));
2523 sc->sc_flags |= NCR_ICCS;
2524 NCRCMD(sc, NCRCMD_ICCS);
2525 sc->sc_prevphase = STATUS_PHASE;
2526 goto shortcut; /* i.e. expect status results soon */
2527 break;
2528
2529 case INVALID_PHASE:
2530 break;
2531
2532 default:
2533 printf("%s: unexpected bus phase; resetting\n",
2534 sc->sc_dev.dv_xname);
2535 goto reset;
2536 }
2537
2538 out:
2539 return (1);
2540
2541 reset:
2542 ncr53c9x_init(sc, 1);
2543 goto out;
2544
2545 finish:
2546 ncr53c9x_done(sc, ecb);
2547 goto out;
2548
2549 sched:
2550 sc->sc_state = NCR_IDLE;
2551 ncr53c9x_sched(sc);
2552 goto out;
2553
2554 shortcut:
2555 /*
2556 * The idea is that many of the SCSI operations take very little
2557 * time, and going away and getting interrupted is too high an
2558 * overhead to pay. For example, selecting, sending a message
2559 * and command and then doing some work can be done in one "pass".
2560 *
2561 * The delay is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1
2562 * at 40Mhz. This needs testing.
2563 */
2564 DELAY(50/sc->sc_freq);
2565 if (NCRDMA_ISINTR(sc))
2566 goto again;
2567 goto out;
2568 }
2569
2570 void
2571 ncr53c9x_abort(sc, ecb)
2572 struct ncr53c9x_softc *sc;
2573 struct ncr53c9x_ecb *ecb;
2574 {
2575
2576 /* 2 secs for the abort */
2577 ecb->timeout = NCR_ABORT_TIMEOUT;
2578 ecb->flags |= ECB_ABORT;
2579
2580 if (ecb == sc->sc_nexus) {
2581 int timeout;
2582
2583 /*
2584 * If we're still selecting, the message will be scheduled
2585 * after selection is complete.
2586 */
2587 if (sc->sc_state == NCR_CONNECTED)
2588 ncr53c9x_sched_msgout(SEND_ABORT);
2589
2590 /*
2591 * Reschedule timeout.
2592 */
2593 timeout = ecb->timeout;
2594 if (hz > 100 && timeout > 1000)
2595 timeout = (timeout / 1000) * hz;
2596 else
2597 timeout = (timeout * hz) / 1000;
2598 callout_reset(&ecb->xs->xs_callout, timeout,
2599 ncr53c9x_timeout, ecb);
2600 } else {
2601 /*
2602 * Just leave the command where it is.
2603 * XXX - what choice do we have but to reset the SCSI
2604 * eventually?
2605 */
2606 if (sc->sc_state == NCR_IDLE)
2607 ncr53c9x_sched(sc);
2608 }
2609 }
2610
2611 void
2612 ncr53c9x_timeout(arg)
2613 void *arg;
2614 {
2615 struct ncr53c9x_ecb *ecb = arg;
2616 struct scsipi_xfer *xs = ecb->xs;
2617 struct scsipi_link *sc_link = xs->sc_link;
2618 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
2619 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2620 int s;
2621
2622 scsi_print_addr(sc_link);
2623 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2624 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2625 "msg(q %x,o %x) %s>",
2626 sc->sc_dev.dv_xname,
2627 ecb, ecb->flags, ecb->dleft, ecb->stat,
2628 sc->sc_state, sc->sc_nexus,
2629 NCR_READ_REG(sc, NCR_STAT),
2630 sc->sc_phase, sc->sc_prevphase,
2631 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2632 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2633 #if NCR53C9X_DEBUG > 1
2634 printf("TRACE: %s.", ecb->trace);
2635 #endif
2636
2637 s = splbio();
2638
2639 if (ecb->flags & ECB_ABORT) {
2640 /* abort timed out */
2641 printf(" AGAIN\n");
2642
2643 ncr53c9x_init(sc, 1);
2644 } else {
2645 /* abort the operation that has timed out */
2646 printf("\n");
2647 xs->error = XS_TIMEOUT;
2648 ncr53c9x_abort(sc, ecb);
2649
2650 /* Disable sync mode if stuck in a data phase */
2651 if (ecb == sc->sc_nexus &&
2652 (ti->flags & T_SYNCMODE) != 0 &&
2653 (sc->sc_phase & (MSGI|CDI)) == 0) {
2654 scsi_print_addr(sc_link);
2655 printf("sync negotiation disabled\n");
2656 sc->sc_cfflags |= (1<<(sc_link->scsipi_scsi.target+8));
2657 }
2658 }
2659
2660 splx(s);
2661 }
2662
2663 void
2664 ncr53c9x_watch(arg)
2665 void *arg;
2666 {
2667 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2668 struct ncr53c9x_tinfo *ti;
2669 struct ncr53c9x_linfo *li;
2670 int t, s;
2671 /* Delete any structures that have not been used in 10min. */
2672 time_t old = time.tv_sec - (10*60);
2673
2674 s = splbio();
2675 for (t=0; t<NCR_NTARG; t++) {
2676 ti = &sc->sc_tinfo[t];
2677 li = LIST_FIRST(&ti->luns);
2678 while (li) {
2679 if (li->last_used < old && li->untagged == NULL &&
2680 li->used == 0) {
2681 if (li->lun < NCR_NLUN)
2682 ti->lun[li->lun] = NULL;
2683 LIST_REMOVE(li, link);
2684 free(li, M_DEVBUF);
2685 /* Restart the search at the beginning */
2686 li = LIST_FIRST(&ti->luns);
2687 continue;
2688 }
2689 li = LIST_NEXT(li, link);
2690 }
2691 }
2692 splx(s);
2693 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
2694 }
2695
2696