ncr53c9x.c revision 1.71 1 /* $NetBSD: ncr53c9x.c,v 1.71 2001/03/29 02:58:39 petrov Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/proc.h>
90 #include <sys/queue.h>
91 #include <sys/pool.h>
92 #include <sys/scsiio.h>
93
94 #include <dev/scsipi/scsi_all.h>
95 #include <dev/scsipi/scsipi_all.h>
96 #include <dev/scsipi/scsiconf.h>
97 #include <dev/scsipi/scsi_message.h>
98
99 #include <dev/ic/ncr53c9xreg.h>
100 #include <dev/ic/ncr53c9xvar.h>
101
102 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
103 #ifdef DEBUG
104 int ncr53c9x_notag = 0;
105 #endif
106
107 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
108 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
109 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
110 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
111 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
112 struct scsipi_xfer *, int);
113 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
114 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
115 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
117 /*static*/ void ncr53c9x_timeout(void *arg);
118 /*static*/ void ncr53c9x_watch(void *arg);
119 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
120 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
121 /*static*/ int ncr53c9x_ioctl(struct scsipi_link *, u_long,
122 caddr_t, int, struct proc *);
123
124 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
125 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *, int);
126 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
127
128 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
129 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
130 struct ncr53c9x_tinfo *);
131 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
132 int64_t lun);
133
134 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
135
136 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
137 #define NCR_RDFIFO_START 0
138 #define NCR_RDFIFO_CONTINUE 1
139
140
141 #define NCR_SET_COUNT(sc, size) do { \
142 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
143 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
144 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
145 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
146 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
147 } \
148 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
149 NCR_WRITE_REG(sc, NCR_RCH, 0); \
150 } \
151 } while (0)
152
153 static int ecb_pool_initialized = 0;
154 static struct pool ecb_pool;
155
156 /*
157 * Names for the NCR53c9x variants, correspnding to the variant tags
158 * in ncr53c9xvar.h.
159 */
160 static const char *ncr53c9x_variant_names[] = {
161 "ESP100",
162 "ESP100A",
163 "ESP200",
164 "NCR53C94",
165 "NCR53C96",
166 "ESP406",
167 "FAS408",
168 "FAS216",
169 "AM53C974",
170 "FAS366/HME",
171 };
172
173 static struct scsipi_adapter ncr53c9x_adapter = {
174 0, /* adapter refcnt */
175 ncr53c9x_scsi_cmd, /* cmd */
176 minphys, /* minphys */
177 ncr53c9x_ioctl, /* ioctl */
178 NULL, /* enable */
179 NULL, /* getgeom */
180 };
181
182 static struct scsipi_device ncr53c9x_device = {
183 NULL, /* use default error handler */
184 NULL, /* have a queue, served by this */
185 NULL, /* have no async handler */
186 NULL, /* use default 'done' routine */
187 };
188
189 /*
190 * Search linked list for LUN info by LUN id.
191 */
192 static struct ncr53c9x_linfo *
193 ncr53c9x_lunsearch(ti, lun)
194 struct ncr53c9x_tinfo *ti;
195 int64_t lun;
196 {
197 struct ncr53c9x_linfo *li;
198 LIST_FOREACH(li, &ti->luns, link)
199 if (li->lun == lun)
200 return (li);
201 return (NULL);
202 }
203
204 /*
205 * Attach this instance, and then all the sub-devices
206 */
207 void
208 ncr53c9x_attach(sc, adapter, device)
209 struct ncr53c9x_softc *sc;
210 struct scsipi_adapter *adapter;
211 struct scsipi_device *device;
212 {
213
214 callout_init(&sc->sc_watchdog);
215 /*
216 * Allocate SCSI message buffers.
217 * Front-ends can override allocation to avoid alignment
218 * handling in the DMA engines. Note that that ncr53c9x_msgout()
219 * can request a 1 byte DMA transfer.
220 */
221 if (sc->sc_omess == NULL)
222 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
223
224 if (sc->sc_imess == NULL)
225 sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT);
226
227 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
228 printf("out of memory\n");
229 return;
230 }
231
232 /*
233 * Note, the front-end has set us up to print the chip variation.
234 */
235 if (sc->sc_rev >= NCR_VARIANT_MAX) {
236 printf("\n%s: unknown variant %d, devices not attached\n",
237 sc->sc_dev.dv_xname, sc->sc_rev);
238 return;
239 }
240
241 printf(": %s, %dMHz, SCSI ID %d\n",
242 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
243
244 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
245
246 /* The value *must not* be == 1. Make it 2 */
247 if (sc->sc_ccf == 1)
248 sc->sc_ccf = 2;
249
250 /*
251 * The recommended timeout is 250ms. This register is loaded
252 * with a value calculated as follows, from the docs:
253 *
254 * (timout period) x (CLK frequency)
255 * reg = -------------------------------------
256 * 8192 x (Clock Conversion Factor)
257 *
258 * Since CCF has a linear relation to CLK, this generally computes
259 * to the constant of 153.
260 */
261 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
262
263 /* CCF register only has 3 bits; 0 is actually 8 */
264 sc->sc_ccf &= 7;
265
266 /*
267 * fill in the prototype scsipi_link.
268 */
269 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
270 sc->sc_link.adapter_softc = sc;
271 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_id;
272 sc->sc_link.adapter = (adapter) ? adapter : &ncr53c9x_adapter;
273 sc->sc_link.device = (device) ? device : &ncr53c9x_device;
274 sc->sc_link.openings = 2;
275 sc->sc_link.scsipi_scsi.max_target = 7; /* XXX fas has 16(not supported) */
276 sc->sc_link.scsipi_scsi.max_lun = 7;
277 sc->sc_link.type = BUS_SCSI;
278
279 /*
280 * Add reference to adapter so that we drop the reference after
281 * config_found() to make sure the adatper is disabled.
282 */
283 if (scsipi_adapter_addref(&sc->sc_link) != 0) {
284 printf("%s: unable to enable controller\n",
285 sc->sc_dev.dv_xname);
286 return;
287 }
288
289 /* Reset state & bus */
290 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
291 sc->sc_state = 0;
292 ncr53c9x_init(sc, 1);
293
294 /*
295 * Now try to attach all the sub-devices
296 */
297 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
298
299 scsipi_adapter_delref(&sc->sc_link);
300 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
301 }
302
303 int
304 ncr53c9x_detach(sc, flags)
305 struct ncr53c9x_softc *sc;
306 int flags;
307 {
308 int error;
309
310 if (sc->sc_child) {
311 error = config_detach(sc->sc_child, flags);
312 if (error)
313 return (error);
314 }
315
316 free(sc->sc_imess, M_DEVBUF);
317 free(sc->sc_omess, M_DEVBUF);
318
319 return (0);
320 }
321
322 /*
323 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
324 * only this controller, but kills any on-going commands, and also stops
325 * and resets the DMA.
326 *
327 * After reset, registers are loaded with the defaults from the attach
328 * routine above.
329 */
330 void
331 ncr53c9x_reset(sc)
332 struct ncr53c9x_softc *sc;
333 {
334
335 /* reset DMA first */
336 NCRDMA_RESET(sc);
337
338 /* reset SCSI chip */
339 NCRCMD(sc, NCRCMD_RSTCHIP);
340 NCRCMD(sc, NCRCMD_NOP);
341 DELAY(500);
342
343 /* do these backwards, and fall through */
344 switch (sc->sc_rev) {
345 case NCR_VARIANT_ESP406:
346 case NCR_VARIANT_FAS408:
347 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
348 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
349 case NCR_VARIANT_AM53C974:
350 case NCR_VARIANT_FAS216:
351 case NCR_VARIANT_NCR53C94:
352 case NCR_VARIANT_NCR53C96:
353 case NCR_VARIANT_ESP200:
354 sc->sc_features |= NCR_F_HASCFG3;
355 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
356 case NCR_VARIANT_ESP100A:
357 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
358 case NCR_VARIANT_ESP100:
359 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
360 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
361 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
362 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
363 break;
364
365 case NCR_VARIANT_FAS366:
366 sc->sc_features |= NCR_F_HASCFG3 | NCR_F_FASTSCSI;
367 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
368 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
369 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
370 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
371 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
372 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
373 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
374 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
375 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
376 break;
377
378 default:
379 printf("%s: unknown revision code, assuming ESP100\n",
380 sc->sc_dev.dv_xname);
381 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
382 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
383 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
384 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
385 }
386
387 if (sc->sc_rev == NCR_VARIANT_AM53C974)
388 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
389
390 #if 0
391 printf("%s: ncr53c9x_reset: revision %d\n",
392 sc->sc_dev.dv_xname, sc->sc_rev);
393 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, ccf 0x%x, timeout 0x%x\n",
394 sc->sc_dev.dv_xname,
395 sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
396 sc->sc_ccf, sc->sc_timeout);
397 #endif
398 }
399
400 /*
401 * Reset the SCSI bus, but not the chip
402 */
403 void
404 ncr53c9x_scsi_reset(sc)
405 struct ncr53c9x_softc *sc;
406 {
407
408 (*sc->sc_glue->gl_dma_stop)(sc);
409
410 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
411 NCRCMD(sc, NCRCMD_RSTSCSI);
412 }
413
414 /*
415 * Initialize ncr53c9x state machine
416 */
417 void
418 ncr53c9x_init(sc, doreset)
419 struct ncr53c9x_softc *sc;
420 int doreset;
421 {
422 struct ncr53c9x_ecb *ecb;
423 struct ncr53c9x_linfo *li;
424 int i, r;
425
426 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
427
428 if (!ecb_pool_initialized) {
429 /* All instances share this pool */
430 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
431 "ncr53c9x_ecb", 0, NULL, NULL, 0);
432 ecb_pool_initialized = 1;
433 }
434
435 if (sc->sc_state == 0) {
436 /* First time through; initialize. */
437
438 TAILQ_INIT(&sc->ready_list);
439 sc->sc_nexus = NULL;
440 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
441 for (r = 0; r < NCR_NTARG; r++) {
442 LIST_INIT(&sc->sc_tinfo[r].luns);
443 }
444 } else {
445 /* Cancel any active commands. */
446 sc->sc_state = NCR_CLEANING;
447 sc->sc_msgify = 0;
448 if ((ecb = sc->sc_nexus) != NULL) {
449 ecb->xs->error = XS_TIMEOUT;
450 ncr53c9x_done(sc, ecb);
451 }
452 /* Cancel outstanding disconnected commands on each LUN */
453 for (r = 0; r < 8; r++) {
454 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
455 if ((ecb = li->untagged) != NULL) {
456 li->untagged = NULL;
457 /*
458 * XXXXXXX
459 *
460 * Should we terminate a command
461 * that never reached the disk?
462 */
463 li->busy = 0;
464 ecb->xs->error = XS_TIMEOUT;
465 ncr53c9x_done(sc, ecb);
466 }
467 for (i = 0; i < 256; i++)
468 if ((ecb = li->queued[i])) {
469 li->queued[i] = NULL;
470 ecb->xs->error = XS_TIMEOUT;
471 ncr53c9x_done(sc, ecb);
472 }
473 li->used = 0;
474 }
475 }
476 }
477
478 /*
479 * reset the chip to a known state
480 */
481 ncr53c9x_reset(sc);
482
483 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
484 for (r = 0; r < 8; r++) {
485 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
486 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
487
488 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
489 ? 0 : T_SYNCHOFF) |
490 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
491 T_NEED_TO_RESET;
492 #ifdef DEBUG
493 if (ncr53c9x_notag)
494 ti->flags &= ~T_TAG;
495 #endif
496 ti->period = sc->sc_minsync;
497 ti->offset = 0;
498 ti->cfg3 = 0;
499 }
500
501 if (doreset) {
502 sc->sc_state = NCR_SBR;
503 NCRCMD(sc, NCRCMD_RSTSCSI);
504 } else {
505 sc->sc_state = NCR_IDLE;
506 ncr53c9x_sched(sc);
507 }
508 }
509
510 /*
511 * Read the NCR registers, and save their contents for later use.
512 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
513 * NCR_INTR - so make sure it is the last read.
514 *
515 * I think that (from reading the docs) most bits in these registers
516 * only make sense when he DMA CSR has an interrupt showing. Call only
517 * if an interrupt is pending.
518 */
519 __inline__ void
520 ncr53c9x_readregs(sc)
521 struct ncr53c9x_softc *sc;
522 {
523
524 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
525 /* Only the stepo bits are of interest */
526 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
527
528 if (sc->sc_rev == NCR_VARIANT_FAS366)
529 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
530
531 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
532
533 if (sc->sc_glue->gl_clear_latched_intr != NULL)
534 (*sc->sc_glue->gl_clear_latched_intr)(sc);
535
536 /*
537 * Determine the SCSI bus phase, return either a real SCSI bus phase
538 * or some pseudo phase we use to detect certain exceptions.
539 */
540
541 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS)
542 ? /* Disconnected */ BUSFREE_PHASE
543 : sc->sc_espstat & NCRSTAT_PHASE;
544
545 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
546 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
547 }
548
549 /*
550 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
551 */
552 static inline int
553 ncr53c9x_stp2cpb(sc, period)
554 struct ncr53c9x_softc *sc;
555 int period;
556 {
557 int v;
558 v = (sc->sc_freq * period) / 250;
559 if (ncr53c9x_cpb2stp(sc, v) < period)
560 /* Correct round-down error */
561 v++;
562 return (v);
563 }
564
565 static inline void
566 ncr53c9x_setsync(sc, ti)
567 struct ncr53c9x_softc *sc;
568 struct ncr53c9x_tinfo *ti;
569 {
570 u_char syncoff, synctp;
571 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
572
573 if (ti->flags & T_SYNCMODE) {
574 syncoff = ti->offset;
575 synctp = ncr53c9x_stp2cpb(sc, ti->period);
576 if (sc->sc_features & NCR_F_FASTSCSI) {
577 /*
578 * If the period is 200ns or less (ti->period <= 50),
579 * put the chip in Fast SCSI mode.
580 */
581 if (ti->period <= 50)
582 /*
583 * There are (at least) 4 variations of the
584 * configuration 3 register. The drive attach
585 * routine sets the appropriate bit to put the
586 * chip into Fast SCSI mode so that it doesn't
587 * have to be figured out here each time.
588 */
589 cfg3 |= sc->sc_cfg3_fscsi;
590 }
591
592 /*
593 * Am53c974 requires different SYNCTP values when the
594 * FSCSI bit is off.
595 */
596 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
597 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
598 synctp--;
599 } else {
600 syncoff = 0;
601 synctp = 0;
602 }
603
604 if (sc->sc_features & NCR_F_HASCFG3)
605 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
606
607 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
608 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
609 }
610
611 /*
612 * Send a command to a target, set the driver state to NCR_SELECTING
613 * and let the caller take care of the rest.
614 *
615 * Keeping this as a function allows me to say that this may be done
616 * by DMA instead of programmed I/O soon.
617 */
618 void
619 ncr53c9x_select(sc, ecb)
620 struct ncr53c9x_softc *sc;
621 struct ncr53c9x_ecb *ecb;
622 {
623 struct scsipi_link *sc_link = ecb->xs->sc_link;
624 int target = sc_link->scsipi_scsi.target;
625 int lun = sc_link->scsipi_scsi.lun;
626 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
627 int tiflags = ti->flags;
628 u_char *cmd;
629 int clen;
630 int selatn3 = 1;
631 int selandstop = 0;
632 size_t dmasize;
633
634 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
635 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
636
637 sc->sc_state = NCR_SELECTING;
638 /*
639 * Schedule the timeout now, the first time we will go away
640 * expecting to come back due to an interrupt, because it is
641 * always possible that the interrupt may never happen.
642 */
643 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
644 int timeout = ecb->timeout;
645
646 if (hz > 100 && timeout > 1000)
647 timeout = (timeout / 1000) * hz;
648 else
649 timeout = (timeout * hz) / 1000;
650
651 callout_reset(&ecb->xs->xs_callout, timeout,
652 ncr53c9x_timeout, ecb);
653 }
654
655 /*
656 * The docs say the target register is never reset, and I
657 * can't think of a better place to set it
658 */
659 if (sc->sc_rev == NCR_VARIANT_FAS366) {
660 NCRCMD(sc, NCRCMD_FLUSH);
661 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
662 } else {
663 NCR_WRITE_REG(sc, NCR_SELID, target);
664 }
665 ncr53c9x_setsync(sc, ti);
666
667 /*
668 * Check to see if we can use SELATN3.
669 */
670 switch (sc->sc_rev) {
671 case NCR_VARIANT_ESP100:
672 /* Don't have NCRCMD_SELATN3 */
673 selatn3 = 0;
674 break;
675 default:
676 break;
677 }
678
679 if ((ecb->flags & ECB_SENSE) != 0) {
680 /*
681 * For REQUEST SENSE, we should not send an IDENTIFY or
682 * otherwise mangle the target. There should be no MESSAGE IN
683 * phase.
684 */
685 if (sc->sc_features & NCR_F_DMASELECT) {
686 /* setup DMA transfer for command */
687 dmasize = clen = ecb->clen;
688 sc->sc_cmdlen = clen;
689 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
690
691 /* Program the SCSI counter */
692 NCR_SET_COUNT(sc, dmasize);
693
694 if (sc->sc_rev != NCR_VARIANT_FAS366)
695 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
696
697 /* And get the targets attention */
698 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
699 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
700 NCRDMA_GO(sc);
701 } else {
702
703 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
704
705 NCRCMD(sc, NCRCMD_SELNATN);
706 }
707 return;
708 }
709
710 if (tiflags & T_NEGOTIATE) selandstop = 1;
711 cmd = (u_char *)&ecb->cmd.cmd;
712
713 if (ecb->tag[0] && !selatn3)
714 selandstop = 1;
715
716 if (ecb->tag[0] && selatn3 && !selandstop) {
717 /* We'll use tags */
718 clen = ecb->clen + 3;
719 cmd -= 3;
720 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
721 cmd[1] = ecb->tag[0]; /* msg[1] */
722 cmd[2] = ecb->tag[1]; /* msg[2] */
723 } else {
724 selatn3 = 0; /* Do not use selatn3 even if we have it */
725 clen = ecb->clen + 1;
726 cmd -= 1;
727 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF)?0:1);
728 }
729
730 if ((sc->sc_features & NCR_F_DMASELECT) && !selandstop) {
731
732 /* setup DMA transfer for command */
733 dmasize = clen;
734 sc->sc_cmdlen = clen;
735 sc->sc_cmdp = cmd;
736
737 /* Program the SCSI counter */
738 NCR_SET_COUNT(sc, dmasize);
739
740 /* load the count in */
741 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
742 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
743
744 /* And get the targets attention */
745 if (selatn3) {
746 sc->sc_msgout = SEND_TAG;
747 sc->sc_flags |= NCR_ATN;
748 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
749 } else
750 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
751 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
752 NCRDMA_GO(sc);
753 return;
754 }
755
756 /*
757 * Who am I. This is where we tell the target that we are
758 * happy for it to disconnect etc.
759 */
760 ncr53c9x_wrfifo(sc, cmd, 1);
761 cmd++; clen--;
762
763 if (selandstop) {
764 NCR_MISC(("SELATNS \n"));
765 /* Arbitrate, select and stop after IDENTIFY message */
766 NCRCMD(sc, NCRCMD_SELATNS);
767 return;
768 }
769
770 /* Now get the command into the FIFO */
771 ncr53c9x_wrfifo(sc, cmd, clen);
772
773 /* And get the targets attention */
774 if (selatn3) {
775 sc->sc_msgout = SEND_TAG;
776 sc->sc_flags |= NCR_ATN;
777 NCRCMD(sc, NCRCMD_SELATN3);
778 } else
779 NCRCMD(sc, NCRCMD_SELATN);
780 }
781
782 void
783 ncr53c9x_free_ecb(sc, ecb, flags)
784 struct ncr53c9x_softc *sc;
785 struct ncr53c9x_ecb *ecb;
786 int flags;
787 {
788 int s;
789
790 s = splbio();
791 ecb->flags = 0;
792 pool_put(&ecb_pool, (void *)ecb);
793 splx(s);
794 return;
795 }
796
797 struct ncr53c9x_ecb *
798 ncr53c9x_get_ecb(sc, flags)
799 struct ncr53c9x_softc *sc;
800 int flags;
801 {
802 struct ncr53c9x_ecb *ecb;
803 int s, wait = 0;
804
805 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
806 wait = PR_WAITOK;
807
808 s = splbio();
809 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, wait);
810 splx(s);
811 bzero(ecb, sizeof(*ecb));
812 if (ecb)
813 ecb->flags |= ECB_ALLOC;
814 return (ecb);
815 }
816
817 /*
818 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
819 */
820
821 /*
822 * Start a SCSI-command
823 * This function is called by the higher level SCSI-driver to queue/run
824 * SCSI-commands.
825 */
826 int
827 ncr53c9x_scsi_cmd(xs)
828 struct scsipi_xfer *xs;
829 {
830 struct scsipi_link *sc_link = xs->sc_link;
831 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
832 struct ncr53c9x_ecb *ecb;
833 struct ncr53c9x_tinfo *ti;
834 struct ncr53c9x_linfo *li;
835 int64_t lun = sc_link->scsipi_scsi.lun;
836 int s, flags;
837
838 NCR_TRACE(("[ncr53c9x_scsi_cmd] "));
839 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
840 sc_link->scsipi_scsi.target));
841
842 /*
843 * Find the LUN info structure and allocate one if it does
844 * not exist.
845 */
846 flags = xs->xs_control;
847 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
848 li = TINFO_LUN(ti, lun);
849 if (li == NULL) {
850 int wait = M_NOWAIT;
851
852 /* Initialize LUN info and add to list. */
853 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
854 wait = M_WAITOK;
855 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
856 return (TRY_AGAIN_LATER);
857 }
858 bzero(li, sizeof(*li));
859 li->last_used = time.tv_sec;
860 li->lun = lun;
861 s = splbio();
862 LIST_INSERT_HEAD(&ti->luns, li, link);
863 if (lun < NCR_NLUN)
864 ti->lun[lun] = li;
865 splx(s);
866 }
867
868 if ((ecb = ncr53c9x_get_ecb(sc, flags)) == NULL)
869 return (TRY_AGAIN_LATER);
870
871 /* Initialize ecb */
872 ecb->xs = xs;
873 ecb->timeout = xs->timeout;
874
875 if (flags & XS_CTL_RESET) {
876 ecb->flags |= ECB_RESET;
877 ecb->clen = 0;
878 ecb->dleft = 0;
879 } else {
880 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
881 ecb->clen = xs->cmdlen;
882 ecb->daddr = xs->data;
883 ecb->dleft = xs->datalen;
884 }
885 ecb->stat = 0;
886
887 s = splbio();
888
889 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
890 ecb->flags |= ECB_READY;
891 if (sc->sc_state == NCR_IDLE)
892 ncr53c9x_sched(sc);
893
894 splx(s);
895
896 if ((flags & XS_CTL_POLL) == 0)
897 return (SUCCESSFULLY_QUEUED);
898
899 /* Not allowed to use interrupts, use polling instead */
900 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
901 ncr53c9x_timeout(ecb);
902 if (ncr53c9x_poll(sc, xs, ecb->timeout))
903 ncr53c9x_timeout(ecb);
904 }
905 return (COMPLETE);
906 }
907
908 /*
909 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
910 */
911 int
912 ncr53c9x_poll(sc, xs, count)
913 struct ncr53c9x_softc *sc;
914 struct scsipi_xfer *xs;
915 int count;
916 {
917
918 NCR_TRACE(("[ncr53c9x_poll] "));
919 while (count) {
920 if (NCRDMA_ISINTR(sc)) {
921 ncr53c9x_intr(sc);
922 }
923 #if alternatively
924 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
925 ncr53c9x_intr(sc);
926 #endif
927 if ((xs->xs_status & XS_STS_DONE) != 0)
928 return (0);
929 if (sc->sc_state == NCR_IDLE) {
930 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
931 ncr53c9x_sched(sc);
932 }
933 DELAY(1000);
934 count--;
935 }
936 return (1);
937 }
938
939 int
940 ncr53c9x_ioctl(link, cmd, arg, flag, p)
941 struct scsipi_link *link;
942 u_long cmd;
943 caddr_t arg;
944 int flag;
945 struct proc *p;
946 {
947 struct ncr53c9x_softc *sc = link->adapter_softc;
948 int s, error = 0;
949
950 s = splbio();
951
952 switch (cmd) {
953 case SCBUSACCEL: {
954 struct scbusaccel_args *sp = (struct scbusaccel_args *)arg;
955 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sp->sa_target];
956
957 if (sp->sa_lun != 0)
958 break;
959
960 NCR_MISC(("%s: SCBUSACCEL flag 0x%x\n", sc->sc_dev.dv_xname,
961 sp->sa_flags));
962
963 if ((sp->sa_flags & SC_ACCEL_WIDE) != 0) {
964 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
965 sc->sc_dev.dv_xname, sp->sa_target));
966
967 if (sc->sc_rev == NCR_VARIANT_FAS366) {
968 ti->flags |= T_WIDE;
969 ti->width = 1;
970 }
971 }
972
973 if ((sp->sa_flags & SC_ACCEL_SYNC) != 0) {
974 /* If this adapter can't do sync; drop it */
975 if (sc->sc_minsync == 0)
976 break;
977
978 /*
979 * Check whether target is already clamped at
980 * non-sync operation on user request.
981 */
982 if ((ti->flags & T_SYNCHOFF) != 0)
983 break;
984
985 NCR_MISC(("%s: target %d: sync negotiation\n",
986 sc->sc_dev.dv_xname, sp->sa_target));
987 ti->flags |= T_NEGOTIATE;
988 }
989
990 if ((sp->sa_flags & SC_ACCEL_TAGS) != 0) {
991 if ((sc->sc_cfflags & (1<<((sp->sa_target)+16))) == 0) {
992 ti->flags |= T_TAG;
993 link->openings = 255;
994
995 printf("%s: target %d: tags\n",
996 sc->sc_dev.dv_xname, sp->sa_target);
997 }
998 }
999 break;
1000 }
1001 default:
1002 error = ENOTTY;
1003 break;
1004 }
1005 splx(s);
1006 return (error);
1007 }
1008
1009
1010 /*
1011 * LOW LEVEL SCSI UTILITIES
1012 */
1013
1014 /*
1015 * Schedule a scsi operation. This has now been pulled out of the interrupt
1016 * handler so that we may call it from ncr53c9x_scsi_cmd and ncr53c9x_done.
1017 * This may save us an unecessary interrupt just to get things going.
1018 * Should only be called when state == NCR_IDLE and at bio pl.
1019 */
1020 void
1021 ncr53c9x_sched(sc)
1022 struct ncr53c9x_softc *sc;
1023 {
1024 struct ncr53c9x_ecb *ecb;
1025 struct scsipi_link *sc_link;
1026 struct ncr53c9x_tinfo *ti;
1027 int lun;
1028 struct ncr53c9x_linfo *li;
1029 int s, tag;
1030
1031 NCR_TRACE(("[ncr53c9x_sched] "));
1032 if (sc->sc_state != NCR_IDLE)
1033 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1034
1035 /*
1036 * Find first ecb in ready queue that is for a target/lunit
1037 * combinations that is not busy.
1038 */
1039 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1040 ecb = TAILQ_NEXT(ecb, chain)) {
1041 sc_link = ecb->xs->sc_link;
1042 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1043 lun = sc_link->scsipi_scsi.lun;
1044
1045 /* Select type of tag for this command */
1046 if ((ti->flags & (T_RSELECTOFF)) != 0)
1047 tag = 0;
1048 else if ((ti->flags & (T_TAG)) == 0)
1049 tag = 0;
1050 else if ((ecb->flags & ECB_SENSE) != 0)
1051 tag = 0;
1052 else if (ecb->xs->xs_control & XS_CTL_URGENT)
1053 tag = MSG_HEAD_OF_Q_TAG;
1054 else
1055 tag = MSG_SIMPLE_Q_TAG;
1056 #if 0
1057 /* XXXX Use tags for polled commands? */
1058 if (ecb->xs->xs_control & XS_CTL_POLL)
1059 tag = 0;
1060 #endif
1061
1062 s = splbio();
1063 li = TINFO_LUN(ti, lun);
1064 if (li == NULL) {
1065 int wait = M_NOWAIT;
1066 int flags = ecb->xs->xs_control;
1067
1068 /* Initialize LUN info and add to list. */
1069 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
1070 wait = M_WAITOK;
1071 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) == NULL) {
1072 splx(s);
1073 continue;
1074 }
1075 bzero(li, sizeof(*li));
1076 li->lun = lun;
1077
1078 LIST_INSERT_HEAD(&ti->luns, li, link);
1079 if (lun < NCR_NLUN)
1080 ti->lun[lun] = li;
1081 }
1082 li->last_used = time.tv_sec;
1083 if (tag == 0) {
1084 /* Try to issue this as an un-tagged command */
1085 if (li->untagged == NULL)
1086 li->untagged = ecb;
1087 }
1088 if (li->untagged != NULL) {
1089 tag = 0;
1090 if ((li->busy != 1) && li->used == 0) {
1091 /* We need to issue this untagged command now */
1092 ecb = li->untagged;
1093 sc_link = ecb->xs->sc_link;
1094 }
1095 else {
1096 /* Not ready yet */
1097 splx(s);
1098 continue;
1099 }
1100 }
1101 ecb->tag[0] = tag;
1102 if (tag != 0) {
1103 int i;
1104
1105 /* Allocate a tag */
1106 if (li->used == 255) {
1107 /* no free tags */
1108 splx(s);
1109 continue;
1110 }
1111 /* Start from the last used location */
1112 for (i = li->avail; i < 256; i++) {
1113 if (li->queued[i] == NULL)
1114 break;
1115 }
1116 /* Couldn't find one, start again from the beginning */
1117 if (i == 256) {
1118 for (i = 0; i < 256; i++) {
1119 if (li->queued[i] == NULL)
1120 break;
1121 }
1122 }
1123 #ifdef DIAGNOSTIC
1124 /* There's supposed to be at least 1 tag avail */
1125 if (i == 256)
1126 panic("ncr53c9x_sched: tag alloc failure\n");
1127 #endif
1128
1129 /* Save where to start next time. */
1130 li->avail = i+1;
1131 li->used ++;
1132
1133 li->queued[i] = ecb;
1134 ecb->tag[1] = i;
1135 }
1136 splx(s);
1137 if (li->untagged != NULL && (li->busy != 1)) {
1138 li->busy = 1;
1139 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1140 ecb->flags &= ~ECB_READY;
1141 sc->sc_nexus = ecb;
1142 ncr53c9x_select(sc, ecb);
1143 break;
1144 }
1145 if (li->untagged == NULL && tag != 0) {
1146 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1147 ecb->flags &= ~ECB_READY;
1148 sc->sc_nexus = ecb;
1149 ncr53c9x_select(sc, ecb);
1150 break;
1151 } else
1152 NCR_MISC(("%d:%d busy\n",
1153 sc_link->scsipi_scsi.target,
1154 sc_link->scsipi_scsi.lun));
1155 }
1156 }
1157
1158 void
1159 ncr53c9x_sense(sc, ecb)
1160 struct ncr53c9x_softc *sc;
1161 struct ncr53c9x_ecb *ecb;
1162 {
1163 struct scsipi_xfer *xs = ecb->xs;
1164 struct scsipi_link *sc_link = xs->sc_link;
1165 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1166 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1167 struct ncr53c9x_linfo *li;
1168 int lun = sc_link->scsipi_scsi.lun;
1169
1170 NCR_MISC(("requesting sense "));
1171 /* Next, setup a request sense command block */
1172 bzero(ss, sizeof(*ss));
1173 ss->opcode = REQUEST_SENSE;
1174 ss->byte2 = sc_link->scsipi_scsi.lun << 5;
1175 ss->length = sizeof(struct scsipi_sense_data);
1176 ecb->clen = sizeof(*ss);
1177 ecb->daddr = (char *)&xs->sense.scsi_sense;
1178 ecb->dleft = sizeof(struct scsipi_sense_data);
1179 ecb->flags |= ECB_SENSE;
1180 ecb->timeout = NCR_SENSE_TIMEOUT;
1181 ti->senses++;
1182 li = TINFO_LUN(ti, lun);
1183 if (li->busy) li->busy = 0;
1184 ncr53c9x_dequeue(sc, ecb);
1185 li->untagged = ecb; /* must be executed first to fix C/A */
1186 li->busy = 2;
1187 if (ecb == sc->sc_nexus) {
1188 ncr53c9x_select(sc, ecb);
1189 } else {
1190 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1191 ecb->flags |= ECB_READY;
1192 if (sc->sc_state == NCR_IDLE)
1193 ncr53c9x_sched(sc);
1194 }
1195 }
1196
1197 /*
1198 * POST PROCESSING OF SCSI_CMD (usually current)
1199 */
1200 void
1201 ncr53c9x_done(sc, ecb)
1202 struct ncr53c9x_softc *sc;
1203 struct ncr53c9x_ecb *ecb;
1204 {
1205 struct scsipi_xfer *xs = ecb->xs;
1206 struct scsipi_link *sc_link = xs->sc_link;
1207 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1208 int lun = sc_link->scsipi_scsi.lun;
1209 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1210
1211 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1212
1213 callout_stop(&ecb->xs->xs_callout);
1214
1215 if (ecb->stat == SCSI_QUEUE_FULL) {
1216 /*
1217 * Set current throttle -- we should reset
1218 * this periodically
1219 */
1220 sc_link->openings = li->used - 1;
1221 printf("\n%s: QFULL -- throttling to %d commands\n",
1222 sc->sc_dev.dv_xname, sc_link->openings);
1223
1224 }
1225
1226 /*
1227 * Now, if we've come here with no error code, i.e. we've kept the
1228 * initial XS_NOERROR, and the status code signals that we should
1229 * check sense, we'll need to set up a request sense cmd block and
1230 * push the command back into the ready queue *before* any other
1231 * commands for this target/lunit, else we lose the sense info.
1232 * We don't support chk sense conditions for the request sense cmd.
1233 */
1234 if (xs->error == XS_NOERROR) {
1235 xs->status = ecb->stat;
1236 if ((ecb->flags & ECB_ABORT) != 0) {
1237 xs->error = XS_TIMEOUT;
1238 } else if ((ecb->flags & ECB_SENSE) != 0) {
1239 xs->error = XS_SENSE;
1240 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1241 /* First, save the return values */
1242 xs->resid = ecb->dleft;
1243 ncr53c9x_sense(sc, ecb);
1244 return;
1245 } else {
1246 xs->resid = ecb->dleft;
1247 }
1248 }
1249
1250 xs->xs_status |= XS_STS_DONE;
1251
1252 #ifdef NCR53C9X_DEBUG
1253 if (ncr53c9x_debug & NCR_SHOWMISC) {
1254 if (xs->resid != 0)
1255 printf("resid=%d ", xs->resid);
1256 if (xs->error == XS_SENSE)
1257 printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
1258 else
1259 printf("error=%d\n", xs->error);
1260 }
1261 #endif
1262
1263 /*
1264 * Remove the ECB from whatever queue it's on.
1265 */
1266 ncr53c9x_dequeue(sc, ecb);
1267 if (ecb == sc->sc_nexus) {
1268 sc->sc_nexus = NULL;
1269 if (sc->sc_state != NCR_CLEANING) {
1270 sc->sc_state = NCR_IDLE;
1271 ncr53c9x_sched(sc);
1272 }
1273 }
1274
1275 if (xs->error == XS_SELTIMEOUT) {
1276 /* Selection timeout -- discard this LUN if empty */
1277 if (li->untagged == NULL && li->used == 0) {
1278 if (lun < NCR_NLUN)
1279 ti->lun[lun] = NULL;
1280 LIST_REMOVE(li, link);
1281 free(li, M_DEVBUF);
1282 }
1283 }
1284
1285 ncr53c9x_free_ecb(sc, ecb, xs->xs_control);
1286 ti->cmds++;
1287 scsipi_done(xs);
1288 }
1289
1290 void
1291 ncr53c9x_dequeue(sc, ecb)
1292 struct ncr53c9x_softc *sc;
1293 struct ncr53c9x_ecb *ecb;
1294 {
1295 struct ncr53c9x_tinfo *ti =
1296 &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1297 struct ncr53c9x_linfo *li;
1298 int64_t lun = ecb->xs->sc_link->scsipi_scsi.lun;
1299
1300 li = TINFO_LUN(ti, lun);
1301 #ifdef DIAGNOSTIC
1302 if (li == NULL || li->lun != lun)
1303 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1304 (long long) lun, ecb);
1305 #endif
1306 if (li->untagged == ecb) {
1307 li->busy = 0;
1308 li->untagged = NULL;
1309 }
1310 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1311 #ifdef DIAGNOSTIC
1312 if (li->queued[ecb->tag[1]] != NULL &&
1313 (li->queued[ecb->tag[1]] != ecb))
1314 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1315 "instead of ecb %p\n", ecb->tag[1],
1316 (long long) lun,
1317 li->queued[ecb->tag[1]], ecb);
1318 #endif
1319 li->queued[ecb->tag[1]] = NULL;
1320 li->used --;
1321 }
1322
1323 if ((ecb->flags & ECB_READY) != 0) {
1324 ecb->flags &= ~ECB_READY;
1325 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1326 }
1327 }
1328
1329 /*
1330 * INTERRUPT/PROTOCOL ENGINE
1331 */
1332
1333 /*
1334 * Schedule an outgoing message by prioritizing it, and asserting
1335 * attention on the bus. We can only do this when we are the initiator
1336 * else there will be an illegal command interrupt.
1337 */
1338 #define ncr53c9x_sched_msgout(m) \
1339 do { \
1340 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1341 NCRCMD(sc, NCRCMD_SETATN); \
1342 sc->sc_flags |= NCR_ATN; \
1343 sc->sc_msgpriq |= (m); \
1344 } while (0)
1345
1346
1347
1348 static void
1349 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1350 {
1351 NCR_MISC(("[flushfifo] "));
1352
1353 NCRCMD(sc, NCRCMD_FLUSH);
1354
1355 if (sc->sc_phase == COMMAND_PHASE ||
1356 sc->sc_phase == MESSAGE_OUT_PHASE)
1357 DELAY(2);
1358 }
1359
1360 static int
1361 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1362 {
1363 int i, n;
1364 u_char *buf;
1365
1366 switch(how) {
1367 case NCR_RDFIFO_START:
1368 buf = sc->sc_imess;
1369 sc->sc_imlen = 0;
1370 break;
1371 case NCR_RDFIFO_CONTINUE:
1372 buf = sc->sc_imess + sc->sc_imlen;
1373 break;
1374 default:
1375 panic("ncr53c9x_rdfifo: bad flag\n");
1376 break;
1377 }
1378
1379 /*
1380 * XXX buffer (sc_imess) size for message
1381 */
1382
1383 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1384
1385 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1386 n *= 2;
1387
1388 for (i = 0; i < n; i++)
1389 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1390
1391 if (sc->sc_espstat2 & FAS_STAT2_ISHUTTLE) {
1392
1393 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1394 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1395
1396 NCR_READ_REG(sc, NCR_FIFO);
1397
1398 ncr53c9x_flushfifo(sc);
1399 }
1400 } else {
1401 for (i = 0; i < n; i++)
1402 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1403 }
1404
1405 sc->sc_imlen += i;
1406
1407 #ifdef NCR53C9X_DEBUG
1408 {
1409 int j;
1410
1411 NCR_TRACE(("\n[rdfifo %s (%d):",
1412 (how == NCR_RDFIFO_START) ? "start" : "cont",
1413 (int)sc->sc_imlen));
1414 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1415 for (j = 0; j < sc->sc_imlen; j++)
1416 printf(" %02x", sc->sc_imess[j]);
1417 printf("]\n");
1418 }
1419 }
1420 #endif
1421 return sc->sc_imlen;
1422 }
1423
1424 static void
1425 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1426 {
1427 int i;
1428
1429 #ifdef NCR53C9X_DEBUG
1430 NCR_MISC(("[wrfifo(%d):", len));
1431 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1432 for (i = 0; i < len; i++)
1433 printf(" %02x", p[i]);
1434 printf("]\n");
1435 }
1436 #endif
1437
1438 for (i = 0; i < len; i++) {
1439 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1440
1441 if (sc->sc_rev == NCR_VARIANT_FAS366)
1442 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1443 }
1444 }
1445
1446 int
1447 ncr53c9x_reselect(sc, message, tagtype, tagid)
1448 struct ncr53c9x_softc *sc;
1449 int message;
1450 int tagtype, tagid;
1451 {
1452 u_char selid, target, lun;
1453 struct ncr53c9x_ecb *ecb = NULL;
1454 struct ncr53c9x_tinfo *ti;
1455 struct ncr53c9x_linfo *li;
1456
1457
1458 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1459 target = sc->sc_selid;
1460 } else {
1461 /*
1462 * The SCSI chip made a snapshot of the data bus while the reselection
1463 * was being negotiated. This enables us to determine which target did
1464 * the reselect.
1465 */
1466 selid = sc->sc_selid & ~(1 << sc->sc_id);
1467 if (selid & (selid - 1)) {
1468 printf("%s: reselect with invalid selid %02x;"
1469 " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
1470 goto reset;
1471 }
1472
1473 target = ffs(selid) - 1;
1474 }
1475 lun = message & 0x07;
1476
1477 /*
1478 * Search wait queue for disconnected cmd
1479 * The list should be short, so I haven't bothered with
1480 * any more sophisticated structures than a simple
1481 * singly linked list.
1482 */
1483 ti = &sc->sc_tinfo[target];
1484 li = TINFO_LUN(ti, lun);
1485
1486 /*
1487 * We can get as far as the LUN with the IDENTIFY
1488 * message. Check to see if we're running an
1489 * un-tagged command. Otherwise ack the IDENTIFY
1490 * and wait for a tag message.
1491 */
1492 if (li != NULL) {
1493 if (li->untagged != NULL && li->busy)
1494 ecb = li->untagged;
1495 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1496 /* Wait for tag to come by */
1497 sc->sc_state = NCR_IDENTIFIED;
1498 return (0);
1499 } else if (tagtype)
1500 ecb = li->queued[tagid];
1501 }
1502 if (ecb == NULL) {
1503 printf("%s: reselect from target %d lun %d tag %x:%x with no nexus;"
1504 " sending ABORT\n",
1505 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1506 goto abort;
1507 }
1508
1509 /* Make this nexus active again. */
1510 sc->sc_state = NCR_CONNECTED;
1511 sc->sc_nexus = ecb;
1512 ncr53c9x_setsync(sc, ti);
1513
1514 if (ecb->flags & ECB_RESET)
1515 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1516 else if (ecb->flags & ECB_ABORT)
1517 ncr53c9x_sched_msgout(SEND_ABORT);
1518
1519 /* Do an implicit RESTORE POINTERS. */
1520 sc->sc_dp = ecb->daddr;
1521 sc->sc_dleft = ecb->dleft;
1522
1523 return (0);
1524
1525 reset:
1526 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1527 return (1);
1528
1529 abort:
1530 ncr53c9x_sched_msgout(SEND_ABORT);
1531 return (1);
1532 }
1533
1534
1535 /*
1536 * XXX this might be common thing(check with scsipi)
1537 */
1538 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1539 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1540 #define ISEXTMSG(m) ((m) == 1)
1541
1542 static inline int
1543 __verify_msg_format(u_char *p, int len)
1544 {
1545
1546 if (len == 1 && IS1BYTEMSG(p[0]))
1547 return 1;
1548 if (len == 2 && IS2BYTEMSG(p[0]))
1549 return 1;
1550 if (len >= 3 && ISEXTMSG(p[0]) &&
1551 len == p[1] + 2)
1552 return 1;
1553
1554 return 0;
1555 }
1556
1557 /*
1558 * Get an incoming message as initiator.
1559 *
1560 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1561 * byte in the FIFO
1562 */
1563 void
1564 ncr53c9x_msgin(sc)
1565 struct ncr53c9x_softc *sc;
1566 {
1567
1568 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1569
1570 if (sc->sc_imlen == 0) {
1571 printf("%s: msgin: no msg byte available\n", sc->sc_dev.dv_xname);
1572 return;
1573 }
1574
1575 /*
1576 * Prepare for a new message. A message should (according
1577 * to the SCSI standard) be transmitted in one single
1578 * MESSAGE_IN_PHASE. If we have been in some other phase,
1579 * then this is a new message.
1580 */
1581 if (sc->sc_prevphase != MESSAGE_IN_PHASE && sc->sc_state != NCR_RESELECTED) {
1582 printf("%s: phase change, dropping message, prev %d, state %d\n",
1583 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1584 sc->sc_flags &= ~NCR_DROP_MSGI;
1585 sc->sc_imlen = 0;
1586 }
1587
1588 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1589
1590 /*
1591 * If we're going to reject the message, don't bother storing
1592 * the incoming bytes. But still, we need to ACK them.
1593 */
1594 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1595 NCRCMD(sc, NCRCMD_MSGOK);
1596 printf("<dropping msg byte %x>",
1597 sc->sc_imess[sc->sc_imlen]);
1598 return;
1599 }
1600
1601 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1602 ncr53c9x_sched_msgout(SEND_REJECT);
1603 sc->sc_flags |= NCR_DROP_MSGI;
1604 } else {
1605 u_char *pb;
1606 int plen;
1607
1608 switch (sc->sc_state) {
1609 /*
1610 * if received message is the first of reselection
1611 * then first byte is selid, and then message
1612 */
1613 case NCR_RESELECTED:
1614 pb = sc->sc_imess + 1;
1615 plen = sc->sc_imlen - 1;
1616 break;
1617 default:
1618 pb = sc->sc_imess;
1619 plen = sc->sc_imlen;
1620 break;
1621 }
1622
1623 if (__verify_msg_format(pb, plen))
1624 goto gotit;
1625 }
1626
1627 /* Ack what we have so far */
1628 NCRCMD(sc, NCRCMD_MSGOK);
1629 return;
1630
1631 gotit:
1632 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1633 /* we got complete message, flush the imess, XXX nobody uses imlen below */
1634 sc->sc_imlen = 0;
1635 /*
1636 * Now we should have a complete message (1 byte, 2 byte
1637 * and moderately long extended messages). We only handle
1638 * extended messages which total length is shorter than
1639 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1640 */
1641 switch (sc->sc_state) {
1642 struct ncr53c9x_ecb *ecb;
1643 struct ncr53c9x_tinfo *ti;
1644 struct ncr53c9x_linfo *li;
1645 int lun;
1646
1647 case NCR_CONNECTED:
1648 ecb = sc->sc_nexus;
1649 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1650
1651 switch (sc->sc_imess[0]) {
1652 case MSG_CMDCOMPLETE:
1653 NCR_MSGS(("cmdcomplete "));
1654 if (sc->sc_dleft < 0) {
1655 scsi_print_addr(ecb->xs->sc_link);
1656 printf("got %ld extra bytes\n",
1657 -(long)sc->sc_dleft);
1658 sc->sc_dleft = 0;
1659 }
1660 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
1661 ? 0
1662 : sc->sc_dleft;
1663 if ((ecb->flags & ECB_SENSE) == 0)
1664 ecb->xs->resid = ecb->dleft;
1665 sc->sc_state = NCR_CMDCOMPLETE;
1666 break;
1667
1668 case MSG_MESSAGE_REJECT:
1669 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1670 switch (sc->sc_msgout) {
1671 case SEND_TAG:
1672 /*
1673 * Target does not like tagged queuing.
1674 * - Flush the command queue
1675 * - Disable tagged queuing for the target
1676 * - Dequeue ecb from the queued array.
1677 */
1678 printf("%s: tagged queuing rejected: target %d\n",
1679 sc->sc_dev.dv_xname,
1680 ecb->xs->sc_link->scsipi_scsi.target);
1681
1682 NCR_MSGS(("(rejected sent tag)"));
1683 NCRCMD(sc, NCRCMD_FLUSH);
1684 DELAY(1);
1685 ti->flags &= ~T_TAG;
1686 lun = ecb->xs->sc_link->scsipi_scsi.lun;
1687 li = TINFO_LUN(ti, lun);
1688 if (ecb->tag[0] &&
1689 li->queued[ecb->tag[1]] != NULL) {
1690 li->queued[ecb->tag[1]] = NULL;
1691 li->used --;
1692 }
1693 ecb->tag[0] = ecb->tag[1] = 0;
1694 li->untagged = ecb;
1695 li->busy = 1;
1696 break;
1697
1698 case SEND_SDTR:
1699 printf("%s: sync transfer rejected: target %d\n",
1700 sc->sc_dev.dv_xname,
1701 ecb->xs->sc_link->scsipi_scsi.target);
1702
1703 sc->sc_flags &= ~NCR_SYNCHNEGO;
1704 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1705 ncr53c9x_setsync(sc, ti);
1706 break;
1707
1708 case SEND_WDTR:
1709 printf("%s: wide transfer rejected: target %d\n",
1710 sc->sc_dev.dv_xname,
1711 ecb->xs->sc_link->scsipi_scsi.target);
1712 ti->flags &= ~T_WIDE;
1713 break;
1714
1715 case SEND_INIT_DET_ERR:
1716 goto abort;
1717 }
1718 break;
1719
1720 case MSG_NOOP:
1721 NCR_MSGS(("noop "));
1722 break;
1723
1724 case MSG_HEAD_OF_Q_TAG:
1725 case MSG_SIMPLE_Q_TAG:
1726 case MSG_ORDERED_Q_TAG:
1727 NCR_MSGS(("TAG %x:%x", sc->sc_imess[0], sc->sc_imess[1]));
1728 break;
1729
1730 case MSG_DISCONNECT:
1731 NCR_MSGS(("disconnect "));
1732 ti->dconns++;
1733 sc->sc_state = NCR_DISCONNECT;
1734
1735 /*
1736 * Mark the fact that all bytes have moved. The
1737 * target may not bother to do a SAVE POINTERS
1738 * at this stage. This flag will set the residual
1739 * count to zero on MSG COMPLETE.
1740 */
1741 if (sc->sc_dleft == 0)
1742 ecb->flags |= ECB_TENTATIVE_DONE;
1743
1744 break;
1745
1746 case MSG_SAVEDATAPOINTER:
1747 NCR_MSGS(("save datapointer "));
1748 ecb->daddr = sc->sc_dp;
1749 ecb->dleft = sc->sc_dleft;
1750 break;
1751
1752 case MSG_RESTOREPOINTERS:
1753 NCR_MSGS(("restore datapointer "));
1754 sc->sc_dp = ecb->daddr;
1755 sc->sc_dleft = ecb->dleft;
1756 break;
1757
1758 case MSG_EXTENDED:
1759 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1760 switch (sc->sc_imess[2]) {
1761 case MSG_EXT_SDTR:
1762 NCR_MSGS(("SDTR period %d, offset %d ",
1763 sc->sc_imess[3], sc->sc_imess[4]));
1764 if (sc->sc_imess[1] != 3)
1765 goto reject;
1766 ti->period = sc->sc_imess[3];
1767 ti->offset = sc->sc_imess[4];
1768 ti->flags &= ~T_NEGOTIATE;
1769 if (sc->sc_minsync == 0 ||
1770 ti->offset == 0 ||
1771 ti->period > 124) {
1772 #ifdef NCR53C9X_DEBUG
1773 scsi_print_addr(ecb->xs->sc_link);
1774 printf("async mode\n");
1775 #endif
1776 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1777 /*
1778 * target initiated negotiation
1779 */
1780 ti->offset = 0;
1781 ti->flags &= ~T_SYNCMODE;
1782 ncr53c9x_sched_msgout(
1783 SEND_SDTR);
1784 } else {
1785 /* we are async */
1786 ti->flags &= ~T_SYNCMODE;
1787 }
1788 } else {
1789 int r = 250/ti->period;
1790 int s = (100*250)/ti->period - 100*r;
1791 int p;
1792
1793 p = ncr53c9x_stp2cpb(sc, ti->period);
1794 ti->period = ncr53c9x_cpb2stp(sc, p);
1795 #ifdef NCR53C9X_DEBUG
1796 scsi_print_addr(ecb->xs->sc_link);
1797 printf("max sync rate %d.%02dMB/s\n",
1798 r, s);
1799 #endif
1800 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1801 /*
1802 * target initiated negotiation
1803 */
1804 if (ti->period <
1805 sc->sc_minsync)
1806 ti->period =
1807 sc->sc_minsync;
1808 if (ti->offset > 15)
1809 ti->offset = 15;
1810 ti->flags &= ~T_SYNCMODE;
1811 ncr53c9x_sched_msgout(
1812 SEND_SDTR);
1813 } else {
1814 /* we are sync */
1815 ti->flags |= T_SYNCMODE;
1816 }
1817 }
1818 sc->sc_flags &= ~NCR_SYNCHNEGO;
1819 ncr53c9x_setsync(sc, ti);
1820 break;
1821
1822 case MSG_EXT_WDTR:
1823 printf("%s: wide mode %d\n",
1824 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1825 if (sc->sc_imess[3] == 1) {
1826 ti->cfg3 |= NCRFASCFG3_EWIDE;
1827 ncr53c9x_setsync(sc, ti);
1828 }
1829 ti->flags &= ~T_WIDE;
1830 break;
1831 default:
1832 scsi_print_addr(ecb->xs->sc_link);
1833 printf("unrecognized MESSAGE EXTENDED;"
1834 " sending REJECT\n");
1835 goto reject;
1836 }
1837 break;
1838
1839 default:
1840 NCR_MSGS(("ident "));
1841 scsi_print_addr(ecb->xs->sc_link);
1842 printf("unrecognized MESSAGE; sending REJECT\n");
1843 reject:
1844 ncr53c9x_sched_msgout(SEND_REJECT);
1845 break;
1846 }
1847 break;
1848
1849 case NCR_IDENTIFIED:
1850 /*
1851 * IDENTIFY message was received and queue tag is expected now
1852 */
1853 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1854 (sc->sc_msgify == 0)) {
1855 printf("%s: TAG reselect without IDENTIFY;"
1856 " MSG %x;"
1857 " sending DEVICE RESET\n",
1858 sc->sc_dev.dv_xname,
1859 sc->sc_imess[0]);
1860 goto reset;
1861 }
1862 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1863 sc->sc_imess[0], sc->sc_imess[1]);
1864 break;
1865
1866 case NCR_RESELECTED:
1867 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1868 sc->sc_msgify = sc->sc_imess[1];
1869 } else {
1870 printf("%s: reselect without IDENTIFY;"
1871 " MSG %x;"
1872 " sending DEVICE RESET\n",
1873 sc->sc_dev.dv_xname,
1874 sc->sc_imess[1]);
1875 goto reset;
1876 }
1877 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1878 break;
1879
1880 default:
1881 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1882 sc->sc_dev.dv_xname);
1883 reset:
1884 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1885 break;
1886
1887 abort:
1888 ncr53c9x_sched_msgout(SEND_ABORT);
1889 break;
1890 }
1891
1892 /* if we have more messages to send set ATN */
1893 if (sc->sc_msgpriq)
1894 NCRCMD(sc, NCRCMD_SETATN);
1895
1896 /* Ack last message byte */
1897 NCRCMD(sc, NCRCMD_MSGOK);
1898
1899 /* Done, reset message pointer. */
1900 sc->sc_flags &= ~NCR_DROP_MSGI;
1901 sc->sc_imlen = 0;
1902 }
1903
1904
1905 /*
1906 * Send the highest priority, scheduled message
1907 */
1908 void
1909 ncr53c9x_msgout(sc)
1910 struct ncr53c9x_softc *sc;
1911 {
1912 struct ncr53c9x_tinfo *ti;
1913 struct ncr53c9x_ecb *ecb;
1914 size_t size;
1915
1916 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1917 sc->sc_msgpriq, sc->sc_prevphase));
1918
1919 /*
1920 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1921 * condition on the SCSI bus. The 53c9x chip
1922 * automatically turns off ATN before sending the
1923 * message byte. (see also the comment below in the
1924 * default case when picking out a message to send)
1925 */
1926 if (sc->sc_flags & NCR_ATN) {
1927 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1928 new:
1929 NCRCMD(sc, NCRCMD_FLUSH);
1930 /* DELAY(1); */
1931 sc->sc_msgoutq = 0;
1932 sc->sc_omlen = 0;
1933 }
1934 } else {
1935 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1936 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1937 goto new;
1938 } else {
1939 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1940 sc->sc_dev.dv_xname, __LINE__);
1941 }
1942 }
1943
1944 if (sc->sc_omlen == 0) {
1945 /* Pick up highest priority message */
1946 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1947 sc->sc_msgoutq |= sc->sc_msgout;
1948 sc->sc_msgpriq &= ~sc->sc_msgout;
1949 sc->sc_omlen = 1; /* "Default" message len */
1950 switch (sc->sc_msgout) {
1951 case SEND_SDTR:
1952 ecb = sc->sc_nexus;
1953 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1954 sc->sc_omess[0] = MSG_EXTENDED;
1955 sc->sc_omess[1] = 3;
1956 sc->sc_omess[2] = MSG_EXT_SDTR;
1957 sc->sc_omess[3] = ti->period;
1958 sc->sc_omess[4] = ti->offset;
1959 sc->sc_omlen = 5;
1960 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1961 ti->flags |= T_SYNCMODE;
1962 ncr53c9x_setsync(sc, ti);
1963 }
1964 break;
1965 case SEND_WDTR:
1966 ecb = sc->sc_nexus;
1967 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1968 sc->sc_omess[0] = MSG_EXTENDED;
1969 sc->sc_omess[1] = 2;
1970 sc->sc_omess[2] = MSG_EXT_WDTR;
1971 sc->sc_omess[3] = ti->width;
1972 sc->sc_omlen = 4;
1973 break;
1974 case SEND_IDENTIFY:
1975 if (sc->sc_state != NCR_CONNECTED) {
1976 printf("%s at line %d: no nexus\n",
1977 sc->sc_dev.dv_xname, __LINE__);
1978 }
1979 ecb = sc->sc_nexus;
1980 sc->sc_omess[0] =
1981 MSG_IDENTIFY(ecb->xs->sc_link->scsipi_scsi.lun, 0);
1982 break;
1983 case SEND_TAG:
1984 if (sc->sc_state != NCR_CONNECTED) {
1985 printf("%s at line %d: no nexus\n",
1986 sc->sc_dev.dv_xname, __LINE__);
1987 }
1988 ecb = sc->sc_nexus;
1989 sc->sc_omess[0] = ecb->tag[0];
1990 sc->sc_omess[1] = ecb->tag[1];
1991 sc->sc_omlen = 2;
1992 break;
1993 case SEND_DEV_RESET:
1994 sc->sc_flags |= NCR_ABORTING;
1995 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1996 ecb = sc->sc_nexus;
1997 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1998 ti->flags &= ~T_SYNCMODE;
1999 if ((ti->flags & T_SYNCHOFF) == 0)
2000 /* We can re-start sync negotiation */
2001 ti->flags |= T_NEGOTIATE;
2002 break;
2003 case SEND_PARITY_ERROR:
2004 sc->sc_omess[0] = MSG_PARITY_ERROR;
2005 break;
2006 case SEND_ABORT:
2007 sc->sc_flags |= NCR_ABORTING;
2008 sc->sc_omess[0] = MSG_ABORT;
2009 break;
2010 case SEND_INIT_DET_ERR:
2011 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
2012 break;
2013 case SEND_REJECT:
2014 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
2015 break;
2016 default:
2017 /*
2018 * We normally do not get here, since the chip
2019 * automatically turns off ATN before the last
2020 * byte of a message is sent to the target.
2021 * However, if the target rejects our (multi-byte)
2022 * message early by switching to MSG IN phase
2023 * ATN remains on, so the target may return to
2024 * MSG OUT phase. If there are no scheduled messages
2025 * left we send a NO-OP.
2026 *
2027 * XXX - Note that this leaves no useful purpose for
2028 * the NCR_ATN flag.
2029 */
2030 sc->sc_flags &= ~NCR_ATN;
2031 sc->sc_omess[0] = MSG_NOOP;
2032 break;
2033 }
2034 sc->sc_omp = sc->sc_omess;
2035 }
2036
2037 #ifdef DEBUG
2038 {
2039 int i;
2040
2041 NCR_MISC(("<msgout:"));
2042 for (i = 0; i < sc->sc_omlen; i++)
2043 NCR_MISC((" %02x", sc->sc_omess[i]));
2044 NCR_MISC(("> "));
2045 }
2046 #endif
2047 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2048 /*
2049 * XXX fifo size
2050 */
2051 ncr53c9x_flushfifo(sc);
2052 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2053 NCRCMD(sc, NCRCMD_TRANS);
2054 } else {
2055 /* (re)send the message */
2056 size = min(sc->sc_omlen, sc->sc_maxxfer);
2057 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2058 /* Program the SCSI counter */
2059 NCR_SET_COUNT(sc, size);
2060
2061 /* Load the count in and start the message-out transfer */
2062 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2063 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2064 NCRDMA_GO(sc);
2065 }
2066 }
2067
2068 /*
2069 * This is the most critical part of the driver, and has to know
2070 * how to deal with *all* error conditions and phases from the SCSI
2071 * bus. If there are no errors and the DMA was active, then call the
2072 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2073 * and we can return from here without further processing.
2074 *
2075 * Most of this needs verifying.
2076 */
2077 int
2078 ncr53c9x_intr(arg)
2079 void *arg;
2080 {
2081 struct ncr53c9x_softc *sc = arg;
2082 struct ncr53c9x_ecb *ecb;
2083 struct scsipi_link *sc_link;
2084 struct ncr53c9x_tinfo *ti;
2085 size_t size;
2086 int nfifo;
2087
2088 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2089
2090 if (!NCRDMA_ISINTR(sc))
2091 return (0);
2092
2093 again:
2094 /* and what do the registers say... */
2095 ncr53c9x_readregs(sc);
2096
2097 sc->sc_intrcnt.ev_count++;
2098
2099 /*
2100 * At the moment, only a SCSI Bus Reset or Illegal
2101 * Command are classed as errors. A disconnect is a
2102 * valid condition, and we let the code check is the
2103 * "NCR_BUSFREE_OK" flag was set before declaring it
2104 * and error.
2105 *
2106 * Also, the status register tells us about "Gross
2107 * Errors" and "Parity errors". Only the Gross Error
2108 * is really bad, and the parity errors are dealt
2109 * with later
2110 *
2111 * TODO
2112 * If there are too many parity error, go to slow
2113 * cable mode ?
2114 */
2115
2116 /* SCSI Reset */
2117 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2118 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2119 NCRCMD(sc, NCRCMD_FLUSH);
2120 DELAY(1);
2121 }
2122 if (sc->sc_state != NCR_SBR) {
2123 printf("%s: SCSI bus reset\n",
2124 sc->sc_dev.dv_xname);
2125 ncr53c9x_init(sc, 0); /* Restart everything */
2126 return (1);
2127 }
2128 #if 0
2129 /*XXX*/ printf("<expected bus reset: "
2130 "[intr %x, stat %x, step %d]>\n",
2131 sc->sc_espintr, sc->sc_espstat,
2132 sc->sc_espstep);
2133 #endif
2134 if (sc->sc_nexus != NULL)
2135 panic("%s: nexus in reset state",
2136 sc->sc_dev.dv_xname);
2137 goto sched;
2138 }
2139
2140 ecb = sc->sc_nexus;
2141
2142 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2143 if (sc->sc_espintr & NCRINTR_ERR ||
2144 sc->sc_espstat & NCRSTAT_GE) {
2145
2146 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2147 /* Gross Error; no target ? */
2148 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2149 NCRCMD(sc, NCRCMD_FLUSH);
2150 DELAY(1);
2151 }
2152 if (sc->sc_state == NCR_CONNECTED ||
2153 sc->sc_state == NCR_SELECTING) {
2154 ecb->xs->error = XS_TIMEOUT;
2155 ncr53c9x_done(sc, ecb);
2156 }
2157 return (1);
2158 }
2159
2160 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2161 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2162 /*
2163 * Eat away "Illegal command" interrupt
2164 * on a ESP100 caused by a re-selection
2165 * while we were trying to select
2166 * another target.
2167 */
2168 #ifdef DEBUG
2169 printf("%s: ESP100 work-around activated\n",
2170 sc->sc_dev.dv_xname);
2171 #endif
2172 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2173 return (1);
2174 }
2175 /* illegal command, out of sync ? */
2176 printf("%s: illegal command: 0x%x "
2177 "(state %d, phase %x, prevphase %x)\n",
2178 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2179 sc->sc_state, sc->sc_phase,
2180 sc->sc_prevphase);
2181 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2182 NCRCMD(sc, NCRCMD_FLUSH);
2183 DELAY(1);
2184 }
2185 ncr53c9x_init(sc, 1); /* Restart everything */
2186 return (1);
2187 }
2188 }
2189 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2190
2191 /*
2192 * Call if DMA is active.
2193 *
2194 * If DMA_INTR returns true, then maybe go 'round the loop
2195 * again in case there is no more DMA queued, but a phase
2196 * change is expected.
2197 */
2198 if (NCRDMA_ISACTIVE(sc)) {
2199 int r = NCRDMA_INTR(sc);
2200 if (r == -1) {
2201 printf("%s: DMA error; resetting\n",
2202 sc->sc_dev.dv_xname);
2203 ncr53c9x_init(sc, 1);
2204 }
2205 /* If DMA active here, then go back to work... */
2206 if (NCRDMA_ISACTIVE(sc))
2207 return (1);
2208
2209 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2210 /*
2211 * DMA not completed. If we can not find a
2212 * acceptable explanation, print a diagnostic.
2213 */
2214 if (sc->sc_state == NCR_SELECTING)
2215 /*
2216 * This can happen if we are reselected
2217 * while using DMA to select a target.
2218 */
2219 /*void*/;
2220 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2221 /*
2222 * Our (multi-byte) message (eg SDTR) was
2223 * interrupted by the target to send
2224 * a MSG REJECT.
2225 * Print diagnostic if current phase
2226 * is not MESSAGE IN.
2227 */
2228 if (sc->sc_phase != MESSAGE_IN_PHASE)
2229 printf("%s: !TC on MSG OUT"
2230 " [intr %x, stat %x, step %d]"
2231 " prevphase %x, resid %lx\n",
2232 sc->sc_dev.dv_xname,
2233 sc->sc_espintr,
2234 sc->sc_espstat,
2235 sc->sc_espstep,
2236 sc->sc_prevphase,
2237 (u_long)sc->sc_omlen);
2238 } else if (sc->sc_dleft == 0) {
2239 /*
2240 * The DMA operation was started for
2241 * a DATA transfer. Print a diagnostic
2242 * if the DMA counter and TC bit
2243 * appear to be out of sync.
2244 */
2245 printf("%s: !TC on DATA XFER"
2246 " [intr %x, stat %x, step %d]"
2247 " prevphase %x, resid %x\n",
2248 sc->sc_dev.dv_xname,
2249 sc->sc_espintr,
2250 sc->sc_espstat,
2251 sc->sc_espstep,
2252 sc->sc_prevphase,
2253 ecb?ecb->dleft:-1);
2254 }
2255 }
2256 }
2257
2258 /*
2259 * Check for less serious errors.
2260 */
2261 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2262 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2263 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2264 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2265 else
2266 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2267 }
2268
2269 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2270 sc->sc_msgify = 0;
2271 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2272 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2273 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2274 NCRCMD(sc, NCRCMD_FLUSH);
2275 /* DELAY(1); */
2276 }
2277 /*
2278 * This command must (apparently) be issued within
2279 * 250mS of a disconnect. So here you are...
2280 */
2281 NCRCMD(sc, NCRCMD_ENSEL);
2282
2283 switch (sc->sc_state) {
2284 case NCR_RESELECTED:
2285 goto sched;
2286
2287 case NCR_SELECTING:
2288 {
2289 struct ncr53c9x_linfo *li;
2290
2291 ecb->xs->error = XS_SELTIMEOUT;
2292
2293 /* Selection timeout -- discard all LUNs if empty */
2294 sc_link = ecb->xs->sc_link;
2295 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2296 li = LIST_FIRST(&ti->luns);
2297 while (li != NULL) {
2298 if (li->untagged == NULL && li->used == 0) {
2299 if (li->lun < NCR_NLUN)
2300 ti->lun[li->lun] = NULL;
2301 LIST_REMOVE(li, link);
2302 free(li, M_DEVBUF);
2303 /* Restart the search at the beginning */
2304 li = LIST_FIRST(&ti->luns);
2305 continue;
2306 }
2307 li = LIST_NEXT(li, link);
2308 }
2309 goto finish;
2310 }
2311 case NCR_CONNECTED:
2312 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2313 #ifdef NCR53C9X_DEBUG
2314 if (ecb != NULL)
2315 scsi_print_addr(ecb->xs->sc_link);
2316 printf("sync nego not completed!\n");
2317 #endif
2318 ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
2319 sc->sc_flags &= ~NCR_SYNCHNEGO;
2320 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2321 }
2322
2323 /* it may be OK to disconnect */
2324 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2325 /*
2326 * Section 5.1.1 of the SCSI 2 spec
2327 * suggests issuing a REQUEST SENSE
2328 * following an unexpected disconnect.
2329 * Some devices go into a contingent
2330 * allegiance condition when
2331 * disconnecting, and this is necessary
2332 * to clean up their state.
2333 */
2334 printf("%s: unexpected disconnect; ",
2335 sc->sc_dev.dv_xname);
2336 if ((ecb->flags & ECB_SENSE) != 0) {
2337 printf("resetting\n");
2338 goto reset;
2339 }
2340 printf("sending REQUEST SENSE\n");
2341 callout_stop(&ecb->xs->xs_callout);
2342 ncr53c9x_sense(sc, ecb);
2343 goto out;
2344 }
2345
2346 ecb->xs->error = XS_TIMEOUT;
2347 goto finish;
2348
2349 case NCR_DISCONNECT:
2350 sc->sc_nexus = NULL;
2351 goto sched;
2352
2353 case NCR_CMDCOMPLETE:
2354 goto finish;
2355 }
2356 }
2357
2358 switch (sc->sc_state) {
2359
2360 case NCR_SBR:
2361 printf("%s: waiting for SCSI Bus Reset to happen\n",
2362 sc->sc_dev.dv_xname);
2363 return (1);
2364
2365 case NCR_RESELECTED:
2366 /*
2367 * we must be continuing a message ?
2368 */
2369 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2370 printf("%s: target didn't identify\n",
2371 sc->sc_dev.dv_xname);
2372 ncr53c9x_init(sc, 1);
2373 return (1);
2374 }
2375 printf("<<RESELECT CONT'd>>");
2376 #if XXXX
2377 ncr53c9x_msgin(sc);
2378 if (sc->sc_state != NCR_CONNECTED) {
2379 /* IDENTIFY fail?! */
2380 printf("%s: identify failed\n",
2381 sc->sc_dev.dv_xname, sc->sc_state);
2382 ncr53c9x_init(sc, 1);
2383 return (1);
2384 }
2385 #endif
2386 break;
2387
2388 case NCR_IDENTIFIED:
2389 ecb = sc->sc_nexus;
2390 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2391 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2392 & NCRFIFO_FF);
2393 /*
2394 * Things are seriously fucked up.
2395 * Pull the brakes, i.e. reset
2396 */
2397 printf("%s: target didn't send tag: %d bytes in fifo\n",
2398 sc->sc_dev.dv_xname, i);
2399 /* Drain and display fifo */
2400 while (i-- > 0)
2401 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2402
2403 ncr53c9x_init(sc, 1);
2404 return (1);
2405 } else
2406 goto msgin;
2407
2408 break;
2409
2410 case NCR_IDLE:
2411 case NCR_SELECTING:
2412 ecb = sc->sc_nexus;
2413 if (sc->sc_espintr & NCRINTR_RESEL) {
2414 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2415 sc->sc_flags = 0;
2416 /*
2417 * If we're trying to select a
2418 * target ourselves, push our command
2419 * back into the ready list.
2420 */
2421 if (sc->sc_state == NCR_SELECTING) {
2422 NCR_MISC(("backoff selector "));
2423 callout_stop(&ecb->xs->xs_callout);
2424 ncr53c9x_dequeue(sc, ecb);
2425 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2426 ecb->flags |= ECB_READY;
2427 ecb = sc->sc_nexus = NULL;
2428 }
2429 sc->sc_state = NCR_RESELECTED;
2430 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2431 /*
2432 * Things are seriously fucked up.
2433 * Pull the brakes, i.e. reset
2434 */
2435 printf("%s: target didn't identify\n",
2436 sc->sc_dev.dv_xname);
2437 ncr53c9x_init(sc, 1);
2438 return (1);
2439 }
2440 /*
2441 * The C90 only inhibits FIFO writes until
2442 * reselection is complete, instead of
2443 * waiting until the interrupt status register
2444 * has been read. So, if the reselect happens
2445 * while we were entering a command bytes (for
2446 * another target) some of those bytes can
2447 * appear in the FIFO here, after the
2448 * interrupt is taken.
2449 */
2450 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2451
2452 if (nfifo < 2 ||
2453 (nfifo > 2 &&
2454 sc->sc_rev != NCR_VARIANT_ESP100)) {
2455 printf("%s: RESELECT: %d bytes in FIFO! "
2456 "[intr %x, stat %x, step %d, prevphase %x]\n",
2457 sc->sc_dev.dv_xname,
2458 nfifo,
2459 sc->sc_espintr,
2460 sc->sc_espstat,
2461 sc->sc_espstep,
2462 sc->sc_prevphase);
2463 ncr53c9x_init(sc, 1);
2464 return (1);
2465 }
2466 sc->sc_selid = sc->sc_imess[0];
2467 NCR_MISC(("selid=%02x ", sc->sc_selid));
2468
2469 /* Handle identify message */
2470 ncr53c9x_msgin(sc);
2471 if (nfifo != 2) {
2472 /*
2473 * Note: this should not happen
2474 * with `dmaselect' on.
2475 */
2476 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2477 NCRCMD(sc, NCRCMD_FLUSH);
2478 } else if (sc->sc_features & NCR_F_DMASELECT &&
2479 sc->sc_rev == NCR_VARIANT_ESP100) {
2480 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2481 }
2482
2483 if (sc->sc_state != NCR_CONNECTED &&
2484 sc->sc_state != NCR_IDENTIFIED) {
2485 /* IDENTIFY fail?! */
2486 printf("%s: identify failed, state %d, intr %02x\n",
2487 sc->sc_dev.dv_xname, sc->sc_state,
2488 sc->sc_espintr);
2489 ncr53c9x_init(sc, 1);
2490 return (1);
2491 }
2492 goto shortcut; /* ie. next phase expected soon */
2493 }
2494
2495 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2496 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2497 /*
2498 * Arbitration won; examine the `step' register
2499 * to determine how far the selection could progress.
2500 */
2501 ecb = sc->sc_nexus;
2502 if (ecb == NULL)
2503 panic("ncr53c9x: no nexus");
2504
2505 sc_link = ecb->xs->sc_link;
2506 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2507
2508 switch (sc->sc_espstep) {
2509 case 0:
2510 /*
2511 * The target did not respond with a
2512 * message out phase - probably an old
2513 * device that doesn't recognize ATN.
2514 * Clear ATN and just continue, the
2515 * target should be in the command
2516 * phase.
2517 * XXXX check for command phase?
2518 */
2519 NCRCMD(sc, NCRCMD_RSTATN);
2520 break;
2521 case 1:
2522 if ((ti->flags & T_NEGOTIATE) == 0 &&
2523 ecb->tag[0] == 0) {
2524 printf("%s: step 1 & !NEG\n",
2525 sc->sc_dev.dv_xname);
2526 goto reset;
2527 }
2528 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2529 printf("%s: !MSGOUT\n",
2530 sc->sc_dev.dv_xname);
2531 goto reset;
2532 }
2533 if (ti->flags & T_WIDE) {
2534 ncr53c9x_sched_msgout(SEND_WDTR);
2535 }
2536 if (ti->flags & T_NEGOTIATE) {
2537 /* Start negotiating */
2538 ti->period = sc->sc_minsync;
2539 ti->offset = 15;
2540 sc->sc_flags |= NCR_SYNCHNEGO;
2541 if (ecb->tag[0])
2542 ncr53c9x_sched_msgout(SEND_TAG|SEND_SDTR);
2543 else
2544 ncr53c9x_sched_msgout(SEND_SDTR);
2545 } else {
2546 /* Could not do ATN3 so send TAG */
2547 ncr53c9x_sched_msgout(SEND_TAG);
2548 }
2549 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2550 break;
2551 case 3:
2552 /*
2553 * Grr, this is supposed to mean
2554 * "target left command phase prematurely".
2555 * It seems to happen regularly when
2556 * sync mode is on.
2557 * Look at FIFO to see if command went out.
2558 * (Timing problems?)
2559 */
2560 if (sc->sc_features & NCR_F_DMASELECT) {
2561 if (sc->sc_cmdlen == 0)
2562 /* Hope for the best.. */
2563 break;
2564 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2565 & NCRFIFO_FF) == 0) {
2566 /* Hope for the best.. */
2567 break;
2568 }
2569 printf("(%s:%d:%d): selection failed;"
2570 " %d left in FIFO "
2571 "[intr %x, stat %x, step %d]\n",
2572 sc->sc_dev.dv_xname,
2573 sc_link->scsipi_scsi.target,
2574 sc_link->scsipi_scsi.lun,
2575 NCR_READ_REG(sc, NCR_FFLAG)
2576 & NCRFIFO_FF,
2577 sc->sc_espintr, sc->sc_espstat,
2578 sc->sc_espstep);
2579 NCRCMD(sc, NCRCMD_FLUSH);
2580 ncr53c9x_sched_msgout(SEND_ABORT);
2581 return (1);
2582 case 2:
2583 /* Select stuck at Command Phase */
2584 NCRCMD(sc, NCRCMD_FLUSH);
2585 break;
2586 case 4:
2587 if (sc->sc_features & NCR_F_DMASELECT &&
2588 sc->sc_cmdlen != 0)
2589 printf("(%s:%d:%d): select; "
2590 "%lu left in DMA buffer "
2591 "[intr %x, stat %x, step %d]\n",
2592 sc->sc_dev.dv_xname,
2593 sc_link->scsipi_scsi.target,
2594 sc_link->scsipi_scsi.lun,
2595 (u_long)sc->sc_cmdlen,
2596 sc->sc_espintr,
2597 sc->sc_espstat,
2598 sc->sc_espstep);
2599 /* So far, everything went fine */
2600 break;
2601 }
2602
2603 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2604 /* Do an implicit RESTORE POINTERS. */
2605 sc->sc_dp = ecb->daddr;
2606 sc->sc_dleft = ecb->dleft;
2607 sc->sc_state = NCR_CONNECTED;
2608 break;
2609
2610 } else {
2611
2612 printf("%s: unexpected status after select"
2613 ": [intr %x, stat %x, step %x]\n",
2614 sc->sc_dev.dv_xname,
2615 sc->sc_espintr, sc->sc_espstat,
2616 sc->sc_espstep);
2617 NCRCMD(sc, NCRCMD_FLUSH);
2618 DELAY(1);
2619 goto reset;
2620 }
2621 if (sc->sc_state == NCR_IDLE) {
2622 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2623 return (0);
2624 }
2625 break;
2626
2627 case NCR_CONNECTED:
2628 if ((sc->sc_flags & NCR_ICCS) != 0) {
2629 /* "Initiate Command Complete Steps" in progress */
2630 u_char msg;
2631
2632 sc->sc_flags &= ~NCR_ICCS;
2633
2634 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2635 printf("%s: ICCS: "
2636 ": [intr %x, stat %x, step %x]\n",
2637 sc->sc_dev.dv_xname,
2638 sc->sc_espintr, sc->sc_espstat,
2639 sc->sc_espstep);
2640 }
2641 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2642 if (sc->sc_imlen < 2)
2643 printf("%s: can't get status, only %d bytes\n",
2644 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2645 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2646 msg = sc->sc_imess[sc->sc_imlen - 1];
2647 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2648 if (msg == MSG_CMDCOMPLETE) {
2649 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2650 ? 0
2651 : sc->sc_dleft;
2652 if ((ecb->flags & ECB_SENSE) == 0)
2653 ecb->xs->resid = ecb->dleft;
2654 sc->sc_state = NCR_CMDCOMPLETE;
2655 } else
2656 printf("%s: STATUS_PHASE: msg %d\n",
2657 sc->sc_dev.dv_xname, msg);
2658 sc->sc_imlen = 0;
2659 NCRCMD(sc, NCRCMD_MSGOK);
2660 goto shortcut; /* ie. wait for disconnect */
2661 }
2662 break;
2663
2664 default:
2665 /* Don't panic: reset. */
2666 printf("%s: invalid state: %d",
2667 sc->sc_dev.dv_xname,
2668 sc->sc_state);
2669 ncr53c9x_scsi_reset(sc);
2670 goto out;
2671 #if 0
2672 panic("%s: invalid state: %d",
2673 sc->sc_dev.dv_xname,
2674 sc->sc_state);
2675 #endif
2676 break;
2677 }
2678
2679 /*
2680 * Driver is now in state NCR_CONNECTED, i.e. we
2681 * have a current command working the SCSI bus.
2682 */
2683 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2684 panic("ncr53c9x: no nexus");
2685 }
2686
2687 switch (sc->sc_phase) {
2688 case MESSAGE_OUT_PHASE:
2689 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2690 ncr53c9x_msgout(sc);
2691 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2692 break;
2693
2694 case MESSAGE_IN_PHASE:
2695 msgin:
2696 NCR_PHASE(("MESSAGE_IN_PHASE "));
2697 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2698 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2699 !(sc->sc_espstat2 & FAS_STAT2_EMPTY)) {
2700 NCRCMD(sc, NCRCMD_FLUSH);
2701 }
2702 sc->sc_flags |= NCR_WAITI;
2703 NCRCMD(sc, NCRCMD_TRANS);
2704 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2705 if ((sc->sc_flags & NCR_WAITI) == 0) {
2706 printf("%s: MSGIN: unexpected FC bit: "
2707 "[intr %x, stat %x, step %x]\n",
2708 sc->sc_dev.dv_xname,
2709 sc->sc_espintr, sc->sc_espstat,
2710 sc->sc_espstep);
2711 }
2712 sc->sc_flags &= ~NCR_WAITI;
2713 ncr53c9x_rdfifo(sc,
2714 (sc->sc_prevphase == sc->sc_phase) ?
2715 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2716 ncr53c9x_msgin(sc);
2717 } else {
2718 printf("%s: MSGIN: weird bits: "
2719 "[intr %x, stat %x, step %x]\n",
2720 sc->sc_dev.dv_xname,
2721 sc->sc_espintr, sc->sc_espstat,
2722 sc->sc_espstep);
2723 }
2724 sc->sc_prevphase = MESSAGE_IN_PHASE;
2725 goto shortcut; /* i.e. expect data to be ready */
2726 break;
2727
2728 case COMMAND_PHASE:
2729 /*
2730 * Send the command block. Normally we don't see this
2731 * phase because the SEL_ATN command takes care of
2732 * all this. However, we end up here if either the
2733 * target or we wanted to exchange some more messages
2734 * first (e.g. to start negotiations).
2735 */
2736
2737 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2738 ecb->cmd.cmd.opcode, ecb->clen));
2739 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2740 NCRCMD(sc, NCRCMD_FLUSH);
2741 /* DELAY(1);*/
2742 }
2743 if (sc->sc_features & NCR_F_DMASELECT) {
2744 size_t size;
2745 /* setup DMA transfer for command */
2746 size = ecb->clen;
2747 sc->sc_cmdlen = size;
2748 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2749 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2750 0, &size);
2751 /* Program the SCSI counter */
2752 NCR_SET_COUNT(sc, size);
2753
2754 /* load the count in */
2755 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2756
2757 /* start the command transfer */
2758 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2759 NCRDMA_GO(sc);
2760 } else {
2761 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2762 NCRCMD(sc, NCRCMD_TRANS);
2763 }
2764 sc->sc_prevphase = COMMAND_PHASE;
2765 break;
2766
2767 case DATA_OUT_PHASE:
2768 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2769 NCRCMD(sc, NCRCMD_FLUSH);
2770 size = min(sc->sc_dleft, sc->sc_maxxfer);
2771 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2772 0, &size);
2773 sc->sc_prevphase = DATA_OUT_PHASE;
2774 goto setup_xfer;
2775
2776 case DATA_IN_PHASE:
2777 NCR_PHASE(("DATA_IN_PHASE "));
2778 if (sc->sc_rev == NCR_VARIANT_ESP100)
2779 NCRCMD(sc, NCRCMD_FLUSH);
2780 size = min(sc->sc_dleft, sc->sc_maxxfer);
2781 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2782 1, &size);
2783 sc->sc_prevphase = DATA_IN_PHASE;
2784 setup_xfer:
2785 /* Target returned to data phase: wipe "done" memory */
2786 ecb->flags &= ~ECB_TENTATIVE_DONE;
2787
2788 /* Program the SCSI counter */
2789 NCR_SET_COUNT(sc, size);
2790
2791 /* load the count in */
2792 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2793
2794 /*
2795 * Note that if `size' is 0, we've already transceived
2796 * all the bytes we want but we're still in DATA PHASE.
2797 * Apparently, the device needs padding. Also, a
2798 * transfer size of 0 means "maximum" to the chip
2799 * DMA logic.
2800 */
2801 NCRCMD(sc,
2802 (size==0?NCRCMD_TRPAD:NCRCMD_TRANS)|NCRCMD_DMA);
2803 NCRDMA_GO(sc);
2804 return (1);
2805
2806 case STATUS_PHASE:
2807 NCR_PHASE(("STATUS_PHASE "));
2808 sc->sc_flags |= NCR_ICCS;
2809 NCRCMD(sc, NCRCMD_ICCS);
2810 sc->sc_prevphase = STATUS_PHASE;
2811 goto shortcut; /* i.e. expect status results soon */
2812 break;
2813
2814 case INVALID_PHASE:
2815 break;
2816
2817 default:
2818 printf("%s: unexpected bus phase; resetting\n",
2819 sc->sc_dev.dv_xname);
2820 goto reset;
2821 }
2822
2823 out:
2824 return (1);
2825
2826 reset:
2827 ncr53c9x_init(sc, 1);
2828 goto out;
2829
2830 finish:
2831 ncr53c9x_done(sc, ecb);
2832 goto out;
2833
2834 sched:
2835 sc->sc_state = NCR_IDLE;
2836 ncr53c9x_sched(sc);
2837 goto out;
2838
2839 shortcut:
2840 /*
2841 * The idea is that many of the SCSI operations take very little
2842 * time, and going away and getting interrupted is too high an
2843 * overhead to pay. For example, selecting, sending a message
2844 * and command and then doing some work can be done in one "pass".
2845 *
2846 * The delay is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1
2847 * at 40Mhz. This needs testing.
2848 */
2849 {
2850 struct timeval wait, cur;
2851
2852 microtime(&wait);
2853 wait.tv_usec += 50/sc->sc_freq;
2854 if (wait.tv_usec > 1000000) {
2855 wait.tv_sec++;
2856 wait.tv_usec -= 1000000;
2857 }
2858 do {
2859 if (NCRDMA_ISINTR(sc))
2860 goto again;
2861 microtime(&cur);
2862 } while (cur.tv_sec <= wait.tv_sec &&
2863 cur.tv_usec <= wait.tv_usec);
2864 }
2865 goto out;
2866 }
2867
2868 void
2869 ncr53c9x_abort(sc, ecb)
2870 struct ncr53c9x_softc *sc;
2871 struct ncr53c9x_ecb *ecb;
2872 {
2873
2874 /* 2 secs for the abort */
2875 ecb->timeout = NCR_ABORT_TIMEOUT;
2876 ecb->flags |= ECB_ABORT;
2877
2878 if (ecb == sc->sc_nexus) {
2879 int timeout;
2880
2881 /*
2882 * If we're still selecting, the message will be scheduled
2883 * after selection is complete.
2884 */
2885 if (sc->sc_state == NCR_CONNECTED)
2886 ncr53c9x_sched_msgout(SEND_ABORT);
2887
2888 /*
2889 * Reschedule timeout.
2890 */
2891 timeout = ecb->timeout;
2892 if (hz > 100 && timeout > 1000)
2893 timeout = (timeout / 1000) * hz;
2894 else
2895 timeout = (timeout * hz) / 1000;
2896 callout_reset(&ecb->xs->xs_callout, timeout,
2897 ncr53c9x_timeout, ecb);
2898 } else {
2899 /*
2900 * Just leave the command where it is.
2901 * XXX - what choice do we have but to reset the SCSI
2902 * eventually?
2903 */
2904 if (sc->sc_state == NCR_IDLE)
2905 ncr53c9x_sched(sc);
2906 }
2907 }
2908
2909 void
2910 ncr53c9x_timeout(arg)
2911 void *arg;
2912 {
2913 struct ncr53c9x_ecb *ecb = arg;
2914 struct scsipi_xfer *xs = ecb->xs;
2915 struct scsipi_link *sc_link = xs->sc_link;
2916 struct ncr53c9x_softc *sc = sc_link->adapter_softc;
2917 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
2918 int s;
2919
2920 scsi_print_addr(sc_link);
2921 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2922 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2923 "msg(q %x,o %x) %s>",
2924 sc->sc_dev.dv_xname,
2925 ecb, ecb->flags, ecb->dleft, ecb->stat,
2926 sc->sc_state, sc->sc_nexus,
2927 NCR_READ_REG(sc, NCR_STAT),
2928 sc->sc_phase, sc->sc_prevphase,
2929 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2930 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2931 #if NCR53C9X_DEBUG > 1
2932 printf("TRACE: %s.", ecb->trace);
2933 #endif
2934
2935 s = splbio();
2936
2937 if (ecb->flags & ECB_ABORT) {
2938 /* abort timed out */
2939 printf(" AGAIN\n");
2940
2941 ncr53c9x_init(sc, 1);
2942 } else {
2943 /* abort the operation that has timed out */
2944 printf("\n");
2945 xs->error = XS_TIMEOUT;
2946 ncr53c9x_abort(sc, ecb);
2947
2948 /* Disable sync mode if stuck in a data phase */
2949 if (ecb == sc->sc_nexus &&
2950 (ti->flags & T_SYNCMODE) != 0 &&
2951 (sc->sc_phase & (MSGI|CDI)) == 0) {
2952 scsi_print_addr(sc_link);
2953 printf("sync negotiation disabled\n");
2954 sc->sc_cfflags |= (1<<(sc_link->scsipi_scsi.target+8));
2955 }
2956 }
2957
2958 splx(s);
2959 }
2960
2961 void
2962 ncr53c9x_watch(arg)
2963 void *arg;
2964 {
2965 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2966 struct ncr53c9x_tinfo *ti;
2967 struct ncr53c9x_linfo *li;
2968 int t, s;
2969 /* Delete any structures that have not been used in 10min. */
2970 time_t old = time.tv_sec - (10*60);
2971
2972 s = splbio();
2973 for (t=0; t<NCR_NTARG; t++) {
2974 ti = &sc->sc_tinfo[t];
2975 li = LIST_FIRST(&ti->luns);
2976 while (li) {
2977 if (li->last_used < old && li->untagged == NULL &&
2978 li->used == 0) {
2979 if (li->lun < NCR_NLUN)
2980 ti->lun[li->lun] = NULL;
2981 LIST_REMOVE(li, link);
2982 free(li, M_DEVBUF);
2983 /* Restart the search at the beginning */
2984 li = LIST_FIRST(&ti->luns);
2985 continue;
2986 }
2987 li = LIST_NEXT(li, link);
2988 }
2989 }
2990 splx(s);
2991 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
2992 }
2993
2994