ncr53c9x.c revision 1.76 1 /* $NetBSD: ncr53c9x.c,v 1.76 2001/04/26 17:09:39 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/proc.h>
90 #include <sys/queue.h>
91 #include <sys/pool.h>
92 #include <sys/scsiio.h>
93
94 #include <dev/scsipi/scsi_all.h>
95 #include <dev/scsipi/scsipi_all.h>
96 #include <dev/scsipi/scsiconf.h>
97 #include <dev/scsipi/scsi_message.h>
98
99 #include <dev/ic/ncr53c9xreg.h>
100 #include <dev/ic/ncr53c9xvar.h>
101
102 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
103 #ifdef DEBUG
104 int ncr53c9x_notag = 0;
105 #endif
106
107 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
108 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
109 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
110 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
111 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
112 struct scsipi_xfer *, int);
113 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
114 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
115 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
117 /*static*/ void ncr53c9x_timeout(void *arg);
118 /*static*/ void ncr53c9x_watch(void *arg);
119 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
120 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
121 struct ncr53c9x_ecb *);
122 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
123 caddr_t, int, struct proc *);
124
125 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
126 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
127 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
128
129 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
130 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
131 struct ncr53c9x_tinfo *);
132 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
133 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
134 int64_t lun);
135
136 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
137
138 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
139 #define NCR_RDFIFO_START 0
140 #define NCR_RDFIFO_CONTINUE 1
141
142
143 #define NCR_SET_COUNT(sc, size) do { \
144 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
145 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
146 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
147 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
148 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
149 } \
150 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
151 NCR_WRITE_REG(sc, NCR_RCH, 0); \
152 } \
153 } while (0)
154
155 static int ecb_pool_initialized = 0;
156 static struct pool ecb_pool;
157
158 /*
159 * Names for the NCR53c9x variants, correspnding to the variant tags
160 * in ncr53c9xvar.h.
161 */
162 static const char *ncr53c9x_variant_names[] = {
163 "ESP100",
164 "ESP100A",
165 "ESP200",
166 "NCR53C94",
167 "NCR53C96",
168 "ESP406",
169 "FAS408",
170 "FAS216",
171 "AM53C974",
172 "FAS366/HME",
173 };
174
175 /*
176 * Search linked list for LUN info by LUN id.
177 */
178 static struct ncr53c9x_linfo *
179 ncr53c9x_lunsearch(ti, lun)
180 struct ncr53c9x_tinfo *ti;
181 int64_t lun;
182 {
183 struct ncr53c9x_linfo *li;
184 LIST_FOREACH(li, &ti->luns, link)
185 if (li->lun == lun)
186 return (li);
187 return (NULL);
188 }
189
190 /*
191 * Attach this instance, and then all the sub-devices
192 */
193 void
194 ncr53c9x_attach(sc)
195 struct ncr53c9x_softc *sc;
196 {
197 struct scsipi_adapter *adapt = &sc->sc_adapter;
198 struct scsipi_channel *chan = &sc->sc_channel;
199
200 callout_init(&sc->sc_watchdog);
201 /*
202 * Allocate SCSI message buffers.
203 * Front-ends can override allocation to avoid alignment
204 * handling in the DMA engines. Note that that ncr53c9x_msgout()
205 * can request a 1 byte DMA transfer.
206 */
207 if (sc->sc_omess == NULL)
208 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
209
210 if (sc->sc_imess == NULL)
211 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
212
213 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
214 printf("out of memory\n");
215 return;
216 }
217
218 /*
219 * Note, the front-end has set us up to print the chip variation.
220 */
221 if (sc->sc_rev >= NCR_VARIANT_MAX) {
222 printf("\n%s: unknown variant %d, devices not attached\n",
223 sc->sc_dev.dv_xname, sc->sc_rev);
224 return;
225 }
226
227 printf(": %s, %dMHz, SCSI ID %d\n",
228 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
229
230 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
231
232 /* The value *must not* be == 1. Make it 2 */
233 if (sc->sc_ccf == 1)
234 sc->sc_ccf = 2;
235
236 /*
237 * The recommended timeout is 250ms. This register is loaded
238 * with a value calculated as follows, from the docs:
239 *
240 * (timout period) x (CLK frequency)
241 * reg = -------------------------------------
242 * 8192 x (Clock Conversion Factor)
243 *
244 * Since CCF has a linear relation to CLK, this generally computes
245 * to the constant of 153.
246 */
247 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
248
249 /* CCF register only has 3 bits; 0 is actually 8 */
250 sc->sc_ccf &= 7;
251
252 /*
253 * Fill in the scsipi_adapter.
254 */
255 adapt->adapt_dev = &sc->sc_dev;
256 adapt->adapt_nchannels = 1;
257 adapt->adapt_openings = 256;
258 adapt->adapt_max_periph = 256;
259 adapt->adapt_ioctl = ncr53c9x_ioctl;
260 /* adapt_request initialized by front-end */
261 /* adapt_minphys initialized by front-end */
262
263 /*
264 * Fill in the scsipi_channel.
265 */
266 memset(chan, 0, sizeof(*chan));
267 chan->chan_adapter = adapt;
268 chan->chan_bustype = &scsi_bustype;
269 chan->chan_channel = 0;
270 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */
271 chan->chan_nluns = 8;
272 chan->chan_id = sc->sc_id;
273
274 /*
275 * Add reference to adapter so that we drop the reference after
276 * config_found() to make sure the adatper is disabled.
277 */
278 if (scsipi_adapter_addref(adapt) != 0) {
279 printf("%s: unable to enable controller\n",
280 sc->sc_dev.dv_xname);
281 return;
282 }
283
284 /* Reset state & bus */
285 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
286 sc->sc_state = 0;
287 ncr53c9x_init(sc, 1);
288
289 /*
290 * Now try to attach all the sub-devices
291 */
292 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
293
294 scsipi_adapter_delref(adapt);
295 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
296 }
297
298 int
299 ncr53c9x_detach(sc, flags)
300 struct ncr53c9x_softc *sc;
301 int flags;
302 {
303 int error;
304
305 if (sc->sc_child) {
306 error = config_detach(sc->sc_child, flags);
307 if (error)
308 return (error);
309 }
310
311 free(sc->sc_imess, M_DEVBUF);
312 free(sc->sc_omess, M_DEVBUF);
313
314 return (0);
315 }
316
317 /*
318 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
319 * only this controller, but kills any on-going commands, and also stops
320 * and resets the DMA.
321 *
322 * After reset, registers are loaded with the defaults from the attach
323 * routine above.
324 */
325 void
326 ncr53c9x_reset(sc)
327 struct ncr53c9x_softc *sc;
328 {
329
330 /* reset DMA first */
331 NCRDMA_RESET(sc);
332
333 /* reset SCSI chip */
334 NCRCMD(sc, NCRCMD_RSTCHIP);
335 NCRCMD(sc, NCRCMD_NOP);
336 DELAY(500);
337
338 /* do these backwards, and fall through */
339 switch (sc->sc_rev) {
340 case NCR_VARIANT_ESP406:
341 case NCR_VARIANT_FAS408:
342 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
343 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
344 case NCR_VARIANT_AM53C974:
345 case NCR_VARIANT_FAS216:
346 case NCR_VARIANT_NCR53C94:
347 case NCR_VARIANT_NCR53C96:
348 case NCR_VARIANT_ESP200:
349 sc->sc_features |= NCR_F_HASCFG3;
350 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
351 case NCR_VARIANT_ESP100A:
352 sc->sc_features |= NCR_F_SELATN3;
353 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
354 case NCR_VARIANT_ESP100:
355 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
356 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
357 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
358 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
359 break;
360
361 case NCR_VARIANT_FAS366:
362 sc->sc_features |=
363 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
364 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
365 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
366 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
367 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
368 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
369 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
370 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
371 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
372 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
373 break;
374
375 default:
376 printf("%s: unknown revision code, assuming ESP100\n",
377 sc->sc_dev.dv_xname);
378 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
379 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
380 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
381 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
382 }
383
384 if (sc->sc_rev == NCR_VARIANT_AM53C974)
385 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
386
387 #if 0
388 printf("%s: ncr53c9x_reset: revision %d\n",
389 sc->sc_dev.dv_xname, sc->sc_rev);
390 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
391 "ccf 0x%x, timeout 0x%x\n",
392 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
393 sc->sc_ccf, sc->sc_timeout);
394 #endif
395 }
396
397 /*
398 * Reset the SCSI bus, but not the chip
399 */
400 void
401 ncr53c9x_scsi_reset(sc)
402 struct ncr53c9x_softc *sc;
403 {
404
405 (*sc->sc_glue->gl_dma_stop)(sc);
406
407 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
408 NCRCMD(sc, NCRCMD_RSTSCSI);
409 }
410
411 /*
412 * Initialize ncr53c9x state machine
413 */
414 void
415 ncr53c9x_init(sc, doreset)
416 struct ncr53c9x_softc *sc;
417 int doreset;
418 {
419 struct ncr53c9x_ecb *ecb;
420 struct ncr53c9x_linfo *li;
421 int i, r;
422
423 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
424
425 if (!ecb_pool_initialized) {
426 /* All instances share this pool */
427 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
428 "ncr53c9x_ecb", 0, NULL, NULL, 0);
429 ecb_pool_initialized = 1;
430 }
431
432 if (sc->sc_state == 0) {
433 /* First time through; initialize. */
434
435 TAILQ_INIT(&sc->ready_list);
436 sc->sc_nexus = NULL;
437 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
438 for (r = 0; r < NCR_NTARG; r++) {
439 LIST_INIT(&sc->sc_tinfo[r].luns);
440 }
441 } else {
442 /* Cancel any active commands. */
443 sc->sc_state = NCR_CLEANING;
444 sc->sc_msgify = 0;
445 if ((ecb = sc->sc_nexus) != NULL) {
446 ecb->xs->error = XS_TIMEOUT;
447 ncr53c9x_done(sc, ecb);
448 }
449 /* Cancel outstanding disconnected commands on each LUN */
450 for (r = 0; r < 8; r++) {
451 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
452 if ((ecb = li->untagged) != NULL) {
453 li->untagged = NULL;
454 /*
455 * XXXXXXX
456 *
457 * Should we terminate a command
458 * that never reached the disk?
459 */
460 li->busy = 0;
461 ecb->xs->error = XS_TIMEOUT;
462 ncr53c9x_done(sc, ecb);
463 }
464 for (i = 0; i < 256; i++)
465 if ((ecb = li->queued[i])) {
466 li->queued[i] = NULL;
467 ecb->xs->error = XS_TIMEOUT;
468 ncr53c9x_done(sc, ecb);
469 }
470 li->used = 0;
471 }
472 }
473 }
474
475 /*
476 * reset the chip to a known state
477 */
478 ncr53c9x_reset(sc);
479
480 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
481 for (r = 0; r < 8; r++) {
482 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
483 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
484
485 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
486 ? 0 : T_SYNCHOFF) |
487 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
488 T_NEED_TO_RESET;
489 #ifdef DEBUG
490 if (ncr53c9x_notag)
491 ti->flags &= ~T_TAG;
492 #endif
493 ti->period = sc->sc_minsync;
494 ti->offset = 0;
495 ti->cfg3 = 0;
496 }
497
498 if (doreset) {
499 sc->sc_state = NCR_SBR;
500 NCRCMD(sc, NCRCMD_RSTSCSI);
501 } else {
502 sc->sc_state = NCR_IDLE;
503 ncr53c9x_sched(sc);
504 }
505 }
506
507 /*
508 * Read the NCR registers, and save their contents for later use.
509 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
510 * NCR_INTR - so make sure it is the last read.
511 *
512 * I think that (from reading the docs) most bits in these registers
513 * only make sense when he DMA CSR has an interrupt showing. Call only
514 * if an interrupt is pending.
515 */
516 __inline__ void
517 ncr53c9x_readregs(sc)
518 struct ncr53c9x_softc *sc;
519 {
520
521 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
522 /* Only the stepo bits are of interest */
523 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
524
525 if (sc->sc_rev == NCR_VARIANT_FAS366)
526 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
527
528 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
529
530 if (sc->sc_glue->gl_clear_latched_intr != NULL)
531 (*sc->sc_glue->gl_clear_latched_intr)(sc);
532
533 /*
534 * Determine the SCSI bus phase, return either a real SCSI bus phase
535 * or some pseudo phase we use to detect certain exceptions.
536 */
537
538 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
539 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
540
541 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
542 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
543 }
544
545 /*
546 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
547 */
548 static inline int
549 ncr53c9x_stp2cpb(sc, period)
550 struct ncr53c9x_softc *sc;
551 int period;
552 {
553 int v;
554 v = (sc->sc_freq * period) / 250;
555 if (ncr53c9x_cpb2stp(sc, v) < period)
556 /* Correct round-down error */
557 v++;
558 return (v);
559 }
560
561 static inline void
562 ncr53c9x_setsync(sc, ti)
563 struct ncr53c9x_softc *sc;
564 struct ncr53c9x_tinfo *ti;
565 {
566 u_char syncoff, synctp;
567 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
568
569 if (ti->flags & T_SYNCMODE) {
570 syncoff = ti->offset;
571 synctp = ncr53c9x_stp2cpb(sc, ti->period);
572 if (sc->sc_features & NCR_F_FASTSCSI) {
573 /*
574 * If the period is 200ns or less (ti->period <= 50),
575 * put the chip in Fast SCSI mode.
576 */
577 if (ti->period <= 50)
578 /*
579 * There are (at least) 4 variations of the
580 * configuration 3 register. The drive attach
581 * routine sets the appropriate bit to put the
582 * chip into Fast SCSI mode so that it doesn't
583 * have to be figured out here each time.
584 */
585 cfg3 |= sc->sc_cfg3_fscsi;
586 }
587
588 /*
589 * Am53c974 requires different SYNCTP values when the
590 * FSCSI bit is off.
591 */
592 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
593 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
594 synctp--;
595 } else {
596 syncoff = 0;
597 synctp = 0;
598 }
599
600 if (sc->sc_features & NCR_F_HASCFG3)
601 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
602
603 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
604 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
605 }
606
607 /*
608 * Send a command to a target, set the driver state to NCR_SELECTING
609 * and let the caller take care of the rest.
610 *
611 * Keeping this as a function allows me to say that this may be done
612 * by DMA instead of programmed I/O soon.
613 */
614 void
615 ncr53c9x_select(sc, ecb)
616 struct ncr53c9x_softc *sc;
617 struct ncr53c9x_ecb *ecb;
618 {
619 struct scsipi_periph *periph = ecb->xs->xs_periph;
620 int target = periph->periph_target;
621 int lun = periph->periph_lun;
622 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
623 int tiflags = ti->flags;
624 u_char *cmd;
625 int clen;
626 int selatn3, selatns;
627 size_t dmasize;
628
629 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
630 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
631
632 sc->sc_state = NCR_SELECTING;
633 /*
634 * Schedule the timeout now, the first time we will go away
635 * expecting to come back due to an interrupt, because it is
636 * always possible that the interrupt may never happen.
637 */
638 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
639 int timeout = ecb->timeout;
640
641 if (hz > 100 && timeout > 1000)
642 timeout = (timeout / 1000) * hz;
643 else
644 timeout = (timeout * hz) / 1000;
645
646 callout_reset(&ecb->xs->xs_callout, timeout,
647 ncr53c9x_timeout, ecb);
648 }
649
650 /*
651 * The docs say the target register is never reset, and I
652 * can't think of a better place to set it
653 */
654 if (sc->sc_rev == NCR_VARIANT_FAS366) {
655 NCRCMD(sc, NCRCMD_FLUSH);
656 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
657 } else {
658 NCR_WRITE_REG(sc, NCR_SELID, target);
659 }
660 ncr53c9x_setsync(sc, ti);
661
662 if ((ecb->flags & ECB_SENSE) != 0) {
663 /*
664 * For REQUEST SENSE, we should not send an IDENTIFY or
665 * otherwise mangle the target. There should be no MESSAGE IN
666 * phase.
667 */
668 if (sc->sc_features & NCR_F_DMASELECT) {
669 /* setup DMA transfer for command */
670 dmasize = clen = ecb->clen;
671 sc->sc_cmdlen = clen;
672 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
673
674 /* Program the SCSI counter */
675 NCR_SET_COUNT(sc, dmasize);
676
677 if (sc->sc_rev != NCR_VARIANT_FAS366)
678 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
679
680 /* And get the targets attention */
681 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
682 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
683 &dmasize);
684 NCRDMA_GO(sc);
685 } else {
686 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
687 NCRCMD(sc, NCRCMD_SELNATN);
688 }
689 return;
690 }
691
692 selatn3 = selatns = 0;
693 if (ecb->tag[0] != 0) {
694 if (sc->sc_features & NCR_F_SELATN3)
695 /* use SELATN3 to send tag messages */
696 selatn3 = 1;
697 else
698 /* We don't have SELATN3; use SELATNS to send tags */
699 selatns = 1;
700 }
701
702 if (ti->flags & T_NEGOTIATE) {
703 /* We have to use SELATNS to send sync/wide messages */
704 selatn3 = 0;
705 selatns = 1;
706 }
707
708 cmd = (u_char *)&ecb->cmd.cmd;
709
710 if (selatn3) {
711 /* We'll use tags with SELATN3 */
712 clen = ecb->clen + 3;
713 cmd -= 3;
714 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
715 cmd[1] = ecb->tag[0]; /* msg[1] */
716 cmd[2] = ecb->tag[1]; /* msg[2] */
717 } else {
718 /* We don't have tags, or will send messages with SELATNS */
719 clen = ecb->clen + 1;
720 cmd -= 1;
721 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
722 }
723
724 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
725
726 /* setup DMA transfer for command */
727 dmasize = clen;
728 sc->sc_cmdlen = clen;
729 sc->sc_cmdp = cmd;
730
731 /* Program the SCSI counter */
732 NCR_SET_COUNT(sc, dmasize);
733
734 /* load the count in */
735 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
736 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
737
738 /* And get the targets attention */
739 if (selatn3) {
740 sc->sc_msgout = SEND_TAG;
741 sc->sc_flags |= NCR_ATN;
742 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
743 } else
744 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
745 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
746 NCRDMA_GO(sc);
747 return;
748 }
749
750 /*
751 * Who am I. This is where we tell the target that we are
752 * happy for it to disconnect etc.
753 */
754
755 /* Now get the command into the FIFO */
756 ncr53c9x_wrfifo(sc, cmd, clen);
757
758 /* And get the targets attention */
759 if (selatns) {
760 NCR_MISC(("SELATNS \n"));
761 /* Arbitrate, select and stop after IDENTIFY message */
762 NCRCMD(sc, NCRCMD_SELATNS);
763 } else if (selatn3) {
764 sc->sc_msgout = SEND_TAG;
765 sc->sc_flags |= NCR_ATN;
766 NCRCMD(sc, NCRCMD_SELATN3);
767 } else
768 NCRCMD(sc, NCRCMD_SELATN);
769 }
770
771 void
772 ncr53c9x_free_ecb(sc, ecb)
773 struct ncr53c9x_softc *sc;
774 struct ncr53c9x_ecb *ecb;
775 {
776 int s;
777
778 s = splbio();
779 ecb->flags = 0;
780 pool_put(&ecb_pool, (void *)ecb);
781 splx(s);
782 return;
783 }
784
785 struct ncr53c9x_ecb *
786 ncr53c9x_get_ecb(sc, flags)
787 struct ncr53c9x_softc *sc;
788 int flags;
789 {
790 struct ncr53c9x_ecb *ecb;
791 int s, wait = 0;
792
793 if ((curproc != NULL) && ((flags & XS_CTL_NOSLEEP) == 0))
794 wait = PR_WAITOK;
795
796 s = splbio();
797 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, wait);
798 splx(s);
799 bzero(ecb, sizeof(*ecb));
800 if (ecb)
801 ecb->flags |= ECB_ALLOC;
802 return (ecb);
803 }
804
805 /*
806 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
807 */
808
809 /*
810 * Start a SCSI-command
811 * This function is called by the higher level SCSI-driver to queue/run
812 * SCSI-commands.
813 */
814
815 void
816 ncr53c9x_scsipi_request(chan, req, arg)
817 struct scsipi_channel *chan;
818 scsipi_adapter_req_t req;
819 void *arg;
820 {
821 struct scsipi_xfer *xs;
822 struct scsipi_periph *periph;
823 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
824 struct ncr53c9x_ecb *ecb;
825 int s, flags;
826
827 NCR_TRACE(("[ncr53c9x_scsipi_request] "));
828
829 switch (req) {
830 case ADAPTER_REQ_RUN_XFER:
831 xs = arg;
832 periph = xs->xs_periph;
833 flags = xs->xs_control;
834
835 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
836 periph->periph_target));
837
838 /* Get an ECB to use. */
839 ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
840 #ifdef DIAGNOSTIC
841 /*
842 * This should never happen as we track resources
843 * in the mid-layer.
844 */
845 if (ecb == NULL) {
846 scsipi_printaddr(periph);
847 printf("unable to allocate ecb\n");
848 panic("ncr53c9x_scsipi_request");
849 }
850 #endif
851
852 /* Initialize ecb */
853 ecb->xs = xs;
854 ecb->timeout = xs->timeout;
855
856 if (flags & XS_CTL_RESET) {
857 ecb->flags |= ECB_RESET;
858 ecb->clen = 0;
859 ecb->dleft = 0;
860 } else {
861 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
862 ecb->clen = xs->cmdlen;
863 ecb->daddr = xs->data;
864 ecb->dleft = xs->datalen;
865 }
866 ecb->stat = 0;
867
868 s = splbio();
869
870 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
871 ecb->flags |= ECB_READY;
872 if (sc->sc_state == NCR_IDLE)
873 ncr53c9x_sched(sc);
874
875 splx(s);
876
877 if ((flags & XS_CTL_POLL) == 0)
878 return;
879
880 /* Not allowed to use interrupts, use polling instead */
881 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
882 ncr53c9x_timeout(ecb);
883 if (ncr53c9x_poll(sc, xs, ecb->timeout))
884 ncr53c9x_timeout(ecb);
885 }
886 return;
887
888 case ADAPTER_REQ_GROW_RESOURCES:
889 /* XXX Not supported. */
890 return;
891
892 case ADAPTER_REQ_SET_XFER_MODE:
893 {
894 struct ncr53c9x_tinfo *ti;
895 struct scsipi_xfer_mode *xm = arg;
896
897 ti = &sc->sc_tinfo[xm->xm_target];
898 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
899 ti->period = 0;
900 ti->offset = 0;
901
902 #if 0 /* commands timeout */
903 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 &&
904 (xm->xm_mode & PERIPH_CAP_TQING))
905 ti->flags |= T_TAG;
906 else
907 #endif
908 ti->flags &= ~T_TAG;
909
910 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
911 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
912 sc->sc_dev.dv_xname, xm->xm_target));
913 if (sc->sc_rev == NCR_VARIANT_FAS366) {
914 ti->flags |= T_WIDE;
915 ti->width = 1;
916 }
917 }
918
919 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
920 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
921 NCR_MISC(("%s: target %d: sync negotiation\n",
922 sc->sc_dev.dv_xname, xm->xm_target));
923 ti->flags |= T_NEGOTIATE;
924 ti->period = sc->sc_minsync;
925 }
926 /*
927 * If we're not going to negotiate, send the notification
928 * now, since it won't happen later.
929 */
930 if ((ti->flags & T_NEGOTIATE) == 0)
931 ncr53c9x_update_xfer_mode(sc, xm->xm_target);
932 return;
933 }
934 }
935 }
936
937 void
938 ncr53c9x_update_xfer_mode(sc, target)
939 struct ncr53c9x_softc *sc;
940 int target;
941 {
942 struct scsipi_xfer_mode xm;
943 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
944
945 xm.xm_target = target;
946 xm.xm_mode = 0;
947 xm.xm_period = 0;
948 xm.xm_offset = 0;
949
950 if (ti->flags & T_SYNCMODE) {
951 xm.xm_mode |= PERIPH_CAP_SYNC;
952 xm.xm_period = ti->period;
953 xm.xm_offset = ti->offset;
954 }
955 if (ti->width)
956 xm.xm_mode |= PERIPH_CAP_WIDE16;
957
958 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
959 xm.xm_mode |= PERIPH_CAP_TQING;
960
961 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
962 }
963
964 /*
965 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
966 */
967 int
968 ncr53c9x_poll(sc, xs, count)
969 struct ncr53c9x_softc *sc;
970 struct scsipi_xfer *xs;
971 int count;
972 {
973
974 NCR_TRACE(("[ncr53c9x_poll] "));
975 while (count) {
976 if (NCRDMA_ISINTR(sc)) {
977 ncr53c9x_intr(sc);
978 }
979 #if alternatively
980 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
981 ncr53c9x_intr(sc);
982 #endif
983 if ((xs->xs_status & XS_STS_DONE) != 0)
984 return (0);
985 if (sc->sc_state == NCR_IDLE) {
986 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
987 ncr53c9x_sched(sc);
988 }
989 DELAY(1000);
990 count--;
991 }
992 return (1);
993 }
994
995 int
996 ncr53c9x_ioctl(chan, cmd, arg, flag, p)
997 struct scsipi_channel *chan;
998 u_long cmd;
999 caddr_t arg;
1000 int flag;
1001 struct proc *p;
1002 {
1003 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */
1004 int s, error = 0;
1005
1006 s = splbio();
1007
1008 switch (cmd) {
1009 default:
1010 error = ENOTTY;
1011 break;
1012 }
1013 splx(s);
1014 return (error);
1015 }
1016
1017
1018 /*
1019 * LOW LEVEL SCSI UTILITIES
1020 */
1021
1022 /*
1023 * Schedule a scsi operation. This has now been pulled out of the interrupt
1024 * handler so that we may call it from ncr53c9x_scsipi_request and
1025 * ncr53c9x_done. This may save us an unecessary interrupt just to get
1026 * things going. Should only be called when state == NCR_IDLE and at bio pl.
1027 */
1028 void
1029 ncr53c9x_sched(sc)
1030 struct ncr53c9x_softc *sc;
1031 {
1032 struct ncr53c9x_ecb *ecb;
1033 struct scsipi_periph *periph;
1034 struct ncr53c9x_tinfo *ti;
1035 int lun;
1036 struct ncr53c9x_linfo *li;
1037 int s, tag;
1038
1039 NCR_TRACE(("[ncr53c9x_sched] "));
1040 if (sc->sc_state != NCR_IDLE)
1041 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1042
1043 /*
1044 * Find first ecb in ready queue that is for a target/lunit
1045 * combinations that is not busy.
1046 */
1047 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1048 ecb = TAILQ_NEXT(ecb, chain)) {
1049 periph = ecb->xs->xs_periph;
1050 ti = &sc->sc_tinfo[periph->periph_target];
1051 lun = periph->periph_lun;
1052
1053 /* Select type of tag for this command */
1054 if ((ti->flags & (T_RSELECTOFF)) != 0)
1055 tag = 0;
1056 else if ((ti->flags & (T_TAG)) == 0)
1057 tag = 0;
1058 else if ((ecb->flags & ECB_SENSE) != 0)
1059 tag = 0;
1060 else
1061 tag = ecb->xs->xs_tag_type;
1062 #if 0
1063 /* XXXX Use tags for polled commands? */
1064 if (ecb->xs->xs_control & XS_CTL_POLL)
1065 tag = 0;
1066 #endif
1067
1068 s = splbio();
1069 li = TINFO_LUN(ti, lun);
1070 if (li == NULL) {
1071 int wait = M_NOWAIT;
1072 int flags = ecb->xs->xs_control;
1073
1074 /* Initialize LUN info and add to list. */
1075 if ((curproc != NULL) &&
1076 ((flags & XS_CTL_NOSLEEP) == 0))
1077 wait = M_WAITOK;
1078 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT))
1079 == NULL) {
1080 splx(s);
1081 continue;
1082 }
1083 bzero(li, sizeof(*li));
1084 li->lun = lun;
1085
1086 LIST_INSERT_HEAD(&ti->luns, li, link);
1087 if (lun < NCR_NLUN)
1088 ti->lun[lun] = li;
1089 }
1090 li->last_used = time.tv_sec;
1091 if (tag == 0) {
1092 /* Try to issue this as an un-tagged command */
1093 if (li->untagged == NULL)
1094 li->untagged = ecb;
1095 }
1096 if (li->untagged != NULL) {
1097 tag = 0;
1098 if ((li->busy != 1) && li->used == 0) {
1099 /* We need to issue this untagged command now */
1100 ecb = li->untagged;
1101 periph = ecb->xs->xs_periph;
1102 } else {
1103 /* Not ready yet */
1104 splx(s);
1105 continue;
1106 }
1107 }
1108 ecb->tag[0] = tag;
1109 if (tag != 0) {
1110 li->queued[ecb->xs->xs_tag_id] = ecb;
1111 ecb->tag[1] = ecb->xs->xs_tag_id;
1112 }
1113 splx(s);
1114 if (li->untagged != NULL && (li->busy != 1)) {
1115 li->busy = 1;
1116 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1117 ecb->flags &= ~ECB_READY;
1118 sc->sc_nexus = ecb;
1119 ncr53c9x_select(sc, ecb);
1120 break;
1121 }
1122 if (li->untagged == NULL && tag != 0) {
1123 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1124 ecb->flags &= ~ECB_READY;
1125 sc->sc_nexus = ecb;
1126 ncr53c9x_select(sc, ecb);
1127 break;
1128 } else
1129 NCR_MISC(("%d:%d busy\n",
1130 periph->periph_target,
1131 periph->periph_lun));
1132 }
1133 }
1134
1135 void
1136 ncr53c9x_sense(sc, ecb)
1137 struct ncr53c9x_softc *sc;
1138 struct ncr53c9x_ecb *ecb;
1139 {
1140 struct scsipi_xfer *xs = ecb->xs;
1141 struct scsipi_periph *periph = xs->xs_periph;
1142 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1143 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1144 struct ncr53c9x_linfo *li;
1145 int lun = periph->periph_lun;
1146
1147 NCR_MISC(("requesting sense "));
1148 /* Next, setup a request sense command block */
1149 bzero(ss, sizeof(*ss));
1150 ss->opcode = REQUEST_SENSE;
1151 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1152 ss->length = sizeof(struct scsipi_sense_data);
1153 ecb->clen = sizeof(*ss);
1154 ecb->daddr = (char *)&xs->sense.scsi_sense;
1155 ecb->dleft = sizeof(struct scsipi_sense_data);
1156 ecb->flags |= ECB_SENSE;
1157 ecb->timeout = NCR_SENSE_TIMEOUT;
1158 ti->senses++;
1159 li = TINFO_LUN(ti, lun);
1160 if (li->busy)
1161 li->busy = 0;
1162 ncr53c9x_dequeue(sc, ecb);
1163 li->untagged = ecb; /* must be executed first to fix C/A */
1164 li->busy = 2;
1165 if (ecb == sc->sc_nexus) {
1166 ncr53c9x_select(sc, ecb);
1167 } else {
1168 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1169 ecb->flags |= ECB_READY;
1170 if (sc->sc_state == NCR_IDLE)
1171 ncr53c9x_sched(sc);
1172 }
1173 }
1174
1175 /*
1176 * POST PROCESSING OF SCSI_CMD (usually current)
1177 */
1178 void
1179 ncr53c9x_done(sc, ecb)
1180 struct ncr53c9x_softc *sc;
1181 struct ncr53c9x_ecb *ecb;
1182 {
1183 struct scsipi_xfer *xs = ecb->xs;
1184 struct scsipi_periph *periph = xs->xs_periph;
1185 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1186 int lun = periph->periph_lun;
1187 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1188
1189 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1190
1191 callout_stop(&ecb->xs->xs_callout);
1192
1193 /*
1194 * Now, if we've come here with no error code, i.e. we've kept the
1195 * initial XS_NOERROR, and the status code signals that we should
1196 * check sense, we'll need to set up a request sense cmd block and
1197 * push the command back into the ready queue *before* any other
1198 * commands for this target/lunit, else we lose the sense info.
1199 * We don't support chk sense conditions for the request sense cmd.
1200 */
1201 if (xs->error == XS_NOERROR) {
1202 xs->status = ecb->stat;
1203 if ((ecb->flags & ECB_ABORT) != 0) {
1204 xs->error = XS_TIMEOUT;
1205 } else if ((ecb->flags & ECB_SENSE) != 0) {
1206 xs->error = XS_SENSE;
1207 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1208 /* First, save the return values */
1209 xs->resid = ecb->dleft;
1210 ncr53c9x_sense(sc, ecb);
1211 return;
1212 } else {
1213 xs->resid = ecb->dleft;
1214 }
1215 if (xs->status == SCSI_QUEUE_FULL)
1216 xs->error = XS_BUSY;
1217 }
1218
1219 #ifdef NCR53C9X_DEBUG
1220 if (ncr53c9x_debug & NCR_SHOWMISC) {
1221 if (xs->resid != 0)
1222 printf("resid=%d ", xs->resid);
1223 if (xs->error == XS_SENSE)
1224 printf("sense=0x%02x\n",
1225 xs->sense.scsi_sense.error_code);
1226 else
1227 printf("error=%d\n", xs->error);
1228 }
1229 #endif
1230
1231 /*
1232 * Remove the ECB from whatever queue it's on.
1233 */
1234 ncr53c9x_dequeue(sc, ecb);
1235 if (ecb == sc->sc_nexus) {
1236 sc->sc_nexus = NULL;
1237 if (sc->sc_state != NCR_CLEANING) {
1238 sc->sc_state = NCR_IDLE;
1239 ncr53c9x_sched(sc);
1240 }
1241 }
1242
1243 if (xs->error == XS_SELTIMEOUT) {
1244 /* Selection timeout -- discard this LUN if empty */
1245 if (li->untagged == NULL && li->used == 0) {
1246 if (lun < NCR_NLUN)
1247 ti->lun[lun] = NULL;
1248 LIST_REMOVE(li, link);
1249 free(li, M_DEVBUF);
1250 }
1251 }
1252
1253 ncr53c9x_free_ecb(sc, ecb);
1254 ti->cmds++;
1255 scsipi_done(xs);
1256 }
1257
1258 void
1259 ncr53c9x_dequeue(sc, ecb)
1260 struct ncr53c9x_softc *sc;
1261 struct ncr53c9x_ecb *ecb;
1262 {
1263 struct ncr53c9x_tinfo *ti =
1264 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1265 struct ncr53c9x_linfo *li;
1266 int64_t lun = ecb->xs->xs_periph->periph_lun;
1267
1268 li = TINFO_LUN(ti, lun);
1269 #ifdef DIAGNOSTIC
1270 if (li == NULL || li->lun != lun)
1271 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1272 (long long) lun, ecb);
1273 #endif
1274 if (li->untagged == ecb) {
1275 li->busy = 0;
1276 li->untagged = NULL;
1277 }
1278 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1279 #ifdef DIAGNOSTIC
1280 if (li->queued[ecb->tag[1]] != NULL &&
1281 (li->queued[ecb->tag[1]] != ecb))
1282 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1283 "instead of ecb %p\n", ecb->tag[1],
1284 (long long) lun,
1285 li->queued[ecb->tag[1]], ecb);
1286 #endif
1287 li->queued[ecb->tag[1]] = NULL;
1288 li->used--;
1289 }
1290
1291 if ((ecb->flags & ECB_READY) != 0) {
1292 ecb->flags &= ~ECB_READY;
1293 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1294 }
1295 }
1296
1297 /*
1298 * INTERRUPT/PROTOCOL ENGINE
1299 */
1300
1301 /*
1302 * Schedule an outgoing message by prioritizing it, and asserting
1303 * attention on the bus. We can only do this when we are the initiator
1304 * else there will be an illegal command interrupt.
1305 */
1306 #define ncr53c9x_sched_msgout(m) \
1307 do { \
1308 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1309 NCRCMD(sc, NCRCMD_SETATN); \
1310 sc->sc_flags |= NCR_ATN; \
1311 sc->sc_msgpriq |= (m); \
1312 } while (0)
1313
1314 static void
1315 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1316 {
1317 NCR_MISC(("[flushfifo] "));
1318
1319 NCRCMD(sc, NCRCMD_FLUSH);
1320
1321 if (sc->sc_phase == COMMAND_PHASE ||
1322 sc->sc_phase == MESSAGE_OUT_PHASE)
1323 DELAY(2);
1324 }
1325
1326 static int
1327 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1328 {
1329 int i, n;
1330 u_char *buf;
1331
1332 switch(how) {
1333 case NCR_RDFIFO_START:
1334 buf = sc->sc_imess;
1335 sc->sc_imlen = 0;
1336 break;
1337 case NCR_RDFIFO_CONTINUE:
1338 buf = sc->sc_imess + sc->sc_imlen;
1339 break;
1340 default:
1341 panic("ncr53c9x_rdfifo: bad flag\n");
1342 break;
1343 }
1344
1345 /*
1346 * XXX buffer (sc_imess) size for message
1347 */
1348
1349 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1350
1351 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1352 n *= 2;
1353
1354 for (i = 0; i < n; i++)
1355 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1356
1357 if (sc->sc_espstat2 & FAS_STAT2_ISHUTTLE) {
1358
1359 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1360 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1361
1362 NCR_READ_REG(sc, NCR_FIFO);
1363
1364 ncr53c9x_flushfifo(sc);
1365 }
1366 } else {
1367 for (i = 0; i < n; i++)
1368 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1369 }
1370
1371 sc->sc_imlen += i;
1372
1373 #ifdef NCR53C9X_DEBUG
1374 {
1375 int j;
1376
1377 NCR_TRACE(("\n[rdfifo %s (%d):",
1378 (how == NCR_RDFIFO_START) ? "start" : "cont",
1379 (int)sc->sc_imlen));
1380 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1381 for (j = 0; j < sc->sc_imlen; j++)
1382 printf(" %02x", sc->sc_imess[j]);
1383 printf("]\n");
1384 }
1385 }
1386 #endif
1387 return sc->sc_imlen;
1388 }
1389
1390 static void
1391 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1392 {
1393 int i;
1394
1395 #ifdef NCR53C9X_DEBUG
1396 NCR_MISC(("[wrfifo(%d):", len));
1397 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1398 for (i = 0; i < len; i++)
1399 printf(" %02x", p[i]);
1400 printf("]\n");
1401 }
1402 #endif
1403
1404 for (i = 0; i < len; i++) {
1405 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1406
1407 if (sc->sc_rev == NCR_VARIANT_FAS366)
1408 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1409 }
1410 }
1411
1412 int
1413 ncr53c9x_reselect(sc, message, tagtype, tagid)
1414 struct ncr53c9x_softc *sc;
1415 int message;
1416 int tagtype, tagid;
1417 {
1418 u_char selid, target, lun;
1419 struct ncr53c9x_ecb *ecb = NULL;
1420 struct ncr53c9x_tinfo *ti;
1421 struct ncr53c9x_linfo *li;
1422
1423
1424 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1425 target = sc->sc_selid;
1426 } else {
1427 /*
1428 * The SCSI chip made a snapshot of the data bus
1429 * while the reselection was being negotiated.
1430 * This enables us to determine which target did
1431 * the reselect.
1432 */
1433 selid = sc->sc_selid & ~(1 << sc->sc_id);
1434 if (selid & (selid - 1)) {
1435 printf("%s: reselect with invalid selid %02x;"
1436 " sending DEVICE RESET\n",
1437 sc->sc_dev.dv_xname, selid);
1438 goto reset;
1439 }
1440
1441 target = ffs(selid) - 1;
1442 }
1443 lun = message & 0x07;
1444
1445 /*
1446 * Search wait queue for disconnected cmd
1447 * The list should be short, so I haven't bothered with
1448 * any more sophisticated structures than a simple
1449 * singly linked list.
1450 */
1451 ti = &sc->sc_tinfo[target];
1452 li = TINFO_LUN(ti, lun);
1453
1454 /*
1455 * We can get as far as the LUN with the IDENTIFY
1456 * message. Check to see if we're running an
1457 * un-tagged command. Otherwise ack the IDENTIFY
1458 * and wait for a tag message.
1459 */
1460 if (li != NULL) {
1461 if (li->untagged != NULL && li->busy)
1462 ecb = li->untagged;
1463 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1464 /* Wait for tag to come by */
1465 sc->sc_state = NCR_IDENTIFIED;
1466 return (0);
1467 } else if (tagtype)
1468 ecb = li->queued[tagid];
1469 }
1470 if (ecb == NULL) {
1471 printf("%s: reselect from target %d lun %d tag %x:%x "
1472 "with no nexus; sending ABORT\n",
1473 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1474 goto abort;
1475 }
1476
1477 /* Make this nexus active again. */
1478 sc->sc_state = NCR_CONNECTED;
1479 sc->sc_nexus = ecb;
1480 ncr53c9x_setsync(sc, ti);
1481
1482 if (ecb->flags & ECB_RESET)
1483 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1484 else if (ecb->flags & ECB_ABORT)
1485 ncr53c9x_sched_msgout(SEND_ABORT);
1486
1487 /* Do an implicit RESTORE POINTERS. */
1488 sc->sc_dp = ecb->daddr;
1489 sc->sc_dleft = ecb->dleft;
1490
1491 return (0);
1492
1493 reset:
1494 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1495 return (1);
1496
1497 abort:
1498 ncr53c9x_sched_msgout(SEND_ABORT);
1499 return (1);
1500 }
1501
1502
1503 /*
1504 * XXX this might be common thing(check with scsipi)
1505 */
1506 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1507 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1508 #define ISEXTMSG(m) ((m) == 1)
1509
1510 static inline int
1511 __verify_msg_format(u_char *p, int len)
1512 {
1513
1514 if (len == 1 && IS1BYTEMSG(p[0]))
1515 return 1;
1516 if (len == 2 && IS2BYTEMSG(p[0]))
1517 return 1;
1518 if (len >= 3 && ISEXTMSG(p[0]) &&
1519 len == p[1] + 2)
1520 return 1;
1521
1522 return 0;
1523 }
1524
1525 /*
1526 * Get an incoming message as initiator.
1527 *
1528 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1529 * byte in the FIFO
1530 */
1531 void
1532 ncr53c9x_msgin(sc)
1533 struct ncr53c9x_softc *sc;
1534 {
1535
1536 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1537
1538 if (sc->sc_imlen == 0) {
1539 printf("%s: msgin: no msg byte available\n",
1540 sc->sc_dev.dv_xname);
1541 return;
1542 }
1543
1544 /*
1545 * Prepare for a new message. A message should (according
1546 * to the SCSI standard) be transmitted in one single
1547 * MESSAGE_IN_PHASE. If we have been in some other phase,
1548 * then this is a new message.
1549 */
1550 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1551 sc->sc_state != NCR_RESELECTED) {
1552 printf("%s: phase change, dropping message, "
1553 "prev %d, state %d\n",
1554 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1555 sc->sc_flags &= ~NCR_DROP_MSGI;
1556 sc->sc_imlen = 0;
1557 }
1558
1559 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1560
1561 /*
1562 * If we're going to reject the message, don't bother storing
1563 * the incoming bytes. But still, we need to ACK them.
1564 */
1565 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1566 NCRCMD(sc, NCRCMD_MSGOK);
1567 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1568 return;
1569 }
1570
1571 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1572 ncr53c9x_sched_msgout(SEND_REJECT);
1573 sc->sc_flags |= NCR_DROP_MSGI;
1574 } else {
1575 u_char *pb;
1576 int plen;
1577
1578 switch (sc->sc_state) {
1579 /*
1580 * if received message is the first of reselection
1581 * then first byte is selid, and then message
1582 */
1583 case NCR_RESELECTED:
1584 pb = sc->sc_imess + 1;
1585 plen = sc->sc_imlen - 1;
1586 break;
1587 default:
1588 pb = sc->sc_imess;
1589 plen = sc->sc_imlen;
1590 break;
1591 }
1592
1593 if (__verify_msg_format(pb, plen))
1594 goto gotit;
1595 }
1596
1597 /* Ack what we have so far */
1598 NCRCMD(sc, NCRCMD_MSGOK);
1599 return;
1600
1601 gotit:
1602 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1603 /* we got complete message, flush the imess, */
1604 /* XXX nobody uses imlen below */
1605 sc->sc_imlen = 0;
1606 /*
1607 * Now we should have a complete message (1 byte, 2 byte
1608 * and moderately long extended messages). We only handle
1609 * extended messages which total length is shorter than
1610 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1611 */
1612 switch (sc->sc_state) {
1613 struct ncr53c9x_ecb *ecb;
1614 struct ncr53c9x_tinfo *ti;
1615 struct ncr53c9x_linfo *li;
1616 int lun;
1617
1618 case NCR_CONNECTED:
1619 ecb = sc->sc_nexus;
1620 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1621
1622 switch (sc->sc_imess[0]) {
1623 case MSG_CMDCOMPLETE:
1624 NCR_MSGS(("cmdcomplete "));
1625 if (sc->sc_dleft < 0) {
1626 scsipi_printaddr(ecb->xs->xs_periph);
1627 printf("got %ld extra bytes\n",
1628 -(long)sc->sc_dleft);
1629 sc->sc_dleft = 0;
1630 }
1631 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1632 0 : sc->sc_dleft;
1633 if ((ecb->flags & ECB_SENSE) == 0)
1634 ecb->xs->resid = ecb->dleft;
1635 sc->sc_state = NCR_CMDCOMPLETE;
1636 break;
1637
1638 case MSG_MESSAGE_REJECT:
1639 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1640 switch (sc->sc_msgout) {
1641 case SEND_TAG:
1642 /*
1643 * Target does not like tagged queuing.
1644 * - Flush the command queue
1645 * - Disable tagged queuing for the target
1646 * - Dequeue ecb from the queued array.
1647 */
1648 printf("%s: tagged queuing rejected: "
1649 "target %d\n",
1650 sc->sc_dev.dv_xname,
1651 ecb->xs->xs_periph->periph_target);
1652
1653 NCR_MSGS(("(rejected sent tag)"));
1654 NCRCMD(sc, NCRCMD_FLUSH);
1655 DELAY(1);
1656 ti->flags &= ~T_TAG;
1657 lun = ecb->xs->xs_periph->periph_lun;
1658 li = TINFO_LUN(ti, lun);
1659 if (ecb->tag[0] &&
1660 li->queued[ecb->tag[1]] != NULL) {
1661 li->queued[ecb->tag[1]] = NULL;
1662 li->used--;
1663 }
1664 ecb->tag[0] = ecb->tag[1] = 0;
1665 li->untagged = ecb;
1666 li->busy = 1;
1667 break;
1668
1669 case SEND_SDTR:
1670 printf("%s: sync transfer rejected: "
1671 "target %d\n",
1672 sc->sc_dev.dv_xname,
1673 ecb->xs->xs_periph->periph_target);
1674
1675 sc->sc_flags &= ~NCR_SYNCHNEGO;
1676 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1677 ncr53c9x_setsync(sc, ti);
1678 ncr53c9x_update_xfer_mode(sc,
1679 ecb->xs->xs_periph->periph_target);
1680 break;
1681
1682 case SEND_WDTR:
1683 printf("%s: wide transfer rejected: "
1684 "target %d\n",
1685 sc->sc_dev.dv_xname,
1686 ecb->xs->xs_periph->periph_target);
1687 ti->flags &= ~T_WIDE;
1688 ti->width = 0;
1689 break;
1690
1691 case SEND_INIT_DET_ERR:
1692 goto abort;
1693 }
1694 break;
1695
1696 case MSG_NOOP:
1697 NCR_MSGS(("noop "));
1698 break;
1699
1700 case MSG_HEAD_OF_Q_TAG:
1701 case MSG_SIMPLE_Q_TAG:
1702 case MSG_ORDERED_Q_TAG:
1703 NCR_MSGS(("TAG %x:%x",
1704 sc->sc_imess[0], sc->sc_imess[1]));
1705 break;
1706
1707 case MSG_DISCONNECT:
1708 NCR_MSGS(("disconnect "));
1709 ti->dconns++;
1710 sc->sc_state = NCR_DISCONNECT;
1711
1712 /*
1713 * Mark the fact that all bytes have moved. The
1714 * target may not bother to do a SAVE POINTERS
1715 * at this stage. This flag will set the residual
1716 * count to zero on MSG COMPLETE.
1717 */
1718 if (sc->sc_dleft == 0)
1719 ecb->flags |= ECB_TENTATIVE_DONE;
1720
1721 break;
1722
1723 case MSG_SAVEDATAPOINTER:
1724 NCR_MSGS(("save datapointer "));
1725 ecb->daddr = sc->sc_dp;
1726 ecb->dleft = sc->sc_dleft;
1727 break;
1728
1729 case MSG_RESTOREPOINTERS:
1730 NCR_MSGS(("restore datapointer "));
1731 sc->sc_dp = ecb->daddr;
1732 sc->sc_dleft = ecb->dleft;
1733 break;
1734
1735 case MSG_EXTENDED:
1736 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1737 switch (sc->sc_imess[2]) {
1738 case MSG_EXT_SDTR:
1739 NCR_MSGS(("SDTR period %d, offset %d ",
1740 sc->sc_imess[3], sc->sc_imess[4]));
1741 if (sc->sc_imess[1] != 3)
1742 goto reject;
1743 ti->period = sc->sc_imess[3];
1744 ti->offset = sc->sc_imess[4];
1745 ti->flags &= ~T_NEGOTIATE;
1746 if (sc->sc_minsync == 0 ||
1747 ti->offset == 0 ||
1748 ti->period > 124) {
1749 #if 0
1750 #ifdef NCR53C9X_DEBUG
1751 scsipi_printaddr(ecb->xs->xs_periph);
1752 printf("async mode\n");
1753 #endif
1754 #endif
1755 ti->flags &= ~T_SYNCMODE;
1756 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1757 /*
1758 * target initiated negotiation
1759 */
1760 ti->offset = 0;
1761 ncr53c9x_sched_msgout(
1762 SEND_SDTR);
1763 }
1764 } else {
1765 #if 0
1766 int r = 250/ti->period;
1767 int s = (100*250)/ti->period - 100*r;
1768 #endif
1769 int p;
1770
1771 p = ncr53c9x_stp2cpb(sc, ti->period);
1772 ti->period = ncr53c9x_cpb2stp(sc, p);
1773 #if 0
1774 #ifdef NCR53C9X_DEBUG
1775 scsipi_printaddr(ecb->xs->xs_periph);
1776 printf("max sync rate %d.%02dMB/s\n",
1777 r, s);
1778 #endif
1779 #endif
1780 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1781 /*
1782 * target initiated negotiation
1783 */
1784 if (ti->period <
1785 sc->sc_minsync)
1786 ti->period =
1787 sc->sc_minsync;
1788 if (ti->offset > 15)
1789 ti->offset = 15;
1790 ti->flags &= ~T_SYNCMODE;
1791 ncr53c9x_sched_msgout(
1792 SEND_SDTR);
1793 } else {
1794 /* we are sync */
1795 ti->flags |= T_SYNCMODE;
1796 }
1797 }
1798 ncr53c9x_update_xfer_mode(sc,
1799 ecb->xs->xs_periph->periph_target);
1800 sc->sc_flags &= ~NCR_SYNCHNEGO;
1801 ncr53c9x_setsync(sc, ti);
1802 break;
1803
1804 case MSG_EXT_WDTR:
1805 printf("%s: wide mode %d\n",
1806 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1807 if (sc->sc_imess[3] == 1) {
1808 ti->cfg3 |= NCRFASCFG3_EWIDE;
1809 ncr53c9x_setsync(sc, ti);
1810 } else
1811 ti->width = 0;
1812 ti->flags &= ~T_WIDE;
1813 break;
1814 default:
1815 scsipi_printaddr(ecb->xs->xs_periph);
1816 printf("unrecognized MESSAGE EXTENDED;"
1817 " sending REJECT\n");
1818 goto reject;
1819 }
1820 break;
1821
1822 default:
1823 NCR_MSGS(("ident "));
1824 scsipi_printaddr(ecb->xs->xs_periph);
1825 printf("unrecognized MESSAGE; sending REJECT\n");
1826 reject:
1827 ncr53c9x_sched_msgout(SEND_REJECT);
1828 break;
1829 }
1830 break;
1831
1832 case NCR_IDENTIFIED:
1833 /*
1834 * IDENTIFY message was received and queue tag is expected now
1835 */
1836 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1837 (sc->sc_msgify == 0)) {
1838 printf("%s: TAG reselect without IDENTIFY;"
1839 " MSG %x;"
1840 " sending DEVICE RESET\n",
1841 sc->sc_dev.dv_xname,
1842 sc->sc_imess[0]);
1843 goto reset;
1844 }
1845 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1846 sc->sc_imess[0], sc->sc_imess[1]);
1847 break;
1848
1849 case NCR_RESELECTED:
1850 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1851 sc->sc_msgify = sc->sc_imess[1];
1852 } else {
1853 printf("%s: reselect without IDENTIFY;"
1854 " MSG %x;"
1855 " sending DEVICE RESET\n",
1856 sc->sc_dev.dv_xname,
1857 sc->sc_imess[1]);
1858 goto reset;
1859 }
1860 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1861 break;
1862
1863 default:
1864 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1865 sc->sc_dev.dv_xname);
1866 reset:
1867 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1868 break;
1869
1870 abort:
1871 ncr53c9x_sched_msgout(SEND_ABORT);
1872 break;
1873 }
1874
1875 /* if we have more messages to send set ATN */
1876 if (sc->sc_msgpriq)
1877 NCRCMD(sc, NCRCMD_SETATN);
1878
1879 /* Ack last message byte */
1880 NCRCMD(sc, NCRCMD_MSGOK);
1881
1882 /* Done, reset message pointer. */
1883 sc->sc_flags &= ~NCR_DROP_MSGI;
1884 sc->sc_imlen = 0;
1885 }
1886
1887
1888 /*
1889 * Send the highest priority, scheduled message
1890 */
1891 void
1892 ncr53c9x_msgout(sc)
1893 struct ncr53c9x_softc *sc;
1894 {
1895 struct ncr53c9x_tinfo *ti;
1896 struct ncr53c9x_ecb *ecb;
1897 size_t size;
1898
1899 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1900 sc->sc_msgpriq, sc->sc_prevphase));
1901
1902 /*
1903 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1904 * condition on the SCSI bus. The 53c9x chip
1905 * automatically turns off ATN before sending the
1906 * message byte. (see also the comment below in the
1907 * default case when picking out a message to send)
1908 */
1909 if (sc->sc_flags & NCR_ATN) {
1910 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1911 new:
1912 NCRCMD(sc, NCRCMD_FLUSH);
1913 /* DELAY(1); */
1914 sc->sc_msgoutq = 0;
1915 sc->sc_omlen = 0;
1916 }
1917 } else {
1918 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1919 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1920 goto new;
1921 } else {
1922 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1923 sc->sc_dev.dv_xname, __LINE__);
1924 }
1925 }
1926
1927 if (sc->sc_omlen == 0) {
1928 /* Pick up highest priority message */
1929 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1930 sc->sc_msgoutq |= sc->sc_msgout;
1931 sc->sc_msgpriq &= ~sc->sc_msgout;
1932 sc->sc_omlen = 1; /* "Default" message len */
1933 switch (sc->sc_msgout) {
1934 case SEND_SDTR:
1935 ecb = sc->sc_nexus;
1936 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1937 sc->sc_omess[0] = MSG_EXTENDED;
1938 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1939 sc->sc_omess[2] = MSG_EXT_SDTR;
1940 sc->sc_omess[3] = ti->period;
1941 sc->sc_omess[4] = ti->offset;
1942 sc->sc_omlen = 5;
1943 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1944 ti->flags |= T_SYNCMODE;
1945 ncr53c9x_setsync(sc, ti);
1946 }
1947 break;
1948 case SEND_WDTR:
1949 ecb = sc->sc_nexus;
1950 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1951 sc->sc_omess[0] = MSG_EXTENDED;
1952 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1953 sc->sc_omess[2] = MSG_EXT_WDTR;
1954 sc->sc_omess[3] = ti->width;
1955 sc->sc_omlen = 4;
1956 break;
1957 case SEND_IDENTIFY:
1958 if (sc->sc_state != NCR_CONNECTED) {
1959 printf("%s at line %d: no nexus\n",
1960 sc->sc_dev.dv_xname, __LINE__);
1961 }
1962 ecb = sc->sc_nexus;
1963 sc->sc_omess[0] =
1964 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1965 break;
1966 case SEND_TAG:
1967 if (sc->sc_state != NCR_CONNECTED) {
1968 printf("%s at line %d: no nexus\n",
1969 sc->sc_dev.dv_xname, __LINE__);
1970 }
1971 ecb = sc->sc_nexus;
1972 sc->sc_omess[0] = ecb->tag[0];
1973 sc->sc_omess[1] = ecb->tag[1];
1974 sc->sc_omlen = 2;
1975 break;
1976 case SEND_DEV_RESET:
1977 sc->sc_flags |= NCR_ABORTING;
1978 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1979 ecb = sc->sc_nexus;
1980 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1981 ti->flags &= ~T_SYNCMODE;
1982 ncr53c9x_update_xfer_mode(sc,
1983 ecb->xs->xs_periph->periph_target);
1984 if ((ti->flags & T_SYNCHOFF) == 0)
1985 /* We can re-start sync negotiation */
1986 ti->flags |= T_NEGOTIATE;
1987 break;
1988 case SEND_PARITY_ERROR:
1989 sc->sc_omess[0] = MSG_PARITY_ERROR;
1990 break;
1991 case SEND_ABORT:
1992 sc->sc_flags |= NCR_ABORTING;
1993 sc->sc_omess[0] = MSG_ABORT;
1994 break;
1995 case SEND_INIT_DET_ERR:
1996 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1997 break;
1998 case SEND_REJECT:
1999 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
2000 break;
2001 default:
2002 /*
2003 * We normally do not get here, since the chip
2004 * automatically turns off ATN before the last
2005 * byte of a message is sent to the target.
2006 * However, if the target rejects our (multi-byte)
2007 * message early by switching to MSG IN phase
2008 * ATN remains on, so the target may return to
2009 * MSG OUT phase. If there are no scheduled messages
2010 * left we send a NO-OP.
2011 *
2012 * XXX - Note that this leaves no useful purpose for
2013 * the NCR_ATN flag.
2014 */
2015 sc->sc_flags &= ~NCR_ATN;
2016 sc->sc_omess[0] = MSG_NOOP;
2017 break;
2018 }
2019 sc->sc_omp = sc->sc_omess;
2020 }
2021
2022 #ifdef DEBUG
2023 {
2024 int i;
2025
2026 NCR_MISC(("<msgout:"));
2027 for (i = 0; i < sc->sc_omlen; i++)
2028 NCR_MISC((" %02x", sc->sc_omess[i]));
2029 NCR_MISC(("> "));
2030 }
2031 #endif
2032 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2033 /*
2034 * XXX fifo size
2035 */
2036 ncr53c9x_flushfifo(sc);
2037 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2038 NCRCMD(sc, NCRCMD_TRANS);
2039 } else {
2040 /* (re)send the message */
2041 size = min(sc->sc_omlen, sc->sc_maxxfer);
2042 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2043 /* Program the SCSI counter */
2044 NCR_SET_COUNT(sc, size);
2045
2046 /* Load the count in and start the message-out transfer */
2047 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2048 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2049 NCRDMA_GO(sc);
2050 }
2051 }
2052
2053 /*
2054 * This is the most critical part of the driver, and has to know
2055 * how to deal with *all* error conditions and phases from the SCSI
2056 * bus. If there are no errors and the DMA was active, then call the
2057 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2058 * and we can return from here without further processing.
2059 *
2060 * Most of this needs verifying.
2061 */
2062 int
2063 ncr53c9x_intr(arg)
2064 void *arg;
2065 {
2066 struct ncr53c9x_softc *sc = arg;
2067 struct ncr53c9x_ecb *ecb;
2068 struct scsipi_periph *periph;
2069 struct ncr53c9x_tinfo *ti;
2070 size_t size;
2071 int nfifo;
2072
2073 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2074
2075 if (!NCRDMA_ISINTR(sc))
2076 return (0);
2077
2078 again:
2079 /* and what do the registers say... */
2080 ncr53c9x_readregs(sc);
2081
2082 sc->sc_intrcnt.ev_count++;
2083
2084 /*
2085 * At the moment, only a SCSI Bus Reset or Illegal
2086 * Command are classed as errors. A disconnect is a
2087 * valid condition, and we let the code check is the
2088 * "NCR_BUSFREE_OK" flag was set before declaring it
2089 * and error.
2090 *
2091 * Also, the status register tells us about "Gross
2092 * Errors" and "Parity errors". Only the Gross Error
2093 * is really bad, and the parity errors are dealt
2094 * with later
2095 *
2096 * TODO
2097 * If there are too many parity error, go to slow
2098 * cable mode ?
2099 */
2100
2101 /* SCSI Reset */
2102 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2103 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2104 NCRCMD(sc, NCRCMD_FLUSH);
2105 DELAY(1);
2106 }
2107 if (sc->sc_state != NCR_SBR) {
2108 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2109 ncr53c9x_init(sc, 0); /* Restart everything */
2110 return (1);
2111 }
2112 #if 0
2113 /*XXX*/ printf("<expected bus reset: "
2114 "[intr %x, stat %x, step %d]>\n",
2115 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2116 #endif
2117 if (sc->sc_nexus != NULL)
2118 panic("%s: nexus in reset state",
2119 sc->sc_dev.dv_xname);
2120 goto sched;
2121 }
2122
2123 ecb = sc->sc_nexus;
2124
2125 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2126 if (sc->sc_espintr & NCRINTR_ERR ||
2127 sc->sc_espstat & NCRSTAT_GE) {
2128
2129 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2130 /* Gross Error; no target ? */
2131 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2132 NCRCMD(sc, NCRCMD_FLUSH);
2133 DELAY(1);
2134 }
2135 if (sc->sc_state == NCR_CONNECTED ||
2136 sc->sc_state == NCR_SELECTING) {
2137 ecb->xs->error = XS_TIMEOUT;
2138 ncr53c9x_done(sc, ecb);
2139 }
2140 return (1);
2141 }
2142
2143 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2144 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2145 /*
2146 * Eat away "Illegal command" interrupt
2147 * on a ESP100 caused by a re-selection
2148 * while we were trying to select
2149 * another target.
2150 */
2151 #ifdef DEBUG
2152 printf("%s: ESP100 work-around activated\n",
2153 sc->sc_dev.dv_xname);
2154 #endif
2155 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2156 return (1);
2157 }
2158 /* illegal command, out of sync ? */
2159 printf("%s: illegal command: 0x%x "
2160 "(state %d, phase %x, prevphase %x)\n",
2161 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2162 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2163 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2164 NCRCMD(sc, NCRCMD_FLUSH);
2165 DELAY(1);
2166 }
2167 ncr53c9x_init(sc, 1); /* Restart everything */
2168 return (1);
2169 }
2170 }
2171 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2172
2173 /*
2174 * Call if DMA is active.
2175 *
2176 * If DMA_INTR returns true, then maybe go 'round the loop
2177 * again in case there is no more DMA queued, but a phase
2178 * change is expected.
2179 */
2180 if (NCRDMA_ISACTIVE(sc)) {
2181 int r = NCRDMA_INTR(sc);
2182 if (r == -1) {
2183 printf("%s: DMA error; resetting\n",
2184 sc->sc_dev.dv_xname);
2185 ncr53c9x_init(sc, 1);
2186 }
2187 /* If DMA active here, then go back to work... */
2188 if (NCRDMA_ISACTIVE(sc))
2189 return (1);
2190
2191 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2192 /*
2193 * DMA not completed. If we can not find a
2194 * acceptable explanation, print a diagnostic.
2195 */
2196 if (sc->sc_state == NCR_SELECTING)
2197 /*
2198 * This can happen if we are reselected
2199 * while using DMA to select a target.
2200 */
2201 /*void*/;
2202 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2203 /*
2204 * Our (multi-byte) message (eg SDTR) was
2205 * interrupted by the target to send
2206 * a MSG REJECT.
2207 * Print diagnostic if current phase
2208 * is not MESSAGE IN.
2209 */
2210 if (sc->sc_phase != MESSAGE_IN_PHASE)
2211 printf("%s: !TC on MSG OUT"
2212 " [intr %x, stat %x, step %d]"
2213 " prevphase %x, resid %lx\n",
2214 sc->sc_dev.dv_xname,
2215 sc->sc_espintr,
2216 sc->sc_espstat,
2217 sc->sc_espstep,
2218 sc->sc_prevphase,
2219 (u_long)sc->sc_omlen);
2220 } else if (sc->sc_dleft == 0) {
2221 /*
2222 * The DMA operation was started for
2223 * a DATA transfer. Print a diagnostic
2224 * if the DMA counter and TC bit
2225 * appear to be out of sync.
2226 */
2227 printf("%s: !TC on DATA XFER"
2228 " [intr %x, stat %x, step %d]"
2229 " prevphase %x, resid %x\n",
2230 sc->sc_dev.dv_xname,
2231 sc->sc_espintr,
2232 sc->sc_espstat,
2233 sc->sc_espstep,
2234 sc->sc_prevphase,
2235 ecb ? ecb->dleft : -1);
2236 }
2237 }
2238 }
2239
2240 /*
2241 * Check for less serious errors.
2242 */
2243 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2244 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2245 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2246 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2247 else
2248 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2249 }
2250
2251 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2252 sc->sc_msgify = 0;
2253 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2254 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2255 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2256 NCRCMD(sc, NCRCMD_FLUSH);
2257 /* DELAY(1); */
2258 }
2259 /*
2260 * This command must (apparently) be issued within
2261 * 250mS of a disconnect. So here you are...
2262 */
2263 NCRCMD(sc, NCRCMD_ENSEL);
2264
2265 switch (sc->sc_state) {
2266 case NCR_RESELECTED:
2267 goto sched;
2268
2269 case NCR_SELECTING:
2270 {
2271 struct ncr53c9x_linfo *li;
2272
2273 ecb->xs->error = XS_SELTIMEOUT;
2274
2275 /* Selection timeout -- discard all LUNs if empty */
2276 periph = ecb->xs->xs_periph;
2277 ti = &sc->sc_tinfo[periph->periph_target];
2278 li = LIST_FIRST(&ti->luns);
2279 while (li != NULL) {
2280 if (li->untagged == NULL && li->used == 0) {
2281 if (li->lun < NCR_NLUN)
2282 ti->lun[li->lun] = NULL;
2283 LIST_REMOVE(li, link);
2284 free(li, M_DEVBUF);
2285 /*
2286 * Restart the search at the beginning
2287 */
2288 li = LIST_FIRST(&ti->luns);
2289 continue;
2290 }
2291 li = LIST_NEXT(li, link);
2292 }
2293 goto finish;
2294 }
2295 case NCR_CONNECTED:
2296 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2297 #ifdef NCR53C9X_DEBUG
2298 if (ecb != NULL)
2299 scsipi_printaddr(ecb->xs->xs_periph);
2300 printf("sync nego not completed!\n");
2301 #endif
2302 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2303 sc->sc_flags &= ~NCR_SYNCHNEGO;
2304 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2305 }
2306
2307 /* it may be OK to disconnect */
2308 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2309 /*
2310 * Section 5.1.1 of the SCSI 2 spec
2311 * suggests issuing a REQUEST SENSE
2312 * following an unexpected disconnect.
2313 * Some devices go into a contingent
2314 * allegiance condition when
2315 * disconnecting, and this is necessary
2316 * to clean up their state.
2317 */
2318 printf("%s: unexpected disconnect; ",
2319 sc->sc_dev.dv_xname);
2320 if ((ecb->flags & ECB_SENSE) != 0) {
2321 printf("resetting\n");
2322 goto reset;
2323 }
2324 printf("sending REQUEST SENSE\n");
2325 callout_stop(&ecb->xs->xs_callout);
2326 ncr53c9x_sense(sc, ecb);
2327 goto out;
2328 }
2329
2330 ecb->xs->error = XS_TIMEOUT;
2331 goto finish;
2332
2333 case NCR_DISCONNECT:
2334 sc->sc_nexus = NULL;
2335 goto sched;
2336
2337 case NCR_CMDCOMPLETE:
2338 goto finish;
2339 }
2340 }
2341
2342 switch (sc->sc_state) {
2343
2344 case NCR_SBR:
2345 printf("%s: waiting for SCSI Bus Reset to happen\n",
2346 sc->sc_dev.dv_xname);
2347 return (1);
2348
2349 case NCR_RESELECTED:
2350 /*
2351 * we must be continuing a message ?
2352 */
2353 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2354 printf("%s: target didn't identify\n",
2355 sc->sc_dev.dv_xname);
2356 ncr53c9x_init(sc, 1);
2357 return (1);
2358 }
2359 printf("<<RESELECT CONT'd>>");
2360 #if XXXX
2361 ncr53c9x_msgin(sc);
2362 if (sc->sc_state != NCR_CONNECTED) {
2363 /* IDENTIFY fail?! */
2364 printf("%s: identify failed\n",
2365 sc->sc_dev.dv_xname, sc->sc_state);
2366 ncr53c9x_init(sc, 1);
2367 return (1);
2368 }
2369 #endif
2370 break;
2371
2372 case NCR_IDENTIFIED:
2373 ecb = sc->sc_nexus;
2374 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2375 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2376 /*
2377 * Things are seriously fucked up.
2378 * Pull the brakes, i.e. reset
2379 */
2380 printf("%s: target didn't send tag: %d bytes in fifo\n",
2381 sc->sc_dev.dv_xname, i);
2382 /* Drain and display fifo */
2383 while (i-- > 0)
2384 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2385
2386 ncr53c9x_init(sc, 1);
2387 return (1);
2388 } else
2389 goto msgin;
2390
2391 break;
2392
2393 case NCR_IDLE:
2394 case NCR_SELECTING:
2395 ecb = sc->sc_nexus;
2396 if (sc->sc_espintr & NCRINTR_RESEL) {
2397 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2398 sc->sc_flags = 0;
2399 /*
2400 * If we're trying to select a
2401 * target ourselves, push our command
2402 * back into the ready list.
2403 */
2404 if (sc->sc_state == NCR_SELECTING) {
2405 NCR_MISC(("backoff selector "));
2406 callout_stop(&ecb->xs->xs_callout);
2407 ncr53c9x_dequeue(sc, ecb);
2408 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2409 ecb->flags |= ECB_READY;
2410 ecb = sc->sc_nexus = NULL;
2411 }
2412 sc->sc_state = NCR_RESELECTED;
2413 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2414 /*
2415 * Things are seriously fucked up.
2416 * Pull the brakes, i.e. reset
2417 */
2418 printf("%s: target didn't identify\n",
2419 sc->sc_dev.dv_xname);
2420 ncr53c9x_init(sc, 1);
2421 return (1);
2422 }
2423 /*
2424 * The C90 only inhibits FIFO writes until
2425 * reselection is complete, instead of
2426 * waiting until the interrupt status register
2427 * has been read. So, if the reselect happens
2428 * while we were entering a command bytes (for
2429 * another target) some of those bytes can
2430 * appear in the FIFO here, after the
2431 * interrupt is taken.
2432 */
2433 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2434
2435 if (nfifo < 2 ||
2436 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) {
2437 printf("%s: RESELECT: %d bytes in FIFO! "
2438 "[intr %x, stat %x, step %d, "
2439 "prevphase %x]\n",
2440 sc->sc_dev.dv_xname,
2441 nfifo,
2442 sc->sc_espintr,
2443 sc->sc_espstat,
2444 sc->sc_espstep,
2445 sc->sc_prevphase);
2446 ncr53c9x_init(sc, 1);
2447 return (1);
2448 }
2449 sc->sc_selid = sc->sc_imess[0];
2450 NCR_MISC(("selid=%02x ", sc->sc_selid));
2451
2452 /* Handle identify message */
2453 ncr53c9x_msgin(sc);
2454 if (nfifo != 2) {
2455 /*
2456 * Note: this should not happen
2457 * with `dmaselect' on.
2458 */
2459 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2460 NCRCMD(sc, NCRCMD_FLUSH);
2461 } else if (sc->sc_features & NCR_F_DMASELECT &&
2462 sc->sc_rev == NCR_VARIANT_ESP100) {
2463 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2464 }
2465
2466 if (sc->sc_state != NCR_CONNECTED &&
2467 sc->sc_state != NCR_IDENTIFIED) {
2468 /* IDENTIFY fail?! */
2469 printf("%s: identify failed, "
2470 "state %d, intr %02x\n",
2471 sc->sc_dev.dv_xname, sc->sc_state,
2472 sc->sc_espintr);
2473 ncr53c9x_init(sc, 1);
2474 return (1);
2475 }
2476 goto shortcut; /* ie. next phase expected soon */
2477 }
2478
2479 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2480 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2481 /*
2482 * Arbitration won; examine the `step' register
2483 * to determine how far the selection could progress.
2484 */
2485 ecb = sc->sc_nexus;
2486 if (ecb == NULL)
2487 panic("ncr53c9x: no nexus");
2488
2489 periph = ecb->xs->xs_periph;
2490 ti = &sc->sc_tinfo[periph->periph_target];
2491
2492 switch (sc->sc_espstep) {
2493 case 0:
2494 /*
2495 * The target did not respond with a
2496 * message out phase - probably an old
2497 * device that doesn't recognize ATN.
2498 * Clear ATN and just continue, the
2499 * target should be in the command
2500 * phase.
2501 * XXXX check for command phase?
2502 */
2503 NCRCMD(sc, NCRCMD_RSTATN);
2504 break;
2505 case 1:
2506 if ((ti->flags & T_NEGOTIATE) == 0 &&
2507 ecb->tag[0] == 0) {
2508 printf("%s: step 1 & !NEG\n",
2509 sc->sc_dev.dv_xname);
2510 goto reset;
2511 }
2512 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2513 printf("%s: !MSGOUT\n",
2514 sc->sc_dev.dv_xname);
2515 goto reset;
2516 }
2517 if (ti->flags & T_WIDE) {
2518 ncr53c9x_sched_msgout(SEND_WDTR);
2519 }
2520 if (ti->flags & T_NEGOTIATE) {
2521 /* Start negotiating */
2522 ti->period = sc->sc_minsync;
2523 ti->offset = 15;
2524 sc->sc_flags |= NCR_SYNCHNEGO;
2525 if (ecb->tag[0])
2526 ncr53c9x_sched_msgout(
2527 SEND_TAG|SEND_SDTR);
2528 else
2529 ncr53c9x_sched_msgout(
2530 SEND_SDTR);
2531 } else {
2532 /* Could not do ATN3 so send TAG */
2533 ncr53c9x_sched_msgout(SEND_TAG);
2534 }
2535 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2536 break;
2537 case 3:
2538 /*
2539 * Grr, this is supposed to mean
2540 * "target left command phase prematurely".
2541 * It seems to happen regularly when
2542 * sync mode is on.
2543 * Look at FIFO to see if command went out.
2544 * (Timing problems?)
2545 */
2546 if (sc->sc_features & NCR_F_DMASELECT) {
2547 if (sc->sc_cmdlen == 0)
2548 /* Hope for the best.. */
2549 break;
2550 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2551 & NCRFIFO_FF) == 0) {
2552 /* Hope for the best.. */
2553 break;
2554 }
2555 printf("(%s:%d:%d): selection failed;"
2556 " %d left in FIFO "
2557 "[intr %x, stat %x, step %d]\n",
2558 sc->sc_dev.dv_xname,
2559 periph->periph_target,
2560 periph->periph_lun,
2561 NCR_READ_REG(sc, NCR_FFLAG)
2562 & NCRFIFO_FF,
2563 sc->sc_espintr, sc->sc_espstat,
2564 sc->sc_espstep);
2565 NCRCMD(sc, NCRCMD_FLUSH);
2566 ncr53c9x_sched_msgout(SEND_ABORT);
2567 return (1);
2568 case 2:
2569 /* Select stuck at Command Phase */
2570 NCRCMD(sc, NCRCMD_FLUSH);
2571 break;
2572 case 4:
2573 if (sc->sc_features & NCR_F_DMASELECT &&
2574 sc->sc_cmdlen != 0)
2575 printf("(%s:%d:%d): select; "
2576 "%lu left in DMA buffer "
2577 "[intr %x, stat %x, step %d]\n",
2578 sc->sc_dev.dv_xname,
2579 periph->periph_target,
2580 periph->periph_lun,
2581 (u_long)sc->sc_cmdlen,
2582 sc->sc_espintr,
2583 sc->sc_espstat,
2584 sc->sc_espstep);
2585 /* So far, everything went fine */
2586 break;
2587 }
2588
2589 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2590 /* Do an implicit RESTORE POINTERS. */
2591 sc->sc_dp = ecb->daddr;
2592 sc->sc_dleft = ecb->dleft;
2593 sc->sc_state = NCR_CONNECTED;
2594 break;
2595
2596 } else {
2597
2598 printf("%s: unexpected status after select"
2599 ": [intr %x, stat %x, step %x]\n",
2600 sc->sc_dev.dv_xname,
2601 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2602 NCRCMD(sc, NCRCMD_FLUSH);
2603 DELAY(1);
2604 goto reset;
2605 }
2606 if (sc->sc_state == NCR_IDLE) {
2607 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2608 return (0);
2609 }
2610 break;
2611
2612 case NCR_CONNECTED:
2613 if ((sc->sc_flags & NCR_ICCS) != 0) {
2614 /* "Initiate Command Complete Steps" in progress */
2615 u_char msg;
2616
2617 sc->sc_flags &= ~NCR_ICCS;
2618
2619 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2620 printf("%s: ICCS: "
2621 ": [intr %x, stat %x, step %x]\n",
2622 sc->sc_dev.dv_xname,
2623 sc->sc_espintr, sc->sc_espstat,
2624 sc->sc_espstep);
2625 }
2626 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2627 if (sc->sc_imlen < 2)
2628 printf("%s: can't get status, only %d bytes\n",
2629 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2630 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2631 msg = sc->sc_imess[sc->sc_imlen - 1];
2632 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2633 if (msg == MSG_CMDCOMPLETE) {
2634 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2635 ? 0 : sc->sc_dleft;
2636 if ((ecb->flags & ECB_SENSE) == 0)
2637 ecb->xs->resid = ecb->dleft;
2638 sc->sc_state = NCR_CMDCOMPLETE;
2639 } else
2640 printf("%s: STATUS_PHASE: msg %d\n",
2641 sc->sc_dev.dv_xname, msg);
2642 sc->sc_imlen = 0;
2643 NCRCMD(sc, NCRCMD_MSGOK);
2644 goto shortcut; /* ie. wait for disconnect */
2645 }
2646 break;
2647
2648 default:
2649 /* Don't panic: reset. */
2650 printf("%s: invalid state: %d",
2651 sc->sc_dev.dv_xname, sc->sc_state);
2652 ncr53c9x_scsi_reset(sc);
2653 goto out;
2654 #if 0
2655 panic("%s: invalid state: %d",
2656 sc->sc_dev.dv_xname, sc->sc_state);
2657 #endif
2658 break;
2659 }
2660
2661 /*
2662 * Driver is now in state NCR_CONNECTED, i.e. we
2663 * have a current command working the SCSI bus.
2664 */
2665 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2666 panic("ncr53c9x: no nexus");
2667 }
2668
2669 switch (sc->sc_phase) {
2670 case MESSAGE_OUT_PHASE:
2671 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2672 ncr53c9x_msgout(sc);
2673 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2674 break;
2675
2676 case MESSAGE_IN_PHASE:
2677 msgin:
2678 NCR_PHASE(("MESSAGE_IN_PHASE "));
2679 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2680 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2681 !(sc->sc_espstat2 & FAS_STAT2_EMPTY)) {
2682 NCRCMD(sc, NCRCMD_FLUSH);
2683 }
2684 sc->sc_flags |= NCR_WAITI;
2685 NCRCMD(sc, NCRCMD_TRANS);
2686 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2687 if ((sc->sc_flags & NCR_WAITI) == 0) {
2688 printf("%s: MSGIN: unexpected FC bit: "
2689 "[intr %x, stat %x, step %x]\n",
2690 sc->sc_dev.dv_xname,
2691 sc->sc_espintr, sc->sc_espstat,
2692 sc->sc_espstep);
2693 }
2694 sc->sc_flags &= ~NCR_WAITI;
2695 ncr53c9x_rdfifo(sc,
2696 (sc->sc_prevphase == sc->sc_phase) ?
2697 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2698 ncr53c9x_msgin(sc);
2699 } else {
2700 printf("%s: MSGIN: weird bits: "
2701 "[intr %x, stat %x, step %x]\n",
2702 sc->sc_dev.dv_xname,
2703 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2704 }
2705 sc->sc_prevphase = MESSAGE_IN_PHASE;
2706 goto shortcut; /* i.e. expect data to be ready */
2707 break;
2708
2709 case COMMAND_PHASE:
2710 /*
2711 * Send the command block. Normally we don't see this
2712 * phase because the SEL_ATN command takes care of
2713 * all this. However, we end up here if either the
2714 * target or we wanted to exchange some more messages
2715 * first (e.g. to start negotiations).
2716 */
2717
2718 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2719 ecb->cmd.cmd.opcode, ecb->clen));
2720 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2721 NCRCMD(sc, NCRCMD_FLUSH);
2722 /* DELAY(1);*/
2723 }
2724 if (sc->sc_features & NCR_F_DMASELECT) {
2725 size_t size;
2726 /* setup DMA transfer for command */
2727 size = ecb->clen;
2728 sc->sc_cmdlen = size;
2729 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2730 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2731 0, &size);
2732 /* Program the SCSI counter */
2733 NCR_SET_COUNT(sc, size);
2734
2735 /* load the count in */
2736 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2737
2738 /* start the command transfer */
2739 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2740 NCRDMA_GO(sc);
2741 } else {
2742 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2743 NCRCMD(sc, NCRCMD_TRANS);
2744 }
2745 sc->sc_prevphase = COMMAND_PHASE;
2746 break;
2747
2748 case DATA_OUT_PHASE:
2749 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2750 NCRCMD(sc, NCRCMD_FLUSH);
2751 size = min(sc->sc_dleft, sc->sc_maxxfer);
2752 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2753 sc->sc_prevphase = DATA_OUT_PHASE;
2754 goto setup_xfer;
2755
2756 case DATA_IN_PHASE:
2757 NCR_PHASE(("DATA_IN_PHASE "));
2758 if (sc->sc_rev == NCR_VARIANT_ESP100)
2759 NCRCMD(sc, NCRCMD_FLUSH);
2760 size = min(sc->sc_dleft, sc->sc_maxxfer);
2761 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2762 sc->sc_prevphase = DATA_IN_PHASE;
2763 setup_xfer:
2764 /* Target returned to data phase: wipe "done" memory */
2765 ecb->flags &= ~ECB_TENTATIVE_DONE;
2766
2767 /* Program the SCSI counter */
2768 NCR_SET_COUNT(sc, size);
2769
2770 /* load the count in */
2771 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2772
2773 /*
2774 * Note that if `size' is 0, we've already transceived
2775 * all the bytes we want but we're still in DATA PHASE.
2776 * Apparently, the device needs padding. Also, a
2777 * transfer size of 0 means "maximum" to the chip
2778 * DMA logic.
2779 */
2780 NCRCMD(sc,
2781 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2782 NCRDMA_GO(sc);
2783 return (1);
2784
2785 case STATUS_PHASE:
2786 NCR_PHASE(("STATUS_PHASE "));
2787 sc->sc_flags |= NCR_ICCS;
2788 NCRCMD(sc, NCRCMD_ICCS);
2789 sc->sc_prevphase = STATUS_PHASE;
2790 goto shortcut; /* i.e. expect status results soon */
2791 break;
2792
2793 case INVALID_PHASE:
2794 break;
2795
2796 default:
2797 printf("%s: unexpected bus phase; resetting\n",
2798 sc->sc_dev.dv_xname);
2799 goto reset;
2800 }
2801
2802 out:
2803 return (1);
2804
2805 reset:
2806 ncr53c9x_init(sc, 1);
2807 goto out;
2808
2809 finish:
2810 ncr53c9x_done(sc, ecb);
2811 goto out;
2812
2813 sched:
2814 sc->sc_state = NCR_IDLE;
2815 ncr53c9x_sched(sc);
2816 goto out;
2817
2818 shortcut:
2819 /*
2820 * The idea is that many of the SCSI operations take very little
2821 * time, and going away and getting interrupted is too high an
2822 * overhead to pay. For example, selecting, sending a message
2823 * and command and then doing some work can be done in one "pass".
2824 *
2825 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2826 * at 40MHz. This needs testing.
2827 */
2828 {
2829 struct timeval wait, cur;
2830
2831 microtime(&wait);
2832 wait.tv_usec += 50 / sc->sc_freq;
2833 if (wait.tv_usec > 1000000) {
2834 wait.tv_sec++;
2835 wait.tv_usec -= 1000000;
2836 }
2837 do {
2838 if (NCRDMA_ISINTR(sc))
2839 goto again;
2840 microtime(&cur);
2841 } while (cur.tv_sec <= wait.tv_sec &&
2842 cur.tv_usec <= wait.tv_usec);
2843 }
2844 goto out;
2845 }
2846
2847 void
2848 ncr53c9x_abort(sc, ecb)
2849 struct ncr53c9x_softc *sc;
2850 struct ncr53c9x_ecb *ecb;
2851 {
2852
2853 /* 2 secs for the abort */
2854 ecb->timeout = NCR_ABORT_TIMEOUT;
2855 ecb->flags |= ECB_ABORT;
2856
2857 if (ecb == sc->sc_nexus) {
2858 int timeout;
2859
2860 /*
2861 * If we're still selecting, the message will be scheduled
2862 * after selection is complete.
2863 */
2864 if (sc->sc_state == NCR_CONNECTED)
2865 ncr53c9x_sched_msgout(SEND_ABORT);
2866
2867 /*
2868 * Reschedule timeout.
2869 */
2870 timeout = ecb->timeout;
2871 if (hz > 100 && timeout > 1000)
2872 timeout = (timeout / 1000) * hz;
2873 else
2874 timeout = (timeout * hz) / 1000;
2875 callout_reset(&ecb->xs->xs_callout, timeout,
2876 ncr53c9x_timeout, ecb);
2877 } else {
2878 /*
2879 * Just leave the command where it is.
2880 * XXX - what choice do we have but to reset the SCSI
2881 * eventually?
2882 */
2883 if (sc->sc_state == NCR_IDLE)
2884 ncr53c9x_sched(sc);
2885 }
2886 }
2887
2888 void
2889 ncr53c9x_timeout(arg)
2890 void *arg;
2891 {
2892 struct ncr53c9x_ecb *ecb = arg;
2893 struct scsipi_xfer *xs = ecb->xs;
2894 struct scsipi_periph *periph = xs->xs_periph;
2895 struct ncr53c9x_softc *sc =
2896 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2897 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2898 int s;
2899
2900 scsipi_printaddr(periph);
2901 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2902 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2903 "msg(q %x,o %x) %s>",
2904 sc->sc_dev.dv_xname,
2905 ecb, ecb->flags, ecb->dleft, ecb->stat,
2906 sc->sc_state, sc->sc_nexus,
2907 NCR_READ_REG(sc, NCR_STAT),
2908 sc->sc_phase, sc->sc_prevphase,
2909 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2910 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2911 #if NCR53C9X_DEBUG > 1
2912 printf("TRACE: %s.", ecb->trace);
2913 #endif
2914
2915 s = splbio();
2916
2917 if (ecb->flags & ECB_ABORT) {
2918 /* abort timed out */
2919 printf(" AGAIN\n");
2920
2921 ncr53c9x_init(sc, 1);
2922 } else {
2923 /* abort the operation that has timed out */
2924 printf("\n");
2925 xs->error = XS_TIMEOUT;
2926 ncr53c9x_abort(sc, ecb);
2927
2928 /* Disable sync mode if stuck in a data phase */
2929 if (ecb == sc->sc_nexus &&
2930 (ti->flags & T_SYNCMODE) != 0 &&
2931 (sc->sc_phase & (MSGI|CDI)) == 0) {
2932 /* XXX ASYNC CALLBACK! */
2933 scsipi_printaddr(periph);
2934 printf("sync negotiation disabled\n");
2935 sc->sc_cfflags |= (1 << (periph->periph_target + 8));
2936 ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2937 }
2938 }
2939
2940 splx(s);
2941 }
2942
2943 void
2944 ncr53c9x_watch(arg)
2945 void *arg;
2946 {
2947 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2948 struct ncr53c9x_tinfo *ti;
2949 struct ncr53c9x_linfo *li;
2950 int t, s;
2951 /* Delete any structures that have not been used in 10min. */
2952 time_t old = time.tv_sec - (10 * 60);
2953
2954 s = splbio();
2955 for (t = 0; t < NCR_NTARG; t++) {
2956 ti = &sc->sc_tinfo[t];
2957 li = LIST_FIRST(&ti->luns);
2958 while (li) {
2959 if (li->last_used < old &&
2960 li->untagged == NULL &&
2961 li->used == 0) {
2962 if (li->lun < NCR_NLUN)
2963 ti->lun[li->lun] = NULL;
2964 LIST_REMOVE(li, link);
2965 free(li, M_DEVBUF);
2966 /* Restart the search at the beginning */
2967 li = LIST_FIRST(&ti->luns);
2968 continue;
2969 }
2970 li = LIST_NEXT(li, link);
2971 }
2972 }
2973 splx(s);
2974 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2975 }
2976
2977