ncr53c9x.c revision 1.78 1 /* $NetBSD: ncr53c9x.c,v 1.78 2001/04/30 13:58:32 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/proc.h>
90 #include <sys/queue.h>
91 #include <sys/pool.h>
92 #include <sys/scsiio.h>
93
94 #include <dev/scsipi/scsi_all.h>
95 #include <dev/scsipi/scsipi_all.h>
96 #include <dev/scsipi/scsiconf.h>
97 #include <dev/scsipi/scsi_message.h>
98
99 #include <dev/ic/ncr53c9xreg.h>
100 #include <dev/ic/ncr53c9xvar.h>
101
102 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
103 #ifdef DEBUG
104 int ncr53c9x_notag = 0;
105 #endif
106
107 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
108 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
109 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
110 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
111 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
112 struct scsipi_xfer *, int);
113 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
114 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
115 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
117 /*static*/ void ncr53c9x_timeout(void *arg);
118 /*static*/ void ncr53c9x_watch(void *arg);
119 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
120 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
121 struct ncr53c9x_ecb *);
122 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
123 caddr_t, int, struct proc *);
124
125 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
126 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
127 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
128
129 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
130 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
131 struct ncr53c9x_tinfo *);
132 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
133 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
134 int64_t lun);
135
136 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
137
138 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
139 #define NCR_RDFIFO_START 0
140 #define NCR_RDFIFO_CONTINUE 1
141
142
143 #define NCR_SET_COUNT(sc, size) do { \
144 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
145 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
146 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
147 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
148 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
149 } \
150 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
151 NCR_WRITE_REG(sc, NCR_RCH, 0); \
152 } \
153 } while (0)
154
155 static int ecb_pool_initialized = 0;
156 static struct pool ecb_pool;
157
158 /*
159 * Names for the NCR53c9x variants, correspnding to the variant tags
160 * in ncr53c9xvar.h.
161 */
162 static const char *ncr53c9x_variant_names[] = {
163 "ESP100",
164 "ESP100A",
165 "ESP200",
166 "NCR53C94",
167 "NCR53C96",
168 "ESP406",
169 "FAS408",
170 "FAS216",
171 "AM53C974",
172 "FAS366/HME",
173 };
174
175 /*
176 * Search linked list for LUN info by LUN id.
177 */
178 static struct ncr53c9x_linfo *
179 ncr53c9x_lunsearch(ti, lun)
180 struct ncr53c9x_tinfo *ti;
181 int64_t lun;
182 {
183 struct ncr53c9x_linfo *li;
184 LIST_FOREACH(li, &ti->luns, link)
185 if (li->lun == lun)
186 return (li);
187 return (NULL);
188 }
189
190 /*
191 * Attach this instance, and then all the sub-devices
192 */
193 void
194 ncr53c9x_attach(sc)
195 struct ncr53c9x_softc *sc;
196 {
197 struct scsipi_adapter *adapt = &sc->sc_adapter;
198 struct scsipi_channel *chan = &sc->sc_channel;
199
200 callout_init(&sc->sc_watchdog);
201 /*
202 * Allocate SCSI message buffers.
203 * Front-ends can override allocation to avoid alignment
204 * handling in the DMA engines. Note that that ncr53c9x_msgout()
205 * can request a 1 byte DMA transfer.
206 */
207 if (sc->sc_omess == NULL)
208 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
209
210 if (sc->sc_imess == NULL)
211 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
212
213 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
214 printf("out of memory\n");
215 return;
216 }
217
218 /*
219 * Note, the front-end has set us up to print the chip variation.
220 */
221 if (sc->sc_rev >= NCR_VARIANT_MAX) {
222 printf("\n%s: unknown variant %d, devices not attached\n",
223 sc->sc_dev.dv_xname, sc->sc_rev);
224 return;
225 }
226
227 printf(": %s, %dMHz, SCSI ID %d\n",
228 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
229
230 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
231
232 /* The value *must not* be == 1. Make it 2 */
233 if (sc->sc_ccf == 1)
234 sc->sc_ccf = 2;
235
236 /*
237 * The recommended timeout is 250ms. This register is loaded
238 * with a value calculated as follows, from the docs:
239 *
240 * (timout period) x (CLK frequency)
241 * reg = -------------------------------------
242 * 8192 x (Clock Conversion Factor)
243 *
244 * Since CCF has a linear relation to CLK, this generally computes
245 * to the constant of 153.
246 */
247 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
248
249 /* CCF register only has 3 bits; 0 is actually 8 */
250 sc->sc_ccf &= 7;
251
252 /*
253 * Fill in the scsipi_adapter.
254 */
255 adapt->adapt_dev = &sc->sc_dev;
256 adapt->adapt_nchannels = 1;
257 adapt->adapt_openings = 256;
258 adapt->adapt_max_periph = 256;
259 adapt->adapt_ioctl = ncr53c9x_ioctl;
260 /* adapt_request initialized by front-end */
261 /* adapt_minphys initialized by front-end */
262
263 /*
264 * Fill in the scsipi_channel.
265 */
266 memset(chan, 0, sizeof(*chan));
267 chan->chan_adapter = adapt;
268 chan->chan_bustype = &scsi_bustype;
269 chan->chan_channel = 0;
270 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */
271 chan->chan_nluns = 8;
272 chan->chan_id = sc->sc_id;
273
274 /*
275 * Add reference to adapter so that we drop the reference after
276 * config_found() to make sure the adatper is disabled.
277 */
278 if (scsipi_adapter_addref(adapt) != 0) {
279 printf("%s: unable to enable controller\n",
280 sc->sc_dev.dv_xname);
281 return;
282 }
283
284 /* Reset state & bus */
285 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
286 sc->sc_state = 0;
287 ncr53c9x_init(sc, 1);
288
289 /*
290 * Now try to attach all the sub-devices
291 */
292 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
293
294 scsipi_adapter_delref(adapt);
295 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
296 }
297
298 int
299 ncr53c9x_detach(sc, flags)
300 struct ncr53c9x_softc *sc;
301 int flags;
302 {
303 int error;
304
305 if (sc->sc_child) {
306 error = config_detach(sc->sc_child, flags);
307 if (error)
308 return (error);
309 }
310
311 free(sc->sc_imess, M_DEVBUF);
312 free(sc->sc_omess, M_DEVBUF);
313
314 return (0);
315 }
316
317 /*
318 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
319 * only this controller, but kills any on-going commands, and also stops
320 * and resets the DMA.
321 *
322 * After reset, registers are loaded with the defaults from the attach
323 * routine above.
324 */
325 void
326 ncr53c9x_reset(sc)
327 struct ncr53c9x_softc *sc;
328 {
329
330 /* reset DMA first */
331 NCRDMA_RESET(sc);
332
333 /* reset SCSI chip */
334 NCRCMD(sc, NCRCMD_RSTCHIP);
335 NCRCMD(sc, NCRCMD_NOP);
336 DELAY(500);
337
338 /* do these backwards, and fall through */
339 switch (sc->sc_rev) {
340 case NCR_VARIANT_ESP406:
341 case NCR_VARIANT_FAS408:
342 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
343 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
344 case NCR_VARIANT_AM53C974:
345 case NCR_VARIANT_FAS216:
346 case NCR_VARIANT_NCR53C94:
347 case NCR_VARIANT_NCR53C96:
348 case NCR_VARIANT_ESP200:
349 sc->sc_features |= NCR_F_HASCFG3;
350 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
351 case NCR_VARIANT_ESP100A:
352 sc->sc_features |= NCR_F_SELATN3;
353 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
354 case NCR_VARIANT_ESP100:
355 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
356 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
357 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
358 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
359 break;
360
361 case NCR_VARIANT_FAS366:
362 sc->sc_features |=
363 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
364 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
365 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
366 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
367 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
368 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
369 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
370 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
371 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
372 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
373 break;
374
375 default:
376 printf("%s: unknown revision code, assuming ESP100\n",
377 sc->sc_dev.dv_xname);
378 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
379 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
380 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
381 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
382 }
383
384 if (sc->sc_rev == NCR_VARIANT_AM53C974)
385 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
386
387 #if 0
388 printf("%s: ncr53c9x_reset: revision %d\n",
389 sc->sc_dev.dv_xname, sc->sc_rev);
390 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
391 "ccf 0x%x, timeout 0x%x\n",
392 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
393 sc->sc_ccf, sc->sc_timeout);
394 #endif
395 }
396
397 /*
398 * Reset the SCSI bus, but not the chip
399 */
400 void
401 ncr53c9x_scsi_reset(sc)
402 struct ncr53c9x_softc *sc;
403 {
404
405 (*sc->sc_glue->gl_dma_stop)(sc);
406
407 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
408 NCRCMD(sc, NCRCMD_RSTSCSI);
409 }
410
411 /*
412 * Initialize ncr53c9x state machine
413 */
414 void
415 ncr53c9x_init(sc, doreset)
416 struct ncr53c9x_softc *sc;
417 int doreset;
418 {
419 struct ncr53c9x_ecb *ecb;
420 struct ncr53c9x_linfo *li;
421 int i, r;
422
423 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
424
425 if (!ecb_pool_initialized) {
426 /* All instances share this pool */
427 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
428 "ncr53c9x_ecb", 0, NULL, NULL, 0);
429 ecb_pool_initialized = 1;
430 }
431
432 if (sc->sc_state == 0) {
433 /* First time through; initialize. */
434
435 TAILQ_INIT(&sc->ready_list);
436 sc->sc_nexus = NULL;
437 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
438 for (r = 0; r < NCR_NTARG; r++) {
439 LIST_INIT(&sc->sc_tinfo[r].luns);
440 }
441 } else {
442 /* Cancel any active commands. */
443 sc->sc_state = NCR_CLEANING;
444 sc->sc_msgify = 0;
445 if ((ecb = sc->sc_nexus) != NULL) {
446 ecb->xs->error = XS_TIMEOUT;
447 ncr53c9x_done(sc, ecb);
448 }
449 /* Cancel outstanding disconnected commands on each LUN */
450 for (r = 0; r < 8; r++) {
451 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
452 if ((ecb = li->untagged) != NULL) {
453 li->untagged = NULL;
454 /*
455 * XXXXXXX
456 *
457 * Should we terminate a command
458 * that never reached the disk?
459 */
460 li->busy = 0;
461 ecb->xs->error = XS_TIMEOUT;
462 ncr53c9x_done(sc, ecb);
463 }
464 for (i = 0; i < 256; i++)
465 if ((ecb = li->queued[i])) {
466 li->queued[i] = NULL;
467 ecb->xs->error = XS_TIMEOUT;
468 ncr53c9x_done(sc, ecb);
469 }
470 li->used = 0;
471 }
472 }
473 }
474
475 /*
476 * reset the chip to a known state
477 */
478 ncr53c9x_reset(sc);
479
480 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
481 for (r = 0; r < 8; r++) {
482 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
483 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
484
485 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
486 ? 0 : T_SYNCHOFF) |
487 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
488 T_NEED_TO_RESET;
489 #ifdef DEBUG
490 if (ncr53c9x_notag)
491 ti->flags &= ~T_TAG;
492 #endif
493 ti->period = sc->sc_minsync;
494 ti->offset = 0;
495 ti->cfg3 = 0;
496 }
497
498 if (doreset) {
499 sc->sc_state = NCR_SBR;
500 NCRCMD(sc, NCRCMD_RSTSCSI);
501 } else {
502 sc->sc_state = NCR_IDLE;
503 ncr53c9x_sched(sc);
504 }
505 }
506
507 /*
508 * Read the NCR registers, and save their contents for later use.
509 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
510 * NCR_INTR - so make sure it is the last read.
511 *
512 * I think that (from reading the docs) most bits in these registers
513 * only make sense when he DMA CSR has an interrupt showing. Call only
514 * if an interrupt is pending.
515 */
516 __inline__ void
517 ncr53c9x_readregs(sc)
518 struct ncr53c9x_softc *sc;
519 {
520
521 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
522 /* Only the stepo bits are of interest */
523 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
524
525 if (sc->sc_rev == NCR_VARIANT_FAS366)
526 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
527
528 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
529
530 if (sc->sc_glue->gl_clear_latched_intr != NULL)
531 (*sc->sc_glue->gl_clear_latched_intr)(sc);
532
533 /*
534 * Determine the SCSI bus phase, return either a real SCSI bus phase
535 * or some pseudo phase we use to detect certain exceptions.
536 */
537
538 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
539 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
540
541 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
542 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
543 }
544
545 /*
546 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
547 */
548 static inline int
549 ncr53c9x_stp2cpb(sc, period)
550 struct ncr53c9x_softc *sc;
551 int period;
552 {
553 int v;
554 v = (sc->sc_freq * period) / 250;
555 if (ncr53c9x_cpb2stp(sc, v) < period)
556 /* Correct round-down error */
557 v++;
558 return (v);
559 }
560
561 static inline void
562 ncr53c9x_setsync(sc, ti)
563 struct ncr53c9x_softc *sc;
564 struct ncr53c9x_tinfo *ti;
565 {
566 u_char syncoff, synctp;
567 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
568
569 if (ti->flags & T_SYNCMODE) {
570 syncoff = ti->offset;
571 synctp = ncr53c9x_stp2cpb(sc, ti->period);
572 if (sc->sc_features & NCR_F_FASTSCSI) {
573 /*
574 * If the period is 200ns or less (ti->period <= 50),
575 * put the chip in Fast SCSI mode.
576 */
577 if (ti->period <= 50)
578 /*
579 * There are (at least) 4 variations of the
580 * configuration 3 register. The drive attach
581 * routine sets the appropriate bit to put the
582 * chip into Fast SCSI mode so that it doesn't
583 * have to be figured out here each time.
584 */
585 cfg3 |= sc->sc_cfg3_fscsi;
586 }
587
588 /*
589 * Am53c974 requires different SYNCTP values when the
590 * FSCSI bit is off.
591 */
592 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
593 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
594 synctp--;
595 } else {
596 syncoff = 0;
597 synctp = 0;
598 }
599
600 if (sc->sc_features & NCR_F_HASCFG3)
601 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
602
603 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
604 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
605 }
606
607 /*
608 * Send a command to a target, set the driver state to NCR_SELECTING
609 * and let the caller take care of the rest.
610 *
611 * Keeping this as a function allows me to say that this may be done
612 * by DMA instead of programmed I/O soon.
613 */
614 void
615 ncr53c9x_select(sc, ecb)
616 struct ncr53c9x_softc *sc;
617 struct ncr53c9x_ecb *ecb;
618 {
619 struct scsipi_periph *periph = ecb->xs->xs_periph;
620 int target = periph->periph_target;
621 int lun = periph->periph_lun;
622 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
623 int tiflags = ti->flags;
624 u_char *cmd;
625 int clen;
626 int selatn3, selatns;
627 size_t dmasize;
628
629 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
630 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
631
632 sc->sc_state = NCR_SELECTING;
633 /*
634 * Schedule the timeout now, the first time we will go away
635 * expecting to come back due to an interrupt, because it is
636 * always possible that the interrupt may never happen.
637 */
638 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
639 int timeout = ecb->timeout;
640
641 if (hz > 100 && timeout > 1000)
642 timeout = (timeout / 1000) * hz;
643 else
644 timeout = (timeout * hz) / 1000;
645
646 callout_reset(&ecb->xs->xs_callout, timeout,
647 ncr53c9x_timeout, ecb);
648 }
649
650 /*
651 * The docs say the target register is never reset, and I
652 * can't think of a better place to set it
653 */
654 if (sc->sc_rev == NCR_VARIANT_FAS366) {
655 NCRCMD(sc, NCRCMD_FLUSH);
656 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
657 } else {
658 NCR_WRITE_REG(sc, NCR_SELID, target);
659 }
660 ncr53c9x_setsync(sc, ti);
661
662 if ((ecb->flags & ECB_SENSE) != 0) {
663 /*
664 * For REQUEST SENSE, we should not send an IDENTIFY or
665 * otherwise mangle the target. There should be no MESSAGE IN
666 * phase.
667 */
668 if (sc->sc_features & NCR_F_DMASELECT) {
669 /* setup DMA transfer for command */
670 dmasize = clen = ecb->clen;
671 sc->sc_cmdlen = clen;
672 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
673
674 /* Program the SCSI counter */
675 NCR_SET_COUNT(sc, dmasize);
676
677 if (sc->sc_rev != NCR_VARIANT_FAS366)
678 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
679
680 /* And get the targets attention */
681 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
682 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
683 &dmasize);
684 NCRDMA_GO(sc);
685 } else {
686 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
687 NCRCMD(sc, NCRCMD_SELNATN);
688 }
689 return;
690 }
691
692 selatn3 = selatns = 0;
693 if (ecb->tag[0] != 0) {
694 if (sc->sc_features & NCR_F_SELATN3)
695 /* use SELATN3 to send tag messages */
696 selatn3 = 1;
697 else
698 /* We don't have SELATN3; use SELATNS to send tags */
699 selatns = 1;
700 }
701
702 if (ti->flags & T_NEGOTIATE) {
703 /* We have to use SELATNS to send sync/wide messages */
704 selatn3 = 0;
705 selatns = 1;
706 }
707
708 cmd = (u_char *)&ecb->cmd.cmd;
709
710 if (selatn3) {
711 /* We'll use tags with SELATN3 */
712 clen = ecb->clen + 3;
713 cmd -= 3;
714 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
715 cmd[1] = ecb->tag[0]; /* msg[1] */
716 cmd[2] = ecb->tag[1]; /* msg[2] */
717 } else {
718 /* We don't have tags, or will send messages with SELATNS */
719 clen = ecb->clen + 1;
720 cmd -= 1;
721 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
722 }
723
724 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
725
726 /* setup DMA transfer for command */
727 dmasize = clen;
728 sc->sc_cmdlen = clen;
729 sc->sc_cmdp = cmd;
730
731 /* Program the SCSI counter */
732 NCR_SET_COUNT(sc, dmasize);
733
734 /* load the count in */
735 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
736 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
737
738 /* And get the targets attention */
739 if (selatn3) {
740 sc->sc_msgout = SEND_TAG;
741 sc->sc_flags |= NCR_ATN;
742 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
743 } else
744 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
745 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
746 NCRDMA_GO(sc);
747 return;
748 }
749
750 /*
751 * Who am I. This is where we tell the target that we are
752 * happy for it to disconnect etc.
753 */
754
755 /* Now get the command into the FIFO */
756 ncr53c9x_wrfifo(sc, cmd, clen);
757
758 /* And get the targets attention */
759 if (selatns) {
760 NCR_MISC(("SELATNS \n"));
761 /* Arbitrate, select and stop after IDENTIFY message */
762 NCRCMD(sc, NCRCMD_SELATNS);
763 } else if (selatn3) {
764 sc->sc_msgout = SEND_TAG;
765 sc->sc_flags |= NCR_ATN;
766 NCRCMD(sc, NCRCMD_SELATN3);
767 } else
768 NCRCMD(sc, NCRCMD_SELATN);
769 }
770
771 void
772 ncr53c9x_free_ecb(sc, ecb)
773 struct ncr53c9x_softc *sc;
774 struct ncr53c9x_ecb *ecb;
775 {
776 int s;
777
778 s = splbio();
779 ecb->flags = 0;
780 pool_put(&ecb_pool, (void *)ecb);
781 splx(s);
782 return;
783 }
784
785 struct ncr53c9x_ecb *
786 ncr53c9x_get_ecb(sc, flags)
787 struct ncr53c9x_softc *sc;
788 int flags;
789 {
790 struct ncr53c9x_ecb *ecb;
791 int s;
792
793 s = splbio();
794 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT);
795 splx(s);
796 if (ecb) {
797 bzero(ecb, sizeof(*ecb));
798 ecb->flags |= ECB_ALLOC;
799 }
800 return (ecb);
801 }
802
803 /*
804 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
805 */
806
807 /*
808 * Start a SCSI-command
809 * This function is called by the higher level SCSI-driver to queue/run
810 * SCSI-commands.
811 */
812
813 void
814 ncr53c9x_scsipi_request(chan, req, arg)
815 struct scsipi_channel *chan;
816 scsipi_adapter_req_t req;
817 void *arg;
818 {
819 struct scsipi_xfer *xs;
820 struct scsipi_periph *periph;
821 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
822 struct ncr53c9x_ecb *ecb;
823 int s, flags;
824
825 NCR_TRACE(("[ncr53c9x_scsipi_request] "));
826
827 switch (req) {
828 case ADAPTER_REQ_RUN_XFER:
829 xs = arg;
830 periph = xs->xs_periph;
831 flags = xs->xs_control;
832
833 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
834 periph->periph_target));
835
836 /* Get an ECB to use. */
837 ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
838 /*
839 * This should never happen as we track resources
840 * in the mid-layer.
841 */
842 if (ecb == NULL) {
843 scsipi_printaddr(periph);
844 printf("unable to allocate ecb\n");
845 xs->error = XS_RESOURCE_SHORTAGE;
846 scsipi_done(xs);
847 return;
848 }
849
850 /* Initialize ecb */
851 ecb->xs = xs;
852 ecb->timeout = xs->timeout;
853
854 if (flags & XS_CTL_RESET) {
855 ecb->flags |= ECB_RESET;
856 ecb->clen = 0;
857 ecb->dleft = 0;
858 } else {
859 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
860 ecb->clen = xs->cmdlen;
861 ecb->daddr = xs->data;
862 ecb->dleft = xs->datalen;
863 }
864 ecb->stat = 0;
865
866 s = splbio();
867
868 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
869 ecb->flags |= ECB_READY;
870 if (sc->sc_state == NCR_IDLE)
871 ncr53c9x_sched(sc);
872
873 splx(s);
874
875 if ((flags & XS_CTL_POLL) == 0)
876 return;
877
878 /* Not allowed to use interrupts, use polling instead */
879 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
880 ncr53c9x_timeout(ecb);
881 if (ncr53c9x_poll(sc, xs, ecb->timeout))
882 ncr53c9x_timeout(ecb);
883 }
884 return;
885
886 case ADAPTER_REQ_GROW_RESOURCES:
887 /* XXX Not supported. */
888 return;
889
890 case ADAPTER_REQ_SET_XFER_MODE:
891 {
892 struct ncr53c9x_tinfo *ti;
893 struct scsipi_xfer_mode *xm = arg;
894
895 ti = &sc->sc_tinfo[xm->xm_target];
896 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
897 ti->period = 0;
898 ti->offset = 0;
899
900 #if 0 /* commands timeout */
901 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 &&
902 (xm->xm_mode & PERIPH_CAP_TQING))
903 ti->flags |= T_TAG;
904 else
905 #endif
906 ti->flags &= ~T_TAG;
907
908 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
909 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
910 sc->sc_dev.dv_xname, xm->xm_target));
911 if (sc->sc_rev == NCR_VARIANT_FAS366) {
912 ti->flags |= T_WIDE;
913 ti->width = 1;
914 }
915 }
916
917 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
918 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
919 NCR_MISC(("%s: target %d: sync negotiation\n",
920 sc->sc_dev.dv_xname, xm->xm_target));
921 ti->flags |= T_NEGOTIATE;
922 ti->period = sc->sc_minsync;
923 }
924 /*
925 * If we're not going to negotiate, send the notification
926 * now, since it won't happen later.
927 */
928 if ((ti->flags & T_NEGOTIATE) == 0)
929 ncr53c9x_update_xfer_mode(sc, xm->xm_target);
930 return;
931 }
932 }
933 }
934
935 void
936 ncr53c9x_update_xfer_mode(sc, target)
937 struct ncr53c9x_softc *sc;
938 int target;
939 {
940 struct scsipi_xfer_mode xm;
941 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
942
943 xm.xm_target = target;
944 xm.xm_mode = 0;
945 xm.xm_period = 0;
946 xm.xm_offset = 0;
947
948 if (ti->flags & T_SYNCMODE) {
949 xm.xm_mode |= PERIPH_CAP_SYNC;
950 xm.xm_period = ti->period;
951 xm.xm_offset = ti->offset;
952 }
953 if (ti->width)
954 xm.xm_mode |= PERIPH_CAP_WIDE16;
955
956 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
957 xm.xm_mode |= PERIPH_CAP_TQING;
958
959 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
960 }
961
962 /*
963 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
964 */
965 int
966 ncr53c9x_poll(sc, xs, count)
967 struct ncr53c9x_softc *sc;
968 struct scsipi_xfer *xs;
969 int count;
970 {
971
972 NCR_TRACE(("[ncr53c9x_poll] "));
973 while (count) {
974 if (NCRDMA_ISINTR(sc)) {
975 ncr53c9x_intr(sc);
976 }
977 #if alternatively
978 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
979 ncr53c9x_intr(sc);
980 #endif
981 if ((xs->xs_status & XS_STS_DONE) != 0)
982 return (0);
983 if (sc->sc_state == NCR_IDLE) {
984 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
985 ncr53c9x_sched(sc);
986 }
987 DELAY(1000);
988 count--;
989 }
990 return (1);
991 }
992
993 int
994 ncr53c9x_ioctl(chan, cmd, arg, flag, p)
995 struct scsipi_channel *chan;
996 u_long cmd;
997 caddr_t arg;
998 int flag;
999 struct proc *p;
1000 {
1001 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */
1002 int s, error = 0;
1003
1004 s = splbio();
1005
1006 switch (cmd) {
1007 default:
1008 error = ENOTTY;
1009 break;
1010 }
1011 splx(s);
1012 return (error);
1013 }
1014
1015
1016 /*
1017 * LOW LEVEL SCSI UTILITIES
1018 */
1019
1020 /*
1021 * Schedule a scsi operation. This has now been pulled out of the interrupt
1022 * handler so that we may call it from ncr53c9x_scsipi_request and
1023 * ncr53c9x_done. This may save us an unecessary interrupt just to get
1024 * things going. Should only be called when state == NCR_IDLE and at bio pl.
1025 */
1026 void
1027 ncr53c9x_sched(sc)
1028 struct ncr53c9x_softc *sc;
1029 {
1030 struct ncr53c9x_ecb *ecb;
1031 struct scsipi_periph *periph;
1032 struct ncr53c9x_tinfo *ti;
1033 int lun;
1034 struct ncr53c9x_linfo *li;
1035 int s, tag;
1036
1037 NCR_TRACE(("[ncr53c9x_sched] "));
1038 if (sc->sc_state != NCR_IDLE)
1039 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1040
1041 /*
1042 * Find first ecb in ready queue that is for a target/lunit
1043 * combinations that is not busy.
1044 */
1045 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1046 ecb = TAILQ_NEXT(ecb, chain)) {
1047 periph = ecb->xs->xs_periph;
1048 ti = &sc->sc_tinfo[periph->periph_target];
1049 lun = periph->periph_lun;
1050
1051 /* Select type of tag for this command */
1052 if ((ti->flags & (T_RSELECTOFF)) != 0)
1053 tag = 0;
1054 else if ((ti->flags & (T_TAG)) == 0)
1055 tag = 0;
1056 else if ((ecb->flags & ECB_SENSE) != 0)
1057 tag = 0;
1058 else
1059 tag = ecb->xs->xs_tag_type;
1060 #if 0
1061 /* XXXX Use tags for polled commands? */
1062 if (ecb->xs->xs_control & XS_CTL_POLL)
1063 tag = 0;
1064 #endif
1065
1066 s = splbio();
1067 li = TINFO_LUN(ti, lun);
1068 if (li == NULL) {
1069 /* Initialize LUN info and add to list. */
1070 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT))
1071 == NULL) {
1072 splx(s);
1073 continue;
1074 }
1075 bzero(li, sizeof(*li));
1076 li->lun = lun;
1077
1078 LIST_INSERT_HEAD(&ti->luns, li, link);
1079 if (lun < NCR_NLUN)
1080 ti->lun[lun] = li;
1081 }
1082 li->last_used = time.tv_sec;
1083 if (tag == 0) {
1084 /* Try to issue this as an un-tagged command */
1085 if (li->untagged == NULL)
1086 li->untagged = ecb;
1087 }
1088 if (li->untagged != NULL) {
1089 tag = 0;
1090 if ((li->busy != 1) && li->used == 0) {
1091 /* We need to issue this untagged command now */
1092 ecb = li->untagged;
1093 periph = ecb->xs->xs_periph;
1094 } else {
1095 /* Not ready yet */
1096 splx(s);
1097 continue;
1098 }
1099 }
1100 ecb->tag[0] = tag;
1101 if (tag != 0) {
1102 li->queued[ecb->xs->xs_tag_id] = ecb;
1103 ecb->tag[1] = ecb->xs->xs_tag_id;
1104 li->used++;
1105 }
1106 splx(s);
1107 if (li->untagged != NULL && (li->busy != 1)) {
1108 li->busy = 1;
1109 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1110 ecb->flags &= ~ECB_READY;
1111 sc->sc_nexus = ecb;
1112 ncr53c9x_select(sc, ecb);
1113 break;
1114 }
1115 if (li->untagged == NULL && tag != 0) {
1116 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1117 ecb->flags &= ~ECB_READY;
1118 sc->sc_nexus = ecb;
1119 ncr53c9x_select(sc, ecb);
1120 break;
1121 } else
1122 NCR_MISC(("%d:%d busy\n",
1123 periph->periph_target,
1124 periph->periph_lun));
1125 }
1126 }
1127
1128 void
1129 ncr53c9x_sense(sc, ecb)
1130 struct ncr53c9x_softc *sc;
1131 struct ncr53c9x_ecb *ecb;
1132 {
1133 struct scsipi_xfer *xs = ecb->xs;
1134 struct scsipi_periph *periph = xs->xs_periph;
1135 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1136 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1137 struct ncr53c9x_linfo *li;
1138 int lun = periph->periph_lun;
1139
1140 NCR_MISC(("requesting sense "));
1141 /* Next, setup a request sense command block */
1142 bzero(ss, sizeof(*ss));
1143 ss->opcode = REQUEST_SENSE;
1144 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1145 ss->length = sizeof(struct scsipi_sense_data);
1146 ecb->clen = sizeof(*ss);
1147 ecb->daddr = (char *)&xs->sense.scsi_sense;
1148 ecb->dleft = sizeof(struct scsipi_sense_data);
1149 ecb->flags |= ECB_SENSE;
1150 ecb->timeout = NCR_SENSE_TIMEOUT;
1151 ti->senses++;
1152 li = TINFO_LUN(ti, lun);
1153 if (li->busy)
1154 li->busy = 0;
1155 ncr53c9x_dequeue(sc, ecb);
1156 li->untagged = ecb; /* must be executed first to fix C/A */
1157 li->busy = 2;
1158 if (ecb == sc->sc_nexus) {
1159 ncr53c9x_select(sc, ecb);
1160 } else {
1161 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1162 ecb->flags |= ECB_READY;
1163 if (sc->sc_state == NCR_IDLE)
1164 ncr53c9x_sched(sc);
1165 }
1166 }
1167
1168 /*
1169 * POST PROCESSING OF SCSI_CMD (usually current)
1170 */
1171 void
1172 ncr53c9x_done(sc, ecb)
1173 struct ncr53c9x_softc *sc;
1174 struct ncr53c9x_ecb *ecb;
1175 {
1176 struct scsipi_xfer *xs = ecb->xs;
1177 struct scsipi_periph *periph = xs->xs_periph;
1178 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1179 int lun = periph->periph_lun;
1180 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1181
1182 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1183
1184 callout_stop(&ecb->xs->xs_callout);
1185
1186 /*
1187 * Now, if we've come here with no error code, i.e. we've kept the
1188 * initial XS_NOERROR, and the status code signals that we should
1189 * check sense, we'll need to set up a request sense cmd block and
1190 * push the command back into the ready queue *before* any other
1191 * commands for this target/lunit, else we lose the sense info.
1192 * We don't support chk sense conditions for the request sense cmd.
1193 */
1194 if (xs->error == XS_NOERROR) {
1195 xs->status = ecb->stat;
1196 if ((ecb->flags & ECB_ABORT) != 0) {
1197 xs->error = XS_TIMEOUT;
1198 } else if ((ecb->flags & ECB_SENSE) != 0) {
1199 xs->error = XS_SENSE;
1200 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1201 /* First, save the return values */
1202 xs->resid = ecb->dleft;
1203 ncr53c9x_sense(sc, ecb);
1204 return;
1205 } else {
1206 xs->resid = ecb->dleft;
1207 }
1208 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY)
1209 xs->error = XS_BUSY;
1210 }
1211
1212 #ifdef NCR53C9X_DEBUG
1213 if (ncr53c9x_debug & NCR_SHOWMISC) {
1214 if (xs->resid != 0)
1215 printf("resid=%d ", xs->resid);
1216 if (xs->error == XS_SENSE)
1217 printf("sense=0x%02x\n",
1218 xs->sense.scsi_sense.error_code);
1219 else
1220 printf("error=%d\n", xs->error);
1221 }
1222 #endif
1223
1224 /*
1225 * Remove the ECB from whatever queue it's on.
1226 */
1227 ncr53c9x_dequeue(sc, ecb);
1228 if (ecb == sc->sc_nexus) {
1229 sc->sc_nexus = NULL;
1230 if (sc->sc_state != NCR_CLEANING) {
1231 sc->sc_state = NCR_IDLE;
1232 ncr53c9x_sched(sc);
1233 }
1234 }
1235
1236 if (xs->error == XS_SELTIMEOUT) {
1237 /* Selection timeout -- discard this LUN if empty */
1238 if (li->untagged == NULL && li->used == 0) {
1239 if (lun < NCR_NLUN)
1240 ti->lun[lun] = NULL;
1241 LIST_REMOVE(li, link);
1242 free(li, M_DEVBUF);
1243 }
1244 }
1245
1246 ncr53c9x_free_ecb(sc, ecb);
1247 ti->cmds++;
1248 scsipi_done(xs);
1249 }
1250
1251 void
1252 ncr53c9x_dequeue(sc, ecb)
1253 struct ncr53c9x_softc *sc;
1254 struct ncr53c9x_ecb *ecb;
1255 {
1256 struct ncr53c9x_tinfo *ti =
1257 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1258 struct ncr53c9x_linfo *li;
1259 int64_t lun = ecb->xs->xs_periph->periph_lun;
1260
1261 li = TINFO_LUN(ti, lun);
1262 #ifdef DIAGNOSTIC
1263 if (li == NULL || li->lun != lun)
1264 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1265 (long long) lun, ecb);
1266 #endif
1267 if (li->untagged == ecb) {
1268 li->busy = 0;
1269 li->untagged = NULL;
1270 }
1271 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1272 #ifdef DIAGNOSTIC
1273 if (li->queued[ecb->tag[1]] != NULL &&
1274 (li->queued[ecb->tag[1]] != ecb))
1275 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1276 "instead of ecb %p\n", ecb->tag[1],
1277 (long long) lun,
1278 li->queued[ecb->tag[1]], ecb);
1279 #endif
1280 li->queued[ecb->tag[1]] = NULL;
1281 li->used--;
1282 }
1283
1284 if ((ecb->flags & ECB_READY) != 0) {
1285 ecb->flags &= ~ECB_READY;
1286 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1287 }
1288 }
1289
1290 /*
1291 * INTERRUPT/PROTOCOL ENGINE
1292 */
1293
1294 /*
1295 * Schedule an outgoing message by prioritizing it, and asserting
1296 * attention on the bus. We can only do this when we are the initiator
1297 * else there will be an illegal command interrupt.
1298 */
1299 #define ncr53c9x_sched_msgout(m) \
1300 do { \
1301 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1302 NCRCMD(sc, NCRCMD_SETATN); \
1303 sc->sc_flags |= NCR_ATN; \
1304 sc->sc_msgpriq |= (m); \
1305 } while (0)
1306
1307 static void
1308 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1309 {
1310 NCR_MISC(("[flushfifo] "));
1311
1312 NCRCMD(sc, NCRCMD_FLUSH);
1313
1314 if (sc->sc_phase == COMMAND_PHASE ||
1315 sc->sc_phase == MESSAGE_OUT_PHASE)
1316 DELAY(2);
1317 }
1318
1319 static int
1320 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1321 {
1322 int i, n;
1323 u_char *buf;
1324
1325 switch(how) {
1326 case NCR_RDFIFO_START:
1327 buf = sc->sc_imess;
1328 sc->sc_imlen = 0;
1329 break;
1330 case NCR_RDFIFO_CONTINUE:
1331 buf = sc->sc_imess + sc->sc_imlen;
1332 break;
1333 default:
1334 panic("ncr53c9x_rdfifo: bad flag\n");
1335 break;
1336 }
1337
1338 /*
1339 * XXX buffer (sc_imess) size for message
1340 */
1341
1342 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1343
1344 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1345 n *= 2;
1346
1347 for (i = 0; i < n; i++)
1348 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1349
1350 if (sc->sc_espstat2 & FAS_STAT2_ISHUTTLE) {
1351
1352 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1353 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1354
1355 NCR_READ_REG(sc, NCR_FIFO);
1356
1357 ncr53c9x_flushfifo(sc);
1358 }
1359 } else {
1360 for (i = 0; i < n; i++)
1361 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1362 }
1363
1364 sc->sc_imlen += i;
1365
1366 #ifdef NCR53C9X_DEBUG
1367 {
1368 int j;
1369
1370 NCR_TRACE(("\n[rdfifo %s (%d):",
1371 (how == NCR_RDFIFO_START) ? "start" : "cont",
1372 (int)sc->sc_imlen));
1373 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1374 for (j = 0; j < sc->sc_imlen; j++)
1375 printf(" %02x", sc->sc_imess[j]);
1376 printf("]\n");
1377 }
1378 }
1379 #endif
1380 return sc->sc_imlen;
1381 }
1382
1383 static void
1384 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1385 {
1386 int i;
1387
1388 #ifdef NCR53C9X_DEBUG
1389 NCR_MISC(("[wrfifo(%d):", len));
1390 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1391 for (i = 0; i < len; i++)
1392 printf(" %02x", p[i]);
1393 printf("]\n");
1394 }
1395 #endif
1396
1397 for (i = 0; i < len; i++) {
1398 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1399
1400 if (sc->sc_rev == NCR_VARIANT_FAS366)
1401 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1402 }
1403 }
1404
1405 int
1406 ncr53c9x_reselect(sc, message, tagtype, tagid)
1407 struct ncr53c9x_softc *sc;
1408 int message;
1409 int tagtype, tagid;
1410 {
1411 u_char selid, target, lun;
1412 struct ncr53c9x_ecb *ecb = NULL;
1413 struct ncr53c9x_tinfo *ti;
1414 struct ncr53c9x_linfo *li;
1415
1416
1417 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1418 target = sc->sc_selid;
1419 } else {
1420 /*
1421 * The SCSI chip made a snapshot of the data bus
1422 * while the reselection was being negotiated.
1423 * This enables us to determine which target did
1424 * the reselect.
1425 */
1426 selid = sc->sc_selid & ~(1 << sc->sc_id);
1427 if (selid & (selid - 1)) {
1428 printf("%s: reselect with invalid selid %02x;"
1429 " sending DEVICE RESET\n",
1430 sc->sc_dev.dv_xname, selid);
1431 goto reset;
1432 }
1433
1434 target = ffs(selid) - 1;
1435 }
1436 lun = message & 0x07;
1437
1438 /*
1439 * Search wait queue for disconnected cmd
1440 * The list should be short, so I haven't bothered with
1441 * any more sophisticated structures than a simple
1442 * singly linked list.
1443 */
1444 ti = &sc->sc_tinfo[target];
1445 li = TINFO_LUN(ti, lun);
1446
1447 /*
1448 * We can get as far as the LUN with the IDENTIFY
1449 * message. Check to see if we're running an
1450 * un-tagged command. Otherwise ack the IDENTIFY
1451 * and wait for a tag message.
1452 */
1453 if (li != NULL) {
1454 if (li->untagged != NULL && li->busy)
1455 ecb = li->untagged;
1456 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1457 /* Wait for tag to come by */
1458 sc->sc_state = NCR_IDENTIFIED;
1459 return (0);
1460 } else if (tagtype)
1461 ecb = li->queued[tagid];
1462 }
1463 if (ecb == NULL) {
1464 printf("%s: reselect from target %d lun %d tag %x:%x "
1465 "with no nexus; sending ABORT\n",
1466 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1467 goto abort;
1468 }
1469
1470 /* Make this nexus active again. */
1471 sc->sc_state = NCR_CONNECTED;
1472 sc->sc_nexus = ecb;
1473 ncr53c9x_setsync(sc, ti);
1474
1475 if (ecb->flags & ECB_RESET)
1476 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1477 else if (ecb->flags & ECB_ABORT)
1478 ncr53c9x_sched_msgout(SEND_ABORT);
1479
1480 /* Do an implicit RESTORE POINTERS. */
1481 sc->sc_dp = ecb->daddr;
1482 sc->sc_dleft = ecb->dleft;
1483
1484 return (0);
1485
1486 reset:
1487 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1488 return (1);
1489
1490 abort:
1491 ncr53c9x_sched_msgout(SEND_ABORT);
1492 return (1);
1493 }
1494
1495
1496 /*
1497 * XXX this might be common thing(check with scsipi)
1498 */
1499 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1500 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1501 #define ISEXTMSG(m) ((m) == 1)
1502
1503 static inline int
1504 __verify_msg_format(u_char *p, int len)
1505 {
1506
1507 if (len == 1 && IS1BYTEMSG(p[0]))
1508 return 1;
1509 if (len == 2 && IS2BYTEMSG(p[0]))
1510 return 1;
1511 if (len >= 3 && ISEXTMSG(p[0]) &&
1512 len == p[1] + 2)
1513 return 1;
1514
1515 return 0;
1516 }
1517
1518 /*
1519 * Get an incoming message as initiator.
1520 *
1521 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1522 * byte in the FIFO
1523 */
1524 void
1525 ncr53c9x_msgin(sc)
1526 struct ncr53c9x_softc *sc;
1527 {
1528
1529 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1530
1531 if (sc->sc_imlen == 0) {
1532 printf("%s: msgin: no msg byte available\n",
1533 sc->sc_dev.dv_xname);
1534 return;
1535 }
1536
1537 /*
1538 * Prepare for a new message. A message should (according
1539 * to the SCSI standard) be transmitted in one single
1540 * MESSAGE_IN_PHASE. If we have been in some other phase,
1541 * then this is a new message.
1542 */
1543 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1544 sc->sc_state != NCR_RESELECTED) {
1545 printf("%s: phase change, dropping message, "
1546 "prev %d, state %d\n",
1547 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1548 sc->sc_flags &= ~NCR_DROP_MSGI;
1549 sc->sc_imlen = 0;
1550 }
1551
1552 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1553
1554 /*
1555 * If we're going to reject the message, don't bother storing
1556 * the incoming bytes. But still, we need to ACK them.
1557 */
1558 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1559 NCRCMD(sc, NCRCMD_MSGOK);
1560 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1561 return;
1562 }
1563
1564 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1565 ncr53c9x_sched_msgout(SEND_REJECT);
1566 sc->sc_flags |= NCR_DROP_MSGI;
1567 } else {
1568 u_char *pb;
1569 int plen;
1570
1571 switch (sc->sc_state) {
1572 /*
1573 * if received message is the first of reselection
1574 * then first byte is selid, and then message
1575 */
1576 case NCR_RESELECTED:
1577 pb = sc->sc_imess + 1;
1578 plen = sc->sc_imlen - 1;
1579 break;
1580 default:
1581 pb = sc->sc_imess;
1582 plen = sc->sc_imlen;
1583 break;
1584 }
1585
1586 if (__verify_msg_format(pb, plen))
1587 goto gotit;
1588 }
1589
1590 /* Ack what we have so far */
1591 NCRCMD(sc, NCRCMD_MSGOK);
1592 return;
1593
1594 gotit:
1595 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1596 /* we got complete message, flush the imess, */
1597 /* XXX nobody uses imlen below */
1598 sc->sc_imlen = 0;
1599 /*
1600 * Now we should have a complete message (1 byte, 2 byte
1601 * and moderately long extended messages). We only handle
1602 * extended messages which total length is shorter than
1603 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1604 */
1605 switch (sc->sc_state) {
1606 struct ncr53c9x_ecb *ecb;
1607 struct ncr53c9x_tinfo *ti;
1608 struct ncr53c9x_linfo *li;
1609 int lun;
1610
1611 case NCR_CONNECTED:
1612 ecb = sc->sc_nexus;
1613 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1614
1615 switch (sc->sc_imess[0]) {
1616 case MSG_CMDCOMPLETE:
1617 NCR_MSGS(("cmdcomplete "));
1618 if (sc->sc_dleft < 0) {
1619 scsipi_printaddr(ecb->xs->xs_periph);
1620 printf("got %ld extra bytes\n",
1621 -(long)sc->sc_dleft);
1622 sc->sc_dleft = 0;
1623 }
1624 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1625 0 : sc->sc_dleft;
1626 if ((ecb->flags & ECB_SENSE) == 0)
1627 ecb->xs->resid = ecb->dleft;
1628 sc->sc_state = NCR_CMDCOMPLETE;
1629 break;
1630
1631 case MSG_MESSAGE_REJECT:
1632 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1633 switch (sc->sc_msgout) {
1634 case SEND_TAG:
1635 /*
1636 * Target does not like tagged queuing.
1637 * - Flush the command queue
1638 * - Disable tagged queuing for the target
1639 * - Dequeue ecb from the queued array.
1640 */
1641 printf("%s: tagged queuing rejected: "
1642 "target %d\n",
1643 sc->sc_dev.dv_xname,
1644 ecb->xs->xs_periph->periph_target);
1645
1646 NCR_MSGS(("(rejected sent tag)"));
1647 NCRCMD(sc, NCRCMD_FLUSH);
1648 DELAY(1);
1649 ti->flags &= ~T_TAG;
1650 lun = ecb->xs->xs_periph->periph_lun;
1651 li = TINFO_LUN(ti, lun);
1652 if (ecb->tag[0] &&
1653 li->queued[ecb->tag[1]] != NULL) {
1654 li->queued[ecb->tag[1]] = NULL;
1655 li->used--;
1656 }
1657 ecb->tag[0] = ecb->tag[1] = 0;
1658 li->untagged = ecb;
1659 li->busy = 1;
1660 break;
1661
1662 case SEND_SDTR:
1663 printf("%s: sync transfer rejected: "
1664 "target %d\n",
1665 sc->sc_dev.dv_xname,
1666 ecb->xs->xs_periph->periph_target);
1667
1668 sc->sc_flags &= ~NCR_SYNCHNEGO;
1669 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1670 ncr53c9x_setsync(sc, ti);
1671 ncr53c9x_update_xfer_mode(sc,
1672 ecb->xs->xs_periph->periph_target);
1673 break;
1674
1675 case SEND_WDTR:
1676 printf("%s: wide transfer rejected: "
1677 "target %d\n",
1678 sc->sc_dev.dv_xname,
1679 ecb->xs->xs_periph->periph_target);
1680 ti->flags &= ~T_WIDE;
1681 ti->width = 0;
1682 break;
1683
1684 case SEND_INIT_DET_ERR:
1685 goto abort;
1686 }
1687 break;
1688
1689 case MSG_NOOP:
1690 NCR_MSGS(("noop "));
1691 break;
1692
1693 case MSG_HEAD_OF_Q_TAG:
1694 case MSG_SIMPLE_Q_TAG:
1695 case MSG_ORDERED_Q_TAG:
1696 NCR_MSGS(("TAG %x:%x",
1697 sc->sc_imess[0], sc->sc_imess[1]));
1698 break;
1699
1700 case MSG_DISCONNECT:
1701 NCR_MSGS(("disconnect "));
1702 ti->dconns++;
1703 sc->sc_state = NCR_DISCONNECT;
1704
1705 /*
1706 * Mark the fact that all bytes have moved. The
1707 * target may not bother to do a SAVE POINTERS
1708 * at this stage. This flag will set the residual
1709 * count to zero on MSG COMPLETE.
1710 */
1711 if (sc->sc_dleft == 0)
1712 ecb->flags |= ECB_TENTATIVE_DONE;
1713
1714 break;
1715
1716 case MSG_SAVEDATAPOINTER:
1717 NCR_MSGS(("save datapointer "));
1718 ecb->daddr = sc->sc_dp;
1719 ecb->dleft = sc->sc_dleft;
1720 break;
1721
1722 case MSG_RESTOREPOINTERS:
1723 NCR_MSGS(("restore datapointer "));
1724 sc->sc_dp = ecb->daddr;
1725 sc->sc_dleft = ecb->dleft;
1726 break;
1727
1728 case MSG_EXTENDED:
1729 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1730 switch (sc->sc_imess[2]) {
1731 case MSG_EXT_SDTR:
1732 NCR_MSGS(("SDTR period %d, offset %d ",
1733 sc->sc_imess[3], sc->sc_imess[4]));
1734 if (sc->sc_imess[1] != 3)
1735 goto reject;
1736 ti->period = sc->sc_imess[3];
1737 ti->offset = sc->sc_imess[4];
1738 ti->flags &= ~T_NEGOTIATE;
1739 if (sc->sc_minsync == 0 ||
1740 ti->offset == 0 ||
1741 ti->period > 124) {
1742 #if 0
1743 #ifdef NCR53C9X_DEBUG
1744 scsipi_printaddr(ecb->xs->xs_periph);
1745 printf("async mode\n");
1746 #endif
1747 #endif
1748 ti->flags &= ~T_SYNCMODE;
1749 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1750 /*
1751 * target initiated negotiation
1752 */
1753 ti->offset = 0;
1754 ncr53c9x_sched_msgout(
1755 SEND_SDTR);
1756 }
1757 } else {
1758 #if 0
1759 int r = 250/ti->period;
1760 int s = (100*250)/ti->period - 100*r;
1761 #endif
1762 int p;
1763
1764 p = ncr53c9x_stp2cpb(sc, ti->period);
1765 ti->period = ncr53c9x_cpb2stp(sc, p);
1766 #if 0
1767 #ifdef NCR53C9X_DEBUG
1768 scsipi_printaddr(ecb->xs->xs_periph);
1769 printf("max sync rate %d.%02dMB/s\n",
1770 r, s);
1771 #endif
1772 #endif
1773 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1774 /*
1775 * target initiated negotiation
1776 */
1777 if (ti->period <
1778 sc->sc_minsync)
1779 ti->period =
1780 sc->sc_minsync;
1781 if (ti->offset > 15)
1782 ti->offset = 15;
1783 ti->flags &= ~T_SYNCMODE;
1784 ncr53c9x_sched_msgout(
1785 SEND_SDTR);
1786 } else {
1787 /* we are sync */
1788 ti->flags |= T_SYNCMODE;
1789 }
1790 }
1791 ncr53c9x_update_xfer_mode(sc,
1792 ecb->xs->xs_periph->periph_target);
1793 sc->sc_flags &= ~NCR_SYNCHNEGO;
1794 ncr53c9x_setsync(sc, ti);
1795 break;
1796
1797 case MSG_EXT_WDTR:
1798 printf("%s: wide mode %d\n",
1799 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1800 if (sc->sc_imess[3] == 1) {
1801 ti->cfg3 |= NCRFASCFG3_EWIDE;
1802 ncr53c9x_setsync(sc, ti);
1803 } else
1804 ti->width = 0;
1805 ti->flags &= ~T_WIDE;
1806 break;
1807 default:
1808 scsipi_printaddr(ecb->xs->xs_periph);
1809 printf("unrecognized MESSAGE EXTENDED;"
1810 " sending REJECT\n");
1811 goto reject;
1812 }
1813 break;
1814
1815 default:
1816 NCR_MSGS(("ident "));
1817 scsipi_printaddr(ecb->xs->xs_periph);
1818 printf("unrecognized MESSAGE; sending REJECT\n");
1819 reject:
1820 ncr53c9x_sched_msgout(SEND_REJECT);
1821 break;
1822 }
1823 break;
1824
1825 case NCR_IDENTIFIED:
1826 /*
1827 * IDENTIFY message was received and queue tag is expected now
1828 */
1829 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1830 (sc->sc_msgify == 0)) {
1831 printf("%s: TAG reselect without IDENTIFY;"
1832 " MSG %x;"
1833 " sending DEVICE RESET\n",
1834 sc->sc_dev.dv_xname,
1835 sc->sc_imess[0]);
1836 goto reset;
1837 }
1838 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1839 sc->sc_imess[0], sc->sc_imess[1]);
1840 break;
1841
1842 case NCR_RESELECTED:
1843 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1844 sc->sc_msgify = sc->sc_imess[1];
1845 } else {
1846 printf("%s: reselect without IDENTIFY;"
1847 " MSG %x;"
1848 " sending DEVICE RESET\n",
1849 sc->sc_dev.dv_xname,
1850 sc->sc_imess[1]);
1851 goto reset;
1852 }
1853 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1854 break;
1855
1856 default:
1857 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1858 sc->sc_dev.dv_xname);
1859 reset:
1860 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1861 break;
1862
1863 abort:
1864 ncr53c9x_sched_msgout(SEND_ABORT);
1865 break;
1866 }
1867
1868 /* if we have more messages to send set ATN */
1869 if (sc->sc_msgpriq)
1870 NCRCMD(sc, NCRCMD_SETATN);
1871
1872 /* Ack last message byte */
1873 NCRCMD(sc, NCRCMD_MSGOK);
1874
1875 /* Done, reset message pointer. */
1876 sc->sc_flags &= ~NCR_DROP_MSGI;
1877 sc->sc_imlen = 0;
1878 }
1879
1880
1881 /*
1882 * Send the highest priority, scheduled message
1883 */
1884 void
1885 ncr53c9x_msgout(sc)
1886 struct ncr53c9x_softc *sc;
1887 {
1888 struct ncr53c9x_tinfo *ti;
1889 struct ncr53c9x_ecb *ecb;
1890 size_t size;
1891
1892 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1893 sc->sc_msgpriq, sc->sc_prevphase));
1894
1895 /*
1896 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1897 * condition on the SCSI bus. The 53c9x chip
1898 * automatically turns off ATN before sending the
1899 * message byte. (see also the comment below in the
1900 * default case when picking out a message to send)
1901 */
1902 if (sc->sc_flags & NCR_ATN) {
1903 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1904 new:
1905 NCRCMD(sc, NCRCMD_FLUSH);
1906 /* DELAY(1); */
1907 sc->sc_msgoutq = 0;
1908 sc->sc_omlen = 0;
1909 }
1910 } else {
1911 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1912 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1913 goto new;
1914 } else {
1915 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1916 sc->sc_dev.dv_xname, __LINE__);
1917 }
1918 }
1919
1920 if (sc->sc_omlen == 0) {
1921 /* Pick up highest priority message */
1922 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1923 sc->sc_msgoutq |= sc->sc_msgout;
1924 sc->sc_msgpriq &= ~sc->sc_msgout;
1925 sc->sc_omlen = 1; /* "Default" message len */
1926 switch (sc->sc_msgout) {
1927 case SEND_SDTR:
1928 ecb = sc->sc_nexus;
1929 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1930 sc->sc_omess[0] = MSG_EXTENDED;
1931 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1932 sc->sc_omess[2] = MSG_EXT_SDTR;
1933 sc->sc_omess[3] = ti->period;
1934 sc->sc_omess[4] = ti->offset;
1935 sc->sc_omlen = 5;
1936 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1937 ti->flags |= T_SYNCMODE;
1938 ncr53c9x_setsync(sc, ti);
1939 }
1940 break;
1941 case SEND_WDTR:
1942 ecb = sc->sc_nexus;
1943 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1944 sc->sc_omess[0] = MSG_EXTENDED;
1945 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1946 sc->sc_omess[2] = MSG_EXT_WDTR;
1947 sc->sc_omess[3] = ti->width;
1948 sc->sc_omlen = 4;
1949 break;
1950 case SEND_IDENTIFY:
1951 if (sc->sc_state != NCR_CONNECTED) {
1952 printf("%s at line %d: no nexus\n",
1953 sc->sc_dev.dv_xname, __LINE__);
1954 }
1955 ecb = sc->sc_nexus;
1956 sc->sc_omess[0] =
1957 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1958 break;
1959 case SEND_TAG:
1960 if (sc->sc_state != NCR_CONNECTED) {
1961 printf("%s at line %d: no nexus\n",
1962 sc->sc_dev.dv_xname, __LINE__);
1963 }
1964 ecb = sc->sc_nexus;
1965 sc->sc_omess[0] = ecb->tag[0];
1966 sc->sc_omess[1] = ecb->tag[1];
1967 sc->sc_omlen = 2;
1968 break;
1969 case SEND_DEV_RESET:
1970 sc->sc_flags |= NCR_ABORTING;
1971 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1972 ecb = sc->sc_nexus;
1973 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1974 ti->flags &= ~T_SYNCMODE;
1975 ncr53c9x_update_xfer_mode(sc,
1976 ecb->xs->xs_periph->periph_target);
1977 if ((ti->flags & T_SYNCHOFF) == 0)
1978 /* We can re-start sync negotiation */
1979 ti->flags |= T_NEGOTIATE;
1980 break;
1981 case SEND_PARITY_ERROR:
1982 sc->sc_omess[0] = MSG_PARITY_ERROR;
1983 break;
1984 case SEND_ABORT:
1985 sc->sc_flags |= NCR_ABORTING;
1986 sc->sc_omess[0] = MSG_ABORT;
1987 break;
1988 case SEND_INIT_DET_ERR:
1989 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1990 break;
1991 case SEND_REJECT:
1992 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1993 break;
1994 default:
1995 /*
1996 * We normally do not get here, since the chip
1997 * automatically turns off ATN before the last
1998 * byte of a message is sent to the target.
1999 * However, if the target rejects our (multi-byte)
2000 * message early by switching to MSG IN phase
2001 * ATN remains on, so the target may return to
2002 * MSG OUT phase. If there are no scheduled messages
2003 * left we send a NO-OP.
2004 *
2005 * XXX - Note that this leaves no useful purpose for
2006 * the NCR_ATN flag.
2007 */
2008 sc->sc_flags &= ~NCR_ATN;
2009 sc->sc_omess[0] = MSG_NOOP;
2010 break;
2011 }
2012 sc->sc_omp = sc->sc_omess;
2013 }
2014
2015 #ifdef DEBUG
2016 {
2017 int i;
2018
2019 NCR_MISC(("<msgout:"));
2020 for (i = 0; i < sc->sc_omlen; i++)
2021 NCR_MISC((" %02x", sc->sc_omess[i]));
2022 NCR_MISC(("> "));
2023 }
2024 #endif
2025 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2026 /*
2027 * XXX fifo size
2028 */
2029 ncr53c9x_flushfifo(sc);
2030 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2031 NCRCMD(sc, NCRCMD_TRANS);
2032 } else {
2033 /* (re)send the message */
2034 size = min(sc->sc_omlen, sc->sc_maxxfer);
2035 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2036 /* Program the SCSI counter */
2037 NCR_SET_COUNT(sc, size);
2038
2039 /* Load the count in and start the message-out transfer */
2040 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2041 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2042 NCRDMA_GO(sc);
2043 }
2044 }
2045
2046 /*
2047 * This is the most critical part of the driver, and has to know
2048 * how to deal with *all* error conditions and phases from the SCSI
2049 * bus. If there are no errors and the DMA was active, then call the
2050 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2051 * and we can return from here without further processing.
2052 *
2053 * Most of this needs verifying.
2054 */
2055 int
2056 ncr53c9x_intr(arg)
2057 void *arg;
2058 {
2059 struct ncr53c9x_softc *sc = arg;
2060 struct ncr53c9x_ecb *ecb;
2061 struct scsipi_periph *periph;
2062 struct ncr53c9x_tinfo *ti;
2063 size_t size;
2064 int nfifo;
2065
2066 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2067
2068 if (!NCRDMA_ISINTR(sc))
2069 return (0);
2070
2071 again:
2072 /* and what do the registers say... */
2073 ncr53c9x_readregs(sc);
2074
2075 sc->sc_intrcnt.ev_count++;
2076
2077 /*
2078 * At the moment, only a SCSI Bus Reset or Illegal
2079 * Command are classed as errors. A disconnect is a
2080 * valid condition, and we let the code check is the
2081 * "NCR_BUSFREE_OK" flag was set before declaring it
2082 * and error.
2083 *
2084 * Also, the status register tells us about "Gross
2085 * Errors" and "Parity errors". Only the Gross Error
2086 * is really bad, and the parity errors are dealt
2087 * with later
2088 *
2089 * TODO
2090 * If there are too many parity error, go to slow
2091 * cable mode ?
2092 */
2093
2094 /* SCSI Reset */
2095 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2096 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2097 NCRCMD(sc, NCRCMD_FLUSH);
2098 DELAY(1);
2099 }
2100 if (sc->sc_state != NCR_SBR) {
2101 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2102 ncr53c9x_init(sc, 0); /* Restart everything */
2103 return (1);
2104 }
2105 #if 0
2106 /*XXX*/ printf("<expected bus reset: "
2107 "[intr %x, stat %x, step %d]>\n",
2108 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2109 #endif
2110 if (sc->sc_nexus != NULL)
2111 panic("%s: nexus in reset state",
2112 sc->sc_dev.dv_xname);
2113 goto sched;
2114 }
2115
2116 ecb = sc->sc_nexus;
2117
2118 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2119 if (sc->sc_espintr & NCRINTR_ERR ||
2120 sc->sc_espstat & NCRSTAT_GE) {
2121
2122 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2123 /* Gross Error; no target ? */
2124 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2125 NCRCMD(sc, NCRCMD_FLUSH);
2126 DELAY(1);
2127 }
2128 if (sc->sc_state == NCR_CONNECTED ||
2129 sc->sc_state == NCR_SELECTING) {
2130 ecb->xs->error = XS_TIMEOUT;
2131 ncr53c9x_done(sc, ecb);
2132 }
2133 return (1);
2134 }
2135
2136 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2137 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2138 /*
2139 * Eat away "Illegal command" interrupt
2140 * on a ESP100 caused by a re-selection
2141 * while we were trying to select
2142 * another target.
2143 */
2144 #ifdef DEBUG
2145 printf("%s: ESP100 work-around activated\n",
2146 sc->sc_dev.dv_xname);
2147 #endif
2148 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2149 return (1);
2150 }
2151 /* illegal command, out of sync ? */
2152 printf("%s: illegal command: 0x%x "
2153 "(state %d, phase %x, prevphase %x)\n",
2154 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2155 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2156 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2157 NCRCMD(sc, NCRCMD_FLUSH);
2158 DELAY(1);
2159 }
2160 ncr53c9x_init(sc, 1); /* Restart everything */
2161 return (1);
2162 }
2163 }
2164 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2165
2166 /*
2167 * Call if DMA is active.
2168 *
2169 * If DMA_INTR returns true, then maybe go 'round the loop
2170 * again in case there is no more DMA queued, but a phase
2171 * change is expected.
2172 */
2173 if (NCRDMA_ISACTIVE(sc)) {
2174 int r = NCRDMA_INTR(sc);
2175 if (r == -1) {
2176 printf("%s: DMA error; resetting\n",
2177 sc->sc_dev.dv_xname);
2178 ncr53c9x_init(sc, 1);
2179 }
2180 /* If DMA active here, then go back to work... */
2181 if (NCRDMA_ISACTIVE(sc))
2182 return (1);
2183
2184 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2185 /*
2186 * DMA not completed. If we can not find a
2187 * acceptable explanation, print a diagnostic.
2188 */
2189 if (sc->sc_state == NCR_SELECTING)
2190 /*
2191 * This can happen if we are reselected
2192 * while using DMA to select a target.
2193 */
2194 /*void*/;
2195 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2196 /*
2197 * Our (multi-byte) message (eg SDTR) was
2198 * interrupted by the target to send
2199 * a MSG REJECT.
2200 * Print diagnostic if current phase
2201 * is not MESSAGE IN.
2202 */
2203 if (sc->sc_phase != MESSAGE_IN_PHASE)
2204 printf("%s: !TC on MSG OUT"
2205 " [intr %x, stat %x, step %d]"
2206 " prevphase %x, resid %lx\n",
2207 sc->sc_dev.dv_xname,
2208 sc->sc_espintr,
2209 sc->sc_espstat,
2210 sc->sc_espstep,
2211 sc->sc_prevphase,
2212 (u_long)sc->sc_omlen);
2213 } else if (sc->sc_dleft == 0) {
2214 /*
2215 * The DMA operation was started for
2216 * a DATA transfer. Print a diagnostic
2217 * if the DMA counter and TC bit
2218 * appear to be out of sync.
2219 */
2220 printf("%s: !TC on DATA XFER"
2221 " [intr %x, stat %x, step %d]"
2222 " prevphase %x, resid %x\n",
2223 sc->sc_dev.dv_xname,
2224 sc->sc_espintr,
2225 sc->sc_espstat,
2226 sc->sc_espstep,
2227 sc->sc_prevphase,
2228 ecb ? ecb->dleft : -1);
2229 }
2230 }
2231 }
2232
2233 /*
2234 * Check for less serious errors.
2235 */
2236 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2237 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2238 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2239 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2240 else
2241 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2242 }
2243
2244 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2245 sc->sc_msgify = 0;
2246 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2247 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2248 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2249 NCRCMD(sc, NCRCMD_FLUSH);
2250 /* DELAY(1); */
2251 }
2252 /*
2253 * This command must (apparently) be issued within
2254 * 250mS of a disconnect. So here you are...
2255 */
2256 NCRCMD(sc, NCRCMD_ENSEL);
2257
2258 switch (sc->sc_state) {
2259 case NCR_RESELECTED:
2260 goto sched;
2261
2262 case NCR_SELECTING:
2263 {
2264 struct ncr53c9x_linfo *li;
2265
2266 ecb->xs->error = XS_SELTIMEOUT;
2267
2268 /* Selection timeout -- discard all LUNs if empty */
2269 periph = ecb->xs->xs_periph;
2270 ti = &sc->sc_tinfo[periph->periph_target];
2271 li = LIST_FIRST(&ti->luns);
2272 while (li != NULL) {
2273 if (li->untagged == NULL && li->used == 0) {
2274 if (li->lun < NCR_NLUN)
2275 ti->lun[li->lun] = NULL;
2276 LIST_REMOVE(li, link);
2277 free(li, M_DEVBUF);
2278 /*
2279 * Restart the search at the beginning
2280 */
2281 li = LIST_FIRST(&ti->luns);
2282 continue;
2283 }
2284 li = LIST_NEXT(li, link);
2285 }
2286 goto finish;
2287 }
2288 case NCR_CONNECTED:
2289 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2290 #ifdef NCR53C9X_DEBUG
2291 if (ecb != NULL)
2292 scsipi_printaddr(ecb->xs->xs_periph);
2293 printf("sync nego not completed!\n");
2294 #endif
2295 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2296 sc->sc_flags &= ~NCR_SYNCHNEGO;
2297 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2298 }
2299
2300 /* it may be OK to disconnect */
2301 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2302 /*
2303 * Section 5.1.1 of the SCSI 2 spec
2304 * suggests issuing a REQUEST SENSE
2305 * following an unexpected disconnect.
2306 * Some devices go into a contingent
2307 * allegiance condition when
2308 * disconnecting, and this is necessary
2309 * to clean up their state.
2310 */
2311 printf("%s: unexpected disconnect; ",
2312 sc->sc_dev.dv_xname);
2313 if ((ecb->flags & ECB_SENSE) != 0) {
2314 printf("resetting\n");
2315 goto reset;
2316 }
2317 printf("sending REQUEST SENSE\n");
2318 callout_stop(&ecb->xs->xs_callout);
2319 ncr53c9x_sense(sc, ecb);
2320 goto out;
2321 }
2322
2323 ecb->xs->error = XS_TIMEOUT;
2324 goto finish;
2325
2326 case NCR_DISCONNECT:
2327 sc->sc_nexus = NULL;
2328 goto sched;
2329
2330 case NCR_CMDCOMPLETE:
2331 goto finish;
2332 }
2333 }
2334
2335 switch (sc->sc_state) {
2336
2337 case NCR_SBR:
2338 printf("%s: waiting for SCSI Bus Reset to happen\n",
2339 sc->sc_dev.dv_xname);
2340 return (1);
2341
2342 case NCR_RESELECTED:
2343 /*
2344 * we must be continuing a message ?
2345 */
2346 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2347 printf("%s: target didn't identify\n",
2348 sc->sc_dev.dv_xname);
2349 ncr53c9x_init(sc, 1);
2350 return (1);
2351 }
2352 printf("<<RESELECT CONT'd>>");
2353 #if XXXX
2354 ncr53c9x_msgin(sc);
2355 if (sc->sc_state != NCR_CONNECTED) {
2356 /* IDENTIFY fail?! */
2357 printf("%s: identify failed\n",
2358 sc->sc_dev.dv_xname, sc->sc_state);
2359 ncr53c9x_init(sc, 1);
2360 return (1);
2361 }
2362 #endif
2363 break;
2364
2365 case NCR_IDENTIFIED:
2366 ecb = sc->sc_nexus;
2367 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2368 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2369 /*
2370 * Things are seriously fucked up.
2371 * Pull the brakes, i.e. reset
2372 */
2373 printf("%s: target didn't send tag: %d bytes in fifo\n",
2374 sc->sc_dev.dv_xname, i);
2375 /* Drain and display fifo */
2376 while (i-- > 0)
2377 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2378
2379 ncr53c9x_init(sc, 1);
2380 return (1);
2381 } else
2382 goto msgin;
2383
2384 break;
2385
2386 case NCR_IDLE:
2387 case NCR_SELECTING:
2388 ecb = sc->sc_nexus;
2389 if (sc->sc_espintr & NCRINTR_RESEL) {
2390 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2391 sc->sc_flags = 0;
2392 /*
2393 * If we're trying to select a
2394 * target ourselves, push our command
2395 * back into the ready list.
2396 */
2397 if (sc->sc_state == NCR_SELECTING) {
2398 NCR_MISC(("backoff selector "));
2399 callout_stop(&ecb->xs->xs_callout);
2400 ncr53c9x_dequeue(sc, ecb);
2401 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2402 ecb->flags |= ECB_READY;
2403 ecb = sc->sc_nexus = NULL;
2404 }
2405 sc->sc_state = NCR_RESELECTED;
2406 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2407 /*
2408 * Things are seriously fucked up.
2409 * Pull the brakes, i.e. reset
2410 */
2411 printf("%s: target didn't identify\n",
2412 sc->sc_dev.dv_xname);
2413 ncr53c9x_init(sc, 1);
2414 return (1);
2415 }
2416 /*
2417 * The C90 only inhibits FIFO writes until
2418 * reselection is complete, instead of
2419 * waiting until the interrupt status register
2420 * has been read. So, if the reselect happens
2421 * while we were entering a command bytes (for
2422 * another target) some of those bytes can
2423 * appear in the FIFO here, after the
2424 * interrupt is taken.
2425 */
2426 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2427
2428 if (nfifo < 2 ||
2429 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) {
2430 printf("%s: RESELECT: %d bytes in FIFO! "
2431 "[intr %x, stat %x, step %d, "
2432 "prevphase %x]\n",
2433 sc->sc_dev.dv_xname,
2434 nfifo,
2435 sc->sc_espintr,
2436 sc->sc_espstat,
2437 sc->sc_espstep,
2438 sc->sc_prevphase);
2439 ncr53c9x_init(sc, 1);
2440 return (1);
2441 }
2442 sc->sc_selid = sc->sc_imess[0];
2443 NCR_MISC(("selid=%02x ", sc->sc_selid));
2444
2445 /* Handle identify message */
2446 ncr53c9x_msgin(sc);
2447 if (nfifo != 2) {
2448 /*
2449 * Note: this should not happen
2450 * with `dmaselect' on.
2451 */
2452 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2453 NCRCMD(sc, NCRCMD_FLUSH);
2454 } else if (sc->sc_features & NCR_F_DMASELECT &&
2455 sc->sc_rev == NCR_VARIANT_ESP100) {
2456 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2457 }
2458
2459 if (sc->sc_state != NCR_CONNECTED &&
2460 sc->sc_state != NCR_IDENTIFIED) {
2461 /* IDENTIFY fail?! */
2462 printf("%s: identify failed, "
2463 "state %d, intr %02x\n",
2464 sc->sc_dev.dv_xname, sc->sc_state,
2465 sc->sc_espintr);
2466 ncr53c9x_init(sc, 1);
2467 return (1);
2468 }
2469 goto shortcut; /* ie. next phase expected soon */
2470 }
2471
2472 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2473 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2474 /*
2475 * Arbitration won; examine the `step' register
2476 * to determine how far the selection could progress.
2477 */
2478 ecb = sc->sc_nexus;
2479 if (ecb == NULL)
2480 panic("ncr53c9x: no nexus");
2481
2482 periph = ecb->xs->xs_periph;
2483 ti = &sc->sc_tinfo[periph->periph_target];
2484
2485 switch (sc->sc_espstep) {
2486 case 0:
2487 /*
2488 * The target did not respond with a
2489 * message out phase - probably an old
2490 * device that doesn't recognize ATN.
2491 * Clear ATN and just continue, the
2492 * target should be in the command
2493 * phase.
2494 * XXXX check for command phase?
2495 */
2496 NCRCMD(sc, NCRCMD_RSTATN);
2497 break;
2498 case 1:
2499 if ((ti->flags & T_NEGOTIATE) == 0 &&
2500 ecb->tag[0] == 0) {
2501 printf("%s: step 1 & !NEG\n",
2502 sc->sc_dev.dv_xname);
2503 goto reset;
2504 }
2505 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2506 printf("%s: !MSGOUT\n",
2507 sc->sc_dev.dv_xname);
2508 goto reset;
2509 }
2510 if (ti->flags & T_WIDE) {
2511 ncr53c9x_sched_msgout(SEND_WDTR);
2512 }
2513 if (ti->flags & T_NEGOTIATE) {
2514 /* Start negotiating */
2515 ti->period = sc->sc_minsync;
2516 ti->offset = 15;
2517 sc->sc_flags |= NCR_SYNCHNEGO;
2518 if (ecb->tag[0])
2519 ncr53c9x_sched_msgout(
2520 SEND_TAG|SEND_SDTR);
2521 else
2522 ncr53c9x_sched_msgout(
2523 SEND_SDTR);
2524 } else {
2525 /* Could not do ATN3 so send TAG */
2526 ncr53c9x_sched_msgout(SEND_TAG);
2527 }
2528 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2529 break;
2530 case 3:
2531 /*
2532 * Grr, this is supposed to mean
2533 * "target left command phase prematurely".
2534 * It seems to happen regularly when
2535 * sync mode is on.
2536 * Look at FIFO to see if command went out.
2537 * (Timing problems?)
2538 */
2539 if (sc->sc_features & NCR_F_DMASELECT) {
2540 if (sc->sc_cmdlen == 0)
2541 /* Hope for the best.. */
2542 break;
2543 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2544 & NCRFIFO_FF) == 0) {
2545 /* Hope for the best.. */
2546 break;
2547 }
2548 printf("(%s:%d:%d): selection failed;"
2549 " %d left in FIFO "
2550 "[intr %x, stat %x, step %d]\n",
2551 sc->sc_dev.dv_xname,
2552 periph->periph_target,
2553 periph->periph_lun,
2554 NCR_READ_REG(sc, NCR_FFLAG)
2555 & NCRFIFO_FF,
2556 sc->sc_espintr, sc->sc_espstat,
2557 sc->sc_espstep);
2558 NCRCMD(sc, NCRCMD_FLUSH);
2559 ncr53c9x_sched_msgout(SEND_ABORT);
2560 return (1);
2561 case 2:
2562 /* Select stuck at Command Phase */
2563 NCRCMD(sc, NCRCMD_FLUSH);
2564 break;
2565 case 4:
2566 if (sc->sc_features & NCR_F_DMASELECT &&
2567 sc->sc_cmdlen != 0)
2568 printf("(%s:%d:%d): select; "
2569 "%lu left in DMA buffer "
2570 "[intr %x, stat %x, step %d]\n",
2571 sc->sc_dev.dv_xname,
2572 periph->periph_target,
2573 periph->periph_lun,
2574 (u_long)sc->sc_cmdlen,
2575 sc->sc_espintr,
2576 sc->sc_espstat,
2577 sc->sc_espstep);
2578 /* So far, everything went fine */
2579 break;
2580 }
2581
2582 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2583 /* Do an implicit RESTORE POINTERS. */
2584 sc->sc_dp = ecb->daddr;
2585 sc->sc_dleft = ecb->dleft;
2586 sc->sc_state = NCR_CONNECTED;
2587 break;
2588
2589 } else {
2590
2591 printf("%s: unexpected status after select"
2592 ": [intr %x, stat %x, step %x]\n",
2593 sc->sc_dev.dv_xname,
2594 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2595 NCRCMD(sc, NCRCMD_FLUSH);
2596 DELAY(1);
2597 goto reset;
2598 }
2599 if (sc->sc_state == NCR_IDLE) {
2600 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2601 return (0);
2602 }
2603 break;
2604
2605 case NCR_CONNECTED:
2606 if ((sc->sc_flags & NCR_ICCS) != 0) {
2607 /* "Initiate Command Complete Steps" in progress */
2608 u_char msg;
2609
2610 sc->sc_flags &= ~NCR_ICCS;
2611
2612 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2613 printf("%s: ICCS: "
2614 ": [intr %x, stat %x, step %x]\n",
2615 sc->sc_dev.dv_xname,
2616 sc->sc_espintr, sc->sc_espstat,
2617 sc->sc_espstep);
2618 }
2619 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2620 if (sc->sc_imlen < 2)
2621 printf("%s: can't get status, only %d bytes\n",
2622 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2623 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2624 msg = sc->sc_imess[sc->sc_imlen - 1];
2625 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2626 if (msg == MSG_CMDCOMPLETE) {
2627 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2628 ? 0 : sc->sc_dleft;
2629 if ((ecb->flags & ECB_SENSE) == 0)
2630 ecb->xs->resid = ecb->dleft;
2631 sc->sc_state = NCR_CMDCOMPLETE;
2632 } else
2633 printf("%s: STATUS_PHASE: msg %d\n",
2634 sc->sc_dev.dv_xname, msg);
2635 sc->sc_imlen = 0;
2636 NCRCMD(sc, NCRCMD_MSGOK);
2637 goto shortcut; /* ie. wait for disconnect */
2638 }
2639 break;
2640
2641 default:
2642 /* Don't panic: reset. */
2643 printf("%s: invalid state: %d",
2644 sc->sc_dev.dv_xname, sc->sc_state);
2645 ncr53c9x_scsi_reset(sc);
2646 goto out;
2647 #if 0
2648 panic("%s: invalid state: %d",
2649 sc->sc_dev.dv_xname, sc->sc_state);
2650 #endif
2651 break;
2652 }
2653
2654 /*
2655 * Driver is now in state NCR_CONNECTED, i.e. we
2656 * have a current command working the SCSI bus.
2657 */
2658 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2659 panic("ncr53c9x: no nexus");
2660 }
2661
2662 switch (sc->sc_phase) {
2663 case MESSAGE_OUT_PHASE:
2664 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2665 ncr53c9x_msgout(sc);
2666 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2667 break;
2668
2669 case MESSAGE_IN_PHASE:
2670 msgin:
2671 NCR_PHASE(("MESSAGE_IN_PHASE "));
2672 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2673 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2674 !(sc->sc_espstat2 & FAS_STAT2_EMPTY)) {
2675 NCRCMD(sc, NCRCMD_FLUSH);
2676 }
2677 sc->sc_flags |= NCR_WAITI;
2678 NCRCMD(sc, NCRCMD_TRANS);
2679 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2680 if ((sc->sc_flags & NCR_WAITI) == 0) {
2681 printf("%s: MSGIN: unexpected FC bit: "
2682 "[intr %x, stat %x, step %x]\n",
2683 sc->sc_dev.dv_xname,
2684 sc->sc_espintr, sc->sc_espstat,
2685 sc->sc_espstep);
2686 }
2687 sc->sc_flags &= ~NCR_WAITI;
2688 ncr53c9x_rdfifo(sc,
2689 (sc->sc_prevphase == sc->sc_phase) ?
2690 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2691 ncr53c9x_msgin(sc);
2692 } else {
2693 printf("%s: MSGIN: weird bits: "
2694 "[intr %x, stat %x, step %x]\n",
2695 sc->sc_dev.dv_xname,
2696 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2697 }
2698 sc->sc_prevphase = MESSAGE_IN_PHASE;
2699 goto shortcut; /* i.e. expect data to be ready */
2700 break;
2701
2702 case COMMAND_PHASE:
2703 /*
2704 * Send the command block. Normally we don't see this
2705 * phase because the SEL_ATN command takes care of
2706 * all this. However, we end up here if either the
2707 * target or we wanted to exchange some more messages
2708 * first (e.g. to start negotiations).
2709 */
2710
2711 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2712 ecb->cmd.cmd.opcode, ecb->clen));
2713 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2714 NCRCMD(sc, NCRCMD_FLUSH);
2715 /* DELAY(1);*/
2716 }
2717 if (sc->sc_features & NCR_F_DMASELECT) {
2718 size_t size;
2719 /* setup DMA transfer for command */
2720 size = ecb->clen;
2721 sc->sc_cmdlen = size;
2722 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2723 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2724 0, &size);
2725 /* Program the SCSI counter */
2726 NCR_SET_COUNT(sc, size);
2727
2728 /* load the count in */
2729 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2730
2731 /* start the command transfer */
2732 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2733 NCRDMA_GO(sc);
2734 } else {
2735 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2736 NCRCMD(sc, NCRCMD_TRANS);
2737 }
2738 sc->sc_prevphase = COMMAND_PHASE;
2739 break;
2740
2741 case DATA_OUT_PHASE:
2742 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2743 NCRCMD(sc, NCRCMD_FLUSH);
2744 size = min(sc->sc_dleft, sc->sc_maxxfer);
2745 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2746 sc->sc_prevphase = DATA_OUT_PHASE;
2747 goto setup_xfer;
2748
2749 case DATA_IN_PHASE:
2750 NCR_PHASE(("DATA_IN_PHASE "));
2751 if (sc->sc_rev == NCR_VARIANT_ESP100)
2752 NCRCMD(sc, NCRCMD_FLUSH);
2753 size = min(sc->sc_dleft, sc->sc_maxxfer);
2754 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2755 sc->sc_prevphase = DATA_IN_PHASE;
2756 setup_xfer:
2757 /* Target returned to data phase: wipe "done" memory */
2758 ecb->flags &= ~ECB_TENTATIVE_DONE;
2759
2760 /* Program the SCSI counter */
2761 NCR_SET_COUNT(sc, size);
2762
2763 /* load the count in */
2764 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2765
2766 /*
2767 * Note that if `size' is 0, we've already transceived
2768 * all the bytes we want but we're still in DATA PHASE.
2769 * Apparently, the device needs padding. Also, a
2770 * transfer size of 0 means "maximum" to the chip
2771 * DMA logic.
2772 */
2773 NCRCMD(sc,
2774 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2775 NCRDMA_GO(sc);
2776 return (1);
2777
2778 case STATUS_PHASE:
2779 NCR_PHASE(("STATUS_PHASE "));
2780 sc->sc_flags |= NCR_ICCS;
2781 NCRCMD(sc, NCRCMD_ICCS);
2782 sc->sc_prevphase = STATUS_PHASE;
2783 goto shortcut; /* i.e. expect status results soon */
2784 break;
2785
2786 case INVALID_PHASE:
2787 break;
2788
2789 default:
2790 printf("%s: unexpected bus phase; resetting\n",
2791 sc->sc_dev.dv_xname);
2792 goto reset;
2793 }
2794
2795 out:
2796 return (1);
2797
2798 reset:
2799 ncr53c9x_init(sc, 1);
2800 goto out;
2801
2802 finish:
2803 ncr53c9x_done(sc, ecb);
2804 goto out;
2805
2806 sched:
2807 sc->sc_state = NCR_IDLE;
2808 ncr53c9x_sched(sc);
2809 goto out;
2810
2811 shortcut:
2812 /*
2813 * The idea is that many of the SCSI operations take very little
2814 * time, and going away and getting interrupted is too high an
2815 * overhead to pay. For example, selecting, sending a message
2816 * and command and then doing some work can be done in one "pass".
2817 *
2818 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2819 * at 40MHz. This needs testing.
2820 */
2821 {
2822 struct timeval wait, cur;
2823
2824 microtime(&wait);
2825 wait.tv_usec += 50 / sc->sc_freq;
2826 if (wait.tv_usec > 1000000) {
2827 wait.tv_sec++;
2828 wait.tv_usec -= 1000000;
2829 }
2830 do {
2831 if (NCRDMA_ISINTR(sc))
2832 goto again;
2833 microtime(&cur);
2834 } while (cur.tv_sec <= wait.tv_sec &&
2835 cur.tv_usec <= wait.tv_usec);
2836 }
2837 goto out;
2838 }
2839
2840 void
2841 ncr53c9x_abort(sc, ecb)
2842 struct ncr53c9x_softc *sc;
2843 struct ncr53c9x_ecb *ecb;
2844 {
2845
2846 /* 2 secs for the abort */
2847 ecb->timeout = NCR_ABORT_TIMEOUT;
2848 ecb->flags |= ECB_ABORT;
2849
2850 if (ecb == sc->sc_nexus) {
2851 int timeout;
2852
2853 /*
2854 * If we're still selecting, the message will be scheduled
2855 * after selection is complete.
2856 */
2857 if (sc->sc_state == NCR_CONNECTED)
2858 ncr53c9x_sched_msgout(SEND_ABORT);
2859
2860 /*
2861 * Reschedule timeout.
2862 */
2863 timeout = ecb->timeout;
2864 if (hz > 100 && timeout > 1000)
2865 timeout = (timeout / 1000) * hz;
2866 else
2867 timeout = (timeout * hz) / 1000;
2868 callout_reset(&ecb->xs->xs_callout, timeout,
2869 ncr53c9x_timeout, ecb);
2870 } else {
2871 /*
2872 * Just leave the command where it is.
2873 * XXX - what choice do we have but to reset the SCSI
2874 * eventually?
2875 */
2876 if (sc->sc_state == NCR_IDLE)
2877 ncr53c9x_sched(sc);
2878 }
2879 }
2880
2881 void
2882 ncr53c9x_timeout(arg)
2883 void *arg;
2884 {
2885 struct ncr53c9x_ecb *ecb = arg;
2886 struct scsipi_xfer *xs = ecb->xs;
2887 struct scsipi_periph *periph = xs->xs_periph;
2888 struct ncr53c9x_softc *sc =
2889 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2890 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2891 int s;
2892
2893 scsipi_printaddr(periph);
2894 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2895 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2896 "msg(q %x,o %x) %s>",
2897 sc->sc_dev.dv_xname,
2898 ecb, ecb->flags, ecb->dleft, ecb->stat,
2899 sc->sc_state, sc->sc_nexus,
2900 NCR_READ_REG(sc, NCR_STAT),
2901 sc->sc_phase, sc->sc_prevphase,
2902 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2903 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2904 #if NCR53C9X_DEBUG > 1
2905 printf("TRACE: %s.", ecb->trace);
2906 #endif
2907
2908 s = splbio();
2909
2910 if (ecb->flags & ECB_ABORT) {
2911 /* abort timed out */
2912 printf(" AGAIN\n");
2913
2914 ncr53c9x_init(sc, 1);
2915 } else {
2916 /* abort the operation that has timed out */
2917 printf("\n");
2918 xs->error = XS_TIMEOUT;
2919 ncr53c9x_abort(sc, ecb);
2920
2921 /* Disable sync mode if stuck in a data phase */
2922 if (ecb == sc->sc_nexus &&
2923 (ti->flags & T_SYNCMODE) != 0 &&
2924 (sc->sc_phase & (MSGI|CDI)) == 0) {
2925 /* XXX ASYNC CALLBACK! */
2926 scsipi_printaddr(periph);
2927 printf("sync negotiation disabled\n");
2928 sc->sc_cfflags |= (1 << (periph->periph_target + 8));
2929 ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2930 }
2931 }
2932
2933 splx(s);
2934 }
2935
2936 void
2937 ncr53c9x_watch(arg)
2938 void *arg;
2939 {
2940 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2941 struct ncr53c9x_tinfo *ti;
2942 struct ncr53c9x_linfo *li;
2943 int t, s;
2944 /* Delete any structures that have not been used in 10min. */
2945 time_t old = time.tv_sec - (10 * 60);
2946
2947 s = splbio();
2948 for (t = 0; t < NCR_NTARG; t++) {
2949 ti = &sc->sc_tinfo[t];
2950 li = LIST_FIRST(&ti->luns);
2951 while (li) {
2952 if (li->last_used < old &&
2953 li->untagged == NULL &&
2954 li->used == 0) {
2955 if (li->lun < NCR_NLUN)
2956 ti->lun[li->lun] = NULL;
2957 LIST_REMOVE(li, link);
2958 free(li, M_DEVBUF);
2959 /* Restart the search at the beginning */
2960 li = LIST_FIRST(&ti->luns);
2961 continue;
2962 }
2963 li = LIST_NEXT(li, link);
2964 }
2965 }
2966 splx(s);
2967 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2968 }
2969
2970