ncr53c9x.c revision 1.80 1 /* $NetBSD: ncr53c9x.c,v 1.80 2001/05/23 18:32:26 petrov Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/types.h>
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/callout.h>
83 #include <sys/kernel.h>
84 #include <sys/errno.h>
85 #include <sys/ioctl.h>
86 #include <sys/device.h>
87 #include <sys/buf.h>
88 #include <sys/malloc.h>
89 #include <sys/proc.h>
90 #include <sys/queue.h>
91 #include <sys/pool.h>
92 #include <sys/scsiio.h>
93
94 #include <dev/scsipi/scsi_all.h>
95 #include <dev/scsipi/scsipi_all.h>
96 #include <dev/scsipi/scsiconf.h>
97 #include <dev/scsipi/scsi_message.h>
98
99 #include <dev/ic/ncr53c9xreg.h>
100 #include <dev/ic/ncr53c9xvar.h>
101
102 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
103 #ifdef DEBUG
104 int ncr53c9x_notag = 0;
105 #endif
106
107 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
108 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
109 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
110 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
111 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
112 struct scsipi_xfer *, int);
113 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
114 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
115 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
117 /*static*/ void ncr53c9x_timeout(void *arg);
118 /*static*/ void ncr53c9x_watch(void *arg);
119 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
120 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
121 struct ncr53c9x_ecb *);
122 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
123 caddr_t, int, struct proc *);
124
125 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
126 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
127 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
128
129 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
130 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
131 struct ncr53c9x_tinfo *);
132 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
133 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
134 int64_t lun);
135
136 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
137
138 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
139 #define NCR_RDFIFO_START 0
140 #define NCR_RDFIFO_CONTINUE 1
141
142
143 #define NCR_SET_COUNT(sc, size) do { \
144 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
145 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
146 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
147 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
148 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
149 } \
150 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
151 NCR_WRITE_REG(sc, NCR_RCH, 0); \
152 } \
153 } while (0)
154
155 static int ecb_pool_initialized = 0;
156 static struct pool ecb_pool;
157
158 /*
159 * Names for the NCR53c9x variants, correspnding to the variant tags
160 * in ncr53c9xvar.h.
161 */
162 static const char *ncr53c9x_variant_names[] = {
163 "ESP100",
164 "ESP100A",
165 "ESP200",
166 "NCR53C94",
167 "NCR53C96",
168 "ESP406",
169 "FAS408",
170 "FAS216",
171 "AM53C974",
172 "FAS366/HME",
173 };
174
175 /*
176 * Search linked list for LUN info by LUN id.
177 */
178 static struct ncr53c9x_linfo *
179 ncr53c9x_lunsearch(ti, lun)
180 struct ncr53c9x_tinfo *ti;
181 int64_t lun;
182 {
183 struct ncr53c9x_linfo *li;
184 LIST_FOREACH(li, &ti->luns, link)
185 if (li->lun == lun)
186 return (li);
187 return (NULL);
188 }
189
190 /*
191 * Attach this instance, and then all the sub-devices
192 */
193 void
194 ncr53c9x_attach(sc)
195 struct ncr53c9x_softc *sc;
196 {
197 struct scsipi_adapter *adapt = &sc->sc_adapter;
198 struct scsipi_channel *chan = &sc->sc_channel;
199
200 callout_init(&sc->sc_watchdog);
201 /*
202 * Allocate SCSI message buffers.
203 * Front-ends can override allocation to avoid alignment
204 * handling in the DMA engines. Note that that ncr53c9x_msgout()
205 * can request a 1 byte DMA transfer.
206 */
207 if (sc->sc_omess == NULL)
208 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
209
210 if (sc->sc_imess == NULL)
211 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
212
213 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
214 printf("out of memory\n");
215 return;
216 }
217
218 /*
219 * Note, the front-end has set us up to print the chip variation.
220 */
221 if (sc->sc_rev >= NCR_VARIANT_MAX) {
222 printf("\n%s: unknown variant %d, devices not attached\n",
223 sc->sc_dev.dv_xname, sc->sc_rev);
224 return;
225 }
226
227 printf(": %s, %dMHz, SCSI ID %d\n",
228 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
229
230 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
231
232 /* The value *must not* be == 1. Make it 2 */
233 if (sc->sc_ccf == 1)
234 sc->sc_ccf = 2;
235
236 /*
237 * The recommended timeout is 250ms. This register is loaded
238 * with a value calculated as follows, from the docs:
239 *
240 * (timout period) x (CLK frequency)
241 * reg = -------------------------------------
242 * 8192 x (Clock Conversion Factor)
243 *
244 * Since CCF has a linear relation to CLK, this generally computes
245 * to the constant of 153.
246 */
247 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
248
249 /* CCF register only has 3 bits; 0 is actually 8 */
250 sc->sc_ccf &= 7;
251
252 /*
253 * Fill in the scsipi_adapter.
254 */
255 adapt->adapt_dev = &sc->sc_dev;
256 adapt->adapt_nchannels = 1;
257 adapt->adapt_openings = 256;
258 adapt->adapt_max_periph = 256;
259 adapt->adapt_ioctl = ncr53c9x_ioctl;
260 /* adapt_request initialized by front-end */
261 /* adapt_minphys initialized by front-end */
262
263 /*
264 * Fill in the scsipi_channel.
265 */
266 memset(chan, 0, sizeof(*chan));
267 chan->chan_adapter = adapt;
268 chan->chan_bustype = &scsi_bustype;
269 chan->chan_channel = 0;
270 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */
271 chan->chan_nluns = 8;
272 chan->chan_id = sc->sc_id;
273
274 /*
275 * Add reference to adapter so that we drop the reference after
276 * config_found() to make sure the adatper is disabled.
277 */
278 if (scsipi_adapter_addref(adapt) != 0) {
279 printf("%s: unable to enable controller\n",
280 sc->sc_dev.dv_xname);
281 return;
282 }
283
284 /* Reset state & bus */
285 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
286 sc->sc_state = 0;
287 ncr53c9x_init(sc, 1);
288
289 /*
290 * Now try to attach all the sub-devices
291 */
292 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
293
294 scsipi_adapter_delref(adapt);
295 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
296 }
297
298 int
299 ncr53c9x_detach(sc, flags)
300 struct ncr53c9x_softc *sc;
301 int flags;
302 {
303 int error;
304
305 if (sc->sc_child) {
306 error = config_detach(sc->sc_child, flags);
307 if (error)
308 return (error);
309 }
310
311 free(sc->sc_imess, M_DEVBUF);
312 free(sc->sc_omess, M_DEVBUF);
313
314 return (0);
315 }
316
317 /*
318 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
319 * only this controller, but kills any on-going commands, and also stops
320 * and resets the DMA.
321 *
322 * After reset, registers are loaded with the defaults from the attach
323 * routine above.
324 */
325 void
326 ncr53c9x_reset(sc)
327 struct ncr53c9x_softc *sc;
328 {
329
330 /* reset DMA first */
331 NCRDMA_RESET(sc);
332
333 /* reset SCSI chip */
334 NCRCMD(sc, NCRCMD_RSTCHIP);
335 NCRCMD(sc, NCRCMD_NOP);
336 DELAY(500);
337
338 /* do these backwards, and fall through */
339 switch (sc->sc_rev) {
340 case NCR_VARIANT_ESP406:
341 case NCR_VARIANT_FAS408:
342 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
343 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
344 case NCR_VARIANT_AM53C974:
345 case NCR_VARIANT_FAS216:
346 case NCR_VARIANT_NCR53C94:
347 case NCR_VARIANT_NCR53C96:
348 case NCR_VARIANT_ESP200:
349 sc->sc_features |= NCR_F_HASCFG3;
350 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
351 case NCR_VARIANT_ESP100A:
352 sc->sc_features |= NCR_F_SELATN3;
353 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
354 case NCR_VARIANT_ESP100:
355 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
356 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
357 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
358 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
359 break;
360
361 case NCR_VARIANT_FAS366:
362 sc->sc_features |=
363 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
364 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
365 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
366 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
367 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
368 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
369 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
370 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
371 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
372 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
373 break;
374
375 default:
376 printf("%s: unknown revision code, assuming ESP100\n",
377 sc->sc_dev.dv_xname);
378 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
379 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
380 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
381 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
382 }
383
384 if (sc->sc_rev == NCR_VARIANT_AM53C974)
385 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
386
387 #if 0
388 printf("%s: ncr53c9x_reset: revision %d\n",
389 sc->sc_dev.dv_xname, sc->sc_rev);
390 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
391 "ccf 0x%x, timeout 0x%x\n",
392 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
393 sc->sc_ccf, sc->sc_timeout);
394 #endif
395 }
396
397 /*
398 * Reset the SCSI bus, but not the chip
399 */
400 void
401 ncr53c9x_scsi_reset(sc)
402 struct ncr53c9x_softc *sc;
403 {
404
405 (*sc->sc_glue->gl_dma_stop)(sc);
406
407 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
408 NCRCMD(sc, NCRCMD_RSTSCSI);
409 }
410
411 /*
412 * Initialize ncr53c9x state machine
413 */
414 void
415 ncr53c9x_init(sc, doreset)
416 struct ncr53c9x_softc *sc;
417 int doreset;
418 {
419 struct ncr53c9x_ecb *ecb;
420 struct ncr53c9x_linfo *li;
421 int i, r;
422
423 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
424
425 if (!ecb_pool_initialized) {
426 /* All instances share this pool */
427 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
428 "ncr53c9x_ecb", 0, NULL, NULL, 0);
429 ecb_pool_initialized = 1;
430 }
431
432 if (sc->sc_state == 0) {
433 /* First time through; initialize. */
434
435 TAILQ_INIT(&sc->ready_list);
436 sc->sc_nexus = NULL;
437 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
438 for (r = 0; r < NCR_NTARG; r++) {
439 LIST_INIT(&sc->sc_tinfo[r].luns);
440 }
441 } else {
442 /* Cancel any active commands. */
443 sc->sc_state = NCR_CLEANING;
444 sc->sc_msgify = 0;
445 if ((ecb = sc->sc_nexus) != NULL) {
446 ecb->xs->error = XS_TIMEOUT;
447 ncr53c9x_done(sc, ecb);
448 }
449 /* Cancel outstanding disconnected commands on each LUN */
450 for (r = 0; r < 8; r++) {
451 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
452 if ((ecb = li->untagged) != NULL) {
453 li->untagged = NULL;
454 /*
455 * XXXXXXX
456 *
457 * Should we terminate a command
458 * that never reached the disk?
459 */
460 li->busy = 0;
461 ecb->xs->error = XS_TIMEOUT;
462 ncr53c9x_done(sc, ecb);
463 }
464 for (i = 0; i < 256; i++)
465 if ((ecb = li->queued[i])) {
466 li->queued[i] = NULL;
467 ecb->xs->error = XS_TIMEOUT;
468 ncr53c9x_done(sc, ecb);
469 }
470 li->used = 0;
471 }
472 }
473 }
474
475 /*
476 * reset the chip to a known state
477 */
478 ncr53c9x_reset(sc);
479
480 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
481 for (r = 0; r < 8; r++) {
482 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
483 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
484
485 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
486 ? 0 : T_SYNCHOFF) |
487 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
488 T_NEED_TO_RESET;
489 #ifdef DEBUG
490 if (ncr53c9x_notag)
491 ti->flags &= ~T_TAG;
492 #endif
493 ti->period = sc->sc_minsync;
494 ti->offset = 0;
495 ti->cfg3 = 0;
496 }
497
498 if (doreset) {
499 sc->sc_state = NCR_SBR;
500 NCRCMD(sc, NCRCMD_RSTSCSI);
501 } else {
502 sc->sc_state = NCR_IDLE;
503 ncr53c9x_sched(sc);
504 }
505 }
506
507 /*
508 * Read the NCR registers, and save their contents for later use.
509 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
510 * NCR_INTR - so make sure it is the last read.
511 *
512 * I think that (from reading the docs) most bits in these registers
513 * only make sense when he DMA CSR has an interrupt showing. Call only
514 * if an interrupt is pending.
515 */
516 __inline__ void
517 ncr53c9x_readregs(sc)
518 struct ncr53c9x_softc *sc;
519 {
520
521 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
522 /* Only the stepo bits are of interest */
523 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
524
525 if (sc->sc_rev == NCR_VARIANT_FAS366)
526 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
527
528 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
529
530 if (sc->sc_glue->gl_clear_latched_intr != NULL)
531 (*sc->sc_glue->gl_clear_latched_intr)(sc);
532
533 /*
534 * Determine the SCSI bus phase, return either a real SCSI bus phase
535 * or some pseudo phase we use to detect certain exceptions.
536 */
537
538 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
539 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
540
541 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
542 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
543 }
544
545 /*
546 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
547 */
548 static inline int
549 ncr53c9x_stp2cpb(sc, period)
550 struct ncr53c9x_softc *sc;
551 int period;
552 {
553 int v;
554 v = (sc->sc_freq * period) / 250;
555 if (ncr53c9x_cpb2stp(sc, v) < period)
556 /* Correct round-down error */
557 v++;
558 return (v);
559 }
560
561 static inline void
562 ncr53c9x_setsync(sc, ti)
563 struct ncr53c9x_softc *sc;
564 struct ncr53c9x_tinfo *ti;
565 {
566 u_char syncoff, synctp;
567 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
568
569 if (ti->flags & T_SYNCMODE) {
570 syncoff = ti->offset;
571 synctp = ncr53c9x_stp2cpb(sc, ti->period);
572 if (sc->sc_features & NCR_F_FASTSCSI) {
573 /*
574 * If the period is 200ns or less (ti->period <= 50),
575 * put the chip in Fast SCSI mode.
576 */
577 if (ti->period <= 50)
578 /*
579 * There are (at least) 4 variations of the
580 * configuration 3 register. The drive attach
581 * routine sets the appropriate bit to put the
582 * chip into Fast SCSI mode so that it doesn't
583 * have to be figured out here each time.
584 */
585 cfg3 |= sc->sc_cfg3_fscsi;
586 }
587
588 /*
589 * Am53c974 requires different SYNCTP values when the
590 * FSCSI bit is off.
591 */
592 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
593 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
594 synctp--;
595 } else {
596 syncoff = 0;
597 synctp = 0;
598 }
599
600 if (sc->sc_features & NCR_F_HASCFG3)
601 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
602
603 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
604 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
605 }
606
607 /*
608 * Send a command to a target, set the driver state to NCR_SELECTING
609 * and let the caller take care of the rest.
610 *
611 * Keeping this as a function allows me to say that this may be done
612 * by DMA instead of programmed I/O soon.
613 */
614 void
615 ncr53c9x_select(sc, ecb)
616 struct ncr53c9x_softc *sc;
617 struct ncr53c9x_ecb *ecb;
618 {
619 struct scsipi_periph *periph = ecb->xs->xs_periph;
620 int target = periph->periph_target;
621 int lun = periph->periph_lun;
622 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
623 int tiflags = ti->flags;
624 u_char *cmd;
625 int clen;
626 int selatn3, selatns;
627 size_t dmasize;
628
629 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
630 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
631
632 sc->sc_state = NCR_SELECTING;
633 /*
634 * Schedule the timeout now, the first time we will go away
635 * expecting to come back due to an interrupt, because it is
636 * always possible that the interrupt may never happen.
637 */
638 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
639 int timeout = ecb->timeout;
640
641 if (hz > 100 && timeout > 1000)
642 timeout = (timeout / 1000) * hz;
643 else
644 timeout = (timeout * hz) / 1000;
645
646 callout_reset(&ecb->xs->xs_callout, timeout,
647 ncr53c9x_timeout, ecb);
648 }
649
650 /*
651 * The docs say the target register is never reset, and I
652 * can't think of a better place to set it
653 */
654 if (sc->sc_rev == NCR_VARIANT_FAS366) {
655 NCRCMD(sc, NCRCMD_FLUSH);
656 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
657 } else {
658 NCR_WRITE_REG(sc, NCR_SELID, target);
659 }
660 ncr53c9x_setsync(sc, ti);
661
662 if ((ecb->flags & ECB_SENSE) != 0) {
663 /*
664 * For REQUEST SENSE, we should not send an IDENTIFY or
665 * otherwise mangle the target. There should be no MESSAGE IN
666 * phase.
667 */
668 if (sc->sc_features & NCR_F_DMASELECT) {
669 /* setup DMA transfer for command */
670 dmasize = clen = ecb->clen;
671 sc->sc_cmdlen = clen;
672 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
673
674 /* Program the SCSI counter */
675 NCR_SET_COUNT(sc, dmasize);
676
677 if (sc->sc_rev != NCR_VARIANT_FAS366)
678 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
679
680 /* And get the targets attention */
681 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
682 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
683 &dmasize);
684 NCRDMA_GO(sc);
685 } else {
686 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
687 NCRCMD(sc, NCRCMD_SELNATN);
688 }
689 return;
690 }
691
692 selatn3 = selatns = 0;
693 if (ecb->tag[0] != 0) {
694 if (sc->sc_features & NCR_F_SELATN3)
695 /* use SELATN3 to send tag messages */
696 selatn3 = 1;
697 else
698 /* We don't have SELATN3; use SELATNS to send tags */
699 selatns = 1;
700 }
701
702 if (ti->flags & T_NEGOTIATE) {
703 /* We have to use SELATNS to send sync/wide messages */
704 selatn3 = 0;
705 selatns = 1;
706 }
707
708 cmd = (u_char *)&ecb->cmd.cmd;
709
710 if (selatn3) {
711 /* We'll use tags with SELATN3 */
712 clen = ecb->clen + 3;
713 cmd -= 3;
714 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
715 cmd[1] = ecb->tag[0]; /* msg[1] */
716 cmd[2] = ecb->tag[1]; /* msg[2] */
717 } else {
718 /* We don't have tags, or will send messages with SELATNS */
719 clen = ecb->clen + 1;
720 cmd -= 1;
721 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
722 }
723
724 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
725
726 /* setup DMA transfer for command */
727 dmasize = clen;
728 sc->sc_cmdlen = clen;
729 sc->sc_cmdp = cmd;
730
731 /* Program the SCSI counter */
732 NCR_SET_COUNT(sc, dmasize);
733
734 /* load the count in */
735 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
736 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
737
738 /* And get the targets attention */
739 if (selatn3) {
740 sc->sc_msgout = SEND_TAG;
741 sc->sc_flags |= NCR_ATN;
742 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
743 } else
744 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
745 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
746 NCRDMA_GO(sc);
747 return;
748 }
749
750 /*
751 * Who am I. This is where we tell the target that we are
752 * happy for it to disconnect etc.
753 */
754
755 /* Now get the command into the FIFO */
756 ncr53c9x_wrfifo(sc, cmd, clen);
757
758 /* And get the targets attention */
759 if (selatns) {
760 NCR_MISC(("SELATNS \n"));
761 /* Arbitrate, select and stop after IDENTIFY message */
762 NCRCMD(sc, NCRCMD_SELATNS);
763 } else if (selatn3) {
764 sc->sc_msgout = SEND_TAG;
765 sc->sc_flags |= NCR_ATN;
766 NCRCMD(sc, NCRCMD_SELATN3);
767 } else
768 NCRCMD(sc, NCRCMD_SELATN);
769 }
770
771 void
772 ncr53c9x_free_ecb(sc, ecb)
773 struct ncr53c9x_softc *sc;
774 struct ncr53c9x_ecb *ecb;
775 {
776 int s;
777
778 s = splbio();
779 ecb->flags = 0;
780 pool_put(&ecb_pool, (void *)ecb);
781 splx(s);
782 return;
783 }
784
785 struct ncr53c9x_ecb *
786 ncr53c9x_get_ecb(sc, flags)
787 struct ncr53c9x_softc *sc;
788 int flags;
789 {
790 struct ncr53c9x_ecb *ecb;
791 int s;
792
793 s = splbio();
794 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT);
795 splx(s);
796 if (ecb) {
797 bzero(ecb, sizeof(*ecb));
798 ecb->flags |= ECB_ALLOC;
799 }
800 return (ecb);
801 }
802
803 /*
804 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
805 */
806
807 /*
808 * Start a SCSI-command
809 * This function is called by the higher level SCSI-driver to queue/run
810 * SCSI-commands.
811 */
812
813 void
814 ncr53c9x_scsipi_request(chan, req, arg)
815 struct scsipi_channel *chan;
816 scsipi_adapter_req_t req;
817 void *arg;
818 {
819 struct scsipi_xfer *xs;
820 struct scsipi_periph *periph;
821 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
822 struct ncr53c9x_ecb *ecb;
823 int s, flags;
824
825 NCR_TRACE(("[ncr53c9x_scsipi_request] "));
826
827 switch (req) {
828 case ADAPTER_REQ_RUN_XFER:
829 xs = arg;
830 periph = xs->xs_periph;
831 flags = xs->xs_control;
832
833 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
834 periph->periph_target));
835
836 /* Get an ECB to use. */
837 ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
838 /*
839 * This should never happen as we track resources
840 * in the mid-layer.
841 */
842 if (ecb == NULL) {
843 scsipi_printaddr(periph);
844 printf("unable to allocate ecb\n");
845 xs->error = XS_RESOURCE_SHORTAGE;
846 scsipi_done(xs);
847 return;
848 }
849
850 /* Initialize ecb */
851 ecb->xs = xs;
852 ecb->timeout = xs->timeout;
853
854 if (flags & XS_CTL_RESET) {
855 ecb->flags |= ECB_RESET;
856 ecb->clen = 0;
857 ecb->dleft = 0;
858 } else {
859 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
860 ecb->clen = xs->cmdlen;
861 ecb->daddr = xs->data;
862 ecb->dleft = xs->datalen;
863 }
864 ecb->stat = 0;
865
866 s = splbio();
867
868 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
869 ecb->flags |= ECB_READY;
870 if (sc->sc_state == NCR_IDLE)
871 ncr53c9x_sched(sc);
872
873 splx(s);
874
875 if ((flags & XS_CTL_POLL) == 0)
876 return;
877
878 /* Not allowed to use interrupts, use polling instead */
879 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
880 ncr53c9x_timeout(ecb);
881 if (ncr53c9x_poll(sc, xs, ecb->timeout))
882 ncr53c9x_timeout(ecb);
883 }
884 return;
885
886 case ADAPTER_REQ_GROW_RESOURCES:
887 /* XXX Not supported. */
888 return;
889
890 case ADAPTER_REQ_SET_XFER_MODE:
891 {
892 struct ncr53c9x_tinfo *ti;
893 struct scsipi_xfer_mode *xm = arg;
894
895 ti = &sc->sc_tinfo[xm->xm_target];
896 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
897 ti->period = 0;
898 ti->offset = 0;
899
900 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 &&
901 (xm->xm_mode & PERIPH_CAP_TQING))
902 ti->flags |= T_TAG;
903 else
904 ti->flags &= ~T_TAG;
905
906 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
907 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
908 sc->sc_dev.dv_xname, xm->xm_target));
909 if (sc->sc_rev == NCR_VARIANT_FAS366) {
910 ti->flags |= T_WIDE;
911 ti->width = 1;
912 }
913 }
914
915 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
916 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
917 NCR_MISC(("%s: target %d: sync negotiation\n",
918 sc->sc_dev.dv_xname, xm->xm_target));
919 ti->flags |= T_NEGOTIATE;
920 ti->period = sc->sc_minsync;
921 }
922 /*
923 * If we're not going to negotiate, send the notification
924 * now, since it won't happen later.
925 */
926 if ((ti->flags & T_NEGOTIATE) == 0)
927 ncr53c9x_update_xfer_mode(sc, xm->xm_target);
928 return;
929 }
930 }
931 }
932
933 void
934 ncr53c9x_update_xfer_mode(sc, target)
935 struct ncr53c9x_softc *sc;
936 int target;
937 {
938 struct scsipi_xfer_mode xm;
939 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
940
941 xm.xm_target = target;
942 xm.xm_mode = 0;
943 xm.xm_period = 0;
944 xm.xm_offset = 0;
945
946 if (ti->flags & T_SYNCMODE) {
947 xm.xm_mode |= PERIPH_CAP_SYNC;
948 xm.xm_period = ti->period;
949 xm.xm_offset = ti->offset;
950 }
951 if (ti->width)
952 xm.xm_mode |= PERIPH_CAP_WIDE16;
953
954 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
955 xm.xm_mode |= PERIPH_CAP_TQING;
956
957 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
958 }
959
960 /*
961 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
962 */
963 int
964 ncr53c9x_poll(sc, xs, count)
965 struct ncr53c9x_softc *sc;
966 struct scsipi_xfer *xs;
967 int count;
968 {
969
970 NCR_TRACE(("[ncr53c9x_poll] "));
971 while (count) {
972 if (NCRDMA_ISINTR(sc)) {
973 ncr53c9x_intr(sc);
974 }
975 #if alternatively
976 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
977 ncr53c9x_intr(sc);
978 #endif
979 if ((xs->xs_status & XS_STS_DONE) != 0)
980 return (0);
981 if (sc->sc_state == NCR_IDLE) {
982 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
983 ncr53c9x_sched(sc);
984 }
985 DELAY(1000);
986 count--;
987 }
988 return (1);
989 }
990
991 int
992 ncr53c9x_ioctl(chan, cmd, arg, flag, p)
993 struct scsipi_channel *chan;
994 u_long cmd;
995 caddr_t arg;
996 int flag;
997 struct proc *p;
998 {
999 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */
1000 int s, error = 0;
1001
1002 s = splbio();
1003
1004 switch (cmd) {
1005 default:
1006 error = ENOTTY;
1007 break;
1008 }
1009 splx(s);
1010 return (error);
1011 }
1012
1013
1014 /*
1015 * LOW LEVEL SCSI UTILITIES
1016 */
1017
1018 /*
1019 * Schedule a scsi operation. This has now been pulled out of the interrupt
1020 * handler so that we may call it from ncr53c9x_scsipi_request and
1021 * ncr53c9x_done. This may save us an unecessary interrupt just to get
1022 * things going. Should only be called when state == NCR_IDLE and at bio pl.
1023 */
1024 void
1025 ncr53c9x_sched(sc)
1026 struct ncr53c9x_softc *sc;
1027 {
1028 struct ncr53c9x_ecb *ecb;
1029 struct scsipi_periph *periph;
1030 struct ncr53c9x_tinfo *ti;
1031 int lun;
1032 struct ncr53c9x_linfo *li;
1033 int s, tag;
1034
1035 NCR_TRACE(("[ncr53c9x_sched] "));
1036 if (sc->sc_state != NCR_IDLE)
1037 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1038
1039 /*
1040 * Find first ecb in ready queue that is for a target/lunit
1041 * combinations that is not busy.
1042 */
1043 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1044 ecb = TAILQ_NEXT(ecb, chain)) {
1045 periph = ecb->xs->xs_periph;
1046 ti = &sc->sc_tinfo[periph->periph_target];
1047 lun = periph->periph_lun;
1048
1049 /* Select type of tag for this command */
1050 if ((ti->flags & (T_RSELECTOFF)) != 0)
1051 tag = 0;
1052 else if ((ti->flags & (T_TAG)) == 0)
1053 tag = 0;
1054 else if ((ecb->flags & ECB_SENSE) != 0)
1055 tag = 0;
1056 else
1057 tag = ecb->xs->xs_tag_type;
1058 #if 0
1059 /* XXXX Use tags for polled commands? */
1060 if (ecb->xs->xs_control & XS_CTL_POLL)
1061 tag = 0;
1062 #endif
1063
1064 s = splbio();
1065 li = TINFO_LUN(ti, lun);
1066 if (li == NULL) {
1067 /* Initialize LUN info and add to list. */
1068 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT))
1069 == NULL) {
1070 splx(s);
1071 continue;
1072 }
1073 bzero(li, sizeof(*li));
1074 li->lun = lun;
1075
1076 LIST_INSERT_HEAD(&ti->luns, li, link);
1077 if (lun < NCR_NLUN)
1078 ti->lun[lun] = li;
1079 }
1080 li->last_used = time.tv_sec;
1081 if (tag == 0) {
1082 /* Try to issue this as an un-tagged command */
1083 if (li->untagged == NULL)
1084 li->untagged = ecb;
1085 }
1086 if (li->untagged != NULL) {
1087 tag = 0;
1088 if ((li->busy != 1) && li->used == 0) {
1089 /* We need to issue this untagged command now */
1090 ecb = li->untagged;
1091 periph = ecb->xs->xs_periph;
1092 } else {
1093 /* Not ready yet */
1094 splx(s);
1095 continue;
1096 }
1097 }
1098 ecb->tag[0] = tag;
1099 if (tag != 0) {
1100 li->queued[ecb->xs->xs_tag_id] = ecb;
1101 ecb->tag[1] = ecb->xs->xs_tag_id;
1102 li->used++;
1103 }
1104 splx(s);
1105 if (li->untagged != NULL && (li->busy != 1)) {
1106 li->busy = 1;
1107 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1108 ecb->flags &= ~ECB_READY;
1109 sc->sc_nexus = ecb;
1110 ncr53c9x_select(sc, ecb);
1111 break;
1112 }
1113 if (li->untagged == NULL && tag != 0) {
1114 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1115 ecb->flags &= ~ECB_READY;
1116 sc->sc_nexus = ecb;
1117 ncr53c9x_select(sc, ecb);
1118 break;
1119 } else
1120 NCR_MISC(("%d:%d busy\n",
1121 periph->periph_target,
1122 periph->periph_lun));
1123 }
1124 }
1125
1126 void
1127 ncr53c9x_sense(sc, ecb)
1128 struct ncr53c9x_softc *sc;
1129 struct ncr53c9x_ecb *ecb;
1130 {
1131 struct scsipi_xfer *xs = ecb->xs;
1132 struct scsipi_periph *periph = xs->xs_periph;
1133 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1134 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1135 struct ncr53c9x_linfo *li;
1136 int lun = periph->periph_lun;
1137
1138 NCR_MISC(("requesting sense "));
1139 /* Next, setup a request sense command block */
1140 bzero(ss, sizeof(*ss));
1141 ss->opcode = REQUEST_SENSE;
1142 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1143 ss->length = sizeof(struct scsipi_sense_data);
1144 ecb->clen = sizeof(*ss);
1145 ecb->daddr = (char *)&xs->sense.scsi_sense;
1146 ecb->dleft = sizeof(struct scsipi_sense_data);
1147 ecb->flags |= ECB_SENSE;
1148 ecb->timeout = NCR_SENSE_TIMEOUT;
1149 ti->senses++;
1150 li = TINFO_LUN(ti, lun);
1151 if (li->busy)
1152 li->busy = 0;
1153 ncr53c9x_dequeue(sc, ecb);
1154 li->untagged = ecb; /* must be executed first to fix C/A */
1155 li->busy = 2;
1156 if (ecb == sc->sc_nexus) {
1157 ncr53c9x_select(sc, ecb);
1158 } else {
1159 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1160 ecb->flags |= ECB_READY;
1161 if (sc->sc_state == NCR_IDLE)
1162 ncr53c9x_sched(sc);
1163 }
1164 }
1165
1166 /*
1167 * POST PROCESSING OF SCSI_CMD (usually current)
1168 */
1169 void
1170 ncr53c9x_done(sc, ecb)
1171 struct ncr53c9x_softc *sc;
1172 struct ncr53c9x_ecb *ecb;
1173 {
1174 struct scsipi_xfer *xs = ecb->xs;
1175 struct scsipi_periph *periph = xs->xs_periph;
1176 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1177 int lun = periph->periph_lun;
1178 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1179
1180 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1181
1182 callout_stop(&ecb->xs->xs_callout);
1183
1184 /*
1185 * Now, if we've come here with no error code, i.e. we've kept the
1186 * initial XS_NOERROR, and the status code signals that we should
1187 * check sense, we'll need to set up a request sense cmd block and
1188 * push the command back into the ready queue *before* any other
1189 * commands for this target/lunit, else we lose the sense info.
1190 * We don't support chk sense conditions for the request sense cmd.
1191 */
1192 if (xs->error == XS_NOERROR) {
1193 xs->status = ecb->stat;
1194 if ((ecb->flags & ECB_ABORT) != 0) {
1195 xs->error = XS_TIMEOUT;
1196 } else if ((ecb->flags & ECB_SENSE) != 0) {
1197 xs->error = XS_SENSE;
1198 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1199 /* First, save the return values */
1200 xs->resid = ecb->dleft;
1201 ncr53c9x_sense(sc, ecb);
1202 return;
1203 } else {
1204 xs->resid = ecb->dleft;
1205 }
1206 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY)
1207 xs->error = XS_BUSY;
1208 }
1209
1210 #ifdef NCR53C9X_DEBUG
1211 if (ncr53c9x_debug & NCR_SHOWMISC) {
1212 if (xs->resid != 0)
1213 printf("resid=%d ", xs->resid);
1214 if (xs->error == XS_SENSE)
1215 printf("sense=0x%02x\n",
1216 xs->sense.scsi_sense.error_code);
1217 else
1218 printf("error=%d\n", xs->error);
1219 }
1220 #endif
1221
1222 /*
1223 * Remove the ECB from whatever queue it's on.
1224 */
1225 ncr53c9x_dequeue(sc, ecb);
1226 if (ecb == sc->sc_nexus) {
1227 sc->sc_nexus = NULL;
1228 if (sc->sc_state != NCR_CLEANING) {
1229 sc->sc_state = NCR_IDLE;
1230 ncr53c9x_sched(sc);
1231 }
1232 }
1233
1234 if (xs->error == XS_SELTIMEOUT) {
1235 /* Selection timeout -- discard this LUN if empty */
1236 if (li->untagged == NULL && li->used == 0) {
1237 if (lun < NCR_NLUN)
1238 ti->lun[lun] = NULL;
1239 LIST_REMOVE(li, link);
1240 free(li, M_DEVBUF);
1241 }
1242 }
1243
1244 ncr53c9x_free_ecb(sc, ecb);
1245 ti->cmds++;
1246 scsipi_done(xs);
1247 }
1248
1249 void
1250 ncr53c9x_dequeue(sc, ecb)
1251 struct ncr53c9x_softc *sc;
1252 struct ncr53c9x_ecb *ecb;
1253 {
1254 struct ncr53c9x_tinfo *ti =
1255 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1256 struct ncr53c9x_linfo *li;
1257 int64_t lun = ecb->xs->xs_periph->periph_lun;
1258
1259 li = TINFO_LUN(ti, lun);
1260 #ifdef DIAGNOSTIC
1261 if (li == NULL || li->lun != lun)
1262 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1263 (long long) lun, ecb);
1264 #endif
1265 if (li->untagged == ecb) {
1266 li->busy = 0;
1267 li->untagged = NULL;
1268 }
1269 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1270 #ifdef DIAGNOSTIC
1271 if (li->queued[ecb->tag[1]] != NULL &&
1272 (li->queued[ecb->tag[1]] != ecb))
1273 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1274 "instead of ecb %p\n", ecb->tag[1],
1275 (long long) lun,
1276 li->queued[ecb->tag[1]], ecb);
1277 #endif
1278 li->queued[ecb->tag[1]] = NULL;
1279 li->used--;
1280 }
1281
1282 if ((ecb->flags & ECB_READY) != 0) {
1283 ecb->flags &= ~ECB_READY;
1284 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1285 }
1286 }
1287
1288 /*
1289 * INTERRUPT/PROTOCOL ENGINE
1290 */
1291
1292 /*
1293 * Schedule an outgoing message by prioritizing it, and asserting
1294 * attention on the bus. We can only do this when we are the initiator
1295 * else there will be an illegal command interrupt.
1296 */
1297 #define ncr53c9x_sched_msgout(m) \
1298 do { \
1299 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1300 NCRCMD(sc, NCRCMD_SETATN); \
1301 sc->sc_flags |= NCR_ATN; \
1302 sc->sc_msgpriq |= (m); \
1303 } while (0)
1304
1305 static void
1306 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1307 {
1308 NCR_MISC(("[flushfifo] "));
1309
1310 NCRCMD(sc, NCRCMD_FLUSH);
1311
1312 if (sc->sc_phase == COMMAND_PHASE ||
1313 sc->sc_phase == MESSAGE_OUT_PHASE)
1314 DELAY(2);
1315 }
1316
1317 static int
1318 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1319 {
1320 int i, n;
1321 u_char *buf;
1322
1323 switch(how) {
1324 case NCR_RDFIFO_START:
1325 buf = sc->sc_imess;
1326 sc->sc_imlen = 0;
1327 break;
1328 case NCR_RDFIFO_CONTINUE:
1329 buf = sc->sc_imess + sc->sc_imlen;
1330 break;
1331 default:
1332 panic("ncr53c9x_rdfifo: bad flag\n");
1333 break;
1334 }
1335
1336 /*
1337 * XXX buffer (sc_imess) size for message
1338 */
1339
1340 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1341
1342 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1343 n *= 2;
1344
1345 for (i = 0; i < n; i++)
1346 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1347
1348 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) {
1349
1350 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1351 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1352
1353 NCR_READ_REG(sc, NCR_FIFO);
1354
1355 ncr53c9x_flushfifo(sc);
1356 }
1357 } else {
1358 for (i = 0; i < n; i++)
1359 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1360 }
1361
1362 sc->sc_imlen += i;
1363
1364 #ifdef NCR53C9X_DEBUG
1365 {
1366 int j;
1367
1368 NCR_TRACE(("\n[rdfifo %s (%d):",
1369 (how == NCR_RDFIFO_START) ? "start" : "cont",
1370 (int)sc->sc_imlen));
1371 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1372 for (j = 0; j < sc->sc_imlen; j++)
1373 printf(" %02x", sc->sc_imess[j]);
1374 printf("]\n");
1375 }
1376 }
1377 #endif
1378 return sc->sc_imlen;
1379 }
1380
1381 static void
1382 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1383 {
1384 int i;
1385
1386 #ifdef NCR53C9X_DEBUG
1387 NCR_MISC(("[wrfifo(%d):", len));
1388 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1389 for (i = 0; i < len; i++)
1390 printf(" %02x", p[i]);
1391 printf("]\n");
1392 }
1393 #endif
1394
1395 for (i = 0; i < len; i++) {
1396 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1397
1398 if (sc->sc_rev == NCR_VARIANT_FAS366)
1399 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1400 }
1401 }
1402
1403 int
1404 ncr53c9x_reselect(sc, message, tagtype, tagid)
1405 struct ncr53c9x_softc *sc;
1406 int message;
1407 int tagtype, tagid;
1408 {
1409 u_char selid, target, lun;
1410 struct ncr53c9x_ecb *ecb = NULL;
1411 struct ncr53c9x_tinfo *ti;
1412 struct ncr53c9x_linfo *li;
1413
1414
1415 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1416 target = sc->sc_selid;
1417 } else {
1418 /*
1419 * The SCSI chip made a snapshot of the data bus
1420 * while the reselection was being negotiated.
1421 * This enables us to determine which target did
1422 * the reselect.
1423 */
1424 selid = sc->sc_selid & ~(1 << sc->sc_id);
1425 if (selid & (selid - 1)) {
1426 printf("%s: reselect with invalid selid %02x;"
1427 " sending DEVICE RESET\n",
1428 sc->sc_dev.dv_xname, selid);
1429 goto reset;
1430 }
1431
1432 target = ffs(selid) - 1;
1433 }
1434 lun = message & 0x07;
1435
1436 /*
1437 * Search wait queue for disconnected cmd
1438 * The list should be short, so I haven't bothered with
1439 * any more sophisticated structures than a simple
1440 * singly linked list.
1441 */
1442 ti = &sc->sc_tinfo[target];
1443 li = TINFO_LUN(ti, lun);
1444
1445 /*
1446 * We can get as far as the LUN with the IDENTIFY
1447 * message. Check to see if we're running an
1448 * un-tagged command. Otherwise ack the IDENTIFY
1449 * and wait for a tag message.
1450 */
1451 if (li != NULL) {
1452 if (li->untagged != NULL && li->busy)
1453 ecb = li->untagged;
1454 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1455 /* Wait for tag to come by */
1456 sc->sc_state = NCR_IDENTIFIED;
1457 return (0);
1458 } else if (tagtype)
1459 ecb = li->queued[tagid];
1460 }
1461 if (ecb == NULL) {
1462 printf("%s: reselect from target %d lun %d tag %x:%x "
1463 "with no nexus; sending ABORT\n",
1464 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1465 goto abort;
1466 }
1467
1468 /* Make this nexus active again. */
1469 sc->sc_state = NCR_CONNECTED;
1470 sc->sc_nexus = ecb;
1471 ncr53c9x_setsync(sc, ti);
1472
1473 if (ecb->flags & ECB_RESET)
1474 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1475 else if (ecb->flags & ECB_ABORT)
1476 ncr53c9x_sched_msgout(SEND_ABORT);
1477
1478 /* Do an implicit RESTORE POINTERS. */
1479 sc->sc_dp = ecb->daddr;
1480 sc->sc_dleft = ecb->dleft;
1481
1482 return (0);
1483
1484 reset:
1485 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1486 return (1);
1487
1488 abort:
1489 ncr53c9x_sched_msgout(SEND_ABORT);
1490 return (1);
1491 }
1492
1493
1494 /*
1495 * XXX this might be common thing(check with scsipi)
1496 */
1497 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
1498 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1499 #define ISEXTMSG(m) ((m) == 1)
1500
1501 static inline int
1502 __verify_msg_format(u_char *p, int len)
1503 {
1504
1505 if (len == 1 && IS1BYTEMSG(p[0]))
1506 return 1;
1507 if (len == 2 && IS2BYTEMSG(p[0]))
1508 return 1;
1509 if (len >= 3 && ISEXTMSG(p[0]) &&
1510 len == p[1] + 2)
1511 return 1;
1512
1513 return 0;
1514 }
1515
1516 /*
1517 * Get an incoming message as initiator.
1518 *
1519 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1520 * byte in the FIFO
1521 */
1522 void
1523 ncr53c9x_msgin(sc)
1524 struct ncr53c9x_softc *sc;
1525 {
1526
1527 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1528
1529 if (sc->sc_imlen == 0) {
1530 printf("%s: msgin: no msg byte available\n",
1531 sc->sc_dev.dv_xname);
1532 return;
1533 }
1534
1535 /*
1536 * Prepare for a new message. A message should (according
1537 * to the SCSI standard) be transmitted in one single
1538 * MESSAGE_IN_PHASE. If we have been in some other phase,
1539 * then this is a new message.
1540 */
1541 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1542 sc->sc_state != NCR_RESELECTED) {
1543 printf("%s: phase change, dropping message, "
1544 "prev %d, state %d\n",
1545 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1546 sc->sc_flags &= ~NCR_DROP_MSGI;
1547 sc->sc_imlen = 0;
1548 }
1549
1550 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1551
1552 /*
1553 * If we're going to reject the message, don't bother storing
1554 * the incoming bytes. But still, we need to ACK them.
1555 */
1556 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1557 NCRCMD(sc, NCRCMD_MSGOK);
1558 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1559 return;
1560 }
1561
1562 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1563 ncr53c9x_sched_msgout(SEND_REJECT);
1564 sc->sc_flags |= NCR_DROP_MSGI;
1565 } else {
1566 u_char *pb;
1567 int plen;
1568
1569 switch (sc->sc_state) {
1570 /*
1571 * if received message is the first of reselection
1572 * then first byte is selid, and then message
1573 */
1574 case NCR_RESELECTED:
1575 pb = sc->sc_imess + 1;
1576 plen = sc->sc_imlen - 1;
1577 break;
1578 default:
1579 pb = sc->sc_imess;
1580 plen = sc->sc_imlen;
1581 break;
1582 }
1583
1584 if (__verify_msg_format(pb, plen))
1585 goto gotit;
1586 }
1587
1588 /* Ack what we have so far */
1589 NCRCMD(sc, NCRCMD_MSGOK);
1590 return;
1591
1592 gotit:
1593 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1594 /* we got complete message, flush the imess, */
1595 /* XXX nobody uses imlen below */
1596 sc->sc_imlen = 0;
1597 /*
1598 * Now we should have a complete message (1 byte, 2 byte
1599 * and moderately long extended messages). We only handle
1600 * extended messages which total length is shorter than
1601 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1602 */
1603 switch (sc->sc_state) {
1604 struct ncr53c9x_ecb *ecb;
1605 struct ncr53c9x_tinfo *ti;
1606 struct ncr53c9x_linfo *li;
1607 int lun;
1608
1609 case NCR_CONNECTED:
1610 ecb = sc->sc_nexus;
1611 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1612
1613 switch (sc->sc_imess[0]) {
1614 case MSG_CMDCOMPLETE:
1615 NCR_MSGS(("cmdcomplete "));
1616 if (sc->sc_dleft < 0) {
1617 scsipi_printaddr(ecb->xs->xs_periph);
1618 printf("got %ld extra bytes\n",
1619 -(long)sc->sc_dleft);
1620 sc->sc_dleft = 0;
1621 }
1622 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1623 0 : sc->sc_dleft;
1624 if ((ecb->flags & ECB_SENSE) == 0)
1625 ecb->xs->resid = ecb->dleft;
1626 sc->sc_state = NCR_CMDCOMPLETE;
1627 break;
1628
1629 case MSG_MESSAGE_REJECT:
1630 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1631 switch (sc->sc_msgout) {
1632 case SEND_TAG:
1633 /*
1634 * Target does not like tagged queuing.
1635 * - Flush the command queue
1636 * - Disable tagged queuing for the target
1637 * - Dequeue ecb from the queued array.
1638 */
1639 printf("%s: tagged queuing rejected: "
1640 "target %d\n",
1641 sc->sc_dev.dv_xname,
1642 ecb->xs->xs_periph->periph_target);
1643
1644 NCR_MSGS(("(rejected sent tag)"));
1645 NCRCMD(sc, NCRCMD_FLUSH);
1646 DELAY(1);
1647 ti->flags &= ~T_TAG;
1648 lun = ecb->xs->xs_periph->periph_lun;
1649 li = TINFO_LUN(ti, lun);
1650 if (ecb->tag[0] &&
1651 li->queued[ecb->tag[1]] != NULL) {
1652 li->queued[ecb->tag[1]] = NULL;
1653 li->used--;
1654 }
1655 ecb->tag[0] = ecb->tag[1] = 0;
1656 li->untagged = ecb;
1657 li->busy = 1;
1658 break;
1659
1660 case SEND_SDTR:
1661 printf("%s: sync transfer rejected: "
1662 "target %d\n",
1663 sc->sc_dev.dv_xname,
1664 ecb->xs->xs_periph->periph_target);
1665
1666 sc->sc_flags &= ~NCR_SYNCHNEGO;
1667 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1668 ncr53c9x_setsync(sc, ti);
1669 ncr53c9x_update_xfer_mode(sc,
1670 ecb->xs->xs_periph->periph_target);
1671 break;
1672
1673 case SEND_WDTR:
1674 printf("%s: wide transfer rejected: "
1675 "target %d\n",
1676 sc->sc_dev.dv_xname,
1677 ecb->xs->xs_periph->periph_target);
1678 ti->flags &= ~T_WIDE;
1679 ti->width = 0;
1680 break;
1681
1682 case SEND_INIT_DET_ERR:
1683 goto abort;
1684 }
1685 break;
1686
1687 case MSG_NOOP:
1688 NCR_MSGS(("noop "));
1689 break;
1690
1691 case MSG_HEAD_OF_Q_TAG:
1692 case MSG_SIMPLE_Q_TAG:
1693 case MSG_ORDERED_Q_TAG:
1694 NCR_MSGS(("TAG %x:%x",
1695 sc->sc_imess[0], sc->sc_imess[1]));
1696 break;
1697
1698 case MSG_DISCONNECT:
1699 NCR_MSGS(("disconnect "));
1700 ti->dconns++;
1701 sc->sc_state = NCR_DISCONNECT;
1702
1703 /*
1704 * Mark the fact that all bytes have moved. The
1705 * target may not bother to do a SAVE POINTERS
1706 * at this stage. This flag will set the residual
1707 * count to zero on MSG COMPLETE.
1708 */
1709 if (sc->sc_dleft == 0)
1710 ecb->flags |= ECB_TENTATIVE_DONE;
1711
1712 break;
1713
1714 case MSG_SAVEDATAPOINTER:
1715 NCR_MSGS(("save datapointer "));
1716 ecb->daddr = sc->sc_dp;
1717 ecb->dleft = sc->sc_dleft;
1718 break;
1719
1720 case MSG_RESTOREPOINTERS:
1721 NCR_MSGS(("restore datapointer "));
1722 sc->sc_dp = ecb->daddr;
1723 sc->sc_dleft = ecb->dleft;
1724 break;
1725
1726 case MSG_EXTENDED:
1727 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1728 switch (sc->sc_imess[2]) {
1729 case MSG_EXT_SDTR:
1730 NCR_MSGS(("SDTR period %d, offset %d ",
1731 sc->sc_imess[3], sc->sc_imess[4]));
1732 if (sc->sc_imess[1] != 3)
1733 goto reject;
1734 ti->period = sc->sc_imess[3];
1735 ti->offset = sc->sc_imess[4];
1736 ti->flags &= ~T_NEGOTIATE;
1737 if (sc->sc_minsync == 0 ||
1738 ti->offset == 0 ||
1739 ti->period > 124) {
1740 #if 0
1741 #ifdef NCR53C9X_DEBUG
1742 scsipi_printaddr(ecb->xs->xs_periph);
1743 printf("async mode\n");
1744 #endif
1745 #endif
1746 ti->flags &= ~T_SYNCMODE;
1747 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1748 /*
1749 * target initiated negotiation
1750 */
1751 ti->offset = 0;
1752 ncr53c9x_sched_msgout(
1753 SEND_SDTR);
1754 }
1755 } else {
1756 #if 0
1757 int r = 250/ti->period;
1758 int s = (100*250)/ti->period - 100*r;
1759 #endif
1760 int p;
1761
1762 p = ncr53c9x_stp2cpb(sc, ti->period);
1763 ti->period = ncr53c9x_cpb2stp(sc, p);
1764 #if 0
1765 #ifdef NCR53C9X_DEBUG
1766 scsipi_printaddr(ecb->xs->xs_periph);
1767 printf("max sync rate %d.%02dMB/s\n",
1768 r, s);
1769 #endif
1770 #endif
1771 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1772 /*
1773 * target initiated negotiation
1774 */
1775 if (ti->period <
1776 sc->sc_minsync)
1777 ti->period =
1778 sc->sc_minsync;
1779 if (ti->offset > 15)
1780 ti->offset = 15;
1781 ti->flags &= ~T_SYNCMODE;
1782 ncr53c9x_sched_msgout(
1783 SEND_SDTR);
1784 } else {
1785 /* we are sync */
1786 ti->flags |= T_SYNCMODE;
1787 }
1788 }
1789 ncr53c9x_update_xfer_mode(sc,
1790 ecb->xs->xs_periph->periph_target);
1791 sc->sc_flags &= ~NCR_SYNCHNEGO;
1792 ncr53c9x_setsync(sc, ti);
1793 break;
1794
1795 case MSG_EXT_WDTR:
1796 printf("%s: wide mode %d\n",
1797 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1798 if (sc->sc_imess[3] == 1) {
1799 ti->cfg3 |= NCRFASCFG3_EWIDE;
1800 ncr53c9x_setsync(sc, ti);
1801 } else
1802 ti->width = 0;
1803 ti->flags &= ~T_WIDE;
1804 break;
1805 default:
1806 scsipi_printaddr(ecb->xs->xs_periph);
1807 printf("unrecognized MESSAGE EXTENDED;"
1808 " sending REJECT\n");
1809 goto reject;
1810 }
1811 break;
1812
1813 default:
1814 NCR_MSGS(("ident "));
1815 scsipi_printaddr(ecb->xs->xs_periph);
1816 printf("unrecognized MESSAGE; sending REJECT\n");
1817 reject:
1818 ncr53c9x_sched_msgout(SEND_REJECT);
1819 break;
1820 }
1821 break;
1822
1823 case NCR_IDENTIFIED:
1824 /*
1825 * IDENTIFY message was received and queue tag is expected now
1826 */
1827 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1828 (sc->sc_msgify == 0)) {
1829 printf("%s: TAG reselect without IDENTIFY;"
1830 " MSG %x;"
1831 " sending DEVICE RESET\n",
1832 sc->sc_dev.dv_xname,
1833 sc->sc_imess[0]);
1834 goto reset;
1835 }
1836 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1837 sc->sc_imess[0], sc->sc_imess[1]);
1838 break;
1839
1840 case NCR_RESELECTED:
1841 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1842 sc->sc_msgify = sc->sc_imess[1];
1843 } else {
1844 printf("%s: reselect without IDENTIFY;"
1845 " MSG %x;"
1846 " sending DEVICE RESET\n",
1847 sc->sc_dev.dv_xname,
1848 sc->sc_imess[1]);
1849 goto reset;
1850 }
1851 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1852 break;
1853
1854 default:
1855 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1856 sc->sc_dev.dv_xname);
1857 reset:
1858 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1859 break;
1860
1861 abort:
1862 ncr53c9x_sched_msgout(SEND_ABORT);
1863 break;
1864 }
1865
1866 /* if we have more messages to send set ATN */
1867 if (sc->sc_msgpriq)
1868 NCRCMD(sc, NCRCMD_SETATN);
1869
1870 /* Ack last message byte */
1871 NCRCMD(sc, NCRCMD_MSGOK);
1872
1873 /* Done, reset message pointer. */
1874 sc->sc_flags &= ~NCR_DROP_MSGI;
1875 sc->sc_imlen = 0;
1876 }
1877
1878
1879 /*
1880 * Send the highest priority, scheduled message
1881 */
1882 void
1883 ncr53c9x_msgout(sc)
1884 struct ncr53c9x_softc *sc;
1885 {
1886 struct ncr53c9x_tinfo *ti;
1887 struct ncr53c9x_ecb *ecb;
1888 size_t size;
1889
1890 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1891 sc->sc_msgpriq, sc->sc_prevphase));
1892
1893 /*
1894 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1895 * condition on the SCSI bus. The 53c9x chip
1896 * automatically turns off ATN before sending the
1897 * message byte. (see also the comment below in the
1898 * default case when picking out a message to send)
1899 */
1900 if (sc->sc_flags & NCR_ATN) {
1901 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1902 new:
1903 NCRCMD(sc, NCRCMD_FLUSH);
1904 /* DELAY(1); */
1905 sc->sc_msgoutq = 0;
1906 sc->sc_omlen = 0;
1907 }
1908 } else {
1909 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1910 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1911 goto new;
1912 } else {
1913 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1914 sc->sc_dev.dv_xname, __LINE__);
1915 }
1916 }
1917
1918 if (sc->sc_omlen == 0) {
1919 /* Pick up highest priority message */
1920 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1921 sc->sc_msgoutq |= sc->sc_msgout;
1922 sc->sc_msgpriq &= ~sc->sc_msgout;
1923 sc->sc_omlen = 1; /* "Default" message len */
1924 switch (sc->sc_msgout) {
1925 case SEND_SDTR:
1926 ecb = sc->sc_nexus;
1927 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1928 sc->sc_omess[0] = MSG_EXTENDED;
1929 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1930 sc->sc_omess[2] = MSG_EXT_SDTR;
1931 sc->sc_omess[3] = ti->period;
1932 sc->sc_omess[4] = ti->offset;
1933 sc->sc_omlen = 5;
1934 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1935 ti->flags |= T_SYNCMODE;
1936 ncr53c9x_setsync(sc, ti);
1937 }
1938 break;
1939 case SEND_WDTR:
1940 ecb = sc->sc_nexus;
1941 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1942 sc->sc_omess[0] = MSG_EXTENDED;
1943 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1944 sc->sc_omess[2] = MSG_EXT_WDTR;
1945 sc->sc_omess[3] = ti->width;
1946 sc->sc_omlen = 4;
1947 break;
1948 case SEND_IDENTIFY:
1949 if (sc->sc_state != NCR_CONNECTED) {
1950 printf("%s at line %d: no nexus\n",
1951 sc->sc_dev.dv_xname, __LINE__);
1952 }
1953 ecb = sc->sc_nexus;
1954 sc->sc_omess[0] =
1955 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1956 break;
1957 case SEND_TAG:
1958 if (sc->sc_state != NCR_CONNECTED) {
1959 printf("%s at line %d: no nexus\n",
1960 sc->sc_dev.dv_xname, __LINE__);
1961 }
1962 ecb = sc->sc_nexus;
1963 sc->sc_omess[0] = ecb->tag[0];
1964 sc->sc_omess[1] = ecb->tag[1];
1965 sc->sc_omlen = 2;
1966 break;
1967 case SEND_DEV_RESET:
1968 sc->sc_flags |= NCR_ABORTING;
1969 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1970 ecb = sc->sc_nexus;
1971 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1972 ti->flags &= ~T_SYNCMODE;
1973 ncr53c9x_update_xfer_mode(sc,
1974 ecb->xs->xs_periph->periph_target);
1975 if ((ti->flags & T_SYNCHOFF) == 0)
1976 /* We can re-start sync negotiation */
1977 ti->flags |= T_NEGOTIATE;
1978 break;
1979 case SEND_PARITY_ERROR:
1980 sc->sc_omess[0] = MSG_PARITY_ERROR;
1981 break;
1982 case SEND_ABORT:
1983 sc->sc_flags |= NCR_ABORTING;
1984 sc->sc_omess[0] = MSG_ABORT;
1985 break;
1986 case SEND_INIT_DET_ERR:
1987 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1988 break;
1989 case SEND_REJECT:
1990 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1991 break;
1992 default:
1993 /*
1994 * We normally do not get here, since the chip
1995 * automatically turns off ATN before the last
1996 * byte of a message is sent to the target.
1997 * However, if the target rejects our (multi-byte)
1998 * message early by switching to MSG IN phase
1999 * ATN remains on, so the target may return to
2000 * MSG OUT phase. If there are no scheduled messages
2001 * left we send a NO-OP.
2002 *
2003 * XXX - Note that this leaves no useful purpose for
2004 * the NCR_ATN flag.
2005 */
2006 sc->sc_flags &= ~NCR_ATN;
2007 sc->sc_omess[0] = MSG_NOOP;
2008 break;
2009 }
2010 sc->sc_omp = sc->sc_omess;
2011 }
2012
2013 #ifdef DEBUG
2014 {
2015 int i;
2016
2017 NCR_MISC(("<msgout:"));
2018 for (i = 0; i < sc->sc_omlen; i++)
2019 NCR_MISC((" %02x", sc->sc_omess[i]));
2020 NCR_MISC(("> "));
2021 }
2022 #endif
2023 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2024 /*
2025 * XXX fifo size
2026 */
2027 ncr53c9x_flushfifo(sc);
2028 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2029 NCRCMD(sc, NCRCMD_TRANS);
2030 } else {
2031 /* (re)send the message */
2032 size = min(sc->sc_omlen, sc->sc_maxxfer);
2033 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2034 /* Program the SCSI counter */
2035 NCR_SET_COUNT(sc, size);
2036
2037 /* Load the count in and start the message-out transfer */
2038 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2039 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2040 NCRDMA_GO(sc);
2041 }
2042 }
2043
2044 /*
2045 * This is the most critical part of the driver, and has to know
2046 * how to deal with *all* error conditions and phases from the SCSI
2047 * bus. If there are no errors and the DMA was active, then call the
2048 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2049 * and we can return from here without further processing.
2050 *
2051 * Most of this needs verifying.
2052 */
2053 int
2054 ncr53c9x_intr(arg)
2055 void *arg;
2056 {
2057 struct ncr53c9x_softc *sc = arg;
2058 struct ncr53c9x_ecb *ecb;
2059 struct scsipi_periph *periph;
2060 struct ncr53c9x_tinfo *ti;
2061 size_t size;
2062 int nfifo;
2063
2064 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2065
2066 if (!NCRDMA_ISINTR(sc))
2067 return (0);
2068
2069 again:
2070 /* and what do the registers say... */
2071 ncr53c9x_readregs(sc);
2072
2073 sc->sc_intrcnt.ev_count++;
2074
2075 /*
2076 * At the moment, only a SCSI Bus Reset or Illegal
2077 * Command are classed as errors. A disconnect is a
2078 * valid condition, and we let the code check is the
2079 * "NCR_BUSFREE_OK" flag was set before declaring it
2080 * and error.
2081 *
2082 * Also, the status register tells us about "Gross
2083 * Errors" and "Parity errors". Only the Gross Error
2084 * is really bad, and the parity errors are dealt
2085 * with later
2086 *
2087 * TODO
2088 * If there are too many parity error, go to slow
2089 * cable mode ?
2090 */
2091
2092 /* SCSI Reset */
2093 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2094 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2095 NCRCMD(sc, NCRCMD_FLUSH);
2096 DELAY(1);
2097 }
2098 if (sc->sc_state != NCR_SBR) {
2099 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2100 ncr53c9x_init(sc, 0); /* Restart everything */
2101 return (1);
2102 }
2103 #if 0
2104 /*XXX*/ printf("<expected bus reset: "
2105 "[intr %x, stat %x, step %d]>\n",
2106 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2107 #endif
2108 if (sc->sc_nexus != NULL)
2109 panic("%s: nexus in reset state",
2110 sc->sc_dev.dv_xname);
2111 goto sched;
2112 }
2113
2114 ecb = sc->sc_nexus;
2115
2116 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2117 if (sc->sc_espintr & NCRINTR_ERR ||
2118 sc->sc_espstat & NCRSTAT_GE) {
2119
2120 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2121 /* Gross Error; no target ? */
2122 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2123 NCRCMD(sc, NCRCMD_FLUSH);
2124 DELAY(1);
2125 }
2126 if (sc->sc_state == NCR_CONNECTED ||
2127 sc->sc_state == NCR_SELECTING) {
2128 ecb->xs->error = XS_TIMEOUT;
2129 ncr53c9x_done(sc, ecb);
2130 }
2131 return (1);
2132 }
2133
2134 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2135 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2136 /*
2137 * Eat away "Illegal command" interrupt
2138 * on a ESP100 caused by a re-selection
2139 * while we were trying to select
2140 * another target.
2141 */
2142 #ifdef DEBUG
2143 printf("%s: ESP100 work-around activated\n",
2144 sc->sc_dev.dv_xname);
2145 #endif
2146 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2147 return (1);
2148 }
2149 /* illegal command, out of sync ? */
2150 printf("%s: illegal command: 0x%x "
2151 "(state %d, phase %x, prevphase %x)\n",
2152 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2153 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2154 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2155 NCRCMD(sc, NCRCMD_FLUSH);
2156 DELAY(1);
2157 }
2158 ncr53c9x_init(sc, 1); /* Restart everything */
2159 return (1);
2160 }
2161 }
2162 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2163
2164 /*
2165 * Call if DMA is active.
2166 *
2167 * If DMA_INTR returns true, then maybe go 'round the loop
2168 * again in case there is no more DMA queued, but a phase
2169 * change is expected.
2170 */
2171 if (NCRDMA_ISACTIVE(sc)) {
2172 int r = NCRDMA_INTR(sc);
2173 if (r == -1) {
2174 printf("%s: DMA error; resetting\n",
2175 sc->sc_dev.dv_xname);
2176 ncr53c9x_init(sc, 1);
2177 }
2178 /* If DMA active here, then go back to work... */
2179 if (NCRDMA_ISACTIVE(sc))
2180 return (1);
2181
2182 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2183 /*
2184 * DMA not completed. If we can not find a
2185 * acceptable explanation, print a diagnostic.
2186 */
2187 if (sc->sc_state == NCR_SELECTING)
2188 /*
2189 * This can happen if we are reselected
2190 * while using DMA to select a target.
2191 */
2192 /*void*/;
2193 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2194 /*
2195 * Our (multi-byte) message (eg SDTR) was
2196 * interrupted by the target to send
2197 * a MSG REJECT.
2198 * Print diagnostic if current phase
2199 * is not MESSAGE IN.
2200 */
2201 if (sc->sc_phase != MESSAGE_IN_PHASE)
2202 printf("%s: !TC on MSG OUT"
2203 " [intr %x, stat %x, step %d]"
2204 " prevphase %x, resid %lx\n",
2205 sc->sc_dev.dv_xname,
2206 sc->sc_espintr,
2207 sc->sc_espstat,
2208 sc->sc_espstep,
2209 sc->sc_prevphase,
2210 (u_long)sc->sc_omlen);
2211 } else if (sc->sc_dleft == 0) {
2212 /*
2213 * The DMA operation was started for
2214 * a DATA transfer. Print a diagnostic
2215 * if the DMA counter and TC bit
2216 * appear to be out of sync.
2217 */
2218 printf("%s: !TC on DATA XFER"
2219 " [intr %x, stat %x, step %d]"
2220 " prevphase %x, resid %x\n",
2221 sc->sc_dev.dv_xname,
2222 sc->sc_espintr,
2223 sc->sc_espstat,
2224 sc->sc_espstep,
2225 sc->sc_prevphase,
2226 ecb ? ecb->dleft : -1);
2227 }
2228 }
2229 }
2230
2231 /*
2232 * Check for less serious errors.
2233 */
2234 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2235 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2236 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2237 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2238 else
2239 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2240 }
2241
2242 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2243 sc->sc_msgify = 0;
2244 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2245 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2246 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2247 NCRCMD(sc, NCRCMD_FLUSH);
2248 /* DELAY(1); */
2249 }
2250 /*
2251 * This command must (apparently) be issued within
2252 * 250mS of a disconnect. So here you are...
2253 */
2254 NCRCMD(sc, NCRCMD_ENSEL);
2255
2256 switch (sc->sc_state) {
2257 case NCR_RESELECTED:
2258 goto sched;
2259
2260 case NCR_SELECTING:
2261 {
2262 struct ncr53c9x_linfo *li;
2263
2264 ecb->xs->error = XS_SELTIMEOUT;
2265
2266 /* Selection timeout -- discard all LUNs if empty */
2267 periph = ecb->xs->xs_periph;
2268 ti = &sc->sc_tinfo[periph->periph_target];
2269 li = LIST_FIRST(&ti->luns);
2270 while (li != NULL) {
2271 if (li->untagged == NULL && li->used == 0) {
2272 if (li->lun < NCR_NLUN)
2273 ti->lun[li->lun] = NULL;
2274 LIST_REMOVE(li, link);
2275 free(li, M_DEVBUF);
2276 /*
2277 * Restart the search at the beginning
2278 */
2279 li = LIST_FIRST(&ti->luns);
2280 continue;
2281 }
2282 li = LIST_NEXT(li, link);
2283 }
2284 goto finish;
2285 }
2286 case NCR_CONNECTED:
2287 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2288 #ifdef NCR53C9X_DEBUG
2289 if (ecb != NULL)
2290 scsipi_printaddr(ecb->xs->xs_periph);
2291 printf("sync nego not completed!\n");
2292 #endif
2293 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2294 sc->sc_flags &= ~NCR_SYNCHNEGO;
2295 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2296 }
2297
2298 /* it may be OK to disconnect */
2299 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2300 /*
2301 * Section 5.1.1 of the SCSI 2 spec
2302 * suggests issuing a REQUEST SENSE
2303 * following an unexpected disconnect.
2304 * Some devices go into a contingent
2305 * allegiance condition when
2306 * disconnecting, and this is necessary
2307 * to clean up their state.
2308 */
2309 printf("%s: unexpected disconnect; ",
2310 sc->sc_dev.dv_xname);
2311 if ((ecb->flags & ECB_SENSE) != 0) {
2312 printf("resetting\n");
2313 goto reset;
2314 }
2315 printf("sending REQUEST SENSE\n");
2316 callout_stop(&ecb->xs->xs_callout);
2317 ncr53c9x_sense(sc, ecb);
2318 goto out;
2319 }
2320
2321 ecb->xs->error = XS_TIMEOUT;
2322 goto finish;
2323
2324 case NCR_DISCONNECT:
2325 sc->sc_nexus = NULL;
2326 goto sched;
2327
2328 case NCR_CMDCOMPLETE:
2329 goto finish;
2330 }
2331 }
2332
2333 switch (sc->sc_state) {
2334
2335 case NCR_SBR:
2336 printf("%s: waiting for SCSI Bus Reset to happen\n",
2337 sc->sc_dev.dv_xname);
2338 return (1);
2339
2340 case NCR_RESELECTED:
2341 /*
2342 * we must be continuing a message ?
2343 */
2344 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2345 printf("%s: target didn't identify\n",
2346 sc->sc_dev.dv_xname);
2347 ncr53c9x_init(sc, 1);
2348 return (1);
2349 }
2350 printf("<<RESELECT CONT'd>>");
2351 #if XXXX
2352 ncr53c9x_msgin(sc);
2353 if (sc->sc_state != NCR_CONNECTED) {
2354 /* IDENTIFY fail?! */
2355 printf("%s: identify failed\n",
2356 sc->sc_dev.dv_xname, sc->sc_state);
2357 ncr53c9x_init(sc, 1);
2358 return (1);
2359 }
2360 #endif
2361 break;
2362
2363 case NCR_IDENTIFIED:
2364 ecb = sc->sc_nexus;
2365 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2366 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2367 /*
2368 * Things are seriously fucked up.
2369 * Pull the brakes, i.e. reset
2370 */
2371 printf("%s: target didn't send tag: %d bytes in fifo\n",
2372 sc->sc_dev.dv_xname, i);
2373 /* Drain and display fifo */
2374 while (i-- > 0)
2375 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2376
2377 ncr53c9x_init(sc, 1);
2378 return (1);
2379 } else
2380 goto msgin;
2381
2382 break;
2383
2384 case NCR_IDLE:
2385 case NCR_SELECTING:
2386 ecb = sc->sc_nexus;
2387 if (sc->sc_espintr & NCRINTR_RESEL) {
2388 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2389 sc->sc_flags = 0;
2390 /*
2391 * If we're trying to select a
2392 * target ourselves, push our command
2393 * back into the ready list.
2394 */
2395 if (sc->sc_state == NCR_SELECTING) {
2396 NCR_MISC(("backoff selector "));
2397 callout_stop(&ecb->xs->xs_callout);
2398 ncr53c9x_dequeue(sc, ecb);
2399 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2400 ecb->flags |= ECB_READY;
2401 ecb = sc->sc_nexus = NULL;
2402 }
2403 sc->sc_state = NCR_RESELECTED;
2404 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2405 /*
2406 * Things are seriously fucked up.
2407 * Pull the brakes, i.e. reset
2408 */
2409 printf("%s: target didn't identify\n",
2410 sc->sc_dev.dv_xname);
2411 ncr53c9x_init(sc, 1);
2412 return (1);
2413 }
2414 /*
2415 * The C90 only inhibits FIFO writes until
2416 * reselection is complete, instead of
2417 * waiting until the interrupt status register
2418 * has been read. So, if the reselect happens
2419 * while we were entering a command bytes (for
2420 * another target) some of those bytes can
2421 * appear in the FIFO here, after the
2422 * interrupt is taken.
2423 */
2424 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2425
2426 if (nfifo < 2 ||
2427 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) {
2428 printf("%s: RESELECT: %d bytes in FIFO! "
2429 "[intr %x, stat %x, step %d, "
2430 "prevphase %x]\n",
2431 sc->sc_dev.dv_xname,
2432 nfifo,
2433 sc->sc_espintr,
2434 sc->sc_espstat,
2435 sc->sc_espstep,
2436 sc->sc_prevphase);
2437 ncr53c9x_init(sc, 1);
2438 return (1);
2439 }
2440 sc->sc_selid = sc->sc_imess[0];
2441 NCR_MISC(("selid=%02x ", sc->sc_selid));
2442
2443 /* Handle identify message */
2444 ncr53c9x_msgin(sc);
2445 if (nfifo != 2) {
2446 /*
2447 * Note: this should not happen
2448 * with `dmaselect' on.
2449 */
2450 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2451 NCRCMD(sc, NCRCMD_FLUSH);
2452 } else if (sc->sc_features & NCR_F_DMASELECT &&
2453 sc->sc_rev == NCR_VARIANT_ESP100) {
2454 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2455 }
2456
2457 if (sc->sc_state != NCR_CONNECTED &&
2458 sc->sc_state != NCR_IDENTIFIED) {
2459 /* IDENTIFY fail?! */
2460 printf("%s: identify failed, "
2461 "state %d, intr %02x\n",
2462 sc->sc_dev.dv_xname, sc->sc_state,
2463 sc->sc_espintr);
2464 ncr53c9x_init(sc, 1);
2465 return (1);
2466 }
2467 goto shortcut; /* ie. next phase expected soon */
2468 }
2469
2470 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2471 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2472 /*
2473 * Arbitration won; examine the `step' register
2474 * to determine how far the selection could progress.
2475 */
2476 ecb = sc->sc_nexus;
2477 if (ecb == NULL)
2478 panic("ncr53c9x: no nexus");
2479
2480 periph = ecb->xs->xs_periph;
2481 ti = &sc->sc_tinfo[periph->periph_target];
2482
2483 switch (sc->sc_espstep) {
2484 case 0:
2485 /*
2486 * The target did not respond with a
2487 * message out phase - probably an old
2488 * device that doesn't recognize ATN.
2489 * Clear ATN and just continue, the
2490 * target should be in the command
2491 * phase.
2492 * XXXX check for command phase?
2493 */
2494 NCRCMD(sc, NCRCMD_RSTATN);
2495 break;
2496 case 1:
2497 if ((ti->flags & T_NEGOTIATE) == 0 &&
2498 ecb->tag[0] == 0) {
2499 printf("%s: step 1 & !NEG\n",
2500 sc->sc_dev.dv_xname);
2501 goto reset;
2502 }
2503 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2504 printf("%s: !MSGOUT\n",
2505 sc->sc_dev.dv_xname);
2506 goto reset;
2507 }
2508 if (ti->flags & T_WIDE) {
2509 ncr53c9x_sched_msgout(SEND_WDTR);
2510 }
2511 if (ti->flags & T_NEGOTIATE) {
2512 /* Start negotiating */
2513 ti->period = sc->sc_minsync;
2514 ti->offset = 15;
2515 sc->sc_flags |= NCR_SYNCHNEGO;
2516 if (ecb->tag[0])
2517 ncr53c9x_sched_msgout(
2518 SEND_TAG|SEND_SDTR);
2519 else
2520 ncr53c9x_sched_msgout(
2521 SEND_SDTR);
2522 } else {
2523 /* Could not do ATN3 so send TAG */
2524 ncr53c9x_sched_msgout(SEND_TAG);
2525 }
2526 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2527 break;
2528 case 3:
2529 /*
2530 * Grr, this is supposed to mean
2531 * "target left command phase prematurely".
2532 * It seems to happen regularly when
2533 * sync mode is on.
2534 * Look at FIFO to see if command went out.
2535 * (Timing problems?)
2536 */
2537 if (sc->sc_features & NCR_F_DMASELECT) {
2538 if (sc->sc_cmdlen == 0)
2539 /* Hope for the best.. */
2540 break;
2541 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2542 & NCRFIFO_FF) == 0) {
2543 /* Hope for the best.. */
2544 break;
2545 }
2546 printf("(%s:%d:%d): selection failed;"
2547 " %d left in FIFO "
2548 "[intr %x, stat %x, step %d]\n",
2549 sc->sc_dev.dv_xname,
2550 periph->periph_target,
2551 periph->periph_lun,
2552 NCR_READ_REG(sc, NCR_FFLAG)
2553 & NCRFIFO_FF,
2554 sc->sc_espintr, sc->sc_espstat,
2555 sc->sc_espstep);
2556 NCRCMD(sc, NCRCMD_FLUSH);
2557 ncr53c9x_sched_msgout(SEND_ABORT);
2558 return (1);
2559 case 2:
2560 /* Select stuck at Command Phase */
2561 NCRCMD(sc, NCRCMD_FLUSH);
2562 break;
2563 case 4:
2564 if (sc->sc_features & NCR_F_DMASELECT &&
2565 sc->sc_cmdlen != 0)
2566 printf("(%s:%d:%d): select; "
2567 "%lu left in DMA buffer "
2568 "[intr %x, stat %x, step %d]\n",
2569 sc->sc_dev.dv_xname,
2570 periph->periph_target,
2571 periph->periph_lun,
2572 (u_long)sc->sc_cmdlen,
2573 sc->sc_espintr,
2574 sc->sc_espstat,
2575 sc->sc_espstep);
2576 /* So far, everything went fine */
2577 break;
2578 }
2579
2580 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2581 /* Do an implicit RESTORE POINTERS. */
2582 sc->sc_dp = ecb->daddr;
2583 sc->sc_dleft = ecb->dleft;
2584 sc->sc_state = NCR_CONNECTED;
2585 break;
2586
2587 } else {
2588
2589 printf("%s: unexpected status after select"
2590 ": [intr %x, stat %x, step %x]\n",
2591 sc->sc_dev.dv_xname,
2592 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2593 NCRCMD(sc, NCRCMD_FLUSH);
2594 DELAY(1);
2595 goto reset;
2596 }
2597 if (sc->sc_state == NCR_IDLE) {
2598 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2599 return (0);
2600 }
2601 break;
2602
2603 case NCR_CONNECTED:
2604 if ((sc->sc_flags & NCR_ICCS) != 0) {
2605 /* "Initiate Command Complete Steps" in progress */
2606 u_char msg;
2607
2608 sc->sc_flags &= ~NCR_ICCS;
2609
2610 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2611 printf("%s: ICCS: "
2612 ": [intr %x, stat %x, step %x]\n",
2613 sc->sc_dev.dv_xname,
2614 sc->sc_espintr, sc->sc_espstat,
2615 sc->sc_espstep);
2616 }
2617 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2618 if (sc->sc_imlen < 2)
2619 printf("%s: can't get status, only %d bytes\n",
2620 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2621 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2622 msg = sc->sc_imess[sc->sc_imlen - 1];
2623 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2624 if (msg == MSG_CMDCOMPLETE) {
2625 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2626 ? 0 : sc->sc_dleft;
2627 if ((ecb->flags & ECB_SENSE) == 0)
2628 ecb->xs->resid = ecb->dleft;
2629 sc->sc_state = NCR_CMDCOMPLETE;
2630 } else
2631 printf("%s: STATUS_PHASE: msg %d\n",
2632 sc->sc_dev.dv_xname, msg);
2633 sc->sc_imlen = 0;
2634 NCRCMD(sc, NCRCMD_MSGOK);
2635 goto shortcut; /* ie. wait for disconnect */
2636 }
2637 break;
2638
2639 default:
2640 /* Don't panic: reset. */
2641 printf("%s: invalid state: %d",
2642 sc->sc_dev.dv_xname, sc->sc_state);
2643 ncr53c9x_scsi_reset(sc);
2644 goto out;
2645 #if 0
2646 panic("%s: invalid state: %d",
2647 sc->sc_dev.dv_xname, sc->sc_state);
2648 #endif
2649 break;
2650 }
2651
2652 /*
2653 * Driver is now in state NCR_CONNECTED, i.e. we
2654 * have a current command working the SCSI bus.
2655 */
2656 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2657 panic("ncr53c9x: no nexus");
2658 }
2659
2660 switch (sc->sc_phase) {
2661 case MESSAGE_OUT_PHASE:
2662 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2663 ncr53c9x_msgout(sc);
2664 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2665 break;
2666
2667 case MESSAGE_IN_PHASE:
2668 msgin:
2669 NCR_PHASE(("MESSAGE_IN_PHASE "));
2670 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2671 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2672 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
2673 NCRCMD(sc, NCRCMD_FLUSH);
2674 }
2675 sc->sc_flags |= NCR_WAITI;
2676 NCRCMD(sc, NCRCMD_TRANS);
2677 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2678 if ((sc->sc_flags & NCR_WAITI) == 0) {
2679 printf("%s: MSGIN: unexpected FC bit: "
2680 "[intr %x, stat %x, step %x]\n",
2681 sc->sc_dev.dv_xname,
2682 sc->sc_espintr, sc->sc_espstat,
2683 sc->sc_espstep);
2684 }
2685 sc->sc_flags &= ~NCR_WAITI;
2686 ncr53c9x_rdfifo(sc,
2687 (sc->sc_prevphase == sc->sc_phase) ?
2688 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2689 ncr53c9x_msgin(sc);
2690 } else {
2691 printf("%s: MSGIN: weird bits: "
2692 "[intr %x, stat %x, step %x]\n",
2693 sc->sc_dev.dv_xname,
2694 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2695 }
2696 sc->sc_prevphase = MESSAGE_IN_PHASE;
2697 goto shortcut; /* i.e. expect data to be ready */
2698 break;
2699
2700 case COMMAND_PHASE:
2701 /*
2702 * Send the command block. Normally we don't see this
2703 * phase because the SEL_ATN command takes care of
2704 * all this. However, we end up here if either the
2705 * target or we wanted to exchange some more messages
2706 * first (e.g. to start negotiations).
2707 */
2708
2709 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2710 ecb->cmd.cmd.opcode, ecb->clen));
2711 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2712 NCRCMD(sc, NCRCMD_FLUSH);
2713 /* DELAY(1);*/
2714 }
2715 if (sc->sc_features & NCR_F_DMASELECT) {
2716 size_t size;
2717 /* setup DMA transfer for command */
2718 size = ecb->clen;
2719 sc->sc_cmdlen = size;
2720 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2721 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2722 0, &size);
2723 /* Program the SCSI counter */
2724 NCR_SET_COUNT(sc, size);
2725
2726 /* load the count in */
2727 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2728
2729 /* start the command transfer */
2730 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2731 NCRDMA_GO(sc);
2732 } else {
2733 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2734 NCRCMD(sc, NCRCMD_TRANS);
2735 }
2736 sc->sc_prevphase = COMMAND_PHASE;
2737 break;
2738
2739 case DATA_OUT_PHASE:
2740 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2741 NCRCMD(sc, NCRCMD_FLUSH);
2742 size = min(sc->sc_dleft, sc->sc_maxxfer);
2743 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2744 sc->sc_prevphase = DATA_OUT_PHASE;
2745 goto setup_xfer;
2746
2747 case DATA_IN_PHASE:
2748 NCR_PHASE(("DATA_IN_PHASE "));
2749 if (sc->sc_rev == NCR_VARIANT_ESP100)
2750 NCRCMD(sc, NCRCMD_FLUSH);
2751 size = min(sc->sc_dleft, sc->sc_maxxfer);
2752 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2753 sc->sc_prevphase = DATA_IN_PHASE;
2754 setup_xfer:
2755 /* Target returned to data phase: wipe "done" memory */
2756 ecb->flags &= ~ECB_TENTATIVE_DONE;
2757
2758 /* Program the SCSI counter */
2759 NCR_SET_COUNT(sc, size);
2760
2761 /* load the count in */
2762 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2763
2764 /*
2765 * Note that if `size' is 0, we've already transceived
2766 * all the bytes we want but we're still in DATA PHASE.
2767 * Apparently, the device needs padding. Also, a
2768 * transfer size of 0 means "maximum" to the chip
2769 * DMA logic.
2770 */
2771 NCRCMD(sc,
2772 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2773 NCRDMA_GO(sc);
2774 return (1);
2775
2776 case STATUS_PHASE:
2777 NCR_PHASE(("STATUS_PHASE "));
2778 sc->sc_flags |= NCR_ICCS;
2779 NCRCMD(sc, NCRCMD_ICCS);
2780 sc->sc_prevphase = STATUS_PHASE;
2781 goto shortcut; /* i.e. expect status results soon */
2782 break;
2783
2784 case INVALID_PHASE:
2785 break;
2786
2787 default:
2788 printf("%s: unexpected bus phase; resetting\n",
2789 sc->sc_dev.dv_xname);
2790 goto reset;
2791 }
2792
2793 out:
2794 return (1);
2795
2796 reset:
2797 ncr53c9x_init(sc, 1);
2798 goto out;
2799
2800 finish:
2801 ncr53c9x_done(sc, ecb);
2802 goto out;
2803
2804 sched:
2805 sc->sc_state = NCR_IDLE;
2806 ncr53c9x_sched(sc);
2807 goto out;
2808
2809 shortcut:
2810 /*
2811 * The idea is that many of the SCSI operations take very little
2812 * time, and going away and getting interrupted is too high an
2813 * overhead to pay. For example, selecting, sending a message
2814 * and command and then doing some work can be done in one "pass".
2815 *
2816 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2817 * at 40MHz. This needs testing.
2818 */
2819 {
2820 struct timeval wait, cur;
2821
2822 microtime(&wait);
2823 wait.tv_usec += 50 / sc->sc_freq;
2824 if (wait.tv_usec > 1000000) {
2825 wait.tv_sec++;
2826 wait.tv_usec -= 1000000;
2827 }
2828 do {
2829 if (NCRDMA_ISINTR(sc))
2830 goto again;
2831 microtime(&cur);
2832 } while (cur.tv_sec <= wait.tv_sec &&
2833 cur.tv_usec <= wait.tv_usec);
2834 }
2835 goto out;
2836 }
2837
2838 void
2839 ncr53c9x_abort(sc, ecb)
2840 struct ncr53c9x_softc *sc;
2841 struct ncr53c9x_ecb *ecb;
2842 {
2843
2844 /* 2 secs for the abort */
2845 ecb->timeout = NCR_ABORT_TIMEOUT;
2846 ecb->flags |= ECB_ABORT;
2847
2848 if (ecb == sc->sc_nexus) {
2849 int timeout;
2850
2851 /*
2852 * If we're still selecting, the message will be scheduled
2853 * after selection is complete.
2854 */
2855 if (sc->sc_state == NCR_CONNECTED)
2856 ncr53c9x_sched_msgout(SEND_ABORT);
2857
2858 /*
2859 * Reschedule timeout.
2860 */
2861 timeout = ecb->timeout;
2862 if (hz > 100 && timeout > 1000)
2863 timeout = (timeout / 1000) * hz;
2864 else
2865 timeout = (timeout * hz) / 1000;
2866 callout_reset(&ecb->xs->xs_callout, timeout,
2867 ncr53c9x_timeout, ecb);
2868 } else {
2869 /*
2870 * Just leave the command where it is.
2871 * XXX - what choice do we have but to reset the SCSI
2872 * eventually?
2873 */
2874 if (sc->sc_state == NCR_IDLE)
2875 ncr53c9x_sched(sc);
2876 }
2877 }
2878
2879 void
2880 ncr53c9x_timeout(arg)
2881 void *arg;
2882 {
2883 struct ncr53c9x_ecb *ecb = arg;
2884 struct scsipi_xfer *xs = ecb->xs;
2885 struct scsipi_periph *periph = xs->xs_periph;
2886 struct ncr53c9x_softc *sc =
2887 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2888 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2889 int s;
2890
2891 scsipi_printaddr(periph);
2892 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2893 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2894 "msg(q %x,o %x) %s>",
2895 sc->sc_dev.dv_xname,
2896 ecb, ecb->flags, ecb->dleft, ecb->stat,
2897 sc->sc_state, sc->sc_nexus,
2898 NCR_READ_REG(sc, NCR_STAT),
2899 sc->sc_phase, sc->sc_prevphase,
2900 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2901 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2902 #if NCR53C9X_DEBUG > 1
2903 printf("TRACE: %s.", ecb->trace);
2904 #endif
2905
2906 s = splbio();
2907
2908 if (ecb->flags & ECB_ABORT) {
2909 /* abort timed out */
2910 printf(" AGAIN\n");
2911
2912 ncr53c9x_init(sc, 1);
2913 } else {
2914 /* abort the operation that has timed out */
2915 printf("\n");
2916 xs->error = XS_TIMEOUT;
2917 ncr53c9x_abort(sc, ecb);
2918
2919 /* Disable sync mode if stuck in a data phase */
2920 if (ecb == sc->sc_nexus &&
2921 (ti->flags & T_SYNCMODE) != 0 &&
2922 (sc->sc_phase & (MSGI|CDI)) == 0) {
2923 /* XXX ASYNC CALLBACK! */
2924 scsipi_printaddr(periph);
2925 printf("sync negotiation disabled\n");
2926 sc->sc_cfflags |= (1 << (periph->periph_target + 8));
2927 ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2928 }
2929 }
2930
2931 splx(s);
2932 }
2933
2934 void
2935 ncr53c9x_watch(arg)
2936 void *arg;
2937 {
2938 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2939 struct ncr53c9x_tinfo *ti;
2940 struct ncr53c9x_linfo *li;
2941 int t, s;
2942 /* Delete any structures that have not been used in 10min. */
2943 time_t old = time.tv_sec - (10 * 60);
2944
2945 s = splbio();
2946 for (t = 0; t < NCR_NTARG; t++) {
2947 ti = &sc->sc_tinfo[t];
2948 li = LIST_FIRST(&ti->luns);
2949 while (li) {
2950 if (li->last_used < old &&
2951 li->untagged == NULL &&
2952 li->used == 0) {
2953 if (li->lun < NCR_NLUN)
2954 ti->lun[li->lun] = NULL;
2955 LIST_REMOVE(li, link);
2956 free(li, M_DEVBUF);
2957 /* Restart the search at the beginning */
2958 li = LIST_FIRST(&ti->luns);
2959 continue;
2960 }
2961 li = LIST_NEXT(li, link);
2962 }
2963 }
2964 splx(s);
2965 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2966 }
2967
2968