ncr53c9x.c revision 1.85
1 /* $NetBSD: ncr53c9x.c,v 1.85 2001/11/04 12:05:42 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/types.h> 80 #include <sys/param.h> 81 #include <sys/systm.h> 82 #include <sys/callout.h> 83 #include <sys/kernel.h> 84 #include <sys/errno.h> 85 #include <sys/ioctl.h> 86 #include <sys/device.h> 87 #include <sys/buf.h> 88 #include <sys/malloc.h> 89 #include <sys/proc.h> 90 #include <sys/queue.h> 91 #include <sys/pool.h> 92 #include <sys/scsiio.h> 93 94 #include <dev/scsipi/scsi_all.h> 95 #include <dev/scsipi/scsipi_all.h> 96 #include <dev/scsipi/scsiconf.h> 97 #include <dev/scsipi/scsi_message.h> 98 99 #include <dev/ic/ncr53c9xreg.h> 100 #include <dev/ic/ncr53c9xvar.h> 101 102 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 103 #ifdef DEBUG 104 int ncr53c9x_notag = 0; 105 #endif 106 107 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 108 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 109 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 110 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 111 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 112 struct scsipi_xfer *, int); 113 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 114 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 115 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 116 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 117 /*static*/ void ncr53c9x_timeout(void *arg); 118 /*static*/ void ncr53c9x_watch(void *arg); 119 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 120 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 121 struct ncr53c9x_ecb *); 122 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 123 caddr_t, int, struct proc *); 124 125 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 126 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 127 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 128 129 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 130 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 131 struct ncr53c9x_tinfo *); 132 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 133 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 134 int64_t lun); 135 136 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 137 138 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 139 #define NCR_RDFIFO_START 0 140 #define NCR_RDFIFO_CONTINUE 1 141 142 143 #define NCR_SET_COUNT(sc, size) do { \ 144 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 145 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 146 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 147 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 148 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 149 } \ 150 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 151 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 152 } \ 153 } while (0) 154 155 static int ecb_pool_initialized = 0; 156 static struct pool ecb_pool; 157 158 /* 159 * Names for the NCR53c9x variants, correspnding to the variant tags 160 * in ncr53c9xvar.h. 161 */ 162 static const char *ncr53c9x_variant_names[] = { 163 "ESP100", 164 "ESP100A", 165 "ESP200", 166 "NCR53C94", 167 "NCR53C96", 168 "ESP406", 169 "FAS408", 170 "FAS216", 171 "AM53C974", 172 "FAS366/HME", 173 }; 174 175 /* 176 * Search linked list for LUN info by LUN id. 177 */ 178 static struct ncr53c9x_linfo * 179 ncr53c9x_lunsearch(ti, lun) 180 struct ncr53c9x_tinfo *ti; 181 int64_t lun; 182 { 183 struct ncr53c9x_linfo *li; 184 LIST_FOREACH(li, &ti->luns, link) 185 if (li->lun == lun) 186 return (li); 187 return (NULL); 188 } 189 190 /* 191 * Attach this instance, and then all the sub-devices 192 */ 193 void 194 ncr53c9x_attach(sc) 195 struct ncr53c9x_softc *sc; 196 { 197 struct scsipi_adapter *adapt = &sc->sc_adapter; 198 struct scsipi_channel *chan = &sc->sc_channel; 199 200 callout_init(&sc->sc_watchdog); 201 /* 202 * Allocate SCSI message buffers. 203 * Front-ends can override allocation to avoid alignment 204 * handling in the DMA engines. Note that that ncr53c9x_msgout() 205 * can request a 1 byte DMA transfer. 206 */ 207 if (sc->sc_omess == NULL) 208 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 209 210 if (sc->sc_imess == NULL) 211 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 212 213 if (sc->sc_omess == NULL || sc->sc_imess == NULL) { 214 printf("out of memory\n"); 215 return; 216 } 217 218 /* 219 * Note, the front-end has set us up to print the chip variation. 220 */ 221 if (sc->sc_rev >= NCR_VARIANT_MAX) { 222 printf("\n%s: unknown variant %d, devices not attached\n", 223 sc->sc_dev.dv_xname, sc->sc_rev); 224 return; 225 } 226 227 printf(": %s, %dMHz, SCSI ID %d\n", 228 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 229 230 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 231 232 /* The value *must not* be == 1. Make it 2 */ 233 if (sc->sc_ccf == 1) 234 sc->sc_ccf = 2; 235 236 /* 237 * The recommended timeout is 250ms. This register is loaded 238 * with a value calculated as follows, from the docs: 239 * 240 * (timout period) x (CLK frequency) 241 * reg = ------------------------------------- 242 * 8192 x (Clock Conversion Factor) 243 * 244 * Since CCF has a linear relation to CLK, this generally computes 245 * to the constant of 153. 246 */ 247 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 248 249 /* CCF register only has 3 bits; 0 is actually 8 */ 250 sc->sc_ccf &= 7; 251 252 /* 253 * Fill in the scsipi_adapter. 254 */ 255 adapt->adapt_dev = &sc->sc_dev; 256 adapt->adapt_nchannels = 1; 257 adapt->adapt_openings = 256; 258 adapt->adapt_max_periph = 256; 259 adapt->adapt_ioctl = ncr53c9x_ioctl; 260 /* adapt_request initialized by front-end */ 261 /* adapt_minphys initialized by front-end */ 262 263 /* 264 * Fill in the scsipi_channel. 265 */ 266 memset(chan, 0, sizeof(*chan)); 267 chan->chan_adapter = adapt; 268 chan->chan_bustype = &scsi_bustype; 269 chan->chan_channel = 0; 270 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */ 271 chan->chan_nluns = 8; 272 chan->chan_id = sc->sc_id; 273 274 /* 275 * Add reference to adapter so that we drop the reference after 276 * config_found() to make sure the adatper is disabled. 277 */ 278 if (scsipi_adapter_addref(adapt) != 0) { 279 printf("%s: unable to enable controller\n", 280 sc->sc_dev.dv_xname); 281 return; 282 } 283 284 /* Reset state & bus */ 285 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags; 286 sc->sc_state = 0; 287 ncr53c9x_init(sc, 1); 288 289 /* 290 * Now try to attach all the sub-devices 291 */ 292 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 293 294 scsipi_adapter_delref(adapt); 295 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc); 296 } 297 298 int 299 ncr53c9x_detach(sc, flags) 300 struct ncr53c9x_softc *sc; 301 int flags; 302 { 303 int error; 304 305 if (sc->sc_child) { 306 error = config_detach(sc->sc_child, flags); 307 if (error) 308 return (error); 309 } 310 311 free(sc->sc_imess, M_DEVBUF); 312 free(sc->sc_omess, M_DEVBUF); 313 314 return (0); 315 } 316 317 /* 318 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 319 * only this controller, but kills any on-going commands, and also stops 320 * and resets the DMA. 321 * 322 * After reset, registers are loaded with the defaults from the attach 323 * routine above. 324 */ 325 void 326 ncr53c9x_reset(sc) 327 struct ncr53c9x_softc *sc; 328 { 329 330 /* reset DMA first */ 331 NCRDMA_RESET(sc); 332 333 /* reset SCSI chip */ 334 NCRCMD(sc, NCRCMD_RSTCHIP); 335 NCRCMD(sc, NCRCMD_NOP); 336 DELAY(500); 337 338 /* do these backwards, and fall through */ 339 switch (sc->sc_rev) { 340 case NCR_VARIANT_ESP406: 341 case NCR_VARIANT_FAS408: 342 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 343 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 344 case NCR_VARIANT_AM53C974: 345 case NCR_VARIANT_FAS216: 346 case NCR_VARIANT_NCR53C94: 347 case NCR_VARIANT_NCR53C96: 348 case NCR_VARIANT_ESP200: 349 sc->sc_features |= NCR_F_HASCFG3; 350 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 351 case NCR_VARIANT_ESP100A: 352 sc->sc_features |= NCR_F_SELATN3; 353 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 354 case NCR_VARIANT_ESP100: 355 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 356 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 357 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 358 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 359 break; 360 361 case NCR_VARIANT_FAS366: 362 sc->sc_features |= 363 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 364 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 365 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 366 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 367 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 368 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 369 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 370 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 371 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 372 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 373 break; 374 375 default: 376 printf("%s: unknown revision code, assuming ESP100\n", 377 sc->sc_dev.dv_xname); 378 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 379 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 380 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 381 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 382 } 383 384 if (sc->sc_rev == NCR_VARIANT_AM53C974) 385 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 386 387 #if 0 388 printf("%s: ncr53c9x_reset: revision %d\n", 389 sc->sc_dev.dv_xname, sc->sc_rev); 390 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 391 "ccf 0x%x, timeout 0x%x\n", 392 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 393 sc->sc_ccf, sc->sc_timeout); 394 #endif 395 } 396 397 /* 398 * Reset the SCSI bus, but not the chip 399 */ 400 void 401 ncr53c9x_scsi_reset(sc) 402 struct ncr53c9x_softc *sc; 403 { 404 405 (*sc->sc_glue->gl_dma_stop)(sc); 406 407 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 408 NCRCMD(sc, NCRCMD_RSTSCSI); 409 } 410 411 /* 412 * Initialize ncr53c9x state machine 413 */ 414 void 415 ncr53c9x_init(sc, doreset) 416 struct ncr53c9x_softc *sc; 417 int doreset; 418 { 419 struct ncr53c9x_ecb *ecb; 420 struct ncr53c9x_linfo *li; 421 int i, r; 422 423 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 424 425 if (!ecb_pool_initialized) { 426 /* All instances share this pool */ 427 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 428 "ncr53c9x_ecb", 0, NULL, NULL, 0); 429 ecb_pool_initialized = 1; 430 } 431 432 if (sc->sc_state == 0) { 433 /* First time through; initialize. */ 434 435 TAILQ_INIT(&sc->ready_list); 436 sc->sc_nexus = NULL; 437 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 438 for (r = 0; r < NCR_NTARG; r++) { 439 LIST_INIT(&sc->sc_tinfo[r].luns); 440 } 441 } else { 442 /* Cancel any active commands. */ 443 sc->sc_state = NCR_CLEANING; 444 sc->sc_msgify = 0; 445 if ((ecb = sc->sc_nexus) != NULL) { 446 ecb->xs->error = XS_TIMEOUT; 447 ncr53c9x_done(sc, ecb); 448 } 449 /* Cancel outstanding disconnected commands on each LUN */ 450 for (r = 0; r < 8; r++) { 451 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 452 if ((ecb = li->untagged) != NULL) { 453 li->untagged = NULL; 454 /* 455 * XXXXXXX 456 * 457 * Should we terminate a command 458 * that never reached the disk? 459 */ 460 li->busy = 0; 461 ecb->xs->error = XS_TIMEOUT; 462 ncr53c9x_done(sc, ecb); 463 } 464 for (i = 0; i < 256; i++) 465 if ((ecb = li->queued[i])) { 466 li->queued[i] = NULL; 467 ecb->xs->error = XS_TIMEOUT; 468 ncr53c9x_done(sc, ecb); 469 } 470 li->used = 0; 471 } 472 } 473 } 474 475 /* 476 * reset the chip to a known state 477 */ 478 ncr53c9x_reset(sc); 479 480 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 481 for (r = 0; r < 8; r++) { 482 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 483 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 484 485 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8)))) 486 ? 0 : T_SYNCHOFF) | 487 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) | 488 T_NEED_TO_RESET; 489 #ifdef DEBUG 490 if (ncr53c9x_notag) 491 ti->flags &= ~T_TAG; 492 #endif 493 ti->period = sc->sc_minsync; 494 ti->offset = 0; 495 ti->cfg3 = 0; 496 } 497 498 if (doreset) { 499 sc->sc_state = NCR_SBR; 500 NCRCMD(sc, NCRCMD_RSTSCSI); 501 } else { 502 sc->sc_state = NCR_IDLE; 503 ncr53c9x_sched(sc); 504 } 505 } 506 507 /* 508 * Read the NCR registers, and save their contents for later use. 509 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 510 * NCR_INTR - so make sure it is the last read. 511 * 512 * I think that (from reading the docs) most bits in these registers 513 * only make sense when he DMA CSR has an interrupt showing. Call only 514 * if an interrupt is pending. 515 */ 516 __inline__ void 517 ncr53c9x_readregs(sc) 518 struct ncr53c9x_softc *sc; 519 { 520 521 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 522 /* Only the stepo bits are of interest */ 523 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 524 525 if (sc->sc_rev == NCR_VARIANT_FAS366) 526 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 527 528 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 529 530 if (sc->sc_glue->gl_clear_latched_intr != NULL) 531 (*sc->sc_glue->gl_clear_latched_intr)(sc); 532 533 /* 534 * Determine the SCSI bus phase, return either a real SCSI bus phase 535 * or some pseudo phase we use to detect certain exceptions. 536 */ 537 538 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 539 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 540 541 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 542 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 543 } 544 545 /* 546 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 547 */ 548 static inline int 549 ncr53c9x_stp2cpb(sc, period) 550 struct ncr53c9x_softc *sc; 551 int period; 552 { 553 int v; 554 v = (sc->sc_freq * period) / 250; 555 if (ncr53c9x_cpb2stp(sc, v) < period) 556 /* Correct round-down error */ 557 v++; 558 return (v); 559 } 560 561 static inline void 562 ncr53c9x_setsync(sc, ti) 563 struct ncr53c9x_softc *sc; 564 struct ncr53c9x_tinfo *ti; 565 { 566 u_char syncoff, synctp; 567 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 568 569 if (ti->flags & T_SYNCMODE) { 570 syncoff = ti->offset; 571 synctp = ncr53c9x_stp2cpb(sc, ti->period); 572 if (sc->sc_features & NCR_F_FASTSCSI) { 573 /* 574 * If the period is 200ns or less (ti->period <= 50), 575 * put the chip in Fast SCSI mode. 576 */ 577 if (ti->period <= 50) 578 /* 579 * There are (at least) 4 variations of the 580 * configuration 3 register. The drive attach 581 * routine sets the appropriate bit to put the 582 * chip into Fast SCSI mode so that it doesn't 583 * have to be figured out here each time. 584 */ 585 cfg3 |= sc->sc_cfg3_fscsi; 586 } 587 588 /* 589 * Am53c974 requires different SYNCTP values when the 590 * FSCSI bit is off. 591 */ 592 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 593 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 594 synctp--; 595 } else { 596 syncoff = 0; 597 synctp = 0; 598 } 599 600 if (sc->sc_features & NCR_F_HASCFG3) 601 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 602 603 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 604 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 605 } 606 607 /* 608 * Send a command to a target, set the driver state to NCR_SELECTING 609 * and let the caller take care of the rest. 610 * 611 * Keeping this as a function allows me to say that this may be done 612 * by DMA instead of programmed I/O soon. 613 */ 614 void 615 ncr53c9x_select(sc, ecb) 616 struct ncr53c9x_softc *sc; 617 struct ncr53c9x_ecb *ecb; 618 { 619 struct scsipi_periph *periph = ecb->xs->xs_periph; 620 int target = periph->periph_target; 621 int lun = periph->periph_lun; 622 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 623 int tiflags = ti->flags; 624 u_char *cmd; 625 int clen; 626 int selatn3, selatns; 627 size_t dmasize; 628 629 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 630 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 631 632 sc->sc_state = NCR_SELECTING; 633 /* 634 * Schedule the timeout now, the first time we will go away 635 * expecting to come back due to an interrupt, because it is 636 * always possible that the interrupt may never happen. 637 */ 638 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 639 int timeout = ecb->timeout; 640 641 if (timeout > 1000000) 642 timeout = (timeout / 1000) * hz; 643 else 644 timeout = (timeout * hz) / 1000; 645 646 callout_reset(&ecb->xs->xs_callout, timeout, 647 ncr53c9x_timeout, ecb); 648 } 649 650 /* 651 * The docs say the target register is never reset, and I 652 * can't think of a better place to set it 653 */ 654 if (sc->sc_rev == NCR_VARIANT_FAS366) { 655 NCRCMD(sc, NCRCMD_FLUSH); 656 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 657 } else { 658 NCR_WRITE_REG(sc, NCR_SELID, target); 659 } 660 ncr53c9x_setsync(sc, ti); 661 662 if ((ecb->flags & ECB_SENSE) != 0) { 663 /* 664 * For REQUEST SENSE, we should not send an IDENTIFY or 665 * otherwise mangle the target. There should be no MESSAGE IN 666 * phase. 667 */ 668 if (sc->sc_features & NCR_F_DMASELECT) { 669 /* setup DMA transfer for command */ 670 dmasize = clen = ecb->clen; 671 sc->sc_cmdlen = clen; 672 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 673 674 /* Program the SCSI counter */ 675 NCR_SET_COUNT(sc, dmasize); 676 677 if (sc->sc_rev != NCR_VARIANT_FAS366) 678 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 679 680 /* And get the targets attention */ 681 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 682 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 683 &dmasize); 684 NCRDMA_GO(sc); 685 } else { 686 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 687 NCRCMD(sc, NCRCMD_SELNATN); 688 } 689 return; 690 } 691 692 selatn3 = selatns = 0; 693 if (ecb->tag[0] != 0) { 694 if (sc->sc_features & NCR_F_SELATN3) 695 /* use SELATN3 to send tag messages */ 696 selatn3 = 1; 697 else 698 /* We don't have SELATN3; use SELATNS to send tags */ 699 selatns = 1; 700 } 701 702 if (ti->flags & T_NEGOTIATE) { 703 /* We have to use SELATNS to send sync/wide messages */ 704 selatn3 = 0; 705 selatns = 1; 706 } 707 708 cmd = (u_char *)&ecb->cmd.cmd; 709 710 if (selatn3) { 711 /* We'll use tags with SELATN3 */ 712 clen = ecb->clen + 3; 713 cmd -= 3; 714 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 715 cmd[1] = ecb->tag[0]; /* msg[1] */ 716 cmd[2] = ecb->tag[1]; /* msg[2] */ 717 } else { 718 /* We don't have tags, or will send messages with SELATNS */ 719 clen = ecb->clen + 1; 720 cmd -= 1; 721 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 722 } 723 724 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 725 726 /* setup DMA transfer for command */ 727 dmasize = clen; 728 sc->sc_cmdlen = clen; 729 sc->sc_cmdp = cmd; 730 731 /* Program the SCSI counter */ 732 NCR_SET_COUNT(sc, dmasize); 733 734 /* load the count in */ 735 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 736 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 737 738 /* And get the targets attention */ 739 if (selatn3) { 740 sc->sc_msgout = SEND_TAG; 741 sc->sc_flags |= NCR_ATN; 742 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 743 } else 744 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 745 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 746 NCRDMA_GO(sc); 747 return; 748 } 749 750 /* 751 * Who am I. This is where we tell the target that we are 752 * happy for it to disconnect etc. 753 */ 754 755 /* Now get the command into the FIFO */ 756 ncr53c9x_wrfifo(sc, cmd, clen); 757 758 /* And get the targets attention */ 759 if (selatns) { 760 NCR_MISC(("SELATNS \n")); 761 /* Arbitrate, select and stop after IDENTIFY message */ 762 NCRCMD(sc, NCRCMD_SELATNS); 763 } else if (selatn3) { 764 sc->sc_msgout = SEND_TAG; 765 sc->sc_flags |= NCR_ATN; 766 NCRCMD(sc, NCRCMD_SELATN3); 767 } else 768 NCRCMD(sc, NCRCMD_SELATN); 769 } 770 771 void 772 ncr53c9x_free_ecb(sc, ecb) 773 struct ncr53c9x_softc *sc; 774 struct ncr53c9x_ecb *ecb; 775 { 776 int s; 777 778 s = splbio(); 779 ecb->flags = 0; 780 pool_put(&ecb_pool, (void *)ecb); 781 splx(s); 782 return; 783 } 784 785 struct ncr53c9x_ecb * 786 ncr53c9x_get_ecb(sc, flags) 787 struct ncr53c9x_softc *sc; 788 int flags; 789 { 790 struct ncr53c9x_ecb *ecb; 791 int s; 792 793 s = splbio(); 794 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 795 splx(s); 796 if (ecb) { 797 memset(ecb, 0, sizeof(*ecb)); 798 ecb->flags |= ECB_ALLOC; 799 } 800 return (ecb); 801 } 802 803 /* 804 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 805 */ 806 807 /* 808 * Start a SCSI-command 809 * This function is called by the higher level SCSI-driver to queue/run 810 * SCSI-commands. 811 */ 812 813 void 814 ncr53c9x_scsipi_request(chan, req, arg) 815 struct scsipi_channel *chan; 816 scsipi_adapter_req_t req; 817 void *arg; 818 { 819 struct scsipi_xfer *xs; 820 struct scsipi_periph *periph; 821 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 822 struct ncr53c9x_ecb *ecb; 823 int s, flags; 824 825 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 826 827 switch (req) { 828 case ADAPTER_REQ_RUN_XFER: 829 xs = arg; 830 periph = xs->xs_periph; 831 flags = xs->xs_control; 832 833 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 834 periph->periph_target)); 835 836 /* Get an ECB to use. */ 837 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 838 /* 839 * This should never happen as we track resources 840 * in the mid-layer. 841 */ 842 if (ecb == NULL) { 843 scsipi_printaddr(periph); 844 printf("unable to allocate ecb\n"); 845 xs->error = XS_RESOURCE_SHORTAGE; 846 scsipi_done(xs); 847 return; 848 } 849 850 /* Initialize ecb */ 851 ecb->xs = xs; 852 ecb->timeout = xs->timeout; 853 854 if (flags & XS_CTL_RESET) { 855 ecb->flags |= ECB_RESET; 856 ecb->clen = 0; 857 ecb->dleft = 0; 858 } else { 859 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 860 ecb->clen = xs->cmdlen; 861 ecb->daddr = xs->data; 862 ecb->dleft = xs->datalen; 863 } 864 ecb->stat = 0; 865 866 s = splbio(); 867 868 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 869 ecb->flags |= ECB_READY; 870 if (sc->sc_state == NCR_IDLE) 871 ncr53c9x_sched(sc); 872 873 splx(s); 874 875 if ((flags & XS_CTL_POLL) == 0) 876 return; 877 878 /* Not allowed to use interrupts, use polling instead */ 879 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 880 ncr53c9x_timeout(ecb); 881 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 882 ncr53c9x_timeout(ecb); 883 } 884 return; 885 886 case ADAPTER_REQ_GROW_RESOURCES: 887 /* XXX Not supported. */ 888 return; 889 890 case ADAPTER_REQ_SET_XFER_MODE: 891 { 892 struct ncr53c9x_tinfo *ti; 893 struct scsipi_xfer_mode *xm = arg; 894 895 ti = &sc->sc_tinfo[xm->xm_target]; 896 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 897 ti->period = 0; 898 ti->offset = 0; 899 900 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 && 901 (xm->xm_mode & PERIPH_CAP_TQING)) 902 ti->flags |= T_TAG; 903 else 904 ti->flags &= ~T_TAG; 905 906 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 907 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 908 sc->sc_dev.dv_xname, xm->xm_target)); 909 if (sc->sc_rev == NCR_VARIANT_FAS366) { 910 ti->flags |= T_WIDE; 911 ti->width = 1; 912 } 913 } 914 915 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 916 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 917 NCR_MISC(("%s: target %d: sync negotiation\n", 918 sc->sc_dev.dv_xname, xm->xm_target)); 919 ti->flags |= T_NEGOTIATE; 920 ti->period = sc->sc_minsync; 921 } 922 /* 923 * If we're not going to negotiate, send the notification 924 * now, since it won't happen later. 925 */ 926 if ((ti->flags & T_NEGOTIATE) == 0) 927 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 928 return; 929 } 930 } 931 } 932 933 void 934 ncr53c9x_update_xfer_mode(sc, target) 935 struct ncr53c9x_softc *sc; 936 int target; 937 { 938 struct scsipi_xfer_mode xm; 939 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 940 941 xm.xm_target = target; 942 xm.xm_mode = 0; 943 xm.xm_period = 0; 944 xm.xm_offset = 0; 945 946 if (ti->flags & T_SYNCMODE) { 947 xm.xm_mode |= PERIPH_CAP_SYNC; 948 xm.xm_period = ti->period; 949 xm.xm_offset = ti->offset; 950 } 951 if (ti->width) 952 xm.xm_mode |= PERIPH_CAP_WIDE16; 953 954 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 955 xm.xm_mode |= PERIPH_CAP_TQING; 956 957 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 958 } 959 960 /* 961 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 962 */ 963 int 964 ncr53c9x_poll(sc, xs, count) 965 struct ncr53c9x_softc *sc; 966 struct scsipi_xfer *xs; 967 int count; 968 { 969 970 NCR_TRACE(("[ncr53c9x_poll] ")); 971 while (count) { 972 if (NCRDMA_ISINTR(sc)) { 973 ncr53c9x_intr(sc); 974 } 975 #if alternatively 976 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 977 ncr53c9x_intr(sc); 978 #endif 979 if ((xs->xs_status & XS_STS_DONE) != 0) 980 return (0); 981 if (sc->sc_state == NCR_IDLE) { 982 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 983 ncr53c9x_sched(sc); 984 } 985 DELAY(1000); 986 count--; 987 } 988 return (1); 989 } 990 991 int 992 ncr53c9x_ioctl(chan, cmd, arg, flag, p) 993 struct scsipi_channel *chan; 994 u_long cmd; 995 caddr_t arg; 996 int flag; 997 struct proc *p; 998 { 999 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */ 1000 int s, error = 0; 1001 1002 s = splbio(); 1003 1004 switch (cmd) { 1005 default: 1006 error = ENOTTY; 1007 break; 1008 } 1009 splx(s); 1010 return (error); 1011 } 1012 1013 1014 /* 1015 * LOW LEVEL SCSI UTILITIES 1016 */ 1017 1018 /* 1019 * Schedule a scsi operation. This has now been pulled out of the interrupt 1020 * handler so that we may call it from ncr53c9x_scsipi_request and 1021 * ncr53c9x_done. This may save us an unecessary interrupt just to get 1022 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1023 */ 1024 void 1025 ncr53c9x_sched(sc) 1026 struct ncr53c9x_softc *sc; 1027 { 1028 struct ncr53c9x_ecb *ecb; 1029 struct scsipi_periph *periph; 1030 struct ncr53c9x_tinfo *ti; 1031 int lun; 1032 struct ncr53c9x_linfo *li; 1033 int s, tag; 1034 1035 NCR_TRACE(("[ncr53c9x_sched] ")); 1036 if (sc->sc_state != NCR_IDLE) 1037 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1038 1039 /* 1040 * Find first ecb in ready queue that is for a target/lunit 1041 * combinations that is not busy. 1042 */ 1043 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1044 ecb = TAILQ_NEXT(ecb, chain)) { 1045 periph = ecb->xs->xs_periph; 1046 ti = &sc->sc_tinfo[periph->periph_target]; 1047 lun = periph->periph_lun; 1048 1049 /* Select type of tag for this command */ 1050 if ((ti->flags & (T_RSELECTOFF)) != 0) 1051 tag = 0; 1052 else if ((ti->flags & (T_TAG)) == 0) 1053 tag = 0; 1054 else if ((ecb->flags & ECB_SENSE) != 0) 1055 tag = 0; 1056 else 1057 tag = ecb->xs->xs_tag_type; 1058 #if 0 1059 /* XXXX Use tags for polled commands? */ 1060 if (ecb->xs->xs_control & XS_CTL_POLL) 1061 tag = 0; 1062 #endif 1063 1064 s = splbio(); 1065 li = TINFO_LUN(ti, lun); 1066 if (li == NULL) { 1067 /* Initialize LUN info and add to list. */ 1068 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT)) 1069 == NULL) { 1070 splx(s); 1071 continue; 1072 } 1073 memset(li, 0, sizeof(*li)); 1074 li->lun = lun; 1075 1076 LIST_INSERT_HEAD(&ti->luns, li, link); 1077 if (lun < NCR_NLUN) 1078 ti->lun[lun] = li; 1079 } 1080 li->last_used = time.tv_sec; 1081 if (tag == 0) { 1082 /* Try to issue this as an un-tagged command */ 1083 if (li->untagged == NULL) 1084 li->untagged = ecb; 1085 } 1086 if (li->untagged != NULL) { 1087 tag = 0; 1088 if ((li->busy != 1) && li->used == 0) { 1089 /* We need to issue this untagged command now */ 1090 ecb = li->untagged; 1091 periph = ecb->xs->xs_periph; 1092 } else { 1093 /* Not ready yet */ 1094 splx(s); 1095 continue; 1096 } 1097 } 1098 ecb->tag[0] = tag; 1099 if (tag != 0) { 1100 li->queued[ecb->xs->xs_tag_id] = ecb; 1101 ecb->tag[1] = ecb->xs->xs_tag_id; 1102 li->used++; 1103 } 1104 splx(s); 1105 if (li->untagged != NULL && (li->busy != 1)) { 1106 li->busy = 1; 1107 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1108 ecb->flags &= ~ECB_READY; 1109 sc->sc_nexus = ecb; 1110 ncr53c9x_select(sc, ecb); 1111 break; 1112 } 1113 if (li->untagged == NULL && tag != 0) { 1114 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1115 ecb->flags &= ~ECB_READY; 1116 sc->sc_nexus = ecb; 1117 ncr53c9x_select(sc, ecb); 1118 break; 1119 } else 1120 NCR_MISC(("%d:%d busy\n", 1121 periph->periph_target, 1122 periph->periph_lun)); 1123 } 1124 } 1125 1126 void 1127 ncr53c9x_sense(sc, ecb) 1128 struct ncr53c9x_softc *sc; 1129 struct ncr53c9x_ecb *ecb; 1130 { 1131 struct scsipi_xfer *xs = ecb->xs; 1132 struct scsipi_periph *periph = xs->xs_periph; 1133 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1134 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd; 1135 struct ncr53c9x_linfo *li; 1136 int lun = periph->periph_lun; 1137 1138 NCR_MISC(("requesting sense ")); 1139 /* Next, setup a request sense command block */ 1140 memset(ss, 0, sizeof(*ss)); 1141 ss->opcode = REQUEST_SENSE; 1142 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1143 ss->length = sizeof(struct scsipi_sense_data); 1144 ecb->clen = sizeof(*ss); 1145 ecb->daddr = (char *)&xs->sense.scsi_sense; 1146 ecb->dleft = sizeof(struct scsipi_sense_data); 1147 ecb->flags |= ECB_SENSE; 1148 ecb->timeout = NCR_SENSE_TIMEOUT; 1149 ti->senses++; 1150 li = TINFO_LUN(ti, lun); 1151 if (li->busy) 1152 li->busy = 0; 1153 ncr53c9x_dequeue(sc, ecb); 1154 li->untagged = ecb; /* must be executed first to fix C/A */ 1155 li->busy = 2; 1156 if (ecb == sc->sc_nexus) { 1157 ncr53c9x_select(sc, ecb); 1158 } else { 1159 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1160 ecb->flags |= ECB_READY; 1161 if (sc->sc_state == NCR_IDLE) 1162 ncr53c9x_sched(sc); 1163 } 1164 } 1165 1166 /* 1167 * POST PROCESSING OF SCSI_CMD (usually current) 1168 */ 1169 void 1170 ncr53c9x_done(sc, ecb) 1171 struct ncr53c9x_softc *sc; 1172 struct ncr53c9x_ecb *ecb; 1173 { 1174 struct scsipi_xfer *xs = ecb->xs; 1175 struct scsipi_periph *periph = xs->xs_periph; 1176 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1177 int lun = periph->periph_lun; 1178 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1179 1180 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1181 1182 callout_stop(&ecb->xs->xs_callout); 1183 1184 /* 1185 * Now, if we've come here with no error code, i.e. we've kept the 1186 * initial XS_NOERROR, and the status code signals that we should 1187 * check sense, we'll need to set up a request sense cmd block and 1188 * push the command back into the ready queue *before* any other 1189 * commands for this target/lunit, else we lose the sense info. 1190 * We don't support chk sense conditions for the request sense cmd. 1191 */ 1192 if (xs->error == XS_NOERROR) { 1193 xs->status = ecb->stat; 1194 if ((ecb->flags & ECB_ABORT) != 0) { 1195 xs->error = XS_TIMEOUT; 1196 } else if ((ecb->flags & ECB_SENSE) != 0) { 1197 xs->error = XS_SENSE; 1198 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1199 /* First, save the return values */ 1200 xs->resid = ecb->dleft; 1201 ncr53c9x_sense(sc, ecb); 1202 return; 1203 } else { 1204 xs->resid = ecb->dleft; 1205 } 1206 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1207 xs->error = XS_BUSY; 1208 } 1209 1210 #ifdef NCR53C9X_DEBUG 1211 if (ncr53c9x_debug & NCR_SHOWMISC) { 1212 if (xs->resid != 0) 1213 printf("resid=%d ", xs->resid); 1214 if (xs->error == XS_SENSE) 1215 printf("sense=0x%02x\n", 1216 xs->sense.scsi_sense.error_code); 1217 else 1218 printf("error=%d\n", xs->error); 1219 } 1220 #endif 1221 1222 /* 1223 * Remove the ECB from whatever queue it's on. 1224 */ 1225 ncr53c9x_dequeue(sc, ecb); 1226 if (ecb == sc->sc_nexus) { 1227 sc->sc_nexus = NULL; 1228 if (sc->sc_state != NCR_CLEANING) { 1229 sc->sc_state = NCR_IDLE; 1230 ncr53c9x_sched(sc); 1231 } 1232 } 1233 1234 if (xs->error == XS_SELTIMEOUT) { 1235 /* Selection timeout -- discard this LUN if empty */ 1236 if (li->untagged == NULL && li->used == 0) { 1237 if (lun < NCR_NLUN) 1238 ti->lun[lun] = NULL; 1239 LIST_REMOVE(li, link); 1240 free(li, M_DEVBUF); 1241 } 1242 } 1243 1244 ncr53c9x_free_ecb(sc, ecb); 1245 ti->cmds++; 1246 scsipi_done(xs); 1247 } 1248 1249 void 1250 ncr53c9x_dequeue(sc, ecb) 1251 struct ncr53c9x_softc *sc; 1252 struct ncr53c9x_ecb *ecb; 1253 { 1254 struct ncr53c9x_tinfo *ti = 1255 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1256 struct ncr53c9x_linfo *li; 1257 int64_t lun = ecb->xs->xs_periph->periph_lun; 1258 1259 li = TINFO_LUN(ti, lun); 1260 #ifdef DIAGNOSTIC 1261 if (li == NULL || li->lun != lun) 1262 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n", 1263 (long long) lun, ecb); 1264 #endif 1265 if (li->untagged == ecb) { 1266 li->busy = 0; 1267 li->untagged = NULL; 1268 } 1269 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1270 #ifdef DIAGNOSTIC 1271 if (li->queued[ecb->tag[1]] != NULL && 1272 (li->queued[ecb->tag[1]] != ecb)) 1273 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1274 "instead of ecb %p\n", ecb->tag[1], 1275 (long long) lun, 1276 li->queued[ecb->tag[1]], ecb); 1277 #endif 1278 li->queued[ecb->tag[1]] = NULL; 1279 li->used--; 1280 } 1281 1282 if ((ecb->flags & ECB_READY) != 0) { 1283 ecb->flags &= ~ECB_READY; 1284 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1285 } 1286 } 1287 1288 /* 1289 * INTERRUPT/PROTOCOL ENGINE 1290 */ 1291 1292 /* 1293 * Schedule an outgoing message by prioritizing it, and asserting 1294 * attention on the bus. We can only do this when we are the initiator 1295 * else there will be an illegal command interrupt. 1296 */ 1297 #define ncr53c9x_sched_msgout(m) \ 1298 do { \ 1299 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1300 NCRCMD(sc, NCRCMD_SETATN); \ 1301 sc->sc_flags |= NCR_ATN; \ 1302 sc->sc_msgpriq |= (m); \ 1303 } while (0) 1304 1305 static void 1306 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1307 { 1308 NCR_MISC(("[flushfifo] ")); 1309 1310 NCRCMD(sc, NCRCMD_FLUSH); 1311 1312 if (sc->sc_phase == COMMAND_PHASE || 1313 sc->sc_phase == MESSAGE_OUT_PHASE) 1314 DELAY(2); 1315 } 1316 1317 static int 1318 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1319 { 1320 int i, n; 1321 u_char *buf; 1322 1323 switch(how) { 1324 case NCR_RDFIFO_START: 1325 buf = sc->sc_imess; 1326 sc->sc_imlen = 0; 1327 break; 1328 case NCR_RDFIFO_CONTINUE: 1329 buf = sc->sc_imess + sc->sc_imlen; 1330 break; 1331 default: 1332 panic("ncr53c9x_rdfifo: bad flag\n"); 1333 break; 1334 } 1335 1336 /* 1337 * XXX buffer (sc_imess) size for message 1338 */ 1339 1340 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1341 1342 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1343 n *= 2; 1344 1345 for (i = 0; i < n; i++) 1346 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1347 1348 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1349 1350 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1351 buf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1352 1353 NCR_READ_REG(sc, NCR_FIFO); 1354 1355 ncr53c9x_flushfifo(sc); 1356 } 1357 } else { 1358 for (i = 0; i < n; i++) 1359 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1360 } 1361 1362 sc->sc_imlen += i; 1363 1364 #ifdef NCR53C9X_DEBUG 1365 { 1366 int j; 1367 1368 NCR_TRACE(("\n[rdfifo %s (%d):", 1369 (how == NCR_RDFIFO_START) ? "start" : "cont", 1370 (int)sc->sc_imlen)); 1371 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1372 for (j = 0; j < sc->sc_imlen; j++) 1373 printf(" %02x", sc->sc_imess[j]); 1374 printf("]\n"); 1375 } 1376 } 1377 #endif 1378 return sc->sc_imlen; 1379 } 1380 1381 static void 1382 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1383 { 1384 int i; 1385 1386 #ifdef NCR53C9X_DEBUG 1387 NCR_MISC(("[wrfifo(%d):", len)); 1388 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1389 for (i = 0; i < len; i++) 1390 printf(" %02x", p[i]); 1391 printf("]\n"); 1392 } 1393 #endif 1394 1395 for (i = 0; i < len; i++) { 1396 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1397 1398 if (sc->sc_rev == NCR_VARIANT_FAS366) 1399 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1400 } 1401 } 1402 1403 int 1404 ncr53c9x_reselect(sc, message, tagtype, tagid) 1405 struct ncr53c9x_softc *sc; 1406 int message; 1407 int tagtype, tagid; 1408 { 1409 u_char selid, target, lun; 1410 struct ncr53c9x_ecb *ecb = NULL; 1411 struct ncr53c9x_tinfo *ti; 1412 struct ncr53c9x_linfo *li; 1413 1414 1415 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1416 target = sc->sc_selid; 1417 } else { 1418 /* 1419 * The SCSI chip made a snapshot of the data bus 1420 * while the reselection was being negotiated. 1421 * This enables us to determine which target did 1422 * the reselect. 1423 */ 1424 selid = sc->sc_selid & ~(1 << sc->sc_id); 1425 if (selid & (selid - 1)) { 1426 printf("%s: reselect with invalid selid %02x;" 1427 " sending DEVICE RESET\n", 1428 sc->sc_dev.dv_xname, selid); 1429 goto reset; 1430 } 1431 1432 target = ffs(selid) - 1; 1433 } 1434 lun = message & 0x07; 1435 1436 /* 1437 * Search wait queue for disconnected cmd 1438 * The list should be short, so I haven't bothered with 1439 * any more sophisticated structures than a simple 1440 * singly linked list. 1441 */ 1442 ti = &sc->sc_tinfo[target]; 1443 li = TINFO_LUN(ti, lun); 1444 1445 /* 1446 * We can get as far as the LUN with the IDENTIFY 1447 * message. Check to see if we're running an 1448 * un-tagged command. Otherwise ack the IDENTIFY 1449 * and wait for a tag message. 1450 */ 1451 if (li != NULL) { 1452 if (li->untagged != NULL && li->busy) 1453 ecb = li->untagged; 1454 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1455 /* Wait for tag to come by */ 1456 sc->sc_state = NCR_IDENTIFIED; 1457 return (0); 1458 } else if (tagtype) 1459 ecb = li->queued[tagid]; 1460 } 1461 if (ecb == NULL) { 1462 printf("%s: reselect from target %d lun %d tag %x:%x " 1463 "with no nexus; sending ABORT\n", 1464 sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1465 goto abort; 1466 } 1467 1468 /* Make this nexus active again. */ 1469 sc->sc_state = NCR_CONNECTED; 1470 sc->sc_nexus = ecb; 1471 ncr53c9x_setsync(sc, ti); 1472 1473 if (ecb->flags & ECB_RESET) 1474 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1475 else if (ecb->flags & ECB_ABORT) 1476 ncr53c9x_sched_msgout(SEND_ABORT); 1477 1478 /* Do an implicit RESTORE POINTERS. */ 1479 sc->sc_dp = ecb->daddr; 1480 sc->sc_dleft = ecb->dleft; 1481 1482 return (0); 1483 1484 reset: 1485 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1486 return (1); 1487 1488 abort: 1489 ncr53c9x_sched_msgout(SEND_ABORT); 1490 return (1); 1491 } 1492 1493 static inline int 1494 __verify_msg_format(u_char *p, int len) 1495 { 1496 1497 if (len == 1 && MSG_IS1BYTE(p[0])) 1498 return 1; 1499 if (len == 2 && MSG_IS2BYTE(p[0])) 1500 return 1; 1501 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1502 len == p[1] + 2) 1503 return 1; 1504 1505 return 0; 1506 } 1507 1508 /* 1509 * Get an incoming message as initiator. 1510 * 1511 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1512 * byte in the FIFO 1513 */ 1514 void 1515 ncr53c9x_msgin(sc) 1516 struct ncr53c9x_softc *sc; 1517 { 1518 1519 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1520 1521 if (sc->sc_imlen == 0) { 1522 printf("%s: msgin: no msg byte available\n", 1523 sc->sc_dev.dv_xname); 1524 return; 1525 } 1526 1527 /* 1528 * Prepare for a new message. A message should (according 1529 * to the SCSI standard) be transmitted in one single 1530 * MESSAGE_IN_PHASE. If we have been in some other phase, 1531 * then this is a new message. 1532 */ 1533 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1534 sc->sc_state != NCR_RESELECTED) { 1535 printf("%s: phase change, dropping message, " 1536 "prev %d, state %d\n", 1537 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1538 sc->sc_flags &= ~NCR_DROP_MSGI; 1539 sc->sc_imlen = 0; 1540 } 1541 1542 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0])); 1543 1544 /* 1545 * If we're going to reject the message, don't bother storing 1546 * the incoming bytes. But still, we need to ACK them. 1547 */ 1548 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1549 NCRCMD(sc, NCRCMD_MSGOK); 1550 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1551 return; 1552 } 1553 1554 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1555 ncr53c9x_sched_msgout(SEND_REJECT); 1556 sc->sc_flags |= NCR_DROP_MSGI; 1557 } else { 1558 u_char *pb; 1559 int plen; 1560 1561 switch (sc->sc_state) { 1562 /* 1563 * if received message is the first of reselection 1564 * then first byte is selid, and then message 1565 */ 1566 case NCR_RESELECTED: 1567 pb = sc->sc_imess + 1; 1568 plen = sc->sc_imlen - 1; 1569 break; 1570 default: 1571 pb = sc->sc_imess; 1572 plen = sc->sc_imlen; 1573 break; 1574 } 1575 1576 if (__verify_msg_format(pb, plen)) 1577 goto gotit; 1578 } 1579 1580 /* Ack what we have so far */ 1581 NCRCMD(sc, NCRCMD_MSGOK); 1582 return; 1583 1584 gotit: 1585 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1586 /* we got complete message, flush the imess, */ 1587 /* XXX nobody uses imlen below */ 1588 sc->sc_imlen = 0; 1589 /* 1590 * Now we should have a complete message (1 byte, 2 byte 1591 * and moderately long extended messages). We only handle 1592 * extended messages which total length is shorter than 1593 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1594 */ 1595 switch (sc->sc_state) { 1596 struct ncr53c9x_ecb *ecb; 1597 struct ncr53c9x_tinfo *ti; 1598 struct ncr53c9x_linfo *li; 1599 int lun; 1600 1601 case NCR_CONNECTED: 1602 ecb = sc->sc_nexus; 1603 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1604 1605 switch (sc->sc_imess[0]) { 1606 case MSG_CMDCOMPLETE: 1607 NCR_MSGS(("cmdcomplete ")); 1608 if (sc->sc_dleft < 0) { 1609 scsipi_printaddr(ecb->xs->xs_periph); 1610 printf("got %ld extra bytes\n", 1611 -(long)sc->sc_dleft); 1612 sc->sc_dleft = 0; 1613 } 1614 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1615 0 : sc->sc_dleft; 1616 if ((ecb->flags & ECB_SENSE) == 0) 1617 ecb->xs->resid = ecb->dleft; 1618 sc->sc_state = NCR_CMDCOMPLETE; 1619 break; 1620 1621 case MSG_MESSAGE_REJECT: 1622 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1623 switch (sc->sc_msgout) { 1624 case SEND_TAG: 1625 /* 1626 * Target does not like tagged queuing. 1627 * - Flush the command queue 1628 * - Disable tagged queuing for the target 1629 * - Dequeue ecb from the queued array. 1630 */ 1631 printf("%s: tagged queuing rejected: " 1632 "target %d\n", 1633 sc->sc_dev.dv_xname, 1634 ecb->xs->xs_periph->periph_target); 1635 1636 NCR_MSGS(("(rejected sent tag)")); 1637 NCRCMD(sc, NCRCMD_FLUSH); 1638 DELAY(1); 1639 ti->flags &= ~T_TAG; 1640 lun = ecb->xs->xs_periph->periph_lun; 1641 li = TINFO_LUN(ti, lun); 1642 if (ecb->tag[0] && 1643 li->queued[ecb->tag[1]] != NULL) { 1644 li->queued[ecb->tag[1]] = NULL; 1645 li->used--; 1646 } 1647 ecb->tag[0] = ecb->tag[1] = 0; 1648 li->untagged = ecb; 1649 li->busy = 1; 1650 break; 1651 1652 case SEND_SDTR: 1653 printf("%s: sync transfer rejected: " 1654 "target %d\n", 1655 sc->sc_dev.dv_xname, 1656 ecb->xs->xs_periph->periph_target); 1657 1658 sc->sc_flags &= ~NCR_SYNCHNEGO; 1659 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1660 ncr53c9x_setsync(sc, ti); 1661 ncr53c9x_update_xfer_mode(sc, 1662 ecb->xs->xs_periph->periph_target); 1663 break; 1664 1665 case SEND_WDTR: 1666 printf("%s: wide transfer rejected: " 1667 "target %d\n", 1668 sc->sc_dev.dv_xname, 1669 ecb->xs->xs_periph->periph_target); 1670 ti->flags &= ~T_WIDE; 1671 ti->width = 0; 1672 break; 1673 1674 case SEND_INIT_DET_ERR: 1675 goto abort; 1676 } 1677 break; 1678 1679 case MSG_NOOP: 1680 NCR_MSGS(("noop ")); 1681 break; 1682 1683 case MSG_HEAD_OF_Q_TAG: 1684 case MSG_SIMPLE_Q_TAG: 1685 case MSG_ORDERED_Q_TAG: 1686 NCR_MSGS(("TAG %x:%x", 1687 sc->sc_imess[0], sc->sc_imess[1])); 1688 break; 1689 1690 case MSG_DISCONNECT: 1691 NCR_MSGS(("disconnect ")); 1692 ti->dconns++; 1693 sc->sc_state = NCR_DISCONNECT; 1694 1695 /* 1696 * Mark the fact that all bytes have moved. The 1697 * target may not bother to do a SAVE POINTERS 1698 * at this stage. This flag will set the residual 1699 * count to zero on MSG COMPLETE. 1700 */ 1701 if (sc->sc_dleft == 0) 1702 ecb->flags |= ECB_TENTATIVE_DONE; 1703 1704 break; 1705 1706 case MSG_SAVEDATAPOINTER: 1707 NCR_MSGS(("save datapointer ")); 1708 ecb->daddr = sc->sc_dp; 1709 ecb->dleft = sc->sc_dleft; 1710 break; 1711 1712 case MSG_RESTOREPOINTERS: 1713 NCR_MSGS(("restore datapointer ")); 1714 sc->sc_dp = ecb->daddr; 1715 sc->sc_dleft = ecb->dleft; 1716 break; 1717 1718 case MSG_EXTENDED: 1719 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1720 switch (sc->sc_imess[2]) { 1721 case MSG_EXT_SDTR: 1722 NCR_MSGS(("SDTR period %d, offset %d ", 1723 sc->sc_imess[3], sc->sc_imess[4])); 1724 if (sc->sc_imess[1] != 3) 1725 goto reject; 1726 ti->period = sc->sc_imess[3]; 1727 ti->offset = sc->sc_imess[4]; 1728 ti->flags &= ~T_NEGOTIATE; 1729 if (sc->sc_minsync == 0 || 1730 ti->offset == 0 || 1731 ti->period > 124) { 1732 #if 0 1733 #ifdef NCR53C9X_DEBUG 1734 scsipi_printaddr(ecb->xs->xs_periph); 1735 printf("async mode\n"); 1736 #endif 1737 #endif 1738 ti->flags &= ~T_SYNCMODE; 1739 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1740 /* 1741 * target initiated negotiation 1742 */ 1743 ti->offset = 0; 1744 ncr53c9x_sched_msgout( 1745 SEND_SDTR); 1746 } 1747 } else { 1748 #if 0 1749 int r = 250/ti->period; 1750 int s = (100*250)/ti->period - 100*r; 1751 #endif 1752 int p; 1753 1754 p = ncr53c9x_stp2cpb(sc, ti->period); 1755 ti->period = ncr53c9x_cpb2stp(sc, p); 1756 #if 0 1757 #ifdef NCR53C9X_DEBUG 1758 scsipi_printaddr(ecb->xs->xs_periph); 1759 printf("max sync rate %d.%02dMB/s\n", 1760 r, s); 1761 #endif 1762 #endif 1763 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1764 /* 1765 * target initiated negotiation 1766 */ 1767 if (ti->period < 1768 sc->sc_minsync) 1769 ti->period = 1770 sc->sc_minsync; 1771 if (ti->offset > 15) 1772 ti->offset = 15; 1773 ti->flags &= ~T_SYNCMODE; 1774 ncr53c9x_sched_msgout( 1775 SEND_SDTR); 1776 } else { 1777 /* we are sync */ 1778 ti->flags |= T_SYNCMODE; 1779 } 1780 } 1781 ncr53c9x_update_xfer_mode(sc, 1782 ecb->xs->xs_periph->periph_target); 1783 sc->sc_flags &= ~NCR_SYNCHNEGO; 1784 ncr53c9x_setsync(sc, ti); 1785 break; 1786 1787 case MSG_EXT_WDTR: 1788 printf("%s: wide mode %d\n", 1789 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1790 if (sc->sc_imess[3] == 1) { 1791 ti->cfg3 |= NCRFASCFG3_EWIDE; 1792 ncr53c9x_setsync(sc, ti); 1793 } else 1794 ti->width = 0; 1795 ti->flags &= ~T_WIDE; 1796 break; 1797 default: 1798 scsipi_printaddr(ecb->xs->xs_periph); 1799 printf("unrecognized MESSAGE EXTENDED;" 1800 " sending REJECT\n"); 1801 goto reject; 1802 } 1803 break; 1804 1805 default: 1806 NCR_MSGS(("ident ")); 1807 scsipi_printaddr(ecb->xs->xs_periph); 1808 printf("unrecognized MESSAGE; sending REJECT\n"); 1809 reject: 1810 ncr53c9x_sched_msgout(SEND_REJECT); 1811 break; 1812 } 1813 break; 1814 1815 case NCR_IDENTIFIED: 1816 /* 1817 * IDENTIFY message was received and queue tag is expected now 1818 */ 1819 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1820 (sc->sc_msgify == 0)) { 1821 printf("%s: TAG reselect without IDENTIFY;" 1822 " MSG %x;" 1823 " sending DEVICE RESET\n", 1824 sc->sc_dev.dv_xname, 1825 sc->sc_imess[0]); 1826 goto reset; 1827 } 1828 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 1829 sc->sc_imess[0], sc->sc_imess[1]); 1830 break; 1831 1832 case NCR_RESELECTED: 1833 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1834 sc->sc_msgify = sc->sc_imess[1]; 1835 } else { 1836 printf("%s: reselect without IDENTIFY;" 1837 " MSG %x;" 1838 " sending DEVICE RESET\n", 1839 sc->sc_dev.dv_xname, 1840 sc->sc_imess[1]); 1841 goto reset; 1842 } 1843 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1844 break; 1845 1846 default: 1847 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1848 sc->sc_dev.dv_xname); 1849 reset: 1850 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1851 break; 1852 1853 abort: 1854 ncr53c9x_sched_msgout(SEND_ABORT); 1855 break; 1856 } 1857 1858 /* if we have more messages to send set ATN */ 1859 if (sc->sc_msgpriq) 1860 NCRCMD(sc, NCRCMD_SETATN); 1861 1862 /* Ack last message byte */ 1863 NCRCMD(sc, NCRCMD_MSGOK); 1864 1865 /* Done, reset message pointer. */ 1866 sc->sc_flags &= ~NCR_DROP_MSGI; 1867 sc->sc_imlen = 0; 1868 } 1869 1870 1871 /* 1872 * Send the highest priority, scheduled message 1873 */ 1874 void 1875 ncr53c9x_msgout(sc) 1876 struct ncr53c9x_softc *sc; 1877 { 1878 struct ncr53c9x_tinfo *ti; 1879 struct ncr53c9x_ecb *ecb; 1880 size_t size; 1881 1882 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1883 sc->sc_msgpriq, sc->sc_prevphase)); 1884 1885 /* 1886 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1887 * condition on the SCSI bus. The 53c9x chip 1888 * automatically turns off ATN before sending the 1889 * message byte. (see also the comment below in the 1890 * default case when picking out a message to send) 1891 */ 1892 if (sc->sc_flags & NCR_ATN) { 1893 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1894 new: 1895 NCRCMD(sc, NCRCMD_FLUSH); 1896 /* DELAY(1); */ 1897 sc->sc_msgoutq = 0; 1898 sc->sc_omlen = 0; 1899 } 1900 } else { 1901 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1902 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1903 goto new; 1904 } else { 1905 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1906 sc->sc_dev.dv_xname, __LINE__); 1907 } 1908 } 1909 1910 if (sc->sc_omlen == 0) { 1911 /* Pick up highest priority message */ 1912 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1913 sc->sc_msgoutq |= sc->sc_msgout; 1914 sc->sc_msgpriq &= ~sc->sc_msgout; 1915 sc->sc_omlen = 1; /* "Default" message len */ 1916 switch (sc->sc_msgout) { 1917 case SEND_SDTR: 1918 ecb = sc->sc_nexus; 1919 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1920 sc->sc_omess[0] = MSG_EXTENDED; 1921 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1922 sc->sc_omess[2] = MSG_EXT_SDTR; 1923 sc->sc_omess[3] = ti->period; 1924 sc->sc_omess[4] = ti->offset; 1925 sc->sc_omlen = 5; 1926 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1927 ti->flags |= T_SYNCMODE; 1928 ncr53c9x_setsync(sc, ti); 1929 } 1930 break; 1931 case SEND_WDTR: 1932 ecb = sc->sc_nexus; 1933 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1934 sc->sc_omess[0] = MSG_EXTENDED; 1935 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1936 sc->sc_omess[2] = MSG_EXT_WDTR; 1937 sc->sc_omess[3] = ti->width; 1938 sc->sc_omlen = 4; 1939 break; 1940 case SEND_IDENTIFY: 1941 if (sc->sc_state != NCR_CONNECTED) { 1942 printf("%s at line %d: no nexus\n", 1943 sc->sc_dev.dv_xname, __LINE__); 1944 } 1945 ecb = sc->sc_nexus; 1946 sc->sc_omess[0] = 1947 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1948 break; 1949 case SEND_TAG: 1950 if (sc->sc_state != NCR_CONNECTED) { 1951 printf("%s at line %d: no nexus\n", 1952 sc->sc_dev.dv_xname, __LINE__); 1953 } 1954 ecb = sc->sc_nexus; 1955 sc->sc_omess[0] = ecb->tag[0]; 1956 sc->sc_omess[1] = ecb->tag[1]; 1957 sc->sc_omlen = 2; 1958 break; 1959 case SEND_DEV_RESET: 1960 sc->sc_flags |= NCR_ABORTING; 1961 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1962 ecb = sc->sc_nexus; 1963 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1964 ti->flags &= ~T_SYNCMODE; 1965 ncr53c9x_update_xfer_mode(sc, 1966 ecb->xs->xs_periph->periph_target); 1967 if ((ti->flags & T_SYNCHOFF) == 0) 1968 /* We can re-start sync negotiation */ 1969 ti->flags |= T_NEGOTIATE; 1970 break; 1971 case SEND_PARITY_ERROR: 1972 sc->sc_omess[0] = MSG_PARITY_ERROR; 1973 break; 1974 case SEND_ABORT: 1975 sc->sc_flags |= NCR_ABORTING; 1976 sc->sc_omess[0] = MSG_ABORT; 1977 break; 1978 case SEND_INIT_DET_ERR: 1979 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1980 break; 1981 case SEND_REJECT: 1982 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1983 break; 1984 default: 1985 /* 1986 * We normally do not get here, since the chip 1987 * automatically turns off ATN before the last 1988 * byte of a message is sent to the target. 1989 * However, if the target rejects our (multi-byte) 1990 * message early by switching to MSG IN phase 1991 * ATN remains on, so the target may return to 1992 * MSG OUT phase. If there are no scheduled messages 1993 * left we send a NO-OP. 1994 * 1995 * XXX - Note that this leaves no useful purpose for 1996 * the NCR_ATN flag. 1997 */ 1998 sc->sc_flags &= ~NCR_ATN; 1999 sc->sc_omess[0] = MSG_NOOP; 2000 break; 2001 } 2002 sc->sc_omp = sc->sc_omess; 2003 } 2004 2005 #ifdef DEBUG 2006 { 2007 int i; 2008 2009 NCR_MISC(("<msgout:")); 2010 for (i = 0; i < sc->sc_omlen; i++) 2011 NCR_MISC((" %02x", sc->sc_omess[i])); 2012 NCR_MISC(("> ")); 2013 } 2014 #endif 2015 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2016 /* 2017 * XXX fifo size 2018 */ 2019 ncr53c9x_flushfifo(sc); 2020 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2021 NCRCMD(sc, NCRCMD_TRANS); 2022 } else { 2023 /* (re)send the message */ 2024 size = min(sc->sc_omlen, sc->sc_maxxfer); 2025 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2026 /* Program the SCSI counter */ 2027 NCR_SET_COUNT(sc, size); 2028 2029 /* Load the count in and start the message-out transfer */ 2030 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2031 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2032 NCRDMA_GO(sc); 2033 } 2034 } 2035 2036 /* 2037 * This is the most critical part of the driver, and has to know 2038 * how to deal with *all* error conditions and phases from the SCSI 2039 * bus. If there are no errors and the DMA was active, then call the 2040 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2041 * and we can return from here without further processing. 2042 * 2043 * Most of this needs verifying. 2044 */ 2045 int 2046 ncr53c9x_intr(arg) 2047 void *arg; 2048 { 2049 struct ncr53c9x_softc *sc = arg; 2050 struct ncr53c9x_ecb *ecb; 2051 struct scsipi_periph *periph; 2052 struct ncr53c9x_tinfo *ti; 2053 size_t size; 2054 int nfifo; 2055 2056 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2057 2058 if (!NCRDMA_ISINTR(sc)) 2059 return (0); 2060 2061 again: 2062 /* and what do the registers say... */ 2063 ncr53c9x_readregs(sc); 2064 2065 sc->sc_intrcnt.ev_count++; 2066 2067 /* 2068 * At the moment, only a SCSI Bus Reset or Illegal 2069 * Command are classed as errors. A disconnect is a 2070 * valid condition, and we let the code check is the 2071 * "NCR_BUSFREE_OK" flag was set before declaring it 2072 * and error. 2073 * 2074 * Also, the status register tells us about "Gross 2075 * Errors" and "Parity errors". Only the Gross Error 2076 * is really bad, and the parity errors are dealt 2077 * with later 2078 * 2079 * TODO 2080 * If there are too many parity error, go to slow 2081 * cable mode ? 2082 */ 2083 2084 /* SCSI Reset */ 2085 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2086 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2087 NCRCMD(sc, NCRCMD_FLUSH); 2088 DELAY(1); 2089 } 2090 if (sc->sc_state != NCR_SBR) { 2091 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 2092 ncr53c9x_init(sc, 0); /* Restart everything */ 2093 return (1); 2094 } 2095 #if 0 2096 /*XXX*/ printf("<expected bus reset: " 2097 "[intr %x, stat %x, step %d]>\n", 2098 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2099 #endif 2100 if (sc->sc_nexus != NULL) 2101 panic("%s: nexus in reset state", 2102 sc->sc_dev.dv_xname); 2103 goto sched; 2104 } 2105 2106 ecb = sc->sc_nexus; 2107 2108 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2109 if (sc->sc_espintr & NCRINTR_ERR || 2110 sc->sc_espstat & NCRSTAT_GE) { 2111 2112 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2113 /* Gross Error; no target ? */ 2114 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2115 NCRCMD(sc, NCRCMD_FLUSH); 2116 DELAY(1); 2117 } 2118 if (sc->sc_state == NCR_CONNECTED || 2119 sc->sc_state == NCR_SELECTING) { 2120 ecb->xs->error = XS_TIMEOUT; 2121 ncr53c9x_done(sc, ecb); 2122 } 2123 return (1); 2124 } 2125 2126 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2127 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2128 /* 2129 * Eat away "Illegal command" interrupt 2130 * on a ESP100 caused by a re-selection 2131 * while we were trying to select 2132 * another target. 2133 */ 2134 #ifdef DEBUG 2135 printf("%s: ESP100 work-around activated\n", 2136 sc->sc_dev.dv_xname); 2137 #endif 2138 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2139 return (1); 2140 } 2141 /* illegal command, out of sync ? */ 2142 printf("%s: illegal command: 0x%x " 2143 "(state %d, phase %x, prevphase %x)\n", 2144 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2145 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2146 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2147 NCRCMD(sc, NCRCMD_FLUSH); 2148 DELAY(1); 2149 } 2150 ncr53c9x_init(sc, 1); /* Restart everything */ 2151 return (1); 2152 } 2153 } 2154 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2155 2156 /* 2157 * Call if DMA is active. 2158 * 2159 * If DMA_INTR returns true, then maybe go 'round the loop 2160 * again in case there is no more DMA queued, but a phase 2161 * change is expected. 2162 */ 2163 if (NCRDMA_ISACTIVE(sc)) { 2164 int r = NCRDMA_INTR(sc); 2165 if (r == -1) { 2166 printf("%s: DMA error; resetting\n", 2167 sc->sc_dev.dv_xname); 2168 ncr53c9x_init(sc, 1); 2169 } 2170 /* If DMA active here, then go back to work... */ 2171 if (NCRDMA_ISACTIVE(sc)) 2172 return (1); 2173 2174 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2175 /* 2176 * DMA not completed. If we can not find a 2177 * acceptable explanation, print a diagnostic. 2178 */ 2179 if (sc->sc_state == NCR_SELECTING) 2180 /* 2181 * This can happen if we are reselected 2182 * while using DMA to select a target. 2183 */ 2184 /*void*/; 2185 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2186 /* 2187 * Our (multi-byte) message (eg SDTR) was 2188 * interrupted by the target to send 2189 * a MSG REJECT. 2190 * Print diagnostic if current phase 2191 * is not MESSAGE IN. 2192 */ 2193 if (sc->sc_phase != MESSAGE_IN_PHASE) 2194 printf("%s: !TC on MSG OUT" 2195 " [intr %x, stat %x, step %d]" 2196 " prevphase %x, resid %lx\n", 2197 sc->sc_dev.dv_xname, 2198 sc->sc_espintr, 2199 sc->sc_espstat, 2200 sc->sc_espstep, 2201 sc->sc_prevphase, 2202 (u_long)sc->sc_omlen); 2203 } else if (sc->sc_dleft == 0) { 2204 /* 2205 * The DMA operation was started for 2206 * a DATA transfer. Print a diagnostic 2207 * if the DMA counter and TC bit 2208 * appear to be out of sync. 2209 */ 2210 printf("%s: !TC on DATA XFER" 2211 " [intr %x, stat %x, step %d]" 2212 " prevphase %x, resid %x\n", 2213 sc->sc_dev.dv_xname, 2214 sc->sc_espintr, 2215 sc->sc_espstat, 2216 sc->sc_espstep, 2217 sc->sc_prevphase, 2218 ecb ? ecb->dleft : -1); 2219 } 2220 } 2221 } 2222 2223 /* 2224 * Check for less serious errors. 2225 */ 2226 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2227 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2228 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2229 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2230 else 2231 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2232 } 2233 2234 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2235 sc->sc_msgify = 0; 2236 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>", 2237 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2238 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2239 NCRCMD(sc, NCRCMD_FLUSH); 2240 /* DELAY(1); */ 2241 } 2242 /* 2243 * This command must (apparently) be issued within 2244 * 250mS of a disconnect. So here you are... 2245 */ 2246 NCRCMD(sc, NCRCMD_ENSEL); 2247 2248 switch (sc->sc_state) { 2249 case NCR_RESELECTED: 2250 goto sched; 2251 2252 case NCR_SELECTING: 2253 { 2254 struct ncr53c9x_linfo *li; 2255 2256 ecb->xs->error = XS_SELTIMEOUT; 2257 2258 /* Selection timeout -- discard all LUNs if empty */ 2259 periph = ecb->xs->xs_periph; 2260 ti = &sc->sc_tinfo[periph->periph_target]; 2261 li = LIST_FIRST(&ti->luns); 2262 while (li != NULL) { 2263 if (li->untagged == NULL && li->used == 0) { 2264 if (li->lun < NCR_NLUN) 2265 ti->lun[li->lun] = NULL; 2266 LIST_REMOVE(li, link); 2267 free(li, M_DEVBUF); 2268 /* 2269 * Restart the search at the beginning 2270 */ 2271 li = LIST_FIRST(&ti->luns); 2272 continue; 2273 } 2274 li = LIST_NEXT(li, link); 2275 } 2276 goto finish; 2277 } 2278 case NCR_CONNECTED: 2279 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2280 #ifdef NCR53C9X_DEBUG 2281 if (ecb != NULL) 2282 scsipi_printaddr(ecb->xs->xs_periph); 2283 printf("sync nego not completed!\n"); 2284 #endif 2285 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 2286 sc->sc_flags &= ~NCR_SYNCHNEGO; 2287 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2288 } 2289 2290 /* it may be OK to disconnect */ 2291 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2292 /* 2293 * Section 5.1.1 of the SCSI 2 spec 2294 * suggests issuing a REQUEST SENSE 2295 * following an unexpected disconnect. 2296 * Some devices go into a contingent 2297 * allegiance condition when 2298 * disconnecting, and this is necessary 2299 * to clean up their state. 2300 */ 2301 printf("%s: unexpected disconnect; ", 2302 sc->sc_dev.dv_xname); 2303 if ((ecb->flags & ECB_SENSE) != 0) { 2304 printf("resetting\n"); 2305 goto reset; 2306 } 2307 printf("sending REQUEST SENSE\n"); 2308 callout_stop(&ecb->xs->xs_callout); 2309 ncr53c9x_sense(sc, ecb); 2310 goto out; 2311 } 2312 2313 ecb->xs->error = XS_TIMEOUT; 2314 goto finish; 2315 2316 case NCR_DISCONNECT: 2317 sc->sc_nexus = NULL; 2318 goto sched; 2319 2320 case NCR_CMDCOMPLETE: 2321 goto finish; 2322 } 2323 } 2324 2325 switch (sc->sc_state) { 2326 2327 case NCR_SBR: 2328 printf("%s: waiting for SCSI Bus Reset to happen\n", 2329 sc->sc_dev.dv_xname); 2330 return (1); 2331 2332 case NCR_RESELECTED: 2333 /* 2334 * we must be continuing a message ? 2335 */ 2336 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2337 printf("%s: target didn't identify\n", 2338 sc->sc_dev.dv_xname); 2339 ncr53c9x_init(sc, 1); 2340 return (1); 2341 } 2342 printf("<<RESELECT CONT'd>>"); 2343 #if XXXX 2344 ncr53c9x_msgin(sc); 2345 if (sc->sc_state != NCR_CONNECTED) { 2346 /* IDENTIFY fail?! */ 2347 printf("%s: identify failed\n", 2348 sc->sc_dev.dv_xname, sc->sc_state); 2349 ncr53c9x_init(sc, 1); 2350 return (1); 2351 } 2352 #endif 2353 break; 2354 2355 case NCR_IDENTIFIED: 2356 ecb = sc->sc_nexus; 2357 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2358 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2359 /* 2360 * Things are seriously fucked up. 2361 * Pull the brakes, i.e. reset 2362 */ 2363 printf("%s: target didn't send tag: %d bytes in fifo\n", 2364 sc->sc_dev.dv_xname, i); 2365 /* Drain and display fifo */ 2366 while (i-- > 0) 2367 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2368 2369 ncr53c9x_init(sc, 1); 2370 return (1); 2371 } else 2372 goto msgin; 2373 2374 break; 2375 2376 case NCR_IDLE: 2377 case NCR_SELECTING: 2378 ecb = sc->sc_nexus; 2379 if (sc->sc_espintr & NCRINTR_RESEL) { 2380 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2381 sc->sc_flags = 0; 2382 /* 2383 * If we're trying to select a 2384 * target ourselves, push our command 2385 * back into the ready list. 2386 */ 2387 if (sc->sc_state == NCR_SELECTING) { 2388 NCR_MISC(("backoff selector ")); 2389 callout_stop(&ecb->xs->xs_callout); 2390 ncr53c9x_dequeue(sc, ecb); 2391 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2392 ecb->flags |= ECB_READY; 2393 ecb = sc->sc_nexus = NULL; 2394 } 2395 sc->sc_state = NCR_RESELECTED; 2396 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2397 /* 2398 * Things are seriously fucked up. 2399 * Pull the brakes, i.e. reset 2400 */ 2401 printf("%s: target didn't identify\n", 2402 sc->sc_dev.dv_xname); 2403 ncr53c9x_init(sc, 1); 2404 return (1); 2405 } 2406 /* 2407 * The C90 only inhibits FIFO writes until 2408 * reselection is complete, instead of 2409 * waiting until the interrupt status register 2410 * has been read. So, if the reselect happens 2411 * while we were entering a command bytes (for 2412 * another target) some of those bytes can 2413 * appear in the FIFO here, after the 2414 * interrupt is taken. 2415 */ 2416 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2417 2418 if (nfifo < 2 || 2419 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) { 2420 printf("%s: RESELECT: %d bytes in FIFO! " 2421 "[intr %x, stat %x, step %d, " 2422 "prevphase %x]\n", 2423 sc->sc_dev.dv_xname, 2424 nfifo, 2425 sc->sc_espintr, 2426 sc->sc_espstat, 2427 sc->sc_espstep, 2428 sc->sc_prevphase); 2429 ncr53c9x_init(sc, 1); 2430 return (1); 2431 } 2432 sc->sc_selid = sc->sc_imess[0]; 2433 NCR_MISC(("selid=%02x ", sc->sc_selid)); 2434 2435 /* Handle identify message */ 2436 ncr53c9x_msgin(sc); 2437 if (nfifo != 2) { 2438 /* 2439 * Note: this should not happen 2440 * with `dmaselect' on. 2441 */ 2442 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2443 NCRCMD(sc, NCRCMD_FLUSH); 2444 } else if (sc->sc_features & NCR_F_DMASELECT && 2445 sc->sc_rev == NCR_VARIANT_ESP100) { 2446 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2447 } 2448 2449 if (sc->sc_state != NCR_CONNECTED && 2450 sc->sc_state != NCR_IDENTIFIED) { 2451 /* IDENTIFY fail?! */ 2452 printf("%s: identify failed, " 2453 "state %d, intr %02x\n", 2454 sc->sc_dev.dv_xname, sc->sc_state, 2455 sc->sc_espintr); 2456 ncr53c9x_init(sc, 1); 2457 return (1); 2458 } 2459 goto shortcut; /* ie. next phase expected soon */ 2460 } 2461 2462 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2463 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2464 /* 2465 * Arbitration won; examine the `step' register 2466 * to determine how far the selection could progress. 2467 */ 2468 ecb = sc->sc_nexus; 2469 if (ecb == NULL) 2470 panic("ncr53c9x: no nexus"); 2471 2472 periph = ecb->xs->xs_periph; 2473 ti = &sc->sc_tinfo[periph->periph_target]; 2474 2475 switch (sc->sc_espstep) { 2476 case 0: 2477 /* 2478 * The target did not respond with a 2479 * message out phase - probably an old 2480 * device that doesn't recognize ATN. 2481 * Clear ATN and just continue, the 2482 * target should be in the command 2483 * phase. 2484 * XXXX check for command phase? 2485 */ 2486 NCRCMD(sc, NCRCMD_RSTATN); 2487 break; 2488 case 1: 2489 if ((ti->flags & T_NEGOTIATE) == 0 && 2490 ecb->tag[0] == 0) { 2491 printf("%s: step 1 & !NEG\n", 2492 sc->sc_dev.dv_xname); 2493 goto reset; 2494 } 2495 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2496 printf("%s: !MSGOUT\n", 2497 sc->sc_dev.dv_xname); 2498 goto reset; 2499 } 2500 if (ti->flags & T_WIDE) { 2501 ncr53c9x_sched_msgout(SEND_WDTR); 2502 } 2503 if (ti->flags & T_NEGOTIATE) { 2504 /* Start negotiating */ 2505 ti->period = sc->sc_minsync; 2506 ti->offset = 15; 2507 sc->sc_flags |= NCR_SYNCHNEGO; 2508 if (ecb->tag[0]) 2509 ncr53c9x_sched_msgout( 2510 SEND_TAG|SEND_SDTR); 2511 else 2512 ncr53c9x_sched_msgout( 2513 SEND_SDTR); 2514 } else { 2515 /* Could not do ATN3 so send TAG */ 2516 ncr53c9x_sched_msgout(SEND_TAG); 2517 } 2518 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2519 break; 2520 case 3: 2521 /* 2522 * Grr, this is supposed to mean 2523 * "target left command phase prematurely". 2524 * It seems to happen regularly when 2525 * sync mode is on. 2526 * Look at FIFO to see if command went out. 2527 * (Timing problems?) 2528 */ 2529 if (sc->sc_features & NCR_F_DMASELECT) { 2530 if (sc->sc_cmdlen == 0) 2531 /* Hope for the best.. */ 2532 break; 2533 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2534 & NCRFIFO_FF) == 0) { 2535 /* Hope for the best.. */ 2536 break; 2537 } 2538 printf("(%s:%d:%d): selection failed;" 2539 " %d left in FIFO " 2540 "[intr %x, stat %x, step %d]\n", 2541 sc->sc_dev.dv_xname, 2542 periph->periph_target, 2543 periph->periph_lun, 2544 NCR_READ_REG(sc, NCR_FFLAG) 2545 & NCRFIFO_FF, 2546 sc->sc_espintr, sc->sc_espstat, 2547 sc->sc_espstep); 2548 NCRCMD(sc, NCRCMD_FLUSH); 2549 ncr53c9x_sched_msgout(SEND_ABORT); 2550 return (1); 2551 case 2: 2552 /* Select stuck at Command Phase */ 2553 NCRCMD(sc, NCRCMD_FLUSH); 2554 break; 2555 case 4: 2556 if (sc->sc_features & NCR_F_DMASELECT && 2557 sc->sc_cmdlen != 0) 2558 printf("(%s:%d:%d): select; " 2559 "%lu left in DMA buffer " 2560 "[intr %x, stat %x, step %d]\n", 2561 sc->sc_dev.dv_xname, 2562 periph->periph_target, 2563 periph->periph_lun, 2564 (u_long)sc->sc_cmdlen, 2565 sc->sc_espintr, 2566 sc->sc_espstat, 2567 sc->sc_espstep); 2568 /* So far, everything went fine */ 2569 break; 2570 } 2571 2572 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2573 /* Do an implicit RESTORE POINTERS. */ 2574 sc->sc_dp = ecb->daddr; 2575 sc->sc_dleft = ecb->dleft; 2576 sc->sc_state = NCR_CONNECTED; 2577 break; 2578 2579 } else { 2580 2581 printf("%s: unexpected status after select" 2582 ": [intr %x, stat %x, step %x]\n", 2583 sc->sc_dev.dv_xname, 2584 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2585 NCRCMD(sc, NCRCMD_FLUSH); 2586 DELAY(1); 2587 goto reset; 2588 } 2589 if (sc->sc_state == NCR_IDLE) { 2590 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); 2591 return (0); 2592 } 2593 break; 2594 2595 case NCR_CONNECTED: 2596 if ((sc->sc_flags & NCR_ICCS) != 0) { 2597 /* "Initiate Command Complete Steps" in progress */ 2598 u_char msg; 2599 2600 sc->sc_flags &= ~NCR_ICCS; 2601 2602 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2603 printf("%s: ICCS: " 2604 ": [intr %x, stat %x, step %x]\n", 2605 sc->sc_dev.dv_xname, 2606 sc->sc_espintr, sc->sc_espstat, 2607 sc->sc_espstep); 2608 } 2609 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2610 if (sc->sc_imlen < 2) 2611 printf("%s: can't get status, only %d bytes\n", 2612 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2613 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2614 msg = sc->sc_imess[sc->sc_imlen - 1]; 2615 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2616 if (msg == MSG_CMDCOMPLETE) { 2617 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2618 ? 0 : sc->sc_dleft; 2619 if ((ecb->flags & ECB_SENSE) == 0) 2620 ecb->xs->resid = ecb->dleft; 2621 sc->sc_state = NCR_CMDCOMPLETE; 2622 } else 2623 printf("%s: STATUS_PHASE: msg %d\n", 2624 sc->sc_dev.dv_xname, msg); 2625 sc->sc_imlen = 0; 2626 NCRCMD(sc, NCRCMD_MSGOK); 2627 goto shortcut; /* ie. wait for disconnect */ 2628 } 2629 break; 2630 2631 default: 2632 /* Don't panic: reset. */ 2633 printf("%s: invalid state: %d\n", 2634 sc->sc_dev.dv_xname, sc->sc_state); 2635 ncr53c9x_scsi_reset(sc); 2636 goto out; 2637 } 2638 2639 /* 2640 * Driver is now in state NCR_CONNECTED, i.e. we 2641 * have a current command working the SCSI bus. 2642 */ 2643 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2644 panic("ncr53c9x: no nexus"); 2645 } 2646 2647 switch (sc->sc_phase) { 2648 case MESSAGE_OUT_PHASE: 2649 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2650 ncr53c9x_msgout(sc); 2651 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2652 break; 2653 2654 case MESSAGE_IN_PHASE: 2655 msgin: 2656 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2657 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2658 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2659 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2660 NCRCMD(sc, NCRCMD_FLUSH); 2661 } 2662 sc->sc_flags |= NCR_WAITI; 2663 NCRCMD(sc, NCRCMD_TRANS); 2664 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2665 if ((sc->sc_flags & NCR_WAITI) == 0) { 2666 printf("%s: MSGIN: unexpected FC bit: " 2667 "[intr %x, stat %x, step %x]\n", 2668 sc->sc_dev.dv_xname, 2669 sc->sc_espintr, sc->sc_espstat, 2670 sc->sc_espstep); 2671 } 2672 sc->sc_flags &= ~NCR_WAITI; 2673 ncr53c9x_rdfifo(sc, 2674 (sc->sc_prevphase == sc->sc_phase) ? 2675 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2676 ncr53c9x_msgin(sc); 2677 } else { 2678 printf("%s: MSGIN: weird bits: " 2679 "[intr %x, stat %x, step %x]\n", 2680 sc->sc_dev.dv_xname, 2681 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2682 } 2683 sc->sc_prevphase = MESSAGE_IN_PHASE; 2684 goto shortcut; /* i.e. expect data to be ready */ 2685 break; 2686 2687 case COMMAND_PHASE: 2688 /* 2689 * Send the command block. Normally we don't see this 2690 * phase because the SEL_ATN command takes care of 2691 * all this. However, we end up here if either the 2692 * target or we wanted to exchange some more messages 2693 * first (e.g. to start negotiations). 2694 */ 2695 2696 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2697 ecb->cmd.cmd.opcode, ecb->clen)); 2698 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2699 NCRCMD(sc, NCRCMD_FLUSH); 2700 /* DELAY(1);*/ 2701 } 2702 if (sc->sc_features & NCR_F_DMASELECT) { 2703 size_t size; 2704 /* setup DMA transfer for command */ 2705 size = ecb->clen; 2706 sc->sc_cmdlen = size; 2707 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 2708 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2709 0, &size); 2710 /* Program the SCSI counter */ 2711 NCR_SET_COUNT(sc, size); 2712 2713 /* load the count in */ 2714 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2715 2716 /* start the command transfer */ 2717 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2718 NCRDMA_GO(sc); 2719 } else { 2720 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2721 NCRCMD(sc, NCRCMD_TRANS); 2722 } 2723 sc->sc_prevphase = COMMAND_PHASE; 2724 break; 2725 2726 case DATA_OUT_PHASE: 2727 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2728 NCRCMD(sc, NCRCMD_FLUSH); 2729 size = min(sc->sc_dleft, sc->sc_maxxfer); 2730 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2731 sc->sc_prevphase = DATA_OUT_PHASE; 2732 goto setup_xfer; 2733 2734 case DATA_IN_PHASE: 2735 NCR_PHASE(("DATA_IN_PHASE ")); 2736 if (sc->sc_rev == NCR_VARIANT_ESP100) 2737 NCRCMD(sc, NCRCMD_FLUSH); 2738 size = min(sc->sc_dleft, sc->sc_maxxfer); 2739 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2740 sc->sc_prevphase = DATA_IN_PHASE; 2741 setup_xfer: 2742 /* Target returned to data phase: wipe "done" memory */ 2743 ecb->flags &= ~ECB_TENTATIVE_DONE; 2744 2745 /* Program the SCSI counter */ 2746 NCR_SET_COUNT(sc, size); 2747 2748 /* load the count in */ 2749 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2750 2751 /* 2752 * Note that if `size' is 0, we've already transceived 2753 * all the bytes we want but we're still in DATA PHASE. 2754 * Apparently, the device needs padding. Also, a 2755 * transfer size of 0 means "maximum" to the chip 2756 * DMA logic. 2757 */ 2758 NCRCMD(sc, 2759 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2760 NCRDMA_GO(sc); 2761 return (1); 2762 2763 case STATUS_PHASE: 2764 NCR_PHASE(("STATUS_PHASE ")); 2765 sc->sc_flags |= NCR_ICCS; 2766 NCRCMD(sc, NCRCMD_ICCS); 2767 sc->sc_prevphase = STATUS_PHASE; 2768 goto shortcut; /* i.e. expect status results soon */ 2769 break; 2770 2771 case INVALID_PHASE: 2772 break; 2773 2774 default: 2775 printf("%s: unexpected bus phase; resetting\n", 2776 sc->sc_dev.dv_xname); 2777 goto reset; 2778 } 2779 2780 out: 2781 return (1); 2782 2783 reset: 2784 ncr53c9x_init(sc, 1); 2785 goto out; 2786 2787 finish: 2788 ncr53c9x_done(sc, ecb); 2789 goto out; 2790 2791 sched: 2792 sc->sc_state = NCR_IDLE; 2793 ncr53c9x_sched(sc); 2794 goto out; 2795 2796 shortcut: 2797 /* 2798 * The idea is that many of the SCSI operations take very little 2799 * time, and going away and getting interrupted is too high an 2800 * overhead to pay. For example, selecting, sending a message 2801 * and command and then doing some work can be done in one "pass". 2802 * 2803 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2804 * at 40MHz. This needs testing. 2805 */ 2806 { 2807 struct timeval wait, cur; 2808 2809 microtime(&wait); 2810 wait.tv_usec += 50 / sc->sc_freq; 2811 if (wait.tv_usec > 1000000) { 2812 wait.tv_sec++; 2813 wait.tv_usec -= 1000000; 2814 } 2815 do { 2816 if (NCRDMA_ISINTR(sc)) 2817 goto again; 2818 microtime(&cur); 2819 } while (cur.tv_sec <= wait.tv_sec && 2820 cur.tv_usec <= wait.tv_usec); 2821 } 2822 goto out; 2823 } 2824 2825 void 2826 ncr53c9x_abort(sc, ecb) 2827 struct ncr53c9x_softc *sc; 2828 struct ncr53c9x_ecb *ecb; 2829 { 2830 2831 /* 2 secs for the abort */ 2832 ecb->timeout = NCR_ABORT_TIMEOUT; 2833 ecb->flags |= ECB_ABORT; 2834 2835 if (ecb == sc->sc_nexus) { 2836 int timeout; 2837 2838 /* 2839 * If we're still selecting, the message will be scheduled 2840 * after selection is complete. 2841 */ 2842 if (sc->sc_state == NCR_CONNECTED) 2843 ncr53c9x_sched_msgout(SEND_ABORT); 2844 2845 /* 2846 * Reschedule timeout. 2847 */ 2848 timeout = ecb->timeout; 2849 if (timeout > 1000000) 2850 timeout = (timeout / 1000) * hz; 2851 else 2852 timeout = (timeout * hz) / 1000; 2853 callout_reset(&ecb->xs->xs_callout, timeout, 2854 ncr53c9x_timeout, ecb); 2855 } else { 2856 /* 2857 * Just leave the command where it is. 2858 * XXX - what choice do we have but to reset the SCSI 2859 * eventually? 2860 */ 2861 if (sc->sc_state == NCR_IDLE) 2862 ncr53c9x_sched(sc); 2863 } 2864 } 2865 2866 void 2867 ncr53c9x_timeout(arg) 2868 void *arg; 2869 { 2870 struct ncr53c9x_ecb *ecb = arg; 2871 struct scsipi_xfer *xs = ecb->xs; 2872 struct scsipi_periph *periph = xs->xs_periph; 2873 struct ncr53c9x_softc *sc = 2874 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2875 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2876 int s; 2877 2878 scsipi_printaddr(periph); 2879 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2880 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2881 "msg(q %x,o %x) %s>", 2882 sc->sc_dev.dv_xname, 2883 ecb, ecb->flags, ecb->dleft, ecb->stat, 2884 sc->sc_state, sc->sc_nexus, 2885 NCR_READ_REG(sc, NCR_STAT), 2886 sc->sc_phase, sc->sc_prevphase, 2887 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2888 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2889 #if NCR53C9X_DEBUG > 1 2890 printf("TRACE: %s.", ecb->trace); 2891 #endif 2892 2893 s = splbio(); 2894 2895 if (ecb->flags & ECB_ABORT) { 2896 /* abort timed out */ 2897 printf(" AGAIN\n"); 2898 2899 ncr53c9x_init(sc, 1); 2900 } else { 2901 /* abort the operation that has timed out */ 2902 printf("\n"); 2903 xs->error = XS_TIMEOUT; 2904 ncr53c9x_abort(sc, ecb); 2905 2906 /* Disable sync mode if stuck in a data phase */ 2907 if (ecb == sc->sc_nexus && 2908 (ti->flags & T_SYNCMODE) != 0 && 2909 (sc->sc_phase & (MSGI|CDI)) == 0) { 2910 /* XXX ASYNC CALLBACK! */ 2911 scsipi_printaddr(periph); 2912 printf("sync negotiation disabled\n"); 2913 sc->sc_cfflags |= (1 << (periph->periph_target + 8)); 2914 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2915 } 2916 } 2917 2918 splx(s); 2919 } 2920 2921 void 2922 ncr53c9x_watch(arg) 2923 void *arg; 2924 { 2925 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2926 struct ncr53c9x_tinfo *ti; 2927 struct ncr53c9x_linfo *li; 2928 int t, s; 2929 /* Delete any structures that have not been used in 10min. */ 2930 time_t old = time.tv_sec - (10 * 60); 2931 2932 s = splbio(); 2933 for (t = 0; t < NCR_NTARG; t++) { 2934 ti = &sc->sc_tinfo[t]; 2935 li = LIST_FIRST(&ti->luns); 2936 while (li) { 2937 if (li->last_used < old && 2938 li->untagged == NULL && 2939 li->used == 0) { 2940 if (li->lun < NCR_NLUN) 2941 ti->lun[li->lun] = NULL; 2942 LIST_REMOVE(li, link); 2943 free(li, M_DEVBUF); 2944 /* Restart the search at the beginning */ 2945 li = LIST_FIRST(&ti->luns); 2946 continue; 2947 } 2948 li = LIST_NEXT(li, link); 2949 } 2950 } 2951 splx(s); 2952 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2953 } 2954 2955
Indexes created Mon Sep 29 21:09:56 GMT 2025