ncr53c9x.c revision 1.87 1 /* $NetBSD: ncr53c9x.c,v 1.87 2001/11/15 09:48:07 lukem Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/cdefs.h>
80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.87 2001/11/15 09:48:07 lukem Exp $");
81
82 #include <sys/param.h>
83 #include <sys/systm.h>
84 #include <sys/callout.h>
85 #include <sys/kernel.h>
86 #include <sys/errno.h>
87 #include <sys/ioctl.h>
88 #include <sys/device.h>
89 #include <sys/buf.h>
90 #include <sys/malloc.h>
91 #include <sys/proc.h>
92 #include <sys/queue.h>
93 #include <sys/pool.h>
94 #include <sys/scsiio.h>
95
96 #include <dev/scsipi/scsi_all.h>
97 #include <dev/scsipi/scsipi_all.h>
98 #include <dev/scsipi/scsiconf.h>
99 #include <dev/scsipi/scsi_message.h>
100
101 #include <dev/ic/ncr53c9xreg.h>
102 #include <dev/ic/ncr53c9xvar.h>
103
104 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
105 #ifdef DEBUG
106 int ncr53c9x_notag = 0;
107 #endif
108
109 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
110 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
111 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
112 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
113 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
114 struct scsipi_xfer *, int);
115 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
117 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
118 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
119 /*static*/ void ncr53c9x_timeout(void *arg);
120 /*static*/ void ncr53c9x_watch(void *arg);
121 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
122 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
123 struct ncr53c9x_ecb *);
124 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
125 caddr_t, int, struct proc *);
126
127 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
128 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
129 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
130
131 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
132 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
133 struct ncr53c9x_tinfo *);
134 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
135 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
136 int64_t lun);
137
138 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
139
140 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
141 #define NCR_RDFIFO_START 0
142 #define NCR_RDFIFO_CONTINUE 1
143
144
145 #define NCR_SET_COUNT(sc, size) do { \
146 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
147 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
148 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
149 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
150 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
151 } \
152 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
153 NCR_WRITE_REG(sc, NCR_RCH, 0); \
154 } \
155 } while (0)
156
157 static int ecb_pool_initialized = 0;
158 static struct pool ecb_pool;
159
160 /*
161 * Names for the NCR53c9x variants, correspnding to the variant tags
162 * in ncr53c9xvar.h.
163 */
164 static const char *ncr53c9x_variant_names[] = {
165 "ESP100",
166 "ESP100A",
167 "ESP200",
168 "NCR53C94",
169 "NCR53C96",
170 "ESP406",
171 "FAS408",
172 "FAS216",
173 "AM53C974",
174 "FAS366/HME",
175 };
176
177 /*
178 * Search linked list for LUN info by LUN id.
179 */
180 static struct ncr53c9x_linfo *
181 ncr53c9x_lunsearch(ti, lun)
182 struct ncr53c9x_tinfo *ti;
183 int64_t lun;
184 {
185 struct ncr53c9x_linfo *li;
186 LIST_FOREACH(li, &ti->luns, link)
187 if (li->lun == lun)
188 return (li);
189 return (NULL);
190 }
191
192 /*
193 * Attach this instance, and then all the sub-devices
194 */
195 void
196 ncr53c9x_attach(sc)
197 struct ncr53c9x_softc *sc;
198 {
199 struct scsipi_adapter *adapt = &sc->sc_adapter;
200 struct scsipi_channel *chan = &sc->sc_channel;
201
202 callout_init(&sc->sc_watchdog);
203 /*
204 * Allocate SCSI message buffers.
205 * Front-ends can override allocation to avoid alignment
206 * handling in the DMA engines. Note that that ncr53c9x_msgout()
207 * can request a 1 byte DMA transfer.
208 */
209 if (sc->sc_omess == NULL)
210 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
211
212 if (sc->sc_imess == NULL)
213 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
214
215 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
216 printf("out of memory\n");
217 return;
218 }
219
220 /*
221 * Note, the front-end has set us up to print the chip variation.
222 */
223 if (sc->sc_rev >= NCR_VARIANT_MAX) {
224 printf("\n%s: unknown variant %d, devices not attached\n",
225 sc->sc_dev.dv_xname, sc->sc_rev);
226 return;
227 }
228
229 printf(": %s, %dMHz, SCSI ID %d\n",
230 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
231
232 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
233
234 /* The value *must not* be == 1. Make it 2 */
235 if (sc->sc_ccf == 1)
236 sc->sc_ccf = 2;
237
238 /*
239 * The recommended timeout is 250ms. This register is loaded
240 * with a value calculated as follows, from the docs:
241 *
242 * (timout period) x (CLK frequency)
243 * reg = -------------------------------------
244 * 8192 x (Clock Conversion Factor)
245 *
246 * Since CCF has a linear relation to CLK, this generally computes
247 * to the constant of 153.
248 */
249 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
250
251 /* CCF register only has 3 bits; 0 is actually 8 */
252 sc->sc_ccf &= 7;
253
254 /*
255 * Fill in the scsipi_adapter.
256 */
257 adapt->adapt_dev = &sc->sc_dev;
258 adapt->adapt_nchannels = 1;
259 adapt->adapt_openings = 256;
260 adapt->adapt_max_periph = 256;
261 adapt->adapt_ioctl = ncr53c9x_ioctl;
262 /* adapt_request initialized by front-end */
263 /* adapt_minphys initialized by front-end */
264
265 /*
266 * Fill in the scsipi_channel.
267 */
268 memset(chan, 0, sizeof(*chan));
269 chan->chan_adapter = adapt;
270 chan->chan_bustype = &scsi_bustype;
271 chan->chan_channel = 0;
272 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */
273 chan->chan_nluns = 8;
274 chan->chan_id = sc->sc_id;
275
276 /*
277 * Add reference to adapter so that we drop the reference after
278 * config_found() to make sure the adatper is disabled.
279 */
280 if (scsipi_adapter_addref(adapt) != 0) {
281 printf("%s: unable to enable controller\n",
282 sc->sc_dev.dv_xname);
283 return;
284 }
285
286 /* Reset state & bus */
287 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
288 sc->sc_state = 0;
289 ncr53c9x_init(sc, 1);
290
291 /*
292 * Now try to attach all the sub-devices
293 */
294 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
295
296 scsipi_adapter_delref(adapt);
297 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
298 }
299
300 int
301 ncr53c9x_detach(sc, flags)
302 struct ncr53c9x_softc *sc;
303 int flags;
304 {
305 int error;
306
307 if (sc->sc_child) {
308 error = config_detach(sc->sc_child, flags);
309 if (error)
310 return (error);
311 }
312
313 free(sc->sc_imess, M_DEVBUF);
314 free(sc->sc_omess, M_DEVBUF);
315
316 return (0);
317 }
318
319 /*
320 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
321 * only this controller, but kills any on-going commands, and also stops
322 * and resets the DMA.
323 *
324 * After reset, registers are loaded with the defaults from the attach
325 * routine above.
326 */
327 void
328 ncr53c9x_reset(sc)
329 struct ncr53c9x_softc *sc;
330 {
331
332 /* reset DMA first */
333 NCRDMA_RESET(sc);
334
335 /* reset SCSI chip */
336 NCRCMD(sc, NCRCMD_RSTCHIP);
337 NCRCMD(sc, NCRCMD_NOP);
338 DELAY(500);
339
340 /* do these backwards, and fall through */
341 switch (sc->sc_rev) {
342 case NCR_VARIANT_ESP406:
343 case NCR_VARIANT_FAS408:
344 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
345 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
346 case NCR_VARIANT_AM53C974:
347 case NCR_VARIANT_FAS216:
348 case NCR_VARIANT_NCR53C94:
349 case NCR_VARIANT_NCR53C96:
350 case NCR_VARIANT_ESP200:
351 sc->sc_features |= NCR_F_HASCFG3;
352 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
353 case NCR_VARIANT_ESP100A:
354 sc->sc_features |= NCR_F_SELATN3;
355 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
356 case NCR_VARIANT_ESP100:
357 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
358 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
359 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
360 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
361 break;
362
363 case NCR_VARIANT_FAS366:
364 sc->sc_features |=
365 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
366 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
367 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
368 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
369 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
370 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
371 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
372 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
373 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
374 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
375 break;
376
377 default:
378 printf("%s: unknown revision code, assuming ESP100\n",
379 sc->sc_dev.dv_xname);
380 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
381 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
382 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
383 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
384 }
385
386 if (sc->sc_rev == NCR_VARIANT_AM53C974)
387 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
388
389 #if 0
390 printf("%s: ncr53c9x_reset: revision %d\n",
391 sc->sc_dev.dv_xname, sc->sc_rev);
392 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
393 "ccf 0x%x, timeout 0x%x\n",
394 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
395 sc->sc_ccf, sc->sc_timeout);
396 #endif
397 }
398
399 /*
400 * Reset the SCSI bus, but not the chip
401 */
402 void
403 ncr53c9x_scsi_reset(sc)
404 struct ncr53c9x_softc *sc;
405 {
406
407 (*sc->sc_glue->gl_dma_stop)(sc);
408
409 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
410 NCRCMD(sc, NCRCMD_RSTSCSI);
411 }
412
413 /*
414 * Initialize ncr53c9x state machine
415 */
416 void
417 ncr53c9x_init(sc, doreset)
418 struct ncr53c9x_softc *sc;
419 int doreset;
420 {
421 struct ncr53c9x_ecb *ecb;
422 struct ncr53c9x_linfo *li;
423 int i, r;
424
425 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
426
427 if (!ecb_pool_initialized) {
428 /* All instances share this pool */
429 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
430 "ncr53c9x_ecb", 0, NULL, NULL, 0);
431 ecb_pool_initialized = 1;
432 }
433
434 if (sc->sc_state == 0) {
435 /* First time through; initialize. */
436
437 TAILQ_INIT(&sc->ready_list);
438 sc->sc_nexus = NULL;
439 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
440 for (r = 0; r < NCR_NTARG; r++) {
441 LIST_INIT(&sc->sc_tinfo[r].luns);
442 }
443 } else {
444 /* Cancel any active commands. */
445 sc->sc_state = NCR_CLEANING;
446 sc->sc_msgify = 0;
447 if ((ecb = sc->sc_nexus) != NULL) {
448 ecb->xs->error = XS_TIMEOUT;
449 ncr53c9x_done(sc, ecb);
450 }
451 /* Cancel outstanding disconnected commands on each LUN */
452 for (r = 0; r < 8; r++) {
453 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
454 if ((ecb = li->untagged) != NULL) {
455 li->untagged = NULL;
456 /*
457 * XXXXXXX
458 *
459 * Should we terminate a command
460 * that never reached the disk?
461 */
462 li->busy = 0;
463 ecb->xs->error = XS_TIMEOUT;
464 ncr53c9x_done(sc, ecb);
465 }
466 for (i = 0; i < 256; i++)
467 if ((ecb = li->queued[i])) {
468 li->queued[i] = NULL;
469 ecb->xs->error = XS_TIMEOUT;
470 ncr53c9x_done(sc, ecb);
471 }
472 li->used = 0;
473 }
474 }
475 }
476
477 /*
478 * reset the chip to a known state
479 */
480 ncr53c9x_reset(sc);
481
482 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
483 for (r = 0; r < 8; r++) {
484 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
485 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
486
487 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
488 ? 0 : T_SYNCHOFF) |
489 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
490 T_NEED_TO_RESET;
491 #ifdef DEBUG
492 if (ncr53c9x_notag)
493 ti->flags &= ~T_TAG;
494 #endif
495 ti->period = sc->sc_minsync;
496 ti->offset = 0;
497 ti->cfg3 = 0;
498 }
499
500 if (doreset) {
501 sc->sc_state = NCR_SBR;
502 NCRCMD(sc, NCRCMD_RSTSCSI);
503 } else {
504 sc->sc_state = NCR_IDLE;
505 ncr53c9x_sched(sc);
506 }
507 }
508
509 /*
510 * Read the NCR registers, and save their contents for later use.
511 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
512 * NCR_INTR - so make sure it is the last read.
513 *
514 * I think that (from reading the docs) most bits in these registers
515 * only make sense when he DMA CSR has an interrupt showing. Call only
516 * if an interrupt is pending.
517 */
518 __inline__ void
519 ncr53c9x_readregs(sc)
520 struct ncr53c9x_softc *sc;
521 {
522
523 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
524 /* Only the stepo bits are of interest */
525 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
526
527 if (sc->sc_rev == NCR_VARIANT_FAS366)
528 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
529
530 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
531
532 if (sc->sc_glue->gl_clear_latched_intr != NULL)
533 (*sc->sc_glue->gl_clear_latched_intr)(sc);
534
535 /*
536 * Determine the SCSI bus phase, return either a real SCSI bus phase
537 * or some pseudo phase we use to detect certain exceptions.
538 */
539
540 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
541 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
542
543 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
544 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
545 }
546
547 /*
548 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
549 */
550 static inline int
551 ncr53c9x_stp2cpb(sc, period)
552 struct ncr53c9x_softc *sc;
553 int period;
554 {
555 int v;
556 v = (sc->sc_freq * period) / 250;
557 if (ncr53c9x_cpb2stp(sc, v) < period)
558 /* Correct round-down error */
559 v++;
560 return (v);
561 }
562
563 static inline void
564 ncr53c9x_setsync(sc, ti)
565 struct ncr53c9x_softc *sc;
566 struct ncr53c9x_tinfo *ti;
567 {
568 u_char syncoff, synctp;
569 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
570
571 if (ti->flags & T_SYNCMODE) {
572 syncoff = ti->offset;
573 synctp = ncr53c9x_stp2cpb(sc, ti->period);
574 if (sc->sc_features & NCR_F_FASTSCSI) {
575 /*
576 * If the period is 200ns or less (ti->period <= 50),
577 * put the chip in Fast SCSI mode.
578 */
579 if (ti->period <= 50)
580 /*
581 * There are (at least) 4 variations of the
582 * configuration 3 register. The drive attach
583 * routine sets the appropriate bit to put the
584 * chip into Fast SCSI mode so that it doesn't
585 * have to be figured out here each time.
586 */
587 cfg3 |= sc->sc_cfg3_fscsi;
588 }
589
590 /*
591 * Am53c974 requires different SYNCTP values when the
592 * FSCSI bit is off.
593 */
594 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
595 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
596 synctp--;
597 } else {
598 syncoff = 0;
599 synctp = 0;
600 }
601
602 if (sc->sc_features & NCR_F_HASCFG3)
603 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
604
605 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
606 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
607 }
608
609 /*
610 * Send a command to a target, set the driver state to NCR_SELECTING
611 * and let the caller take care of the rest.
612 *
613 * Keeping this as a function allows me to say that this may be done
614 * by DMA instead of programmed I/O soon.
615 */
616 void
617 ncr53c9x_select(sc, ecb)
618 struct ncr53c9x_softc *sc;
619 struct ncr53c9x_ecb *ecb;
620 {
621 struct scsipi_periph *periph = ecb->xs->xs_periph;
622 int target = periph->periph_target;
623 int lun = periph->periph_lun;
624 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
625 int tiflags = ti->flags;
626 u_char *cmd;
627 int clen;
628 int selatn3, selatns;
629 size_t dmasize;
630
631 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
632 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
633
634 sc->sc_state = NCR_SELECTING;
635 /*
636 * Schedule the timeout now, the first time we will go away
637 * expecting to come back due to an interrupt, because it is
638 * always possible that the interrupt may never happen.
639 */
640 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
641 int timeout = ecb->timeout;
642
643 if (timeout > 1000000)
644 timeout = (timeout / 1000) * hz;
645 else
646 timeout = (timeout * hz) / 1000;
647
648 callout_reset(&ecb->xs->xs_callout, timeout,
649 ncr53c9x_timeout, ecb);
650 }
651
652 /*
653 * The docs say the target register is never reset, and I
654 * can't think of a better place to set it
655 */
656 if (sc->sc_rev == NCR_VARIANT_FAS366) {
657 NCRCMD(sc, NCRCMD_FLUSH);
658 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
659 } else {
660 NCR_WRITE_REG(sc, NCR_SELID, target);
661 }
662 ncr53c9x_setsync(sc, ti);
663
664 if ((ecb->flags & ECB_SENSE) != 0) {
665 /*
666 * For REQUEST SENSE, we should not send an IDENTIFY or
667 * otherwise mangle the target. There should be no MESSAGE IN
668 * phase.
669 */
670 if (sc->sc_features & NCR_F_DMASELECT) {
671 /* setup DMA transfer for command */
672 dmasize = clen = ecb->clen;
673 sc->sc_cmdlen = clen;
674 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
675
676 /* Program the SCSI counter */
677 NCR_SET_COUNT(sc, dmasize);
678
679 if (sc->sc_rev != NCR_VARIANT_FAS366)
680 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
681
682 /* And get the targets attention */
683 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
684 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
685 &dmasize);
686 NCRDMA_GO(sc);
687 } else {
688 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
689 NCRCMD(sc, NCRCMD_SELNATN);
690 }
691 return;
692 }
693
694 selatn3 = selatns = 0;
695 if (ecb->tag[0] != 0) {
696 if (sc->sc_features & NCR_F_SELATN3)
697 /* use SELATN3 to send tag messages */
698 selatn3 = 1;
699 else
700 /* We don't have SELATN3; use SELATNS to send tags */
701 selatns = 1;
702 }
703
704 if (ti->flags & T_NEGOTIATE) {
705 /* We have to use SELATNS to send sync/wide messages */
706 selatn3 = 0;
707 selatns = 1;
708 }
709
710 cmd = (u_char *)&ecb->cmd.cmd;
711
712 if (selatn3) {
713 /* We'll use tags with SELATN3 */
714 clen = ecb->clen + 3;
715 cmd -= 3;
716 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
717 cmd[1] = ecb->tag[0]; /* msg[1] */
718 cmd[2] = ecb->tag[1]; /* msg[2] */
719 } else {
720 /* We don't have tags, or will send messages with SELATNS */
721 clen = ecb->clen + 1;
722 cmd -= 1;
723 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
724 }
725
726 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
727
728 /* setup DMA transfer for command */
729 dmasize = clen;
730 sc->sc_cmdlen = clen;
731 sc->sc_cmdp = cmd;
732
733 /* Program the SCSI counter */
734 NCR_SET_COUNT(sc, dmasize);
735
736 /* load the count in */
737 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
738 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
739
740 /* And get the targets attention */
741 if (selatn3) {
742 sc->sc_msgout = SEND_TAG;
743 sc->sc_flags |= NCR_ATN;
744 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
745 } else
746 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
747 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
748 NCRDMA_GO(sc);
749 return;
750 }
751
752 /*
753 * Who am I. This is where we tell the target that we are
754 * happy for it to disconnect etc.
755 */
756
757 /* Now get the command into the FIFO */
758 ncr53c9x_wrfifo(sc, cmd, clen);
759
760 /* And get the targets attention */
761 if (selatns) {
762 NCR_MISC(("SELATNS \n"));
763 /* Arbitrate, select and stop after IDENTIFY message */
764 NCRCMD(sc, NCRCMD_SELATNS);
765 } else if (selatn3) {
766 sc->sc_msgout = SEND_TAG;
767 sc->sc_flags |= NCR_ATN;
768 NCRCMD(sc, NCRCMD_SELATN3);
769 } else
770 NCRCMD(sc, NCRCMD_SELATN);
771 }
772
773 void
774 ncr53c9x_free_ecb(sc, ecb)
775 struct ncr53c9x_softc *sc;
776 struct ncr53c9x_ecb *ecb;
777 {
778 int s;
779
780 s = splbio();
781 ecb->flags = 0;
782 pool_put(&ecb_pool, (void *)ecb);
783 splx(s);
784 return;
785 }
786
787 struct ncr53c9x_ecb *
788 ncr53c9x_get_ecb(sc, flags)
789 struct ncr53c9x_softc *sc;
790 int flags;
791 {
792 struct ncr53c9x_ecb *ecb;
793 int s;
794
795 s = splbio();
796 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT);
797 splx(s);
798 if (ecb) {
799 memset(ecb, 0, sizeof(*ecb));
800 ecb->flags |= ECB_ALLOC;
801 }
802 return (ecb);
803 }
804
805 /*
806 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
807 */
808
809 /*
810 * Start a SCSI-command
811 * This function is called by the higher level SCSI-driver to queue/run
812 * SCSI-commands.
813 */
814
815 void
816 ncr53c9x_scsipi_request(chan, req, arg)
817 struct scsipi_channel *chan;
818 scsipi_adapter_req_t req;
819 void *arg;
820 {
821 struct scsipi_xfer *xs;
822 struct scsipi_periph *periph;
823 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
824 struct ncr53c9x_ecb *ecb;
825 int s, flags;
826
827 NCR_TRACE(("[ncr53c9x_scsipi_request] "));
828
829 switch (req) {
830 case ADAPTER_REQ_RUN_XFER:
831 xs = arg;
832 periph = xs->xs_periph;
833 flags = xs->xs_control;
834
835 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
836 periph->periph_target));
837
838 /* Get an ECB to use. */
839 ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
840 /*
841 * This should never happen as we track resources
842 * in the mid-layer.
843 */
844 if (ecb == NULL) {
845 scsipi_printaddr(periph);
846 printf("unable to allocate ecb\n");
847 xs->error = XS_RESOURCE_SHORTAGE;
848 scsipi_done(xs);
849 return;
850 }
851
852 /* Initialize ecb */
853 ecb->xs = xs;
854 ecb->timeout = xs->timeout;
855
856 if (flags & XS_CTL_RESET) {
857 ecb->flags |= ECB_RESET;
858 ecb->clen = 0;
859 ecb->dleft = 0;
860 } else {
861 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen);
862 ecb->clen = xs->cmdlen;
863 ecb->daddr = xs->data;
864 ecb->dleft = xs->datalen;
865 }
866 ecb->stat = 0;
867
868 s = splbio();
869
870 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
871 ecb->flags |= ECB_READY;
872 if (sc->sc_state == NCR_IDLE)
873 ncr53c9x_sched(sc);
874
875 splx(s);
876
877 if ((flags & XS_CTL_POLL) == 0)
878 return;
879
880 /* Not allowed to use interrupts, use polling instead */
881 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
882 ncr53c9x_timeout(ecb);
883 if (ncr53c9x_poll(sc, xs, ecb->timeout))
884 ncr53c9x_timeout(ecb);
885 }
886 return;
887
888 case ADAPTER_REQ_GROW_RESOURCES:
889 /* XXX Not supported. */
890 return;
891
892 case ADAPTER_REQ_SET_XFER_MODE:
893 {
894 struct ncr53c9x_tinfo *ti;
895 struct scsipi_xfer_mode *xm = arg;
896
897 ti = &sc->sc_tinfo[xm->xm_target];
898 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
899 ti->period = 0;
900 ti->offset = 0;
901
902 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 &&
903 (xm->xm_mode & PERIPH_CAP_TQING))
904 ti->flags |= T_TAG;
905 else
906 ti->flags &= ~T_TAG;
907
908 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
909 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
910 sc->sc_dev.dv_xname, xm->xm_target));
911 if (sc->sc_rev == NCR_VARIANT_FAS366) {
912 ti->flags |= T_WIDE;
913 ti->width = 1;
914 }
915 }
916
917 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
918 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
919 NCR_MISC(("%s: target %d: sync negotiation\n",
920 sc->sc_dev.dv_xname, xm->xm_target));
921 ti->flags |= T_NEGOTIATE;
922 ti->period = sc->sc_minsync;
923 }
924 /*
925 * If we're not going to negotiate, send the notification
926 * now, since it won't happen later.
927 */
928 if ((ti->flags & T_NEGOTIATE) == 0)
929 ncr53c9x_update_xfer_mode(sc, xm->xm_target);
930 return;
931 }
932 }
933 }
934
935 void
936 ncr53c9x_update_xfer_mode(sc, target)
937 struct ncr53c9x_softc *sc;
938 int target;
939 {
940 struct scsipi_xfer_mode xm;
941 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
942
943 xm.xm_target = target;
944 xm.xm_mode = 0;
945 xm.xm_period = 0;
946 xm.xm_offset = 0;
947
948 if (ti->flags & T_SYNCMODE) {
949 xm.xm_mode |= PERIPH_CAP_SYNC;
950 xm.xm_period = ti->period;
951 xm.xm_offset = ti->offset;
952 }
953 if (ti->width)
954 xm.xm_mode |= PERIPH_CAP_WIDE16;
955
956 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
957 xm.xm_mode |= PERIPH_CAP_TQING;
958
959 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
960 }
961
962 /*
963 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
964 */
965 int
966 ncr53c9x_poll(sc, xs, count)
967 struct ncr53c9x_softc *sc;
968 struct scsipi_xfer *xs;
969 int count;
970 {
971
972 NCR_TRACE(("[ncr53c9x_poll] "));
973 while (count) {
974 if (NCRDMA_ISINTR(sc)) {
975 ncr53c9x_intr(sc);
976 }
977 #if alternatively
978 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
979 ncr53c9x_intr(sc);
980 #endif
981 if ((xs->xs_status & XS_STS_DONE) != 0)
982 return (0);
983 if (sc->sc_state == NCR_IDLE) {
984 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
985 ncr53c9x_sched(sc);
986 }
987 DELAY(1000);
988 count--;
989 }
990 return (1);
991 }
992
993 int
994 ncr53c9x_ioctl(chan, cmd, arg, flag, p)
995 struct scsipi_channel *chan;
996 u_long cmd;
997 caddr_t arg;
998 int flag;
999 struct proc *p;
1000 {
1001 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */
1002 int s, error = 0;
1003
1004 s = splbio();
1005
1006 switch (cmd) {
1007 default:
1008 error = ENOTTY;
1009 break;
1010 }
1011 splx(s);
1012 return (error);
1013 }
1014
1015
1016 /*
1017 * LOW LEVEL SCSI UTILITIES
1018 */
1019
1020 /*
1021 * Schedule a scsi operation. This has now been pulled out of the interrupt
1022 * handler so that we may call it from ncr53c9x_scsipi_request and
1023 * ncr53c9x_done. This may save us an unecessary interrupt just to get
1024 * things going. Should only be called when state == NCR_IDLE and at bio pl.
1025 */
1026 void
1027 ncr53c9x_sched(sc)
1028 struct ncr53c9x_softc *sc;
1029 {
1030 struct ncr53c9x_ecb *ecb;
1031 struct scsipi_periph *periph;
1032 struct ncr53c9x_tinfo *ti;
1033 int lun;
1034 struct ncr53c9x_linfo *li;
1035 int s, tag;
1036
1037 NCR_TRACE(("[ncr53c9x_sched] "));
1038 if (sc->sc_state != NCR_IDLE)
1039 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1040
1041 /*
1042 * Find first ecb in ready queue that is for a target/lunit
1043 * combinations that is not busy.
1044 */
1045 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1046 ecb = TAILQ_NEXT(ecb, chain)) {
1047 periph = ecb->xs->xs_periph;
1048 ti = &sc->sc_tinfo[periph->periph_target];
1049 lun = periph->periph_lun;
1050
1051 /* Select type of tag for this command */
1052 if ((ti->flags & (T_RSELECTOFF)) != 0)
1053 tag = 0;
1054 else if ((ti->flags & (T_TAG)) == 0)
1055 tag = 0;
1056 else if ((ecb->flags & ECB_SENSE) != 0)
1057 tag = 0;
1058 else
1059 tag = ecb->xs->xs_tag_type;
1060 #if 0
1061 /* XXXX Use tags for polled commands? */
1062 if (ecb->xs->xs_control & XS_CTL_POLL)
1063 tag = 0;
1064 #endif
1065
1066 s = splbio();
1067 li = TINFO_LUN(ti, lun);
1068 if (li == NULL) {
1069 /* Initialize LUN info and add to list. */
1070 if ((li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT))
1071 == NULL) {
1072 splx(s);
1073 continue;
1074 }
1075 memset(li, 0, sizeof(*li));
1076 li->lun = lun;
1077
1078 LIST_INSERT_HEAD(&ti->luns, li, link);
1079 if (lun < NCR_NLUN)
1080 ti->lun[lun] = li;
1081 }
1082 li->last_used = time.tv_sec;
1083 if (tag == 0) {
1084 /* Try to issue this as an un-tagged command */
1085 if (li->untagged == NULL)
1086 li->untagged = ecb;
1087 }
1088 if (li->untagged != NULL) {
1089 tag = 0;
1090 if ((li->busy != 1) && li->used == 0) {
1091 /* We need to issue this untagged command now */
1092 ecb = li->untagged;
1093 periph = ecb->xs->xs_periph;
1094 } else {
1095 /* Not ready yet */
1096 splx(s);
1097 continue;
1098 }
1099 }
1100 ecb->tag[0] = tag;
1101 if (tag != 0) {
1102 li->queued[ecb->xs->xs_tag_id] = ecb;
1103 ecb->tag[1] = ecb->xs->xs_tag_id;
1104 li->used++;
1105 }
1106 splx(s);
1107 if (li->untagged != NULL && (li->busy != 1)) {
1108 li->busy = 1;
1109 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1110 ecb->flags &= ~ECB_READY;
1111 sc->sc_nexus = ecb;
1112 ncr53c9x_select(sc, ecb);
1113 break;
1114 }
1115 if (li->untagged == NULL && tag != 0) {
1116 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1117 ecb->flags &= ~ECB_READY;
1118 sc->sc_nexus = ecb;
1119 ncr53c9x_select(sc, ecb);
1120 break;
1121 } else
1122 NCR_MISC(("%d:%d busy\n",
1123 periph->periph_target,
1124 periph->periph_lun));
1125 }
1126 }
1127
1128 void
1129 ncr53c9x_sense(sc, ecb)
1130 struct ncr53c9x_softc *sc;
1131 struct ncr53c9x_ecb *ecb;
1132 {
1133 struct scsipi_xfer *xs = ecb->xs;
1134 struct scsipi_periph *periph = xs->xs_periph;
1135 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1136 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1137 struct ncr53c9x_linfo *li;
1138 int lun = periph->periph_lun;
1139
1140 NCR_MISC(("requesting sense "));
1141 /* Next, setup a request sense command block */
1142 memset(ss, 0, sizeof(*ss));
1143 ss->opcode = REQUEST_SENSE;
1144 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1145 ss->length = sizeof(struct scsipi_sense_data);
1146 ecb->clen = sizeof(*ss);
1147 ecb->daddr = (char *)&xs->sense.scsi_sense;
1148 ecb->dleft = sizeof(struct scsipi_sense_data);
1149 ecb->flags |= ECB_SENSE;
1150 ecb->timeout = NCR_SENSE_TIMEOUT;
1151 ti->senses++;
1152 li = TINFO_LUN(ti, lun);
1153 if (li->busy)
1154 li->busy = 0;
1155 ncr53c9x_dequeue(sc, ecb);
1156 li->untagged = ecb; /* must be executed first to fix C/A */
1157 li->busy = 2;
1158 if (ecb == sc->sc_nexus) {
1159 ncr53c9x_select(sc, ecb);
1160 } else {
1161 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1162 ecb->flags |= ECB_READY;
1163 if (sc->sc_state == NCR_IDLE)
1164 ncr53c9x_sched(sc);
1165 }
1166 }
1167
1168 /*
1169 * POST PROCESSING OF SCSI_CMD (usually current)
1170 */
1171 void
1172 ncr53c9x_done(sc, ecb)
1173 struct ncr53c9x_softc *sc;
1174 struct ncr53c9x_ecb *ecb;
1175 {
1176 struct scsipi_xfer *xs = ecb->xs;
1177 struct scsipi_periph *periph = xs->xs_periph;
1178 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1179 int lun = periph->periph_lun;
1180 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1181
1182 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1183
1184 callout_stop(&ecb->xs->xs_callout);
1185
1186 /*
1187 * Now, if we've come here with no error code, i.e. we've kept the
1188 * initial XS_NOERROR, and the status code signals that we should
1189 * check sense, we'll need to set up a request sense cmd block and
1190 * push the command back into the ready queue *before* any other
1191 * commands for this target/lunit, else we lose the sense info.
1192 * We don't support chk sense conditions for the request sense cmd.
1193 */
1194 if (xs->error == XS_NOERROR) {
1195 xs->status = ecb->stat;
1196 if ((ecb->flags & ECB_ABORT) != 0) {
1197 xs->error = XS_TIMEOUT;
1198 } else if ((ecb->flags & ECB_SENSE) != 0) {
1199 xs->error = XS_SENSE;
1200 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1201 /* First, save the return values */
1202 xs->resid = ecb->dleft;
1203 ncr53c9x_sense(sc, ecb);
1204 return;
1205 } else {
1206 xs->resid = ecb->dleft;
1207 }
1208 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY)
1209 xs->error = XS_BUSY;
1210 }
1211
1212 #ifdef NCR53C9X_DEBUG
1213 if (ncr53c9x_debug & NCR_SHOWMISC) {
1214 if (xs->resid != 0)
1215 printf("resid=%d ", xs->resid);
1216 if (xs->error == XS_SENSE)
1217 printf("sense=0x%02x\n",
1218 xs->sense.scsi_sense.error_code);
1219 else
1220 printf("error=%d\n", xs->error);
1221 }
1222 #endif
1223
1224 /*
1225 * Remove the ECB from whatever queue it's on.
1226 */
1227 ncr53c9x_dequeue(sc, ecb);
1228 if (ecb == sc->sc_nexus) {
1229 sc->sc_nexus = NULL;
1230 if (sc->sc_state != NCR_CLEANING) {
1231 sc->sc_state = NCR_IDLE;
1232 ncr53c9x_sched(sc);
1233 }
1234 }
1235
1236 if (xs->error == XS_SELTIMEOUT) {
1237 /* Selection timeout -- discard this LUN if empty */
1238 if (li->untagged == NULL && li->used == 0) {
1239 if (lun < NCR_NLUN)
1240 ti->lun[lun] = NULL;
1241 LIST_REMOVE(li, link);
1242 free(li, M_DEVBUF);
1243 }
1244 }
1245
1246 ncr53c9x_free_ecb(sc, ecb);
1247 ti->cmds++;
1248 scsipi_done(xs);
1249 }
1250
1251 void
1252 ncr53c9x_dequeue(sc, ecb)
1253 struct ncr53c9x_softc *sc;
1254 struct ncr53c9x_ecb *ecb;
1255 {
1256 struct ncr53c9x_tinfo *ti =
1257 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1258 struct ncr53c9x_linfo *li;
1259 int64_t lun = ecb->xs->xs_periph->periph_lun;
1260
1261 li = TINFO_LUN(ti, lun);
1262 #ifdef DIAGNOSTIC
1263 if (li == NULL || li->lun != lun)
1264 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1265 (long long) lun, ecb);
1266 #endif
1267 if (li->untagged == ecb) {
1268 li->busy = 0;
1269 li->untagged = NULL;
1270 }
1271 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1272 #ifdef DIAGNOSTIC
1273 if (li->queued[ecb->tag[1]] != NULL &&
1274 (li->queued[ecb->tag[1]] != ecb))
1275 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1276 "instead of ecb %p\n", ecb->tag[1],
1277 (long long) lun,
1278 li->queued[ecb->tag[1]], ecb);
1279 #endif
1280 li->queued[ecb->tag[1]] = NULL;
1281 li->used--;
1282 }
1283
1284 if ((ecb->flags & ECB_READY) != 0) {
1285 ecb->flags &= ~ECB_READY;
1286 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1287 }
1288 }
1289
1290 /*
1291 * INTERRUPT/PROTOCOL ENGINE
1292 */
1293
1294 /*
1295 * Schedule an outgoing message by prioritizing it, and asserting
1296 * attention on the bus. We can only do this when we are the initiator
1297 * else there will be an illegal command interrupt.
1298 */
1299 #define ncr53c9x_sched_msgout(m) \
1300 do { \
1301 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1302 NCRCMD(sc, NCRCMD_SETATN); \
1303 sc->sc_flags |= NCR_ATN; \
1304 sc->sc_msgpriq |= (m); \
1305 } while (0)
1306
1307 static void
1308 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1309 {
1310 NCR_MISC(("[flushfifo] "));
1311
1312 NCRCMD(sc, NCRCMD_FLUSH);
1313
1314 if (sc->sc_phase == COMMAND_PHASE ||
1315 sc->sc_phase == MESSAGE_OUT_PHASE)
1316 DELAY(2);
1317 }
1318
1319 static int
1320 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1321 {
1322 int i, n;
1323 u_char *buf;
1324
1325 switch(how) {
1326 case NCR_RDFIFO_START:
1327 buf = sc->sc_imess;
1328 sc->sc_imlen = 0;
1329 break;
1330 case NCR_RDFIFO_CONTINUE:
1331 buf = sc->sc_imess + sc->sc_imlen;
1332 break;
1333 default:
1334 panic("ncr53c9x_rdfifo: bad flag\n");
1335 break;
1336 }
1337
1338 /*
1339 * XXX buffer (sc_imess) size for message
1340 */
1341
1342 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1343
1344 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1345 n *= 2;
1346
1347 for (i = 0; i < n; i++)
1348 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1349
1350 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) {
1351
1352 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1353 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1354
1355 NCR_READ_REG(sc, NCR_FIFO);
1356
1357 ncr53c9x_flushfifo(sc);
1358 }
1359 } else {
1360 for (i = 0; i < n; i++)
1361 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1362 }
1363
1364 sc->sc_imlen += i;
1365
1366 #ifdef NCR53C9X_DEBUG
1367 {
1368 int j;
1369
1370 NCR_TRACE(("\n[rdfifo %s (%d):",
1371 (how == NCR_RDFIFO_START) ? "start" : "cont",
1372 (int)sc->sc_imlen));
1373 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1374 for (j = 0; j < sc->sc_imlen; j++)
1375 printf(" %02x", sc->sc_imess[j]);
1376 printf("]\n");
1377 }
1378 }
1379 #endif
1380 return sc->sc_imlen;
1381 }
1382
1383 static void
1384 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1385 {
1386 int i;
1387
1388 #ifdef NCR53C9X_DEBUG
1389 NCR_MISC(("[wrfifo(%d):", len));
1390 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1391 for (i = 0; i < len; i++)
1392 printf(" %02x", p[i]);
1393 printf("]\n");
1394 }
1395 #endif
1396
1397 for (i = 0; i < len; i++) {
1398 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1399
1400 if (sc->sc_rev == NCR_VARIANT_FAS366)
1401 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1402 }
1403 }
1404
1405 int
1406 ncr53c9x_reselect(sc, message, tagtype, tagid)
1407 struct ncr53c9x_softc *sc;
1408 int message;
1409 int tagtype, tagid;
1410 {
1411 u_char selid, target, lun;
1412 struct ncr53c9x_ecb *ecb = NULL;
1413 struct ncr53c9x_tinfo *ti;
1414 struct ncr53c9x_linfo *li;
1415
1416
1417 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1418 target = sc->sc_selid;
1419 } else {
1420 /*
1421 * The SCSI chip made a snapshot of the data bus
1422 * while the reselection was being negotiated.
1423 * This enables us to determine which target did
1424 * the reselect.
1425 */
1426 selid = sc->sc_selid & ~(1 << sc->sc_id);
1427 if (selid & (selid - 1)) {
1428 printf("%s: reselect with invalid selid %02x;"
1429 " sending DEVICE RESET\n",
1430 sc->sc_dev.dv_xname, selid);
1431 goto reset;
1432 }
1433
1434 target = ffs(selid) - 1;
1435 }
1436 lun = message & 0x07;
1437
1438 /*
1439 * Search wait queue for disconnected cmd
1440 * The list should be short, so I haven't bothered with
1441 * any more sophisticated structures than a simple
1442 * singly linked list.
1443 */
1444 ti = &sc->sc_tinfo[target];
1445 li = TINFO_LUN(ti, lun);
1446
1447 /*
1448 * We can get as far as the LUN with the IDENTIFY
1449 * message. Check to see if we're running an
1450 * un-tagged command. Otherwise ack the IDENTIFY
1451 * and wait for a tag message.
1452 */
1453 if (li != NULL) {
1454 if (li->untagged != NULL && li->busy)
1455 ecb = li->untagged;
1456 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1457 /* Wait for tag to come by */
1458 sc->sc_state = NCR_IDENTIFIED;
1459 return (0);
1460 } else if (tagtype)
1461 ecb = li->queued[tagid];
1462 }
1463 if (ecb == NULL) {
1464 printf("%s: reselect from target %d lun %d tag %x:%x "
1465 "with no nexus; sending ABORT\n",
1466 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1467 goto abort;
1468 }
1469
1470 /* Make this nexus active again. */
1471 sc->sc_state = NCR_CONNECTED;
1472 sc->sc_nexus = ecb;
1473 ncr53c9x_setsync(sc, ti);
1474
1475 if (ecb->flags & ECB_RESET)
1476 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1477 else if (ecb->flags & ECB_ABORT)
1478 ncr53c9x_sched_msgout(SEND_ABORT);
1479
1480 /* Do an implicit RESTORE POINTERS. */
1481 sc->sc_dp = ecb->daddr;
1482 sc->sc_dleft = ecb->dleft;
1483
1484 return (0);
1485
1486 reset:
1487 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1488 return (1);
1489
1490 abort:
1491 ncr53c9x_sched_msgout(SEND_ABORT);
1492 return (1);
1493 }
1494
1495 static inline int
1496 __verify_msg_format(u_char *p, int len)
1497 {
1498
1499 if (len == 1 && MSG_IS1BYTE(p[0]))
1500 return 1;
1501 if (len == 2 && MSG_IS2BYTE(p[0]))
1502 return 1;
1503 if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
1504 len == p[1] + 2)
1505 return 1;
1506
1507 return 0;
1508 }
1509
1510 /*
1511 * Get an incoming message as initiator.
1512 *
1513 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1514 * byte in the FIFO
1515 */
1516 void
1517 ncr53c9x_msgin(sc)
1518 struct ncr53c9x_softc *sc;
1519 {
1520
1521 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1522
1523 if (sc->sc_imlen == 0) {
1524 printf("%s: msgin: no msg byte available\n",
1525 sc->sc_dev.dv_xname);
1526 return;
1527 }
1528
1529 /*
1530 * Prepare for a new message. A message should (according
1531 * to the SCSI standard) be transmitted in one single
1532 * MESSAGE_IN_PHASE. If we have been in some other phase,
1533 * then this is a new message.
1534 */
1535 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1536 sc->sc_state != NCR_RESELECTED) {
1537 printf("%s: phase change, dropping message, "
1538 "prev %d, state %d\n",
1539 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1540 sc->sc_flags &= ~NCR_DROP_MSGI;
1541 sc->sc_imlen = 0;
1542 }
1543
1544 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1545
1546 /*
1547 * If we're going to reject the message, don't bother storing
1548 * the incoming bytes. But still, we need to ACK them.
1549 */
1550 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1551 NCRCMD(sc, NCRCMD_MSGOK);
1552 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1553 return;
1554 }
1555
1556 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1557 ncr53c9x_sched_msgout(SEND_REJECT);
1558 sc->sc_flags |= NCR_DROP_MSGI;
1559 } else {
1560 u_char *pb;
1561 int plen;
1562
1563 switch (sc->sc_state) {
1564 /*
1565 * if received message is the first of reselection
1566 * then first byte is selid, and then message
1567 */
1568 case NCR_RESELECTED:
1569 pb = sc->sc_imess + 1;
1570 plen = sc->sc_imlen - 1;
1571 break;
1572 default:
1573 pb = sc->sc_imess;
1574 plen = sc->sc_imlen;
1575 break;
1576 }
1577
1578 if (__verify_msg_format(pb, plen))
1579 goto gotit;
1580 }
1581
1582 /* Ack what we have so far */
1583 NCRCMD(sc, NCRCMD_MSGOK);
1584 return;
1585
1586 gotit:
1587 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1588 /* we got complete message, flush the imess, */
1589 /* XXX nobody uses imlen below */
1590 sc->sc_imlen = 0;
1591 /*
1592 * Now we should have a complete message (1 byte, 2 byte
1593 * and moderately long extended messages). We only handle
1594 * extended messages which total length is shorter than
1595 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1596 */
1597 switch (sc->sc_state) {
1598 struct ncr53c9x_ecb *ecb;
1599 struct ncr53c9x_tinfo *ti;
1600 struct ncr53c9x_linfo *li;
1601 int lun;
1602
1603 case NCR_CONNECTED:
1604 ecb = sc->sc_nexus;
1605 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1606
1607 switch (sc->sc_imess[0]) {
1608 case MSG_CMDCOMPLETE:
1609 NCR_MSGS(("cmdcomplete "));
1610 if (sc->sc_dleft < 0) {
1611 scsipi_printaddr(ecb->xs->xs_periph);
1612 printf("got %ld extra bytes\n",
1613 -(long)sc->sc_dleft);
1614 sc->sc_dleft = 0;
1615 }
1616 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1617 0 : sc->sc_dleft;
1618 if ((ecb->flags & ECB_SENSE) == 0)
1619 ecb->xs->resid = ecb->dleft;
1620 sc->sc_state = NCR_CMDCOMPLETE;
1621 break;
1622
1623 case MSG_MESSAGE_REJECT:
1624 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1625 switch (sc->sc_msgout) {
1626 case SEND_TAG:
1627 /*
1628 * Target does not like tagged queuing.
1629 * - Flush the command queue
1630 * - Disable tagged queuing for the target
1631 * - Dequeue ecb from the queued array.
1632 */
1633 printf("%s: tagged queuing rejected: "
1634 "target %d\n",
1635 sc->sc_dev.dv_xname,
1636 ecb->xs->xs_periph->periph_target);
1637
1638 NCR_MSGS(("(rejected sent tag)"));
1639 NCRCMD(sc, NCRCMD_FLUSH);
1640 DELAY(1);
1641 ti->flags &= ~T_TAG;
1642 lun = ecb->xs->xs_periph->periph_lun;
1643 li = TINFO_LUN(ti, lun);
1644 if (ecb->tag[0] &&
1645 li->queued[ecb->tag[1]] != NULL) {
1646 li->queued[ecb->tag[1]] = NULL;
1647 li->used--;
1648 }
1649 ecb->tag[0] = ecb->tag[1] = 0;
1650 li->untagged = ecb;
1651 li->busy = 1;
1652 break;
1653
1654 case SEND_SDTR:
1655 printf("%s: sync transfer rejected: "
1656 "target %d\n",
1657 sc->sc_dev.dv_xname,
1658 ecb->xs->xs_periph->periph_target);
1659
1660 sc->sc_flags &= ~NCR_SYNCHNEGO;
1661 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1662 ncr53c9x_setsync(sc, ti);
1663 ncr53c9x_update_xfer_mode(sc,
1664 ecb->xs->xs_periph->periph_target);
1665 break;
1666
1667 case SEND_WDTR:
1668 printf("%s: wide transfer rejected: "
1669 "target %d\n",
1670 sc->sc_dev.dv_xname,
1671 ecb->xs->xs_periph->periph_target);
1672 ti->flags &= ~T_WIDE;
1673 ti->width = 0;
1674 break;
1675
1676 case SEND_INIT_DET_ERR:
1677 goto abort;
1678 }
1679 break;
1680
1681 case MSG_NOOP:
1682 NCR_MSGS(("noop "));
1683 break;
1684
1685 case MSG_HEAD_OF_Q_TAG:
1686 case MSG_SIMPLE_Q_TAG:
1687 case MSG_ORDERED_Q_TAG:
1688 NCR_MSGS(("TAG %x:%x",
1689 sc->sc_imess[0], sc->sc_imess[1]));
1690 break;
1691
1692 case MSG_DISCONNECT:
1693 NCR_MSGS(("disconnect "));
1694 ti->dconns++;
1695 sc->sc_state = NCR_DISCONNECT;
1696
1697 /*
1698 * Mark the fact that all bytes have moved. The
1699 * target may not bother to do a SAVE POINTERS
1700 * at this stage. This flag will set the residual
1701 * count to zero on MSG COMPLETE.
1702 */
1703 if (sc->sc_dleft == 0)
1704 ecb->flags |= ECB_TENTATIVE_DONE;
1705
1706 break;
1707
1708 case MSG_SAVEDATAPOINTER:
1709 NCR_MSGS(("save datapointer "));
1710 ecb->daddr = sc->sc_dp;
1711 ecb->dleft = sc->sc_dleft;
1712 break;
1713
1714 case MSG_RESTOREPOINTERS:
1715 NCR_MSGS(("restore datapointer "));
1716 sc->sc_dp = ecb->daddr;
1717 sc->sc_dleft = ecb->dleft;
1718 break;
1719
1720 case MSG_EXTENDED:
1721 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1722 switch (sc->sc_imess[2]) {
1723 case MSG_EXT_SDTR:
1724 NCR_MSGS(("SDTR period %d, offset %d ",
1725 sc->sc_imess[3], sc->sc_imess[4]));
1726 if (sc->sc_imess[1] != 3)
1727 goto reject;
1728 ti->period = sc->sc_imess[3];
1729 ti->offset = sc->sc_imess[4];
1730 ti->flags &= ~T_NEGOTIATE;
1731 if (sc->sc_minsync == 0 ||
1732 ti->offset == 0 ||
1733 ti->period > 124) {
1734 #if 0
1735 #ifdef NCR53C9X_DEBUG
1736 scsipi_printaddr(ecb->xs->xs_periph);
1737 printf("async mode\n");
1738 #endif
1739 #endif
1740 ti->flags &= ~T_SYNCMODE;
1741 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1742 /*
1743 * target initiated negotiation
1744 */
1745 ti->offset = 0;
1746 ncr53c9x_sched_msgout(
1747 SEND_SDTR);
1748 }
1749 } else {
1750 #if 0
1751 int r = 250/ti->period;
1752 int s = (100*250)/ti->period - 100*r;
1753 #endif
1754 int p;
1755
1756 p = ncr53c9x_stp2cpb(sc, ti->period);
1757 ti->period = ncr53c9x_cpb2stp(sc, p);
1758 #if 0
1759 #ifdef NCR53C9X_DEBUG
1760 scsipi_printaddr(ecb->xs->xs_periph);
1761 printf("max sync rate %d.%02dMB/s\n",
1762 r, s);
1763 #endif
1764 #endif
1765 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1766 /*
1767 * target initiated negotiation
1768 */
1769 if (ti->period <
1770 sc->sc_minsync)
1771 ti->period =
1772 sc->sc_minsync;
1773 if (ti->offset > 15)
1774 ti->offset = 15;
1775 ti->flags &= ~T_SYNCMODE;
1776 ncr53c9x_sched_msgout(
1777 SEND_SDTR);
1778 } else {
1779 /* we are sync */
1780 ti->flags |= T_SYNCMODE;
1781 }
1782 }
1783 ncr53c9x_update_xfer_mode(sc,
1784 ecb->xs->xs_periph->periph_target);
1785 sc->sc_flags &= ~NCR_SYNCHNEGO;
1786 ncr53c9x_setsync(sc, ti);
1787 break;
1788
1789 case MSG_EXT_WDTR:
1790 printf("%s: wide mode %d\n",
1791 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1792 if (sc->sc_imess[3] == 1) {
1793 ti->cfg3 |= NCRFASCFG3_EWIDE;
1794 ncr53c9x_setsync(sc, ti);
1795 } else
1796 ti->width = 0;
1797 ti->flags &= ~T_WIDE;
1798 break;
1799 default:
1800 scsipi_printaddr(ecb->xs->xs_periph);
1801 printf("unrecognized MESSAGE EXTENDED;"
1802 " sending REJECT\n");
1803 goto reject;
1804 }
1805 break;
1806
1807 default:
1808 NCR_MSGS(("ident "));
1809 scsipi_printaddr(ecb->xs->xs_periph);
1810 printf("unrecognized MESSAGE; sending REJECT\n");
1811 reject:
1812 ncr53c9x_sched_msgout(SEND_REJECT);
1813 break;
1814 }
1815 break;
1816
1817 case NCR_IDENTIFIED:
1818 /*
1819 * IDENTIFY message was received and queue tag is expected now
1820 */
1821 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1822 (sc->sc_msgify == 0)) {
1823 printf("%s: TAG reselect without IDENTIFY;"
1824 " MSG %x;"
1825 " sending DEVICE RESET\n",
1826 sc->sc_dev.dv_xname,
1827 sc->sc_imess[0]);
1828 goto reset;
1829 }
1830 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1831 sc->sc_imess[0], sc->sc_imess[1]);
1832 break;
1833
1834 case NCR_RESELECTED:
1835 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1836 sc->sc_msgify = sc->sc_imess[1];
1837 } else {
1838 printf("%s: reselect without IDENTIFY;"
1839 " MSG %x;"
1840 " sending DEVICE RESET\n",
1841 sc->sc_dev.dv_xname,
1842 sc->sc_imess[1]);
1843 goto reset;
1844 }
1845 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1846 break;
1847
1848 default:
1849 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1850 sc->sc_dev.dv_xname);
1851 reset:
1852 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1853 break;
1854
1855 abort:
1856 ncr53c9x_sched_msgout(SEND_ABORT);
1857 break;
1858 }
1859
1860 /* if we have more messages to send set ATN */
1861 if (sc->sc_msgpriq)
1862 NCRCMD(sc, NCRCMD_SETATN);
1863
1864 /* Ack last message byte */
1865 NCRCMD(sc, NCRCMD_MSGOK);
1866
1867 /* Done, reset message pointer. */
1868 sc->sc_flags &= ~NCR_DROP_MSGI;
1869 sc->sc_imlen = 0;
1870 }
1871
1872
1873 /*
1874 * Send the highest priority, scheduled message
1875 */
1876 void
1877 ncr53c9x_msgout(sc)
1878 struct ncr53c9x_softc *sc;
1879 {
1880 struct ncr53c9x_tinfo *ti;
1881 struct ncr53c9x_ecb *ecb;
1882 size_t size;
1883
1884 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1885 sc->sc_msgpriq, sc->sc_prevphase));
1886
1887 /*
1888 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1889 * condition on the SCSI bus. The 53c9x chip
1890 * automatically turns off ATN before sending the
1891 * message byte. (see also the comment below in the
1892 * default case when picking out a message to send)
1893 */
1894 if (sc->sc_flags & NCR_ATN) {
1895 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1896 new:
1897 NCRCMD(sc, NCRCMD_FLUSH);
1898 /* DELAY(1); */
1899 sc->sc_msgoutq = 0;
1900 sc->sc_omlen = 0;
1901 }
1902 } else {
1903 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1904 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1905 goto new;
1906 } else {
1907 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1908 sc->sc_dev.dv_xname, __LINE__);
1909 }
1910 }
1911
1912 if (sc->sc_omlen == 0) {
1913 /* Pick up highest priority message */
1914 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1915 sc->sc_msgoutq |= sc->sc_msgout;
1916 sc->sc_msgpriq &= ~sc->sc_msgout;
1917 sc->sc_omlen = 1; /* "Default" message len */
1918 switch (sc->sc_msgout) {
1919 case SEND_SDTR:
1920 ecb = sc->sc_nexus;
1921 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1922 sc->sc_omess[0] = MSG_EXTENDED;
1923 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1924 sc->sc_omess[2] = MSG_EXT_SDTR;
1925 sc->sc_omess[3] = ti->period;
1926 sc->sc_omess[4] = ti->offset;
1927 sc->sc_omlen = 5;
1928 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1929 ti->flags |= T_SYNCMODE;
1930 ncr53c9x_setsync(sc, ti);
1931 }
1932 break;
1933 case SEND_WDTR:
1934 ecb = sc->sc_nexus;
1935 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1936 sc->sc_omess[0] = MSG_EXTENDED;
1937 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1938 sc->sc_omess[2] = MSG_EXT_WDTR;
1939 sc->sc_omess[3] = ti->width;
1940 sc->sc_omlen = 4;
1941 break;
1942 case SEND_IDENTIFY:
1943 if (sc->sc_state != NCR_CONNECTED) {
1944 printf("%s at line %d: no nexus\n",
1945 sc->sc_dev.dv_xname, __LINE__);
1946 }
1947 ecb = sc->sc_nexus;
1948 sc->sc_omess[0] =
1949 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1950 break;
1951 case SEND_TAG:
1952 if (sc->sc_state != NCR_CONNECTED) {
1953 printf("%s at line %d: no nexus\n",
1954 sc->sc_dev.dv_xname, __LINE__);
1955 }
1956 ecb = sc->sc_nexus;
1957 sc->sc_omess[0] = ecb->tag[0];
1958 sc->sc_omess[1] = ecb->tag[1];
1959 sc->sc_omlen = 2;
1960 break;
1961 case SEND_DEV_RESET:
1962 sc->sc_flags |= NCR_ABORTING;
1963 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1964 ecb = sc->sc_nexus;
1965 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1966 ti->flags &= ~T_SYNCMODE;
1967 ncr53c9x_update_xfer_mode(sc,
1968 ecb->xs->xs_periph->periph_target);
1969 if ((ti->flags & T_SYNCHOFF) == 0)
1970 /* We can re-start sync negotiation */
1971 ti->flags |= T_NEGOTIATE;
1972 break;
1973 case SEND_PARITY_ERROR:
1974 sc->sc_omess[0] = MSG_PARITY_ERROR;
1975 break;
1976 case SEND_ABORT:
1977 sc->sc_flags |= NCR_ABORTING;
1978 sc->sc_omess[0] = MSG_ABORT;
1979 break;
1980 case SEND_INIT_DET_ERR:
1981 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1982 break;
1983 case SEND_REJECT:
1984 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1985 break;
1986 default:
1987 /*
1988 * We normally do not get here, since the chip
1989 * automatically turns off ATN before the last
1990 * byte of a message is sent to the target.
1991 * However, if the target rejects our (multi-byte)
1992 * message early by switching to MSG IN phase
1993 * ATN remains on, so the target may return to
1994 * MSG OUT phase. If there are no scheduled messages
1995 * left we send a NO-OP.
1996 *
1997 * XXX - Note that this leaves no useful purpose for
1998 * the NCR_ATN flag.
1999 */
2000 sc->sc_flags &= ~NCR_ATN;
2001 sc->sc_omess[0] = MSG_NOOP;
2002 break;
2003 }
2004 sc->sc_omp = sc->sc_omess;
2005 }
2006
2007 #ifdef DEBUG
2008 {
2009 int i;
2010
2011 NCR_MISC(("<msgout:"));
2012 for (i = 0; i < sc->sc_omlen; i++)
2013 NCR_MISC((" %02x", sc->sc_omess[i]));
2014 NCR_MISC(("> "));
2015 }
2016 #endif
2017 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2018 /*
2019 * XXX fifo size
2020 */
2021 ncr53c9x_flushfifo(sc);
2022 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2023 NCRCMD(sc, NCRCMD_TRANS);
2024 } else {
2025 /* (re)send the message */
2026 size = min(sc->sc_omlen, sc->sc_maxxfer);
2027 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2028 /* Program the SCSI counter */
2029 NCR_SET_COUNT(sc, size);
2030
2031 /* Load the count in and start the message-out transfer */
2032 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2033 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2034 NCRDMA_GO(sc);
2035 }
2036 }
2037
2038 /*
2039 * This is the most critical part of the driver, and has to know
2040 * how to deal with *all* error conditions and phases from the SCSI
2041 * bus. If there are no errors and the DMA was active, then call the
2042 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2043 * and we can return from here without further processing.
2044 *
2045 * Most of this needs verifying.
2046 */
2047 int
2048 ncr53c9x_intr(arg)
2049 void *arg;
2050 {
2051 struct ncr53c9x_softc *sc = arg;
2052 struct ncr53c9x_ecb *ecb;
2053 struct scsipi_periph *periph;
2054 struct ncr53c9x_tinfo *ti;
2055 size_t size;
2056 int nfifo;
2057
2058 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2059
2060 if (!NCRDMA_ISINTR(sc))
2061 return (0);
2062
2063 again:
2064 /* and what do the registers say... */
2065 ncr53c9x_readregs(sc);
2066
2067 sc->sc_intrcnt.ev_count++;
2068
2069 /*
2070 * At the moment, only a SCSI Bus Reset or Illegal
2071 * Command are classed as errors. A disconnect is a
2072 * valid condition, and we let the code check is the
2073 * "NCR_BUSFREE_OK" flag was set before declaring it
2074 * and error.
2075 *
2076 * Also, the status register tells us about "Gross
2077 * Errors" and "Parity errors". Only the Gross Error
2078 * is really bad, and the parity errors are dealt
2079 * with later
2080 *
2081 * TODO
2082 * If there are too many parity error, go to slow
2083 * cable mode ?
2084 */
2085
2086 /* SCSI Reset */
2087 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2088 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2089 NCRCMD(sc, NCRCMD_FLUSH);
2090 DELAY(1);
2091 }
2092 if (sc->sc_state != NCR_SBR) {
2093 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2094 ncr53c9x_init(sc, 0); /* Restart everything */
2095 return (1);
2096 }
2097 #if 0
2098 /*XXX*/ printf("<expected bus reset: "
2099 "[intr %x, stat %x, step %d]>\n",
2100 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2101 #endif
2102 if (sc->sc_nexus != NULL)
2103 panic("%s: nexus in reset state",
2104 sc->sc_dev.dv_xname);
2105 goto sched;
2106 }
2107
2108 ecb = sc->sc_nexus;
2109
2110 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2111 if (sc->sc_espintr & NCRINTR_ERR ||
2112 sc->sc_espstat & NCRSTAT_GE) {
2113
2114 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2115 /* Gross Error; no target ? */
2116 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2117 NCRCMD(sc, NCRCMD_FLUSH);
2118 DELAY(1);
2119 }
2120 if (sc->sc_state == NCR_CONNECTED ||
2121 sc->sc_state == NCR_SELECTING) {
2122 ecb->xs->error = XS_TIMEOUT;
2123 ncr53c9x_done(sc, ecb);
2124 }
2125 return (1);
2126 }
2127
2128 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2129 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2130 /*
2131 * Eat away "Illegal command" interrupt
2132 * on a ESP100 caused by a re-selection
2133 * while we were trying to select
2134 * another target.
2135 */
2136 #ifdef DEBUG
2137 printf("%s: ESP100 work-around activated\n",
2138 sc->sc_dev.dv_xname);
2139 #endif
2140 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2141 return (1);
2142 }
2143 /* illegal command, out of sync ? */
2144 printf("%s: illegal command: 0x%x "
2145 "(state %d, phase %x, prevphase %x)\n",
2146 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2147 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2148 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2149 NCRCMD(sc, NCRCMD_FLUSH);
2150 DELAY(1);
2151 }
2152 ncr53c9x_init(sc, 1); /* Restart everything */
2153 return (1);
2154 }
2155 }
2156 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2157
2158 /*
2159 * Call if DMA is active.
2160 *
2161 * If DMA_INTR returns true, then maybe go 'round the loop
2162 * again in case there is no more DMA queued, but a phase
2163 * change is expected.
2164 */
2165 if (NCRDMA_ISACTIVE(sc)) {
2166 int r = NCRDMA_INTR(sc);
2167 if (r == -1) {
2168 printf("%s: DMA error; resetting\n",
2169 sc->sc_dev.dv_xname);
2170 ncr53c9x_init(sc, 1);
2171 }
2172 /* If DMA active here, then go back to work... */
2173 if (NCRDMA_ISACTIVE(sc))
2174 return (1);
2175
2176 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2177 /*
2178 * DMA not completed. If we can not find a
2179 * acceptable explanation, print a diagnostic.
2180 */
2181 if (sc->sc_state == NCR_SELECTING)
2182 /*
2183 * This can happen if we are reselected
2184 * while using DMA to select a target.
2185 */
2186 /*void*/;
2187 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2188 /*
2189 * Our (multi-byte) message (eg SDTR) was
2190 * interrupted by the target to send
2191 * a MSG REJECT.
2192 * Print diagnostic if current phase
2193 * is not MESSAGE IN.
2194 */
2195 if (sc->sc_phase != MESSAGE_IN_PHASE)
2196 printf("%s: !TC on MSG OUT"
2197 " [intr %x, stat %x, step %d]"
2198 " prevphase %x, resid %lx\n",
2199 sc->sc_dev.dv_xname,
2200 sc->sc_espintr,
2201 sc->sc_espstat,
2202 sc->sc_espstep,
2203 sc->sc_prevphase,
2204 (u_long)sc->sc_omlen);
2205 } else if (sc->sc_dleft == 0) {
2206 /*
2207 * The DMA operation was started for
2208 * a DATA transfer. Print a diagnostic
2209 * if the DMA counter and TC bit
2210 * appear to be out of sync.
2211 */
2212 printf("%s: !TC on DATA XFER"
2213 " [intr %x, stat %x, step %d]"
2214 " prevphase %x, resid %x\n",
2215 sc->sc_dev.dv_xname,
2216 sc->sc_espintr,
2217 sc->sc_espstat,
2218 sc->sc_espstep,
2219 sc->sc_prevphase,
2220 ecb ? ecb->dleft : -1);
2221 }
2222 }
2223 }
2224
2225 /*
2226 * Check for less serious errors.
2227 */
2228 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2229 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2230 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2231 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2232 else
2233 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2234 }
2235
2236 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2237 sc->sc_msgify = 0;
2238 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2239 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2240 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2241 NCRCMD(sc, NCRCMD_FLUSH);
2242 /* DELAY(1); */
2243 }
2244 /*
2245 * This command must (apparently) be issued within
2246 * 250mS of a disconnect. So here you are...
2247 */
2248 NCRCMD(sc, NCRCMD_ENSEL);
2249
2250 switch (sc->sc_state) {
2251 case NCR_RESELECTED:
2252 goto sched;
2253
2254 case NCR_SELECTING:
2255 {
2256 struct ncr53c9x_linfo *li;
2257
2258 ecb->xs->error = XS_SELTIMEOUT;
2259
2260 /* Selection timeout -- discard all LUNs if empty */
2261 periph = ecb->xs->xs_periph;
2262 ti = &sc->sc_tinfo[periph->periph_target];
2263 li = LIST_FIRST(&ti->luns);
2264 while (li != NULL) {
2265 if (li->untagged == NULL && li->used == 0) {
2266 if (li->lun < NCR_NLUN)
2267 ti->lun[li->lun] = NULL;
2268 LIST_REMOVE(li, link);
2269 free(li, M_DEVBUF);
2270 /*
2271 * Restart the search at the beginning
2272 */
2273 li = LIST_FIRST(&ti->luns);
2274 continue;
2275 }
2276 li = LIST_NEXT(li, link);
2277 }
2278 goto finish;
2279 }
2280 case NCR_CONNECTED:
2281 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2282 #ifdef NCR53C9X_DEBUG
2283 if (ecb != NULL)
2284 scsipi_printaddr(ecb->xs->xs_periph);
2285 printf("sync nego not completed!\n");
2286 #endif
2287 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2288 sc->sc_flags &= ~NCR_SYNCHNEGO;
2289 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2290 }
2291
2292 /* it may be OK to disconnect */
2293 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2294 /*
2295 * Section 5.1.1 of the SCSI 2 spec
2296 * suggests issuing a REQUEST SENSE
2297 * following an unexpected disconnect.
2298 * Some devices go into a contingent
2299 * allegiance condition when
2300 * disconnecting, and this is necessary
2301 * to clean up their state.
2302 */
2303 printf("%s: unexpected disconnect; ",
2304 sc->sc_dev.dv_xname);
2305 if ((ecb->flags & ECB_SENSE) != 0) {
2306 printf("resetting\n");
2307 goto reset;
2308 }
2309 printf("sending REQUEST SENSE\n");
2310 callout_stop(&ecb->xs->xs_callout);
2311 ncr53c9x_sense(sc, ecb);
2312 goto out;
2313 }
2314
2315 ecb->xs->error = XS_TIMEOUT;
2316 goto finish;
2317
2318 case NCR_DISCONNECT:
2319 sc->sc_nexus = NULL;
2320 goto sched;
2321
2322 case NCR_CMDCOMPLETE:
2323 goto finish;
2324 }
2325 }
2326
2327 switch (sc->sc_state) {
2328
2329 case NCR_SBR:
2330 printf("%s: waiting for SCSI Bus Reset to happen\n",
2331 sc->sc_dev.dv_xname);
2332 return (1);
2333
2334 case NCR_RESELECTED:
2335 /*
2336 * we must be continuing a message ?
2337 */
2338 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2339 printf("%s: target didn't identify\n",
2340 sc->sc_dev.dv_xname);
2341 ncr53c9x_init(sc, 1);
2342 return (1);
2343 }
2344 printf("<<RESELECT CONT'd>>");
2345 #if XXXX
2346 ncr53c9x_msgin(sc);
2347 if (sc->sc_state != NCR_CONNECTED) {
2348 /* IDENTIFY fail?! */
2349 printf("%s: identify failed\n",
2350 sc->sc_dev.dv_xname, sc->sc_state);
2351 ncr53c9x_init(sc, 1);
2352 return (1);
2353 }
2354 #endif
2355 break;
2356
2357 case NCR_IDENTIFIED:
2358 ecb = sc->sc_nexus;
2359 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2360 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2361 /*
2362 * Things are seriously fucked up.
2363 * Pull the brakes, i.e. reset
2364 */
2365 printf("%s: target didn't send tag: %d bytes in fifo\n",
2366 sc->sc_dev.dv_xname, i);
2367 /* Drain and display fifo */
2368 while (i-- > 0)
2369 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2370
2371 ncr53c9x_init(sc, 1);
2372 return (1);
2373 } else
2374 goto msgin;
2375
2376 break;
2377
2378 case NCR_IDLE:
2379 case NCR_SELECTING:
2380 ecb = sc->sc_nexus;
2381 if (sc->sc_espintr & NCRINTR_RESEL) {
2382 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2383 sc->sc_flags = 0;
2384 /*
2385 * If we're trying to select a
2386 * target ourselves, push our command
2387 * back into the ready list.
2388 */
2389 if (sc->sc_state == NCR_SELECTING) {
2390 NCR_MISC(("backoff selector "));
2391 callout_stop(&ecb->xs->xs_callout);
2392 ncr53c9x_dequeue(sc, ecb);
2393 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2394 ecb->flags |= ECB_READY;
2395 ecb = sc->sc_nexus = NULL;
2396 }
2397 sc->sc_state = NCR_RESELECTED;
2398 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2399 /*
2400 * Things are seriously fucked up.
2401 * Pull the brakes, i.e. reset
2402 */
2403 printf("%s: target didn't identify\n",
2404 sc->sc_dev.dv_xname);
2405 ncr53c9x_init(sc, 1);
2406 return (1);
2407 }
2408 /*
2409 * The C90 only inhibits FIFO writes until
2410 * reselection is complete, instead of
2411 * waiting until the interrupt status register
2412 * has been read. So, if the reselect happens
2413 * while we were entering a command bytes (for
2414 * another target) some of those bytes can
2415 * appear in the FIFO here, after the
2416 * interrupt is taken.
2417 */
2418 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2419
2420 if (nfifo < 2 ||
2421 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) {
2422 printf("%s: RESELECT: %d bytes in FIFO! "
2423 "[intr %x, stat %x, step %d, "
2424 "prevphase %x]\n",
2425 sc->sc_dev.dv_xname,
2426 nfifo,
2427 sc->sc_espintr,
2428 sc->sc_espstat,
2429 sc->sc_espstep,
2430 sc->sc_prevphase);
2431 ncr53c9x_init(sc, 1);
2432 return (1);
2433 }
2434 sc->sc_selid = sc->sc_imess[0];
2435 NCR_MISC(("selid=%02x ", sc->sc_selid));
2436
2437 /* Handle identify message */
2438 ncr53c9x_msgin(sc);
2439 if (nfifo != 2) {
2440 /*
2441 * Note: this should not happen
2442 * with `dmaselect' on.
2443 */
2444 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2445 NCRCMD(sc, NCRCMD_FLUSH);
2446 } else if (sc->sc_features & NCR_F_DMASELECT &&
2447 sc->sc_rev == NCR_VARIANT_ESP100) {
2448 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2449 }
2450
2451 if (sc->sc_state != NCR_CONNECTED &&
2452 sc->sc_state != NCR_IDENTIFIED) {
2453 /* IDENTIFY fail?! */
2454 printf("%s: identify failed, "
2455 "state %d, intr %02x\n",
2456 sc->sc_dev.dv_xname, sc->sc_state,
2457 sc->sc_espintr);
2458 ncr53c9x_init(sc, 1);
2459 return (1);
2460 }
2461 goto shortcut; /* ie. next phase expected soon */
2462 }
2463
2464 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2465 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2466 /*
2467 * Arbitration won; examine the `step' register
2468 * to determine how far the selection could progress.
2469 */
2470 ecb = sc->sc_nexus;
2471 if (ecb == NULL)
2472 panic("ncr53c9x: no nexus");
2473
2474 periph = ecb->xs->xs_periph;
2475 ti = &sc->sc_tinfo[periph->periph_target];
2476
2477 switch (sc->sc_espstep) {
2478 case 0:
2479 /*
2480 * The target did not respond with a
2481 * message out phase - probably an old
2482 * device that doesn't recognize ATN.
2483 * Clear ATN and just continue, the
2484 * target should be in the command
2485 * phase.
2486 * XXXX check for command phase?
2487 */
2488 NCRCMD(sc, NCRCMD_RSTATN);
2489 break;
2490 case 1:
2491 if ((ti->flags & T_NEGOTIATE) == 0 &&
2492 ecb->tag[0] == 0) {
2493 printf("%s: step 1 & !NEG\n",
2494 sc->sc_dev.dv_xname);
2495 goto reset;
2496 }
2497 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2498 printf("%s: !MSGOUT\n",
2499 sc->sc_dev.dv_xname);
2500 goto reset;
2501 }
2502 if (ti->flags & T_WIDE) {
2503 ncr53c9x_sched_msgout(SEND_WDTR);
2504 }
2505 if (ti->flags & T_NEGOTIATE) {
2506 /* Start negotiating */
2507 ti->period = sc->sc_minsync;
2508 ti->offset = 15;
2509 sc->sc_flags |= NCR_SYNCHNEGO;
2510 if (ecb->tag[0])
2511 ncr53c9x_sched_msgout(
2512 SEND_TAG|SEND_SDTR);
2513 else
2514 ncr53c9x_sched_msgout(
2515 SEND_SDTR);
2516 } else {
2517 /* Could not do ATN3 so send TAG */
2518 ncr53c9x_sched_msgout(SEND_TAG);
2519 }
2520 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2521 break;
2522 case 3:
2523 /*
2524 * Grr, this is supposed to mean
2525 * "target left command phase prematurely".
2526 * It seems to happen regularly when
2527 * sync mode is on.
2528 * Look at FIFO to see if command went out.
2529 * (Timing problems?)
2530 */
2531 if (sc->sc_features & NCR_F_DMASELECT) {
2532 if (sc->sc_cmdlen == 0)
2533 /* Hope for the best.. */
2534 break;
2535 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2536 & NCRFIFO_FF) == 0) {
2537 /* Hope for the best.. */
2538 break;
2539 }
2540 printf("(%s:%d:%d): selection failed;"
2541 " %d left in FIFO "
2542 "[intr %x, stat %x, step %d]\n",
2543 sc->sc_dev.dv_xname,
2544 periph->periph_target,
2545 periph->periph_lun,
2546 NCR_READ_REG(sc, NCR_FFLAG)
2547 & NCRFIFO_FF,
2548 sc->sc_espintr, sc->sc_espstat,
2549 sc->sc_espstep);
2550 NCRCMD(sc, NCRCMD_FLUSH);
2551 ncr53c9x_sched_msgout(SEND_ABORT);
2552 return (1);
2553 case 2:
2554 /* Select stuck at Command Phase */
2555 NCRCMD(sc, NCRCMD_FLUSH);
2556 break;
2557 case 4:
2558 if (sc->sc_features & NCR_F_DMASELECT &&
2559 sc->sc_cmdlen != 0)
2560 printf("(%s:%d:%d): select; "
2561 "%lu left in DMA buffer "
2562 "[intr %x, stat %x, step %d]\n",
2563 sc->sc_dev.dv_xname,
2564 periph->periph_target,
2565 periph->periph_lun,
2566 (u_long)sc->sc_cmdlen,
2567 sc->sc_espintr,
2568 sc->sc_espstat,
2569 sc->sc_espstep);
2570 /* So far, everything went fine */
2571 break;
2572 }
2573
2574 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2575 /* Do an implicit RESTORE POINTERS. */
2576 sc->sc_dp = ecb->daddr;
2577 sc->sc_dleft = ecb->dleft;
2578 sc->sc_state = NCR_CONNECTED;
2579 break;
2580
2581 } else {
2582
2583 printf("%s: unexpected status after select"
2584 ": [intr %x, stat %x, step %x]\n",
2585 sc->sc_dev.dv_xname,
2586 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2587 NCRCMD(sc, NCRCMD_FLUSH);
2588 DELAY(1);
2589 goto reset;
2590 }
2591 if (sc->sc_state == NCR_IDLE) {
2592 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2593 return (0);
2594 }
2595 break;
2596
2597 case NCR_CONNECTED:
2598 if ((sc->sc_flags & NCR_ICCS) != 0) {
2599 /* "Initiate Command Complete Steps" in progress */
2600 u_char msg;
2601
2602 sc->sc_flags &= ~NCR_ICCS;
2603
2604 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2605 printf("%s: ICCS: "
2606 ": [intr %x, stat %x, step %x]\n",
2607 sc->sc_dev.dv_xname,
2608 sc->sc_espintr, sc->sc_espstat,
2609 sc->sc_espstep);
2610 }
2611 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2612 if (sc->sc_imlen < 2)
2613 printf("%s: can't get status, only %d bytes\n",
2614 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2615 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2616 msg = sc->sc_imess[sc->sc_imlen - 1];
2617 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2618 if (msg == MSG_CMDCOMPLETE) {
2619 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2620 ? 0 : sc->sc_dleft;
2621 if ((ecb->flags & ECB_SENSE) == 0)
2622 ecb->xs->resid = ecb->dleft;
2623 sc->sc_state = NCR_CMDCOMPLETE;
2624 } else
2625 printf("%s: STATUS_PHASE: msg %d\n",
2626 sc->sc_dev.dv_xname, msg);
2627 sc->sc_imlen = 0;
2628 NCRCMD(sc, NCRCMD_MSGOK);
2629 goto shortcut; /* ie. wait for disconnect */
2630 }
2631 break;
2632
2633 default:
2634 /* Don't panic: reset. */
2635 printf("%s: invalid state: %d\n",
2636 sc->sc_dev.dv_xname, sc->sc_state);
2637 ncr53c9x_scsi_reset(sc);
2638 goto out;
2639 }
2640
2641 /*
2642 * Driver is now in state NCR_CONNECTED, i.e. we
2643 * have a current command working the SCSI bus.
2644 */
2645 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2646 panic("ncr53c9x: no nexus");
2647 }
2648
2649 switch (sc->sc_phase) {
2650 case MESSAGE_OUT_PHASE:
2651 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2652 ncr53c9x_msgout(sc);
2653 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2654 break;
2655
2656 case MESSAGE_IN_PHASE:
2657 msgin:
2658 NCR_PHASE(("MESSAGE_IN_PHASE "));
2659 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2660 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2661 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
2662 NCRCMD(sc, NCRCMD_FLUSH);
2663 }
2664 sc->sc_flags |= NCR_WAITI;
2665 NCRCMD(sc, NCRCMD_TRANS);
2666 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2667 if ((sc->sc_flags & NCR_WAITI) == 0) {
2668 printf("%s: MSGIN: unexpected FC bit: "
2669 "[intr %x, stat %x, step %x]\n",
2670 sc->sc_dev.dv_xname,
2671 sc->sc_espintr, sc->sc_espstat,
2672 sc->sc_espstep);
2673 }
2674 sc->sc_flags &= ~NCR_WAITI;
2675 ncr53c9x_rdfifo(sc,
2676 (sc->sc_prevphase == sc->sc_phase) ?
2677 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2678 ncr53c9x_msgin(sc);
2679 } else {
2680 printf("%s: MSGIN: weird bits: "
2681 "[intr %x, stat %x, step %x]\n",
2682 sc->sc_dev.dv_xname,
2683 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2684 }
2685 sc->sc_prevphase = MESSAGE_IN_PHASE;
2686 goto shortcut; /* i.e. expect data to be ready */
2687 break;
2688
2689 case COMMAND_PHASE:
2690 /*
2691 * Send the command block. Normally we don't see this
2692 * phase because the SEL_ATN command takes care of
2693 * all this. However, we end up here if either the
2694 * target or we wanted to exchange some more messages
2695 * first (e.g. to start negotiations).
2696 */
2697
2698 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2699 ecb->cmd.cmd.opcode, ecb->clen));
2700 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2701 NCRCMD(sc, NCRCMD_FLUSH);
2702 /* DELAY(1);*/
2703 }
2704 if (sc->sc_features & NCR_F_DMASELECT) {
2705 size_t size;
2706 /* setup DMA transfer for command */
2707 size = ecb->clen;
2708 sc->sc_cmdlen = size;
2709 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2710 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2711 0, &size);
2712 /* Program the SCSI counter */
2713 NCR_SET_COUNT(sc, size);
2714
2715 /* load the count in */
2716 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2717
2718 /* start the command transfer */
2719 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2720 NCRDMA_GO(sc);
2721 } else {
2722 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2723 NCRCMD(sc, NCRCMD_TRANS);
2724 }
2725 sc->sc_prevphase = COMMAND_PHASE;
2726 break;
2727
2728 case DATA_OUT_PHASE:
2729 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2730 NCRCMD(sc, NCRCMD_FLUSH);
2731 size = min(sc->sc_dleft, sc->sc_maxxfer);
2732 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2733 sc->sc_prevphase = DATA_OUT_PHASE;
2734 goto setup_xfer;
2735
2736 case DATA_IN_PHASE:
2737 NCR_PHASE(("DATA_IN_PHASE "));
2738 if (sc->sc_rev == NCR_VARIANT_ESP100)
2739 NCRCMD(sc, NCRCMD_FLUSH);
2740 size = min(sc->sc_dleft, sc->sc_maxxfer);
2741 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2742 sc->sc_prevphase = DATA_IN_PHASE;
2743 setup_xfer:
2744 /* Target returned to data phase: wipe "done" memory */
2745 ecb->flags &= ~ECB_TENTATIVE_DONE;
2746
2747 /* Program the SCSI counter */
2748 NCR_SET_COUNT(sc, size);
2749
2750 /* load the count in */
2751 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2752
2753 /*
2754 * Note that if `size' is 0, we've already transceived
2755 * all the bytes we want but we're still in DATA PHASE.
2756 * Apparently, the device needs padding. Also, a
2757 * transfer size of 0 means "maximum" to the chip
2758 * DMA logic.
2759 */
2760 NCRCMD(sc,
2761 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2762 NCRDMA_GO(sc);
2763 return (1);
2764
2765 case STATUS_PHASE:
2766 NCR_PHASE(("STATUS_PHASE "));
2767 sc->sc_flags |= NCR_ICCS;
2768 NCRCMD(sc, NCRCMD_ICCS);
2769 sc->sc_prevphase = STATUS_PHASE;
2770 goto shortcut; /* i.e. expect status results soon */
2771 break;
2772
2773 case INVALID_PHASE:
2774 break;
2775
2776 default:
2777 printf("%s: unexpected bus phase; resetting\n",
2778 sc->sc_dev.dv_xname);
2779 goto reset;
2780 }
2781
2782 out:
2783 return (1);
2784
2785 reset:
2786 ncr53c9x_init(sc, 1);
2787 goto out;
2788
2789 finish:
2790 ncr53c9x_done(sc, ecb);
2791 goto out;
2792
2793 sched:
2794 sc->sc_state = NCR_IDLE;
2795 ncr53c9x_sched(sc);
2796 goto out;
2797
2798 shortcut:
2799 /*
2800 * The idea is that many of the SCSI operations take very little
2801 * time, and going away and getting interrupted is too high an
2802 * overhead to pay. For example, selecting, sending a message
2803 * and command and then doing some work can be done in one "pass".
2804 *
2805 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2806 * at 40MHz. This needs testing.
2807 */
2808 {
2809 struct timeval wait, cur;
2810
2811 microtime(&wait);
2812 wait.tv_usec += 50 / sc->sc_freq;
2813 if (wait.tv_usec > 1000000) {
2814 wait.tv_sec++;
2815 wait.tv_usec -= 1000000;
2816 }
2817 do {
2818 if (NCRDMA_ISINTR(sc))
2819 goto again;
2820 microtime(&cur);
2821 } while (cur.tv_sec <= wait.tv_sec &&
2822 cur.tv_usec <= wait.tv_usec);
2823 }
2824 goto out;
2825 }
2826
2827 void
2828 ncr53c9x_abort(sc, ecb)
2829 struct ncr53c9x_softc *sc;
2830 struct ncr53c9x_ecb *ecb;
2831 {
2832
2833 /* 2 secs for the abort */
2834 ecb->timeout = NCR_ABORT_TIMEOUT;
2835 ecb->flags |= ECB_ABORT;
2836
2837 if (ecb == sc->sc_nexus) {
2838 int timeout;
2839
2840 /*
2841 * If we're still selecting, the message will be scheduled
2842 * after selection is complete.
2843 */
2844 if (sc->sc_state == NCR_CONNECTED)
2845 ncr53c9x_sched_msgout(SEND_ABORT);
2846
2847 /*
2848 * Reschedule timeout.
2849 */
2850 timeout = ecb->timeout;
2851 if (timeout > 1000000)
2852 timeout = (timeout / 1000) * hz;
2853 else
2854 timeout = (timeout * hz) / 1000;
2855 callout_reset(&ecb->xs->xs_callout, timeout,
2856 ncr53c9x_timeout, ecb);
2857 } else {
2858 /*
2859 * Just leave the command where it is.
2860 * XXX - what choice do we have but to reset the SCSI
2861 * eventually?
2862 */
2863 if (sc->sc_state == NCR_IDLE)
2864 ncr53c9x_sched(sc);
2865 }
2866 }
2867
2868 void
2869 ncr53c9x_timeout(arg)
2870 void *arg;
2871 {
2872 struct ncr53c9x_ecb *ecb = arg;
2873 struct scsipi_xfer *xs = ecb->xs;
2874 struct scsipi_periph *periph = xs->xs_periph;
2875 struct ncr53c9x_softc *sc =
2876 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2877 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2878 int s;
2879
2880 scsipi_printaddr(periph);
2881 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2882 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2883 "msg(q %x,o %x) %s>",
2884 sc->sc_dev.dv_xname,
2885 ecb, ecb->flags, ecb->dleft, ecb->stat,
2886 sc->sc_state, sc->sc_nexus,
2887 NCR_READ_REG(sc, NCR_STAT),
2888 sc->sc_phase, sc->sc_prevphase,
2889 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2890 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2891 #if NCR53C9X_DEBUG > 1
2892 printf("TRACE: %s.", ecb->trace);
2893 #endif
2894
2895 s = splbio();
2896
2897 if (ecb->flags & ECB_ABORT) {
2898 /* abort timed out */
2899 printf(" AGAIN\n");
2900
2901 ncr53c9x_init(sc, 1);
2902 } else {
2903 /* abort the operation that has timed out */
2904 printf("\n");
2905 xs->error = XS_TIMEOUT;
2906 ncr53c9x_abort(sc, ecb);
2907
2908 /* Disable sync mode if stuck in a data phase */
2909 if (ecb == sc->sc_nexus &&
2910 (ti->flags & T_SYNCMODE) != 0 &&
2911 (sc->sc_phase & (MSGI|CDI)) == 0) {
2912 /* XXX ASYNC CALLBACK! */
2913 scsipi_printaddr(periph);
2914 printf("sync negotiation disabled\n");
2915 sc->sc_cfflags |= (1 << (periph->periph_target + 8));
2916 ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2917 }
2918 }
2919
2920 splx(s);
2921 }
2922
2923 void
2924 ncr53c9x_watch(arg)
2925 void *arg;
2926 {
2927 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2928 struct ncr53c9x_tinfo *ti;
2929 struct ncr53c9x_linfo *li;
2930 int t, s;
2931 /* Delete any structures that have not been used in 10min. */
2932 time_t old = time.tv_sec - (10 * 60);
2933
2934 s = splbio();
2935 for (t = 0; t < NCR_NTARG; t++) {
2936 ti = &sc->sc_tinfo[t];
2937 li = LIST_FIRST(&ti->luns);
2938 while (li) {
2939 if (li->last_used < old &&
2940 li->untagged == NULL &&
2941 li->used == 0) {
2942 if (li->lun < NCR_NLUN)
2943 ti->lun[li->lun] = NULL;
2944 LIST_REMOVE(li, link);
2945 free(li, M_DEVBUF);
2946 /* Restart the search at the beginning */
2947 li = LIST_FIRST(&ti->luns);
2948 continue;
2949 }
2950 li = LIST_NEXT(li, link);
2951 }
2952 }
2953 splx(s);
2954 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2955 }
2956
2957