ncr53c9x.c revision 1.90 1 /* $NetBSD: ncr53c9x.c,v 1.90 2002/03/08 20:48:38 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1994 Peter Galbavy
41 * Copyright (c) 1995 Paul Kranenburg
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Peter Galbavy
55 * 4. The name of the author may not be used to endorse or promote products
56 * derived from this software without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * Based on aic6360 by Jarle Greipsland
73 *
74 * Acknowledgements: Many of the algorithms used in this driver are
75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
77 */
78
79 #include <sys/cdefs.h>
80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.90 2002/03/08 20:48:38 thorpej Exp $");
81
82 #include <sys/param.h>
83 #include <sys/systm.h>
84 #include <sys/callout.h>
85 #include <sys/kernel.h>
86 #include <sys/errno.h>
87 #include <sys/ioctl.h>
88 #include <sys/device.h>
89 #include <sys/buf.h>
90 #include <sys/malloc.h>
91 #include <sys/proc.h>
92 #include <sys/queue.h>
93 #include <sys/pool.h>
94 #include <sys/scsiio.h>
95
96 #include <dev/scsipi/scsi_all.h>
97 #include <dev/scsipi/scsipi_all.h>
98 #include <dev/scsipi/scsiconf.h>
99 #include <dev/scsipi/scsi_message.h>
100
101 #include <dev/ic/ncr53c9xreg.h>
102 #include <dev/ic/ncr53c9xvar.h>
103
104 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
105 #ifdef DEBUG
106 int ncr53c9x_notag = 0;
107 #endif
108
109 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
110 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
111 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
112 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
113 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
114 struct scsipi_xfer *, int);
115 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
116 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
117 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
118 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
119 /*static*/ void ncr53c9x_timeout(void *arg);
120 /*static*/ void ncr53c9x_watch(void *arg);
121 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
122 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
123 struct ncr53c9x_ecb *);
124 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long,
125 caddr_t, int, struct proc *);
126
127 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
128 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
129 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int);
130
131 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
132 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
133 struct ncr53c9x_tinfo *);
134 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int);
135 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
136 int64_t lun);
137
138 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
139
140 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
141 #define NCR_RDFIFO_START 0
142 #define NCR_RDFIFO_CONTINUE 1
143
144
145 #define NCR_SET_COUNT(sc, size) do { \
146 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
147 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
148 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
149 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
150 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
151 } \
152 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
153 NCR_WRITE_REG(sc, NCR_RCH, 0); \
154 } \
155 } while (0)
156
157 static int ecb_pool_initialized = 0;
158 static struct pool ecb_pool;
159
160 /*
161 * Names for the NCR53c9x variants, correspnding to the variant tags
162 * in ncr53c9xvar.h.
163 */
164 static const char *ncr53c9x_variant_names[] = {
165 "ESP100",
166 "ESP100A",
167 "ESP200",
168 "NCR53C94",
169 "NCR53C96",
170 "ESP406",
171 "FAS408",
172 "FAS216",
173 "AM53C974",
174 "FAS366/HME",
175 "NCR53C90 (86C01)",
176 };
177
178 /*
179 * Search linked list for LUN info by LUN id.
180 */
181 static struct ncr53c9x_linfo *
182 ncr53c9x_lunsearch(ti, lun)
183 struct ncr53c9x_tinfo *ti;
184 int64_t lun;
185 {
186 struct ncr53c9x_linfo *li;
187 LIST_FOREACH(li, &ti->luns, link)
188 if (li->lun == lun)
189 return (li);
190 return (NULL);
191 }
192
193 /*
194 * Attach this instance, and then all the sub-devices
195 */
196 void
197 ncr53c9x_attach(sc)
198 struct ncr53c9x_softc *sc;
199 {
200 struct scsipi_adapter *adapt = &sc->sc_adapter;
201 struct scsipi_channel *chan = &sc->sc_channel;
202
203 callout_init(&sc->sc_watchdog);
204 /*
205 * Allocate SCSI message buffers.
206 * Front-ends can override allocation to avoid alignment
207 * handling in the DMA engines. Note that that ncr53c9x_msgout()
208 * can request a 1 byte DMA transfer.
209 */
210 if (sc->sc_omess == NULL)
211 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
212
213 if (sc->sc_imess == NULL)
214 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
215
216 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
217 printf("out of memory\n");
218 return;
219 }
220
221 /*
222 * Note, the front-end has set us up to print the chip variation.
223 */
224 if (sc->sc_rev >= NCR_VARIANT_MAX) {
225 printf("\n%s: unknown variant %d, devices not attached\n",
226 sc->sc_dev.dv_xname, sc->sc_rev);
227 return;
228 }
229
230 printf(": %s, %dMHz, SCSI ID %d\n",
231 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
232
233 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
234
235 /* The value *must not* be == 1. Make it 2 */
236 if (sc->sc_ccf == 1)
237 sc->sc_ccf = 2;
238
239 /*
240 * The recommended timeout is 250ms. This register is loaded
241 * with a value calculated as follows, from the docs:
242 *
243 * (timout period) x (CLK frequency)
244 * reg = -------------------------------------
245 * 8192 x (Clock Conversion Factor)
246 *
247 * Since CCF has a linear relation to CLK, this generally computes
248 * to the constant of 153.
249 */
250 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
251
252 /* CCF register only has 3 bits; 0 is actually 8 */
253 sc->sc_ccf &= 7;
254
255 /*
256 * Fill in the scsipi_adapter.
257 */
258 adapt->adapt_dev = &sc->sc_dev;
259 adapt->adapt_nchannels = 1;
260 adapt->adapt_openings = 256;
261 adapt->adapt_max_periph = 256;
262 adapt->adapt_ioctl = ncr53c9x_ioctl;
263 /* adapt_request initialized by front-end */
264 /* adapt_minphys initialized by front-end */
265
266 /*
267 * Fill in the scsipi_channel.
268 */
269 memset(chan, 0, sizeof(*chan));
270 chan->chan_adapter = adapt;
271 chan->chan_bustype = &scsi_bustype;
272 chan->chan_channel = 0;
273 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */
274 chan->chan_nluns = 8;
275 chan->chan_id = sc->sc_id;
276
277 /*
278 * Add reference to adapter so that we drop the reference after
279 * config_found() to make sure the adatper is disabled.
280 */
281 if (scsipi_adapter_addref(adapt) != 0) {
282 printf("%s: unable to enable controller\n",
283 sc->sc_dev.dv_xname);
284 return;
285 }
286
287 /* Reset state & bus */
288 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
289 sc->sc_state = 0;
290 ncr53c9x_init(sc, 1);
291
292 /*
293 * Now try to attach all the sub-devices
294 */
295 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
296
297 scsipi_adapter_delref(adapt);
298 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
299 }
300
301 int
302 ncr53c9x_detach(sc, flags)
303 struct ncr53c9x_softc *sc;
304 int flags;
305 {
306 int error;
307
308 if (sc->sc_child) {
309 error = config_detach(sc->sc_child, flags);
310 if (error)
311 return (error);
312 }
313
314 free(sc->sc_imess, M_DEVBUF);
315 free(sc->sc_omess, M_DEVBUF);
316
317 return (0);
318 }
319
320 /*
321 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
322 * only this controller, but kills any on-going commands, and also stops
323 * and resets the DMA.
324 *
325 * After reset, registers are loaded with the defaults from the attach
326 * routine above.
327 */
328 void
329 ncr53c9x_reset(sc)
330 struct ncr53c9x_softc *sc;
331 {
332
333 /* reset DMA first */
334 NCRDMA_RESET(sc);
335
336 /* reset SCSI chip */
337 NCRCMD(sc, NCRCMD_RSTCHIP);
338 NCRCMD(sc, NCRCMD_NOP);
339 DELAY(500);
340
341 /* do these backwards, and fall through */
342 switch (sc->sc_rev) {
343 case NCR_VARIANT_ESP406:
344 case NCR_VARIANT_FAS408:
345 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
346 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
347 case NCR_VARIANT_AM53C974:
348 case NCR_VARIANT_FAS216:
349 case NCR_VARIANT_NCR53C94:
350 case NCR_VARIANT_NCR53C96:
351 case NCR_VARIANT_ESP200:
352 sc->sc_features |= NCR_F_HASCFG3;
353 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
354 case NCR_VARIANT_ESP100A:
355 sc->sc_features |= NCR_F_SELATN3;
356 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
357 case NCR_VARIANT_NCR53C90_86C01:
358 case NCR_VARIANT_ESP100:
359 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
360 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
361 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
362 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
363 break;
364
365 case NCR_VARIANT_FAS366:
366 sc->sc_features |=
367 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
368 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
369 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
370 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
371 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */
372 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
373 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
374 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
375 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
376 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
377 break;
378
379 default:
380 printf("%s: unknown revision code, assuming ESP100\n",
381 sc->sc_dev.dv_xname);
382 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
383 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
384 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
385 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
386 }
387
388 if (sc->sc_rev == NCR_VARIANT_AM53C974)
389 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
390
391 #if 0
392 printf("%s: ncr53c9x_reset: revision %d\n",
393 sc->sc_dev.dv_xname, sc->sc_rev);
394 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, "
395 "ccf 0x%x, timeout 0x%x\n",
396 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
397 sc->sc_ccf, sc->sc_timeout);
398 #endif
399 }
400
401 /*
402 * Reset the SCSI bus, but not the chip
403 */
404 void
405 ncr53c9x_scsi_reset(sc)
406 struct ncr53c9x_softc *sc;
407 {
408
409 (*sc->sc_glue->gl_dma_stop)(sc);
410
411 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
412 NCRCMD(sc, NCRCMD_RSTSCSI);
413 }
414
415 /*
416 * Initialize ncr53c9x state machine
417 */
418 void
419 ncr53c9x_init(sc, doreset)
420 struct ncr53c9x_softc *sc;
421 int doreset;
422 {
423 struct ncr53c9x_ecb *ecb;
424 struct ncr53c9x_linfo *li;
425 int i, r;
426
427 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
428
429 if (!ecb_pool_initialized) {
430 /* All instances share this pool */
431 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0,
432 "ncr53c9x_ecb", NULL);
433 ecb_pool_initialized = 1;
434 }
435
436 if (sc->sc_state == 0) {
437 /* First time through; initialize. */
438
439 TAILQ_INIT(&sc->ready_list);
440 sc->sc_nexus = NULL;
441 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
442 for (r = 0; r < NCR_NTARG; r++) {
443 LIST_INIT(&sc->sc_tinfo[r].luns);
444 }
445 } else {
446 /* Cancel any active commands. */
447 sc->sc_state = NCR_CLEANING;
448 sc->sc_msgify = 0;
449 if ((ecb = sc->sc_nexus) != NULL) {
450 ecb->xs->error = XS_TIMEOUT;
451 ncr53c9x_done(sc, ecb);
452 }
453 /* Cancel outstanding disconnected commands on each LUN */
454 for (r = 0; r < 8; r++) {
455 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
456 if ((ecb = li->untagged) != NULL) {
457 li->untagged = NULL;
458 /*
459 * XXXXXXX
460 *
461 * Should we terminate a command
462 * that never reached the disk?
463 */
464 li->busy = 0;
465 ecb->xs->error = XS_TIMEOUT;
466 ncr53c9x_done(sc, ecb);
467 }
468 for (i = 0; i < 256; i++)
469 if ((ecb = li->queued[i])) {
470 li->queued[i] = NULL;
471 ecb->xs->error = XS_TIMEOUT;
472 ncr53c9x_done(sc, ecb);
473 }
474 li->used = 0;
475 }
476 }
477 }
478
479 /*
480 * reset the chip to a known state
481 */
482 ncr53c9x_reset(sc);
483
484 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
485 for (r = 0; r < 8; r++) {
486 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
487 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
488
489 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
490 ? 0 : T_SYNCHOFF) |
491 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
492 T_NEED_TO_RESET;
493 #ifdef DEBUG
494 if (ncr53c9x_notag)
495 ti->flags &= ~T_TAG;
496 #endif
497 ti->period = sc->sc_minsync;
498 ti->offset = 0;
499 ti->cfg3 = 0;
500 }
501
502 if (doreset) {
503 sc->sc_state = NCR_SBR;
504 NCRCMD(sc, NCRCMD_RSTSCSI);
505 } else {
506 sc->sc_state = NCR_IDLE;
507 ncr53c9x_sched(sc);
508 }
509 }
510
511 /*
512 * Read the NCR registers, and save their contents for later use.
513 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
514 * NCR_INTR - so make sure it is the last read.
515 *
516 * I think that (from reading the docs) most bits in these registers
517 * only make sense when he DMA CSR has an interrupt showing. Call only
518 * if an interrupt is pending.
519 */
520 __inline__ void
521 ncr53c9x_readregs(sc)
522 struct ncr53c9x_softc *sc;
523 {
524
525 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
526 /* Only the stepo bits are of interest */
527 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
528
529 if (sc->sc_rev == NCR_VARIANT_FAS366)
530 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
531
532 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
533
534 if (sc->sc_glue->gl_clear_latched_intr != NULL)
535 (*sc->sc_glue->gl_clear_latched_intr)(sc);
536
537 /*
538 * Determine the SCSI bus phase, return either a real SCSI bus phase
539 * or some pseudo phase we use to detect certain exceptions.
540 */
541
542 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
543 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
544
545 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
546 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
547 }
548
549 /*
550 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
551 */
552 static inline int
553 ncr53c9x_stp2cpb(sc, period)
554 struct ncr53c9x_softc *sc;
555 int period;
556 {
557 int v;
558 v = (sc->sc_freq * period) / 250;
559 if (ncr53c9x_cpb2stp(sc, v) < period)
560 /* Correct round-down error */
561 v++;
562 return (v);
563 }
564
565 static inline void
566 ncr53c9x_setsync(sc, ti)
567 struct ncr53c9x_softc *sc;
568 struct ncr53c9x_tinfo *ti;
569 {
570 u_char syncoff, synctp;
571 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
572
573 if (ti->flags & T_SYNCMODE) {
574 syncoff = ti->offset;
575 synctp = ncr53c9x_stp2cpb(sc, ti->period);
576 if (sc->sc_features & NCR_F_FASTSCSI) {
577 /*
578 * If the period is 200ns or less (ti->period <= 50),
579 * put the chip in Fast SCSI mode.
580 */
581 if (ti->period <= 50)
582 /*
583 * There are (at least) 4 variations of the
584 * configuration 3 register. The drive attach
585 * routine sets the appropriate bit to put the
586 * chip into Fast SCSI mode so that it doesn't
587 * have to be figured out here each time.
588 */
589 cfg3 |= sc->sc_cfg3_fscsi;
590 }
591
592 /*
593 * Am53c974 requires different SYNCTP values when the
594 * FSCSI bit is off.
595 */
596 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
597 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
598 synctp--;
599 } else {
600 syncoff = 0;
601 synctp = 0;
602 }
603
604 if (sc->sc_features & NCR_F_HASCFG3)
605 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
606
607 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
608 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
609 }
610
611 /*
612 * Send a command to a target, set the driver state to NCR_SELECTING
613 * and let the caller take care of the rest.
614 *
615 * Keeping this as a function allows me to say that this may be done
616 * by DMA instead of programmed I/O soon.
617 */
618 void
619 ncr53c9x_select(sc, ecb)
620 struct ncr53c9x_softc *sc;
621 struct ncr53c9x_ecb *ecb;
622 {
623 struct scsipi_periph *periph = ecb->xs->xs_periph;
624 int target = periph->periph_target;
625 int lun = periph->periph_lun;
626 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
627 int tiflags = ti->flags;
628 u_char *cmd;
629 int clen;
630 int selatn3, selatns;
631 size_t dmasize;
632
633 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
634 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
635
636 sc->sc_state = NCR_SELECTING;
637 /*
638 * Schedule the timeout now, the first time we will go away
639 * expecting to come back due to an interrupt, because it is
640 * always possible that the interrupt may never happen.
641 */
642 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) {
643 int timeout = ecb->timeout;
644
645 if (timeout > 1000000)
646 timeout = (timeout / 1000) * hz;
647 else
648 timeout = (timeout * hz) / 1000;
649
650 callout_reset(&ecb->xs->xs_callout, timeout,
651 ncr53c9x_timeout, ecb);
652 }
653
654 /*
655 * The docs say the target register is never reset, and I
656 * can't think of a better place to set it
657 */
658 if (sc->sc_rev == NCR_VARIANT_FAS366) {
659 NCRCMD(sc, NCRCMD_FLUSH);
660 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
661 } else {
662 NCR_WRITE_REG(sc, NCR_SELID, target);
663 }
664 ncr53c9x_setsync(sc, ti);
665
666 if ((ecb->flags & ECB_SENSE) != 0) {
667 /*
668 * For REQUEST SENSE, we should not send an IDENTIFY or
669 * otherwise mangle the target. There should be no MESSAGE IN
670 * phase.
671 */
672 if (sc->sc_features & NCR_F_DMASELECT) {
673 /* setup DMA transfer for command */
674 dmasize = clen = ecb->clen;
675 sc->sc_cmdlen = clen;
676 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
677
678 /* Program the SCSI counter */
679 NCR_SET_COUNT(sc, dmasize);
680
681 if (sc->sc_rev != NCR_VARIANT_FAS366)
682 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
683
684 /* And get the targets attention */
685 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
686 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
687 &dmasize);
688 NCRDMA_GO(sc);
689 } else {
690 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
691 NCRCMD(sc, NCRCMD_SELNATN);
692 }
693 return;
694 }
695
696 selatn3 = selatns = 0;
697 if (ecb->tag[0] != 0) {
698 if (sc->sc_features & NCR_F_SELATN3)
699 /* use SELATN3 to send tag messages */
700 selatn3 = 1;
701 else
702 /* We don't have SELATN3; use SELATNS to send tags */
703 selatns = 1;
704 }
705
706 if (ti->flags & T_NEGOTIATE) {
707 /* We have to use SELATNS to send sync/wide messages */
708 selatn3 = 0;
709 selatns = 1;
710 }
711
712 cmd = (u_char *)&ecb->cmd.cmd;
713
714 if (selatn3) {
715 /* We'll use tags with SELATN3 */
716 clen = ecb->clen + 3;
717 cmd -= 3;
718 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
719 cmd[1] = ecb->tag[0]; /* msg[1] */
720 cmd[2] = ecb->tag[1]; /* msg[2] */
721 } else {
722 /* We don't have tags, or will send messages with SELATNS */
723 clen = ecb->clen + 1;
724 cmd -= 1;
725 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
726 }
727
728 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
729
730 /* setup DMA transfer for command */
731 dmasize = clen;
732 sc->sc_cmdlen = clen;
733 sc->sc_cmdp = cmd;
734
735 /* Program the SCSI counter */
736 NCR_SET_COUNT(sc, dmasize);
737
738 /* load the count in */
739 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
740 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
741
742 /* And get the targets attention */
743 if (selatn3) {
744 sc->sc_msgout = SEND_TAG;
745 sc->sc_flags |= NCR_ATN;
746 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
747 } else
748 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
749 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
750 NCRDMA_GO(sc);
751 return;
752 }
753
754 /*
755 * Who am I. This is where we tell the target that we are
756 * happy for it to disconnect etc.
757 */
758
759 /* Now get the command into the FIFO */
760 ncr53c9x_wrfifo(sc, cmd, clen);
761
762 /* And get the targets attention */
763 if (selatns) {
764 NCR_MISC(("SELATNS \n"));
765 /* Arbitrate, select and stop after IDENTIFY message */
766 NCRCMD(sc, NCRCMD_SELATNS);
767 } else if (selatn3) {
768 sc->sc_msgout = SEND_TAG;
769 sc->sc_flags |= NCR_ATN;
770 NCRCMD(sc, NCRCMD_SELATN3);
771 } else
772 NCRCMD(sc, NCRCMD_SELATN);
773 }
774
775 void
776 ncr53c9x_free_ecb(sc, ecb)
777 struct ncr53c9x_softc *sc;
778 struct ncr53c9x_ecb *ecb;
779 {
780 int s;
781
782 s = splbio();
783 ecb->flags = 0;
784 pool_put(&ecb_pool, (void *)ecb);
785 splx(s);
786 return;
787 }
788
789 struct ncr53c9x_ecb *
790 ncr53c9x_get_ecb(sc, flags)
791 struct ncr53c9x_softc *sc;
792 int flags;
793 {
794 struct ncr53c9x_ecb *ecb;
795 int s;
796
797 s = splbio();
798 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT);
799 splx(s);
800 if (ecb) {
801 memset(ecb, 0, sizeof(*ecb));
802 ecb->flags |= ECB_ALLOC;
803 }
804 return (ecb);
805 }
806
807 /*
808 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
809 */
810
811 /*
812 * Start a SCSI-command
813 * This function is called by the higher level SCSI-driver to queue/run
814 * SCSI-commands.
815 */
816
817 void
818 ncr53c9x_scsipi_request(chan, req, arg)
819 struct scsipi_channel *chan;
820 scsipi_adapter_req_t req;
821 void *arg;
822 {
823 struct scsipi_xfer *xs;
824 struct scsipi_periph *periph;
825 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev;
826 struct ncr53c9x_ecb *ecb;
827 int s, flags;
828
829 NCR_TRACE(("[ncr53c9x_scsipi_request] "));
830
831 switch (req) {
832 case ADAPTER_REQ_RUN_XFER:
833 xs = arg;
834 periph = xs->xs_periph;
835 flags = xs->xs_control;
836
837 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
838 periph->periph_target));
839
840 /* Get an ECB to use. */
841 ecb = ncr53c9x_get_ecb(sc, xs->xs_control);
842 /*
843 * This should never happen as we track resources
844 * in the mid-layer.
845 */
846 if (ecb == NULL) {
847 scsipi_printaddr(periph);
848 printf("unable to allocate ecb\n");
849 xs->error = XS_RESOURCE_SHORTAGE;
850 scsipi_done(xs);
851 return;
852 }
853
854 /* Initialize ecb */
855 ecb->xs = xs;
856 ecb->timeout = xs->timeout;
857
858 if (flags & XS_CTL_RESET) {
859 ecb->flags |= ECB_RESET;
860 ecb->clen = 0;
861 ecb->dleft = 0;
862 } else {
863 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen);
864 ecb->clen = xs->cmdlen;
865 ecb->daddr = xs->data;
866 ecb->dleft = xs->datalen;
867 }
868 ecb->stat = 0;
869
870 s = splbio();
871
872 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
873 ecb->flags |= ECB_READY;
874 if (sc->sc_state == NCR_IDLE)
875 ncr53c9x_sched(sc);
876
877 splx(s);
878
879 if ((flags & XS_CTL_POLL) == 0)
880 return;
881
882 /* Not allowed to use interrupts, use polling instead */
883 if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
884 ncr53c9x_timeout(ecb);
885 if (ncr53c9x_poll(sc, xs, ecb->timeout))
886 ncr53c9x_timeout(ecb);
887 }
888 return;
889
890 case ADAPTER_REQ_GROW_RESOURCES:
891 /* XXX Not supported. */
892 return;
893
894 case ADAPTER_REQ_SET_XFER_MODE:
895 {
896 struct ncr53c9x_tinfo *ti;
897 struct scsipi_xfer_mode *xm = arg;
898
899 ti = &sc->sc_tinfo[xm->xm_target];
900 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE);
901 ti->period = 0;
902 ti->offset = 0;
903
904 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 &&
905 (xm->xm_mode & PERIPH_CAP_TQING))
906 ti->flags |= T_TAG;
907 else
908 ti->flags &= ~T_TAG;
909
910 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) {
911 NCR_MISC(("%s: target %d: wide scsi negotiation\n",
912 sc->sc_dev.dv_xname, xm->xm_target));
913 if (sc->sc_rev == NCR_VARIANT_FAS366) {
914 ti->flags |= T_WIDE;
915 ti->width = 1;
916 }
917 }
918
919 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 &&
920 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) {
921 NCR_MISC(("%s: target %d: sync negotiation\n",
922 sc->sc_dev.dv_xname, xm->xm_target));
923 ti->flags |= T_NEGOTIATE;
924 ti->period = sc->sc_minsync;
925 }
926 /*
927 * If we're not going to negotiate, send the notification
928 * now, since it won't happen later.
929 */
930 if ((ti->flags & T_NEGOTIATE) == 0)
931 ncr53c9x_update_xfer_mode(sc, xm->xm_target);
932 return;
933 }
934 }
935 }
936
937 void
938 ncr53c9x_update_xfer_mode(sc, target)
939 struct ncr53c9x_softc *sc;
940 int target;
941 {
942 struct scsipi_xfer_mode xm;
943 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
944
945 xm.xm_target = target;
946 xm.xm_mode = 0;
947 xm.xm_period = 0;
948 xm.xm_offset = 0;
949
950 if (ti->flags & T_SYNCMODE) {
951 xm.xm_mode |= PERIPH_CAP_SYNC;
952 xm.xm_period = ti->period;
953 xm.xm_offset = ti->offset;
954 }
955 if (ti->width)
956 xm.xm_mode |= PERIPH_CAP_WIDE16;
957
958 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG)
959 xm.xm_mode |= PERIPH_CAP_TQING;
960
961 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
962 }
963
964 /*
965 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
966 */
967 int
968 ncr53c9x_poll(sc, xs, count)
969 struct ncr53c9x_softc *sc;
970 struct scsipi_xfer *xs;
971 int count;
972 {
973
974 NCR_TRACE(("[ncr53c9x_poll] "));
975 while (count) {
976 if (NCRDMA_ISINTR(sc)) {
977 ncr53c9x_intr(sc);
978 }
979 #if alternatively
980 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
981 ncr53c9x_intr(sc);
982 #endif
983 if ((xs->xs_status & XS_STS_DONE) != 0)
984 return (0);
985 if (sc->sc_state == NCR_IDLE) {
986 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
987 ncr53c9x_sched(sc);
988 }
989 DELAY(1000);
990 count--;
991 }
992 return (1);
993 }
994
995 int
996 ncr53c9x_ioctl(chan, cmd, arg, flag, p)
997 struct scsipi_channel *chan;
998 u_long cmd;
999 caddr_t arg;
1000 int flag;
1001 struct proc *p;
1002 {
1003 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */
1004 int s, error = 0;
1005
1006 s = splbio();
1007
1008 switch (cmd) {
1009 default:
1010 error = ENOTTY;
1011 break;
1012 }
1013 splx(s);
1014 return (error);
1015 }
1016
1017
1018 /*
1019 * LOW LEVEL SCSI UTILITIES
1020 */
1021
1022 /*
1023 * Schedule a scsi operation. This has now been pulled out of the interrupt
1024 * handler so that we may call it from ncr53c9x_scsipi_request and
1025 * ncr53c9x_done. This may save us an unecessary interrupt just to get
1026 * things going. Should only be called when state == NCR_IDLE and at bio pl.
1027 */
1028 void
1029 ncr53c9x_sched(sc)
1030 struct ncr53c9x_softc *sc;
1031 {
1032 struct ncr53c9x_ecb *ecb;
1033 struct scsipi_periph *periph;
1034 struct ncr53c9x_tinfo *ti;
1035 int lun;
1036 struct ncr53c9x_linfo *li;
1037 int s, tag;
1038
1039 NCR_TRACE(("[ncr53c9x_sched] "));
1040 if (sc->sc_state != NCR_IDLE)
1041 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1042
1043 /*
1044 * Find first ecb in ready queue that is for a target/lunit
1045 * combinations that is not busy.
1046 */
1047 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
1048 ecb = TAILQ_NEXT(ecb, chain)) {
1049 periph = ecb->xs->xs_periph;
1050 ti = &sc->sc_tinfo[periph->periph_target];
1051 lun = periph->periph_lun;
1052
1053 /* Select type of tag for this command */
1054 if ((ti->flags & (T_RSELECTOFF)) != 0)
1055 tag = 0;
1056 else if ((ti->flags & (T_TAG)) == 0)
1057 tag = 0;
1058 else if ((ecb->flags & ECB_SENSE) != 0)
1059 tag = 0;
1060 else
1061 tag = ecb->xs->xs_tag_type;
1062 #if 0
1063 /* XXXX Use tags for polled commands? */
1064 if (ecb->xs->xs_control & XS_CTL_POLL)
1065 tag = 0;
1066 #endif
1067
1068 s = splbio();
1069 li = TINFO_LUN(ti, lun);
1070 if (li == NULL) {
1071 /* Initialize LUN info and add to list. */
1072 if ((li = malloc(sizeof(*li),
1073 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) {
1074 splx(s);
1075 continue;
1076 }
1077 li->lun = lun;
1078
1079 LIST_INSERT_HEAD(&ti->luns, li, link);
1080 if (lun < NCR_NLUN)
1081 ti->lun[lun] = li;
1082 }
1083 li->last_used = time.tv_sec;
1084 if (tag == 0) {
1085 /* Try to issue this as an un-tagged command */
1086 if (li->untagged == NULL)
1087 li->untagged = ecb;
1088 }
1089 if (li->untagged != NULL) {
1090 tag = 0;
1091 if ((li->busy != 1) && li->used == 0) {
1092 /* We need to issue this untagged command now */
1093 ecb = li->untagged;
1094 periph = ecb->xs->xs_periph;
1095 } else {
1096 /* Not ready yet */
1097 splx(s);
1098 continue;
1099 }
1100 }
1101 ecb->tag[0] = tag;
1102 if (tag != 0) {
1103 li->queued[ecb->xs->xs_tag_id] = ecb;
1104 ecb->tag[1] = ecb->xs->xs_tag_id;
1105 li->used++;
1106 }
1107 splx(s);
1108 if (li->untagged != NULL && (li->busy != 1)) {
1109 li->busy = 1;
1110 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1111 ecb->flags &= ~ECB_READY;
1112 sc->sc_nexus = ecb;
1113 ncr53c9x_select(sc, ecb);
1114 break;
1115 }
1116 if (li->untagged == NULL && tag != 0) {
1117 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1118 ecb->flags &= ~ECB_READY;
1119 sc->sc_nexus = ecb;
1120 ncr53c9x_select(sc, ecb);
1121 break;
1122 } else
1123 NCR_MISC(("%d:%d busy\n",
1124 periph->periph_target,
1125 periph->periph_lun));
1126 }
1127 }
1128
1129 void
1130 ncr53c9x_sense(sc, ecb)
1131 struct ncr53c9x_softc *sc;
1132 struct ncr53c9x_ecb *ecb;
1133 {
1134 struct scsipi_xfer *xs = ecb->xs;
1135 struct scsipi_periph *periph = xs->xs_periph;
1136 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1137 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1138 struct ncr53c9x_linfo *li;
1139 int lun = periph->periph_lun;
1140
1141 NCR_MISC(("requesting sense "));
1142 /* Next, setup a request sense command block */
1143 memset(ss, 0, sizeof(*ss));
1144 ss->opcode = REQUEST_SENSE;
1145 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT;
1146 ss->length = sizeof(struct scsipi_sense_data);
1147 ecb->clen = sizeof(*ss);
1148 ecb->daddr = (char *)&xs->sense.scsi_sense;
1149 ecb->dleft = sizeof(struct scsipi_sense_data);
1150 ecb->flags |= ECB_SENSE;
1151 ecb->timeout = NCR_SENSE_TIMEOUT;
1152 ti->senses++;
1153 li = TINFO_LUN(ti, lun);
1154 if (li->busy)
1155 li->busy = 0;
1156 ncr53c9x_dequeue(sc, ecb);
1157 li->untagged = ecb; /* must be executed first to fix C/A */
1158 li->busy = 2;
1159 if (ecb == sc->sc_nexus) {
1160 ncr53c9x_select(sc, ecb);
1161 } else {
1162 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1163 ecb->flags |= ECB_READY;
1164 if (sc->sc_state == NCR_IDLE)
1165 ncr53c9x_sched(sc);
1166 }
1167 }
1168
1169 /*
1170 * POST PROCESSING OF SCSI_CMD (usually current)
1171 */
1172 void
1173 ncr53c9x_done(sc, ecb)
1174 struct ncr53c9x_softc *sc;
1175 struct ncr53c9x_ecb *ecb;
1176 {
1177 struct scsipi_xfer *xs = ecb->xs;
1178 struct scsipi_periph *periph = xs->xs_periph;
1179 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
1180 int lun = periph->periph_lun;
1181 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1182
1183 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1184
1185 callout_stop(&ecb->xs->xs_callout);
1186
1187 /*
1188 * Now, if we've come here with no error code, i.e. we've kept the
1189 * initial XS_NOERROR, and the status code signals that we should
1190 * check sense, we'll need to set up a request sense cmd block and
1191 * push the command back into the ready queue *before* any other
1192 * commands for this target/lunit, else we lose the sense info.
1193 * We don't support chk sense conditions for the request sense cmd.
1194 */
1195 if (xs->error == XS_NOERROR) {
1196 xs->status = ecb->stat;
1197 if ((ecb->flags & ECB_ABORT) != 0) {
1198 xs->error = XS_TIMEOUT;
1199 } else if ((ecb->flags & ECB_SENSE) != 0) {
1200 xs->error = XS_SENSE;
1201 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1202 /* First, save the return values */
1203 xs->resid = ecb->dleft;
1204 ncr53c9x_sense(sc, ecb);
1205 return;
1206 } else {
1207 xs->resid = ecb->dleft;
1208 }
1209 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY)
1210 xs->error = XS_BUSY;
1211 }
1212
1213 #ifdef NCR53C9X_DEBUG
1214 if (ncr53c9x_debug & NCR_SHOWMISC) {
1215 if (xs->resid != 0)
1216 printf("resid=%d ", xs->resid);
1217 if (xs->error == XS_SENSE)
1218 printf("sense=0x%02x\n",
1219 xs->sense.scsi_sense.error_code);
1220 else
1221 printf("error=%d\n", xs->error);
1222 }
1223 #endif
1224
1225 /*
1226 * Remove the ECB from whatever queue it's on.
1227 */
1228 ncr53c9x_dequeue(sc, ecb);
1229 if (ecb == sc->sc_nexus) {
1230 sc->sc_nexus = NULL;
1231 if (sc->sc_state != NCR_CLEANING) {
1232 sc->sc_state = NCR_IDLE;
1233 ncr53c9x_sched(sc);
1234 }
1235 }
1236
1237 if (xs->error == XS_SELTIMEOUT) {
1238 /* Selection timeout -- discard this LUN if empty */
1239 if (li->untagged == NULL && li->used == 0) {
1240 if (lun < NCR_NLUN)
1241 ti->lun[lun] = NULL;
1242 LIST_REMOVE(li, link);
1243 free(li, M_DEVBUF);
1244 }
1245 }
1246
1247 ncr53c9x_free_ecb(sc, ecb);
1248 ti->cmds++;
1249 scsipi_done(xs);
1250 }
1251
1252 void
1253 ncr53c9x_dequeue(sc, ecb)
1254 struct ncr53c9x_softc *sc;
1255 struct ncr53c9x_ecb *ecb;
1256 {
1257 struct ncr53c9x_tinfo *ti =
1258 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1259 struct ncr53c9x_linfo *li;
1260 int64_t lun = ecb->xs->xs_periph->periph_lun;
1261
1262 li = TINFO_LUN(ti, lun);
1263 #ifdef DIAGNOSTIC
1264 if (li == NULL || li->lun != lun)
1265 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n",
1266 (long long) lun, ecb);
1267 #endif
1268 if (li->untagged == ecb) {
1269 li->busy = 0;
1270 li->untagged = NULL;
1271 }
1272 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1273 #ifdef DIAGNOSTIC
1274 if (li->queued[ecb->tag[1]] != NULL &&
1275 (li->queued[ecb->tag[1]] != ecb))
1276 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1277 "instead of ecb %p\n", ecb->tag[1],
1278 (long long) lun,
1279 li->queued[ecb->tag[1]], ecb);
1280 #endif
1281 li->queued[ecb->tag[1]] = NULL;
1282 li->used--;
1283 }
1284
1285 if ((ecb->flags & ECB_READY) != 0) {
1286 ecb->flags &= ~ECB_READY;
1287 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1288 }
1289 }
1290
1291 /*
1292 * INTERRUPT/PROTOCOL ENGINE
1293 */
1294
1295 /*
1296 * Schedule an outgoing message by prioritizing it, and asserting
1297 * attention on the bus. We can only do this when we are the initiator
1298 * else there will be an illegal command interrupt.
1299 */
1300 #define ncr53c9x_sched_msgout(m) \
1301 do { \
1302 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1303 NCRCMD(sc, NCRCMD_SETATN); \
1304 sc->sc_flags |= NCR_ATN; \
1305 sc->sc_msgpriq |= (m); \
1306 } while (0)
1307
1308 static void
1309 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1310 {
1311 NCR_MISC(("[flushfifo] "));
1312
1313 NCRCMD(sc, NCRCMD_FLUSH);
1314
1315 if (sc->sc_phase == COMMAND_PHASE ||
1316 sc->sc_phase == MESSAGE_OUT_PHASE)
1317 DELAY(2);
1318 }
1319
1320 static int
1321 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1322 {
1323 int i, n;
1324 u_char *buf;
1325
1326 switch(how) {
1327 case NCR_RDFIFO_START:
1328 buf = sc->sc_imess;
1329 sc->sc_imlen = 0;
1330 break;
1331 case NCR_RDFIFO_CONTINUE:
1332 buf = sc->sc_imess + sc->sc_imlen;
1333 break;
1334 default:
1335 panic("ncr53c9x_rdfifo: bad flag\n");
1336 break;
1337 }
1338
1339 /*
1340 * XXX buffer (sc_imess) size for message
1341 */
1342
1343 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1344
1345 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1346 n *= 2;
1347
1348 for (i = 0; i < n; i++)
1349 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1350
1351 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) {
1352
1353 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1354 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1355
1356 NCR_READ_REG(sc, NCR_FIFO);
1357
1358 ncr53c9x_flushfifo(sc);
1359 }
1360 } else {
1361 for (i = 0; i < n; i++)
1362 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1363 }
1364
1365 sc->sc_imlen += i;
1366
1367 #ifdef NCR53C9X_DEBUG
1368 {
1369 int j;
1370
1371 NCR_TRACE(("\n[rdfifo %s (%d):",
1372 (how == NCR_RDFIFO_START) ? "start" : "cont",
1373 (int)sc->sc_imlen));
1374 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1375 for (j = 0; j < sc->sc_imlen; j++)
1376 printf(" %02x", sc->sc_imess[j]);
1377 printf("]\n");
1378 }
1379 }
1380 #endif
1381 return sc->sc_imlen;
1382 }
1383
1384 static void
1385 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1386 {
1387 int i;
1388
1389 #ifdef NCR53C9X_DEBUG
1390 NCR_MISC(("[wrfifo(%d):", len));
1391 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1392 for (i = 0; i < len; i++)
1393 printf(" %02x", p[i]);
1394 printf("]\n");
1395 }
1396 #endif
1397
1398 for (i = 0; i < len; i++) {
1399 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1400
1401 if (sc->sc_rev == NCR_VARIANT_FAS366)
1402 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1403 }
1404 }
1405
1406 int
1407 ncr53c9x_reselect(sc, message, tagtype, tagid)
1408 struct ncr53c9x_softc *sc;
1409 int message;
1410 int tagtype, tagid;
1411 {
1412 u_char selid, target, lun;
1413 struct ncr53c9x_ecb *ecb = NULL;
1414 struct ncr53c9x_tinfo *ti;
1415 struct ncr53c9x_linfo *li;
1416
1417
1418 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1419 target = sc->sc_selid;
1420 } else {
1421 /*
1422 * The SCSI chip made a snapshot of the data bus
1423 * while the reselection was being negotiated.
1424 * This enables us to determine which target did
1425 * the reselect.
1426 */
1427 selid = sc->sc_selid & ~(1 << sc->sc_id);
1428 if (selid & (selid - 1)) {
1429 printf("%s: reselect with invalid selid %02x;"
1430 " sending DEVICE RESET\n",
1431 sc->sc_dev.dv_xname, selid);
1432 goto reset;
1433 }
1434
1435 target = ffs(selid) - 1;
1436 }
1437 lun = message & 0x07;
1438
1439 /*
1440 * Search wait queue for disconnected cmd
1441 * The list should be short, so I haven't bothered with
1442 * any more sophisticated structures than a simple
1443 * singly linked list.
1444 */
1445 ti = &sc->sc_tinfo[target];
1446 li = TINFO_LUN(ti, lun);
1447
1448 /*
1449 * We can get as far as the LUN with the IDENTIFY
1450 * message. Check to see if we're running an
1451 * un-tagged command. Otherwise ack the IDENTIFY
1452 * and wait for a tag message.
1453 */
1454 if (li != NULL) {
1455 if (li->untagged != NULL && li->busy)
1456 ecb = li->untagged;
1457 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1458 /* Wait for tag to come by */
1459 sc->sc_state = NCR_IDENTIFIED;
1460 return (0);
1461 } else if (tagtype)
1462 ecb = li->queued[tagid];
1463 }
1464 if (ecb == NULL) {
1465 printf("%s: reselect from target %d lun %d tag %x:%x "
1466 "with no nexus; sending ABORT\n",
1467 sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1468 goto abort;
1469 }
1470
1471 /* Make this nexus active again. */
1472 sc->sc_state = NCR_CONNECTED;
1473 sc->sc_nexus = ecb;
1474 ncr53c9x_setsync(sc, ti);
1475
1476 if (ecb->flags & ECB_RESET)
1477 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1478 else if (ecb->flags & ECB_ABORT)
1479 ncr53c9x_sched_msgout(SEND_ABORT);
1480
1481 /* Do an implicit RESTORE POINTERS. */
1482 sc->sc_dp = ecb->daddr;
1483 sc->sc_dleft = ecb->dleft;
1484
1485 return (0);
1486
1487 reset:
1488 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1489 return (1);
1490
1491 abort:
1492 ncr53c9x_sched_msgout(SEND_ABORT);
1493 return (1);
1494 }
1495
1496 static inline int
1497 __verify_msg_format(u_char *p, int len)
1498 {
1499
1500 if (len == 1 && MSG_IS1BYTE(p[0]))
1501 return 1;
1502 if (len == 2 && MSG_IS2BYTE(p[0]))
1503 return 1;
1504 if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
1505 len == p[1] + 2)
1506 return 1;
1507
1508 return 0;
1509 }
1510
1511 /*
1512 * Get an incoming message as initiator.
1513 *
1514 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1515 * byte in the FIFO
1516 */
1517 void
1518 ncr53c9x_msgin(sc)
1519 struct ncr53c9x_softc *sc;
1520 {
1521
1522 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1523
1524 if (sc->sc_imlen == 0) {
1525 printf("%s: msgin: no msg byte available\n",
1526 sc->sc_dev.dv_xname);
1527 return;
1528 }
1529
1530 /*
1531 * Prepare for a new message. A message should (according
1532 * to the SCSI standard) be transmitted in one single
1533 * MESSAGE_IN_PHASE. If we have been in some other phase,
1534 * then this is a new message.
1535 */
1536 if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
1537 sc->sc_state != NCR_RESELECTED) {
1538 printf("%s: phase change, dropping message, "
1539 "prev %d, state %d\n",
1540 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1541 sc->sc_flags &= ~NCR_DROP_MSGI;
1542 sc->sc_imlen = 0;
1543 }
1544
1545 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1546
1547 /*
1548 * If we're going to reject the message, don't bother storing
1549 * the incoming bytes. But still, we need to ACK them.
1550 */
1551 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
1552 NCRCMD(sc, NCRCMD_MSGOK);
1553 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
1554 return;
1555 }
1556
1557 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1558 ncr53c9x_sched_msgout(SEND_REJECT);
1559 sc->sc_flags |= NCR_DROP_MSGI;
1560 } else {
1561 u_char *pb;
1562 int plen;
1563
1564 switch (sc->sc_state) {
1565 /*
1566 * if received message is the first of reselection
1567 * then first byte is selid, and then message
1568 */
1569 case NCR_RESELECTED:
1570 pb = sc->sc_imess + 1;
1571 plen = sc->sc_imlen - 1;
1572 break;
1573 default:
1574 pb = sc->sc_imess;
1575 plen = sc->sc_imlen;
1576 break;
1577 }
1578
1579 if (__verify_msg_format(pb, plen))
1580 goto gotit;
1581 }
1582
1583 /* Ack what we have so far */
1584 NCRCMD(sc, NCRCMD_MSGOK);
1585 return;
1586
1587 gotit:
1588 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1589 /* we got complete message, flush the imess, */
1590 /* XXX nobody uses imlen below */
1591 sc->sc_imlen = 0;
1592 /*
1593 * Now we should have a complete message (1 byte, 2 byte
1594 * and moderately long extended messages). We only handle
1595 * extended messages which total length is shorter than
1596 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1597 */
1598 switch (sc->sc_state) {
1599 struct ncr53c9x_ecb *ecb;
1600 struct ncr53c9x_tinfo *ti;
1601 struct ncr53c9x_linfo *li;
1602 int lun;
1603
1604 case NCR_CONNECTED:
1605 ecb = sc->sc_nexus;
1606 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1607
1608 switch (sc->sc_imess[0]) {
1609 case MSG_CMDCOMPLETE:
1610 NCR_MSGS(("cmdcomplete "));
1611 if (sc->sc_dleft < 0) {
1612 scsipi_printaddr(ecb->xs->xs_periph);
1613 printf("got %ld extra bytes\n",
1614 -(long)sc->sc_dleft);
1615 sc->sc_dleft = 0;
1616 }
1617 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
1618 0 : sc->sc_dleft;
1619 if ((ecb->flags & ECB_SENSE) == 0)
1620 ecb->xs->resid = ecb->dleft;
1621 sc->sc_state = NCR_CMDCOMPLETE;
1622 break;
1623
1624 case MSG_MESSAGE_REJECT:
1625 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1626 switch (sc->sc_msgout) {
1627 case SEND_TAG:
1628 /*
1629 * Target does not like tagged queuing.
1630 * - Flush the command queue
1631 * - Disable tagged queuing for the target
1632 * - Dequeue ecb from the queued array.
1633 */
1634 printf("%s: tagged queuing rejected: "
1635 "target %d\n",
1636 sc->sc_dev.dv_xname,
1637 ecb->xs->xs_periph->periph_target);
1638
1639 NCR_MSGS(("(rejected sent tag)"));
1640 NCRCMD(sc, NCRCMD_FLUSH);
1641 DELAY(1);
1642 ti->flags &= ~T_TAG;
1643 lun = ecb->xs->xs_periph->periph_lun;
1644 li = TINFO_LUN(ti, lun);
1645 if (ecb->tag[0] &&
1646 li->queued[ecb->tag[1]] != NULL) {
1647 li->queued[ecb->tag[1]] = NULL;
1648 li->used--;
1649 }
1650 ecb->tag[0] = ecb->tag[1] = 0;
1651 li->untagged = ecb;
1652 li->busy = 1;
1653 break;
1654
1655 case SEND_SDTR:
1656 printf("%s: sync transfer rejected: "
1657 "target %d\n",
1658 sc->sc_dev.dv_xname,
1659 ecb->xs->xs_periph->periph_target);
1660
1661 sc->sc_flags &= ~NCR_SYNCHNEGO;
1662 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1663 ncr53c9x_setsync(sc, ti);
1664 ncr53c9x_update_xfer_mode(sc,
1665 ecb->xs->xs_periph->periph_target);
1666 break;
1667
1668 case SEND_WDTR:
1669 printf("%s: wide transfer rejected: "
1670 "target %d\n",
1671 sc->sc_dev.dv_xname,
1672 ecb->xs->xs_periph->periph_target);
1673 ti->flags &= ~T_WIDE;
1674 ti->width = 0;
1675 break;
1676
1677 case SEND_INIT_DET_ERR:
1678 goto abort;
1679 }
1680 break;
1681
1682 case MSG_NOOP:
1683 NCR_MSGS(("noop "));
1684 break;
1685
1686 case MSG_HEAD_OF_Q_TAG:
1687 case MSG_SIMPLE_Q_TAG:
1688 case MSG_ORDERED_Q_TAG:
1689 NCR_MSGS(("TAG %x:%x",
1690 sc->sc_imess[0], sc->sc_imess[1]));
1691 break;
1692
1693 case MSG_DISCONNECT:
1694 NCR_MSGS(("disconnect "));
1695 ti->dconns++;
1696 sc->sc_state = NCR_DISCONNECT;
1697
1698 /*
1699 * Mark the fact that all bytes have moved. The
1700 * target may not bother to do a SAVE POINTERS
1701 * at this stage. This flag will set the residual
1702 * count to zero on MSG COMPLETE.
1703 */
1704 if (sc->sc_dleft == 0)
1705 ecb->flags |= ECB_TENTATIVE_DONE;
1706
1707 break;
1708
1709 case MSG_SAVEDATAPOINTER:
1710 NCR_MSGS(("save datapointer "));
1711 ecb->daddr = sc->sc_dp;
1712 ecb->dleft = sc->sc_dleft;
1713 break;
1714
1715 case MSG_RESTOREPOINTERS:
1716 NCR_MSGS(("restore datapointer "));
1717 sc->sc_dp = ecb->daddr;
1718 sc->sc_dleft = ecb->dleft;
1719 break;
1720
1721 case MSG_EXTENDED:
1722 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1723 switch (sc->sc_imess[2]) {
1724 case MSG_EXT_SDTR:
1725 NCR_MSGS(("SDTR period %d, offset %d ",
1726 sc->sc_imess[3], sc->sc_imess[4]));
1727 if (sc->sc_imess[1] != 3)
1728 goto reject;
1729 ti->period = sc->sc_imess[3];
1730 ti->offset = sc->sc_imess[4];
1731 ti->flags &= ~T_NEGOTIATE;
1732 if (sc->sc_minsync == 0 ||
1733 ti->offset == 0 ||
1734 ti->period > 124) {
1735 #if 0
1736 #ifdef NCR53C9X_DEBUG
1737 scsipi_printaddr(ecb->xs->xs_periph);
1738 printf("async mode\n");
1739 #endif
1740 #endif
1741 ti->flags &= ~T_SYNCMODE;
1742 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1743 /*
1744 * target initiated negotiation
1745 */
1746 ti->offset = 0;
1747 ncr53c9x_sched_msgout(
1748 SEND_SDTR);
1749 }
1750 } else {
1751 #if 0
1752 int r = 250/ti->period;
1753 int s = (100*250)/ti->period - 100*r;
1754 #endif
1755 int p;
1756
1757 p = ncr53c9x_stp2cpb(sc, ti->period);
1758 ti->period = ncr53c9x_cpb2stp(sc, p);
1759 #if 0
1760 #ifdef NCR53C9X_DEBUG
1761 scsipi_printaddr(ecb->xs->xs_periph);
1762 printf("max sync rate %d.%02dMB/s\n",
1763 r, s);
1764 #endif
1765 #endif
1766 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1767 /*
1768 * target initiated negotiation
1769 */
1770 if (ti->period <
1771 sc->sc_minsync)
1772 ti->period =
1773 sc->sc_minsync;
1774 if (ti->offset > 15)
1775 ti->offset = 15;
1776 ti->flags &= ~T_SYNCMODE;
1777 ncr53c9x_sched_msgout(
1778 SEND_SDTR);
1779 } else {
1780 /* we are sync */
1781 ti->flags |= T_SYNCMODE;
1782 }
1783 }
1784 ncr53c9x_update_xfer_mode(sc,
1785 ecb->xs->xs_periph->periph_target);
1786 sc->sc_flags &= ~NCR_SYNCHNEGO;
1787 ncr53c9x_setsync(sc, ti);
1788 break;
1789
1790 case MSG_EXT_WDTR:
1791 printf("%s: wide mode %d\n",
1792 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1793 if (sc->sc_imess[3] == 1) {
1794 ti->cfg3 |= NCRFASCFG3_EWIDE;
1795 ncr53c9x_setsync(sc, ti);
1796 } else
1797 ti->width = 0;
1798 ti->flags &= ~T_WIDE;
1799 break;
1800 default:
1801 scsipi_printaddr(ecb->xs->xs_periph);
1802 printf("unrecognized MESSAGE EXTENDED;"
1803 " sending REJECT\n");
1804 goto reject;
1805 }
1806 break;
1807
1808 default:
1809 NCR_MSGS(("ident "));
1810 scsipi_printaddr(ecb->xs->xs_periph);
1811 printf("unrecognized MESSAGE; sending REJECT\n");
1812 reject:
1813 ncr53c9x_sched_msgout(SEND_REJECT);
1814 break;
1815 }
1816 break;
1817
1818 case NCR_IDENTIFIED:
1819 /*
1820 * IDENTIFY message was received and queue tag is expected now
1821 */
1822 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1823 (sc->sc_msgify == 0)) {
1824 printf("%s: TAG reselect without IDENTIFY;"
1825 " MSG %x;"
1826 " sending DEVICE RESET\n",
1827 sc->sc_dev.dv_xname,
1828 sc->sc_imess[0]);
1829 goto reset;
1830 }
1831 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1832 sc->sc_imess[0], sc->sc_imess[1]);
1833 break;
1834
1835 case NCR_RESELECTED:
1836 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1837 sc->sc_msgify = sc->sc_imess[1];
1838 } else {
1839 printf("%s: reselect without IDENTIFY;"
1840 " MSG %x;"
1841 " sending DEVICE RESET\n",
1842 sc->sc_dev.dv_xname,
1843 sc->sc_imess[1]);
1844 goto reset;
1845 }
1846 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1847 break;
1848
1849 default:
1850 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1851 sc->sc_dev.dv_xname);
1852 reset:
1853 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1854 break;
1855
1856 abort:
1857 ncr53c9x_sched_msgout(SEND_ABORT);
1858 break;
1859 }
1860
1861 /* if we have more messages to send set ATN */
1862 if (sc->sc_msgpriq)
1863 NCRCMD(sc, NCRCMD_SETATN);
1864
1865 /* Ack last message byte */
1866 NCRCMD(sc, NCRCMD_MSGOK);
1867
1868 /* Done, reset message pointer. */
1869 sc->sc_flags &= ~NCR_DROP_MSGI;
1870 sc->sc_imlen = 0;
1871 }
1872
1873
1874 /*
1875 * Send the highest priority, scheduled message
1876 */
1877 void
1878 ncr53c9x_msgout(sc)
1879 struct ncr53c9x_softc *sc;
1880 {
1881 struct ncr53c9x_tinfo *ti;
1882 struct ncr53c9x_ecb *ecb;
1883 size_t size;
1884
1885 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1886 sc->sc_msgpriq, sc->sc_prevphase));
1887
1888 /*
1889 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1890 * condition on the SCSI bus. The 53c9x chip
1891 * automatically turns off ATN before sending the
1892 * message byte. (see also the comment below in the
1893 * default case when picking out a message to send)
1894 */
1895 if (sc->sc_flags & NCR_ATN) {
1896 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1897 new:
1898 NCRCMD(sc, NCRCMD_FLUSH);
1899 /* DELAY(1); */
1900 sc->sc_msgoutq = 0;
1901 sc->sc_omlen = 0;
1902 }
1903 } else {
1904 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1905 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1906 goto new;
1907 } else {
1908 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1909 sc->sc_dev.dv_xname, __LINE__);
1910 }
1911 }
1912
1913 if (sc->sc_omlen == 0) {
1914 /* Pick up highest priority message */
1915 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1916 sc->sc_msgoutq |= sc->sc_msgout;
1917 sc->sc_msgpriq &= ~sc->sc_msgout;
1918 sc->sc_omlen = 1; /* "Default" message len */
1919 switch (sc->sc_msgout) {
1920 case SEND_SDTR:
1921 ecb = sc->sc_nexus;
1922 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1923 sc->sc_omess[0] = MSG_EXTENDED;
1924 sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
1925 sc->sc_omess[2] = MSG_EXT_SDTR;
1926 sc->sc_omess[3] = ti->period;
1927 sc->sc_omess[4] = ti->offset;
1928 sc->sc_omlen = 5;
1929 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1930 ti->flags |= T_SYNCMODE;
1931 ncr53c9x_setsync(sc, ti);
1932 }
1933 break;
1934 case SEND_WDTR:
1935 ecb = sc->sc_nexus;
1936 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1937 sc->sc_omess[0] = MSG_EXTENDED;
1938 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
1939 sc->sc_omess[2] = MSG_EXT_WDTR;
1940 sc->sc_omess[3] = ti->width;
1941 sc->sc_omlen = 4;
1942 break;
1943 case SEND_IDENTIFY:
1944 if (sc->sc_state != NCR_CONNECTED) {
1945 printf("%s at line %d: no nexus\n",
1946 sc->sc_dev.dv_xname, __LINE__);
1947 }
1948 ecb = sc->sc_nexus;
1949 sc->sc_omess[0] =
1950 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0);
1951 break;
1952 case SEND_TAG:
1953 if (sc->sc_state != NCR_CONNECTED) {
1954 printf("%s at line %d: no nexus\n",
1955 sc->sc_dev.dv_xname, __LINE__);
1956 }
1957 ecb = sc->sc_nexus;
1958 sc->sc_omess[0] = ecb->tag[0];
1959 sc->sc_omess[1] = ecb->tag[1];
1960 sc->sc_omlen = 2;
1961 break;
1962 case SEND_DEV_RESET:
1963 sc->sc_flags |= NCR_ABORTING;
1964 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1965 ecb = sc->sc_nexus;
1966 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
1967 ti->flags &= ~T_SYNCMODE;
1968 ncr53c9x_update_xfer_mode(sc,
1969 ecb->xs->xs_periph->periph_target);
1970 if ((ti->flags & T_SYNCHOFF) == 0)
1971 /* We can re-start sync negotiation */
1972 ti->flags |= T_NEGOTIATE;
1973 break;
1974 case SEND_PARITY_ERROR:
1975 sc->sc_omess[0] = MSG_PARITY_ERROR;
1976 break;
1977 case SEND_ABORT:
1978 sc->sc_flags |= NCR_ABORTING;
1979 sc->sc_omess[0] = MSG_ABORT;
1980 break;
1981 case SEND_INIT_DET_ERR:
1982 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1983 break;
1984 case SEND_REJECT:
1985 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1986 break;
1987 default:
1988 /*
1989 * We normally do not get here, since the chip
1990 * automatically turns off ATN before the last
1991 * byte of a message is sent to the target.
1992 * However, if the target rejects our (multi-byte)
1993 * message early by switching to MSG IN phase
1994 * ATN remains on, so the target may return to
1995 * MSG OUT phase. If there are no scheduled messages
1996 * left we send a NO-OP.
1997 *
1998 * XXX - Note that this leaves no useful purpose for
1999 * the NCR_ATN flag.
2000 */
2001 sc->sc_flags &= ~NCR_ATN;
2002 sc->sc_omess[0] = MSG_NOOP;
2003 break;
2004 }
2005 sc->sc_omp = sc->sc_omess;
2006 }
2007
2008 #ifdef DEBUG
2009 {
2010 int i;
2011
2012 NCR_MISC(("<msgout:"));
2013 for (i = 0; i < sc->sc_omlen; i++)
2014 NCR_MISC((" %02x", sc->sc_omess[i]));
2015 NCR_MISC(("> "));
2016 }
2017 #endif
2018 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2019 /*
2020 * XXX fifo size
2021 */
2022 ncr53c9x_flushfifo(sc);
2023 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
2024 NCRCMD(sc, NCRCMD_TRANS);
2025 } else {
2026 /* (re)send the message */
2027 size = min(sc->sc_omlen, sc->sc_maxxfer);
2028 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
2029 /* Program the SCSI counter */
2030 NCR_SET_COUNT(sc, size);
2031
2032 /* Load the count in and start the message-out transfer */
2033 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2034 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
2035 NCRDMA_GO(sc);
2036 }
2037 }
2038
2039 /*
2040 * This is the most critical part of the driver, and has to know
2041 * how to deal with *all* error conditions and phases from the SCSI
2042 * bus. If there are no errors and the DMA was active, then call the
2043 * DMA pseudo-interrupt handler. If this returns 1, then that was it
2044 * and we can return from here without further processing.
2045 *
2046 * Most of this needs verifying.
2047 */
2048 int
2049 ncr53c9x_intr(arg)
2050 void *arg;
2051 {
2052 struct ncr53c9x_softc *sc = arg;
2053 struct ncr53c9x_ecb *ecb;
2054 struct scsipi_periph *periph;
2055 struct ncr53c9x_tinfo *ti;
2056 size_t size;
2057 int nfifo;
2058
2059 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state));
2060
2061 if (!NCRDMA_ISINTR(sc))
2062 return (0);
2063
2064 again:
2065 /* and what do the registers say... */
2066 ncr53c9x_readregs(sc);
2067
2068 sc->sc_intrcnt.ev_count++;
2069
2070 /*
2071 * At the moment, only a SCSI Bus Reset or Illegal
2072 * Command are classed as errors. A disconnect is a
2073 * valid condition, and we let the code check is the
2074 * "NCR_BUSFREE_OK" flag was set before declaring it
2075 * and error.
2076 *
2077 * Also, the status register tells us about "Gross
2078 * Errors" and "Parity errors". Only the Gross Error
2079 * is really bad, and the parity errors are dealt
2080 * with later
2081 *
2082 * TODO
2083 * If there are too many parity error, go to slow
2084 * cable mode ?
2085 */
2086
2087 /* SCSI Reset */
2088 if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
2089 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
2090 NCRCMD(sc, NCRCMD_FLUSH);
2091 DELAY(1);
2092 }
2093 if (sc->sc_state != NCR_SBR) {
2094 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
2095 ncr53c9x_init(sc, 0); /* Restart everything */
2096 return (1);
2097 }
2098 #if 0
2099 /*XXX*/ printf("<expected bus reset: "
2100 "[intr %x, stat %x, step %d]>\n",
2101 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2102 #endif
2103 if (sc->sc_nexus != NULL)
2104 panic("%s: nexus in reset state",
2105 sc->sc_dev.dv_xname);
2106 goto sched;
2107 }
2108
2109 ecb = sc->sc_nexus;
2110
2111 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
2112 if (sc->sc_espintr & NCRINTR_ERR ||
2113 sc->sc_espstat & NCRSTAT_GE) {
2114
2115 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
2116 /* Gross Error; no target ? */
2117 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2118 NCRCMD(sc, NCRCMD_FLUSH);
2119 DELAY(1);
2120 }
2121 if (sc->sc_state == NCR_CONNECTED ||
2122 sc->sc_state == NCR_SELECTING) {
2123 ecb->xs->error = XS_TIMEOUT;
2124 ncr53c9x_done(sc, ecb);
2125 }
2126 return (1);
2127 }
2128
2129 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2130 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2131 /*
2132 * Eat away "Illegal command" interrupt
2133 * on a ESP100 caused by a re-selection
2134 * while we were trying to select
2135 * another target.
2136 */
2137 #ifdef DEBUG
2138 printf("%s: ESP100 work-around activated\n",
2139 sc->sc_dev.dv_xname);
2140 #endif
2141 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2142 return (1);
2143 }
2144 /* illegal command, out of sync ? */
2145 printf("%s: illegal command: 0x%x "
2146 "(state %d, phase %x, prevphase %x)\n",
2147 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2148 sc->sc_state, sc->sc_phase, sc->sc_prevphase);
2149 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2150 NCRCMD(sc, NCRCMD_FLUSH);
2151 DELAY(1);
2152 }
2153 ncr53c9x_init(sc, 1); /* Restart everything */
2154 return (1);
2155 }
2156 }
2157 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2158
2159 /*
2160 * Call if DMA is active.
2161 *
2162 * If DMA_INTR returns true, then maybe go 'round the loop
2163 * again in case there is no more DMA queued, but a phase
2164 * change is expected.
2165 */
2166 if (NCRDMA_ISACTIVE(sc)) {
2167 int r = NCRDMA_INTR(sc);
2168 if (r == -1) {
2169 printf("%s: DMA error; resetting\n",
2170 sc->sc_dev.dv_xname);
2171 ncr53c9x_init(sc, 1);
2172 }
2173 /* If DMA active here, then go back to work... */
2174 if (NCRDMA_ISACTIVE(sc))
2175 return (1);
2176
2177 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2178 /*
2179 * DMA not completed. If we can not find a
2180 * acceptable explanation, print a diagnostic.
2181 */
2182 if (sc->sc_state == NCR_SELECTING)
2183 /*
2184 * This can happen if we are reselected
2185 * while using DMA to select a target.
2186 */
2187 /*void*/;
2188 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2189 /*
2190 * Our (multi-byte) message (eg SDTR) was
2191 * interrupted by the target to send
2192 * a MSG REJECT.
2193 * Print diagnostic if current phase
2194 * is not MESSAGE IN.
2195 */
2196 if (sc->sc_phase != MESSAGE_IN_PHASE)
2197 printf("%s: !TC on MSG OUT"
2198 " [intr %x, stat %x, step %d]"
2199 " prevphase %x, resid %lx\n",
2200 sc->sc_dev.dv_xname,
2201 sc->sc_espintr,
2202 sc->sc_espstat,
2203 sc->sc_espstep,
2204 sc->sc_prevphase,
2205 (u_long)sc->sc_omlen);
2206 } else if (sc->sc_dleft == 0) {
2207 /*
2208 * The DMA operation was started for
2209 * a DATA transfer. Print a diagnostic
2210 * if the DMA counter and TC bit
2211 * appear to be out of sync.
2212 */
2213 printf("%s: !TC on DATA XFER"
2214 " [intr %x, stat %x, step %d]"
2215 " prevphase %x, resid %x\n",
2216 sc->sc_dev.dv_xname,
2217 sc->sc_espintr,
2218 sc->sc_espstat,
2219 sc->sc_espstep,
2220 sc->sc_prevphase,
2221 ecb ? ecb->dleft : -1);
2222 }
2223 }
2224 }
2225
2226 /*
2227 * Check for less serious errors.
2228 */
2229 if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
2230 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2231 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2232 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2233 else
2234 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2235 }
2236
2237 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2238 sc->sc_msgify = 0;
2239 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2240 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2241 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2242 NCRCMD(sc, NCRCMD_FLUSH);
2243 /* DELAY(1); */
2244 }
2245 /*
2246 * This command must (apparently) be issued within
2247 * 250mS of a disconnect. So here you are...
2248 */
2249 NCRCMD(sc, NCRCMD_ENSEL);
2250
2251 switch (sc->sc_state) {
2252 case NCR_RESELECTED:
2253 goto sched;
2254
2255 case NCR_SELECTING:
2256 {
2257 struct ncr53c9x_linfo *li;
2258
2259 ecb->xs->error = XS_SELTIMEOUT;
2260
2261 /* Selection timeout -- discard all LUNs if empty */
2262 periph = ecb->xs->xs_periph;
2263 ti = &sc->sc_tinfo[periph->periph_target];
2264 li = LIST_FIRST(&ti->luns);
2265 while (li != NULL) {
2266 if (li->untagged == NULL && li->used == 0) {
2267 if (li->lun < NCR_NLUN)
2268 ti->lun[li->lun] = NULL;
2269 LIST_REMOVE(li, link);
2270 free(li, M_DEVBUF);
2271 /*
2272 * Restart the search at the beginning
2273 */
2274 li = LIST_FIRST(&ti->luns);
2275 continue;
2276 }
2277 li = LIST_NEXT(li, link);
2278 }
2279 goto finish;
2280 }
2281 case NCR_CONNECTED:
2282 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
2283 #ifdef NCR53C9X_DEBUG
2284 if (ecb != NULL)
2285 scsipi_printaddr(ecb->xs->xs_periph);
2286 printf("sync nego not completed!\n");
2287 #endif
2288 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target];
2289 sc->sc_flags &= ~NCR_SYNCHNEGO;
2290 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2291 }
2292
2293 /* it may be OK to disconnect */
2294 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2295 /*
2296 * Section 5.1.1 of the SCSI 2 spec
2297 * suggests issuing a REQUEST SENSE
2298 * following an unexpected disconnect.
2299 * Some devices go into a contingent
2300 * allegiance condition when
2301 * disconnecting, and this is necessary
2302 * to clean up their state.
2303 */
2304 printf("%s: unexpected disconnect; ",
2305 sc->sc_dev.dv_xname);
2306 if ((ecb->flags & ECB_SENSE) != 0) {
2307 printf("resetting\n");
2308 goto reset;
2309 }
2310 printf("sending REQUEST SENSE\n");
2311 callout_stop(&ecb->xs->xs_callout);
2312 ncr53c9x_sense(sc, ecb);
2313 goto out;
2314 }
2315
2316 ecb->xs->error = XS_TIMEOUT;
2317 goto finish;
2318
2319 case NCR_DISCONNECT:
2320 sc->sc_nexus = NULL;
2321 goto sched;
2322
2323 case NCR_CMDCOMPLETE:
2324 goto finish;
2325 }
2326 }
2327
2328 switch (sc->sc_state) {
2329
2330 case NCR_SBR:
2331 printf("%s: waiting for SCSI Bus Reset to happen\n",
2332 sc->sc_dev.dv_xname);
2333 return (1);
2334
2335 case NCR_RESELECTED:
2336 /*
2337 * we must be continuing a message ?
2338 */
2339 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2340 printf("%s: target didn't identify\n",
2341 sc->sc_dev.dv_xname);
2342 ncr53c9x_init(sc, 1);
2343 return (1);
2344 }
2345 printf("<<RESELECT CONT'd>>");
2346 #if XXXX
2347 ncr53c9x_msgin(sc);
2348 if (sc->sc_state != NCR_CONNECTED) {
2349 /* IDENTIFY fail?! */
2350 printf("%s: identify failed\n",
2351 sc->sc_dev.dv_xname, sc->sc_state);
2352 ncr53c9x_init(sc, 1);
2353 return (1);
2354 }
2355 #endif
2356 break;
2357
2358 case NCR_IDENTIFIED:
2359 ecb = sc->sc_nexus;
2360 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2361 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF);
2362 /*
2363 * Things are seriously fucked up.
2364 * Pull the brakes, i.e. reset
2365 */
2366 printf("%s: target didn't send tag: %d bytes in fifo\n",
2367 sc->sc_dev.dv_xname, i);
2368 /* Drain and display fifo */
2369 while (i-- > 0)
2370 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2371
2372 ncr53c9x_init(sc, 1);
2373 return (1);
2374 } else
2375 goto msgin;
2376
2377 break;
2378
2379 case NCR_IDLE:
2380 case NCR_SELECTING:
2381 ecb = sc->sc_nexus;
2382 if (sc->sc_espintr & NCRINTR_RESEL) {
2383 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2384 sc->sc_flags = 0;
2385 /*
2386 * If we're trying to select a
2387 * target ourselves, push our command
2388 * back into the ready list.
2389 */
2390 if (sc->sc_state == NCR_SELECTING) {
2391 NCR_MISC(("backoff selector "));
2392 callout_stop(&ecb->xs->xs_callout);
2393 ncr53c9x_dequeue(sc, ecb);
2394 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2395 ecb->flags |= ECB_READY;
2396 ecb = sc->sc_nexus = NULL;
2397 }
2398 sc->sc_state = NCR_RESELECTED;
2399 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2400 /*
2401 * Things are seriously fucked up.
2402 * Pull the brakes, i.e. reset
2403 */
2404 printf("%s: target didn't identify\n",
2405 sc->sc_dev.dv_xname);
2406 ncr53c9x_init(sc, 1);
2407 return (1);
2408 }
2409 /*
2410 * The C90 only inhibits FIFO writes until
2411 * reselection is complete, instead of
2412 * waiting until the interrupt status register
2413 * has been read. So, if the reselect happens
2414 * while we were entering a command bytes (for
2415 * another target) some of those bytes can
2416 * appear in the FIFO here, after the
2417 * interrupt is taken.
2418 */
2419 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2420
2421 if (nfifo < 2 ||
2422 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) {
2423 printf("%s: RESELECT: %d bytes in FIFO! "
2424 "[intr %x, stat %x, step %d, "
2425 "prevphase %x]\n",
2426 sc->sc_dev.dv_xname,
2427 nfifo,
2428 sc->sc_espintr,
2429 sc->sc_espstat,
2430 sc->sc_espstep,
2431 sc->sc_prevphase);
2432 ncr53c9x_init(sc, 1);
2433 return (1);
2434 }
2435 sc->sc_selid = sc->sc_imess[0];
2436 NCR_MISC(("selid=%02x ", sc->sc_selid));
2437
2438 /* Handle identify message */
2439 ncr53c9x_msgin(sc);
2440 if (nfifo != 2) {
2441 /*
2442 * Note: this should not happen
2443 * with `dmaselect' on.
2444 */
2445 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2446 NCRCMD(sc, NCRCMD_FLUSH);
2447 } else if (sc->sc_features & NCR_F_DMASELECT &&
2448 sc->sc_rev == NCR_VARIANT_ESP100) {
2449 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2450 }
2451
2452 if (sc->sc_state != NCR_CONNECTED &&
2453 sc->sc_state != NCR_IDENTIFIED) {
2454 /* IDENTIFY fail?! */
2455 printf("%s: identify failed, "
2456 "state %d, intr %02x\n",
2457 sc->sc_dev.dv_xname, sc->sc_state,
2458 sc->sc_espintr);
2459 ncr53c9x_init(sc, 1);
2460 return (1);
2461 }
2462 goto shortcut; /* ie. next phase expected soon */
2463 }
2464
2465 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2466 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2467 /*
2468 * Arbitration won; examine the `step' register
2469 * to determine how far the selection could progress.
2470 */
2471 ecb = sc->sc_nexus;
2472 if (ecb == NULL)
2473 panic("ncr53c9x: no nexus");
2474
2475 periph = ecb->xs->xs_periph;
2476 ti = &sc->sc_tinfo[periph->periph_target];
2477
2478 switch (sc->sc_espstep) {
2479 case 0:
2480 /*
2481 * The target did not respond with a
2482 * message out phase - probably an old
2483 * device that doesn't recognize ATN.
2484 * Clear ATN and just continue, the
2485 * target should be in the command
2486 * phase.
2487 * XXXX check for command phase?
2488 */
2489 NCRCMD(sc, NCRCMD_RSTATN);
2490 break;
2491 case 1:
2492 if ((ti->flags & T_NEGOTIATE) == 0 &&
2493 ecb->tag[0] == 0) {
2494 printf("%s: step 1 & !NEG\n",
2495 sc->sc_dev.dv_xname);
2496 goto reset;
2497 }
2498 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2499 printf("%s: !MSGOUT\n",
2500 sc->sc_dev.dv_xname);
2501 goto reset;
2502 }
2503 if (ti->flags & T_WIDE) {
2504 ncr53c9x_sched_msgout(SEND_WDTR);
2505 }
2506 if (ti->flags & T_NEGOTIATE) {
2507 /* Start negotiating */
2508 ti->period = sc->sc_minsync;
2509 ti->offset = 15;
2510 sc->sc_flags |= NCR_SYNCHNEGO;
2511 if (ecb->tag[0])
2512 ncr53c9x_sched_msgout(
2513 SEND_TAG|SEND_SDTR);
2514 else
2515 ncr53c9x_sched_msgout(
2516 SEND_SDTR);
2517 } else {
2518 /* Could not do ATN3 so send TAG */
2519 ncr53c9x_sched_msgout(SEND_TAG);
2520 }
2521 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2522 break;
2523 case 3:
2524 /*
2525 * Grr, this is supposed to mean
2526 * "target left command phase prematurely".
2527 * It seems to happen regularly when
2528 * sync mode is on.
2529 * Look at FIFO to see if command went out.
2530 * (Timing problems?)
2531 */
2532 if (sc->sc_features & NCR_F_DMASELECT) {
2533 if (sc->sc_cmdlen == 0)
2534 /* Hope for the best.. */
2535 break;
2536 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2537 & NCRFIFO_FF) == 0) {
2538 /* Hope for the best.. */
2539 break;
2540 }
2541 printf("(%s:%d:%d): selection failed;"
2542 " %d left in FIFO "
2543 "[intr %x, stat %x, step %d]\n",
2544 sc->sc_dev.dv_xname,
2545 periph->periph_target,
2546 periph->periph_lun,
2547 NCR_READ_REG(sc, NCR_FFLAG)
2548 & NCRFIFO_FF,
2549 sc->sc_espintr, sc->sc_espstat,
2550 sc->sc_espstep);
2551 NCRCMD(sc, NCRCMD_FLUSH);
2552 ncr53c9x_sched_msgout(SEND_ABORT);
2553 return (1);
2554 case 2:
2555 /* Select stuck at Command Phase */
2556 NCRCMD(sc, NCRCMD_FLUSH);
2557 break;
2558 case 4:
2559 if (sc->sc_features & NCR_F_DMASELECT &&
2560 sc->sc_cmdlen != 0)
2561 printf("(%s:%d:%d): select; "
2562 "%lu left in DMA buffer "
2563 "[intr %x, stat %x, step %d]\n",
2564 sc->sc_dev.dv_xname,
2565 periph->periph_target,
2566 periph->periph_lun,
2567 (u_long)sc->sc_cmdlen,
2568 sc->sc_espintr,
2569 sc->sc_espstat,
2570 sc->sc_espstep);
2571 /* So far, everything went fine */
2572 break;
2573 }
2574
2575 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2576 /* Do an implicit RESTORE POINTERS. */
2577 sc->sc_dp = ecb->daddr;
2578 sc->sc_dleft = ecb->dleft;
2579 sc->sc_state = NCR_CONNECTED;
2580 break;
2581
2582 } else {
2583
2584 printf("%s: unexpected status after select"
2585 ": [intr %x, stat %x, step %x]\n",
2586 sc->sc_dev.dv_xname,
2587 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2588 NCRCMD(sc, NCRCMD_FLUSH);
2589 DELAY(1);
2590 goto reset;
2591 }
2592 if (sc->sc_state == NCR_IDLE) {
2593 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
2594 return (0);
2595 }
2596 break;
2597
2598 case NCR_CONNECTED:
2599 if ((sc->sc_flags & NCR_ICCS) != 0) {
2600 /* "Initiate Command Complete Steps" in progress */
2601 u_char msg;
2602
2603 sc->sc_flags &= ~NCR_ICCS;
2604
2605 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2606 printf("%s: ICCS: "
2607 ": [intr %x, stat %x, step %x]\n",
2608 sc->sc_dev.dv_xname,
2609 sc->sc_espintr, sc->sc_espstat,
2610 sc->sc_espstep);
2611 }
2612 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2613 if (sc->sc_imlen < 2)
2614 printf("%s: can't get status, only %d bytes\n",
2615 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2616 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2617 msg = sc->sc_imess[sc->sc_imlen - 1];
2618 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2619 if (msg == MSG_CMDCOMPLETE) {
2620 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2621 ? 0 : sc->sc_dleft;
2622 if ((ecb->flags & ECB_SENSE) == 0)
2623 ecb->xs->resid = ecb->dleft;
2624 sc->sc_state = NCR_CMDCOMPLETE;
2625 } else
2626 printf("%s: STATUS_PHASE: msg %d\n",
2627 sc->sc_dev.dv_xname, msg);
2628 sc->sc_imlen = 0;
2629 NCRCMD(sc, NCRCMD_MSGOK);
2630 goto shortcut; /* ie. wait for disconnect */
2631 }
2632 break;
2633
2634 default:
2635 /* Don't panic: reset. */
2636 printf("%s: invalid state: %d\n",
2637 sc->sc_dev.dv_xname, sc->sc_state);
2638 ncr53c9x_scsi_reset(sc);
2639 goto out;
2640 }
2641
2642 /*
2643 * Driver is now in state NCR_CONNECTED, i.e. we
2644 * have a current command working the SCSI bus.
2645 */
2646 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2647 panic("ncr53c9x: no nexus");
2648 }
2649
2650 switch (sc->sc_phase) {
2651 case MESSAGE_OUT_PHASE:
2652 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2653 ncr53c9x_msgout(sc);
2654 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2655 break;
2656
2657 case MESSAGE_IN_PHASE:
2658 msgin:
2659 NCR_PHASE(("MESSAGE_IN_PHASE "));
2660 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2661 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2662 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
2663 NCRCMD(sc, NCRCMD_FLUSH);
2664 }
2665 sc->sc_flags |= NCR_WAITI;
2666 NCRCMD(sc, NCRCMD_TRANS);
2667 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2668 if ((sc->sc_flags & NCR_WAITI) == 0) {
2669 printf("%s: MSGIN: unexpected FC bit: "
2670 "[intr %x, stat %x, step %x]\n",
2671 sc->sc_dev.dv_xname,
2672 sc->sc_espintr, sc->sc_espstat,
2673 sc->sc_espstep);
2674 }
2675 sc->sc_flags &= ~NCR_WAITI;
2676 ncr53c9x_rdfifo(sc,
2677 (sc->sc_prevphase == sc->sc_phase) ?
2678 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2679 ncr53c9x_msgin(sc);
2680 } else {
2681 printf("%s: MSGIN: weird bits: "
2682 "[intr %x, stat %x, step %x]\n",
2683 sc->sc_dev.dv_xname,
2684 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2685 }
2686 sc->sc_prevphase = MESSAGE_IN_PHASE;
2687 goto shortcut; /* i.e. expect data to be ready */
2688 break;
2689
2690 case COMMAND_PHASE:
2691 /*
2692 * Send the command block. Normally we don't see this
2693 * phase because the SEL_ATN command takes care of
2694 * all this. However, we end up here if either the
2695 * target or we wanted to exchange some more messages
2696 * first (e.g. to start negotiations).
2697 */
2698
2699 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2700 ecb->cmd.cmd.opcode, ecb->clen));
2701 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2702 NCRCMD(sc, NCRCMD_FLUSH);
2703 /* DELAY(1);*/
2704 }
2705 if (sc->sc_features & NCR_F_DMASELECT) {
2706 size_t size;
2707 /* setup DMA transfer for command */
2708 size = ecb->clen;
2709 sc->sc_cmdlen = size;
2710 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2711 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2712 0, &size);
2713 /* Program the SCSI counter */
2714 NCR_SET_COUNT(sc, size);
2715
2716 /* load the count in */
2717 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2718
2719 /* start the command transfer */
2720 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2721 NCRDMA_GO(sc);
2722 } else {
2723 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2724 NCRCMD(sc, NCRCMD_TRANS);
2725 }
2726 sc->sc_prevphase = COMMAND_PHASE;
2727 break;
2728
2729 case DATA_OUT_PHASE:
2730 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2731 NCRCMD(sc, NCRCMD_FLUSH);
2732 size = min(sc->sc_dleft, sc->sc_maxxfer);
2733 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
2734 sc->sc_prevphase = DATA_OUT_PHASE;
2735 goto setup_xfer;
2736
2737 case DATA_IN_PHASE:
2738 NCR_PHASE(("DATA_IN_PHASE "));
2739 if (sc->sc_rev == NCR_VARIANT_ESP100)
2740 NCRCMD(sc, NCRCMD_FLUSH);
2741 size = min(sc->sc_dleft, sc->sc_maxxfer);
2742 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
2743 sc->sc_prevphase = DATA_IN_PHASE;
2744 setup_xfer:
2745 /* Target returned to data phase: wipe "done" memory */
2746 ecb->flags &= ~ECB_TENTATIVE_DONE;
2747
2748 /* Program the SCSI counter */
2749 NCR_SET_COUNT(sc, size);
2750
2751 /* load the count in */
2752 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2753
2754 /*
2755 * Note that if `size' is 0, we've already transceived
2756 * all the bytes we want but we're still in DATA PHASE.
2757 * Apparently, the device needs padding. Also, a
2758 * transfer size of 0 means "maximum" to the chip
2759 * DMA logic.
2760 */
2761 NCRCMD(sc,
2762 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
2763 NCRDMA_GO(sc);
2764 return (1);
2765
2766 case STATUS_PHASE:
2767 NCR_PHASE(("STATUS_PHASE "));
2768 sc->sc_flags |= NCR_ICCS;
2769 NCRCMD(sc, NCRCMD_ICCS);
2770 sc->sc_prevphase = STATUS_PHASE;
2771 goto shortcut; /* i.e. expect status results soon */
2772 break;
2773
2774 case INVALID_PHASE:
2775 break;
2776
2777 default:
2778 printf("%s: unexpected bus phase; resetting\n",
2779 sc->sc_dev.dv_xname);
2780 goto reset;
2781 }
2782
2783 out:
2784 return (1);
2785
2786 reset:
2787 ncr53c9x_init(sc, 1);
2788 goto out;
2789
2790 finish:
2791 ncr53c9x_done(sc, ecb);
2792 goto out;
2793
2794 sched:
2795 sc->sc_state = NCR_IDLE;
2796 ncr53c9x_sched(sc);
2797 goto out;
2798
2799 shortcut:
2800 /*
2801 * The idea is that many of the SCSI operations take very little
2802 * time, and going away and getting interrupted is too high an
2803 * overhead to pay. For example, selecting, sending a message
2804 * and command and then doing some work can be done in one "pass".
2805 *
2806 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2807 * at 40MHz. This needs testing.
2808 */
2809 {
2810 struct timeval wait, cur;
2811
2812 microtime(&wait);
2813 wait.tv_usec += 50 / sc->sc_freq;
2814 if (wait.tv_usec > 1000000) {
2815 wait.tv_sec++;
2816 wait.tv_usec -= 1000000;
2817 }
2818 do {
2819 if (NCRDMA_ISINTR(sc))
2820 goto again;
2821 microtime(&cur);
2822 } while (cur.tv_sec <= wait.tv_sec &&
2823 cur.tv_usec <= wait.tv_usec);
2824 }
2825 goto out;
2826 }
2827
2828 void
2829 ncr53c9x_abort(sc, ecb)
2830 struct ncr53c9x_softc *sc;
2831 struct ncr53c9x_ecb *ecb;
2832 {
2833
2834 /* 2 secs for the abort */
2835 ecb->timeout = NCR_ABORT_TIMEOUT;
2836 ecb->flags |= ECB_ABORT;
2837
2838 if (ecb == sc->sc_nexus) {
2839 int timeout;
2840
2841 /*
2842 * If we're still selecting, the message will be scheduled
2843 * after selection is complete.
2844 */
2845 if (sc->sc_state == NCR_CONNECTED)
2846 ncr53c9x_sched_msgout(SEND_ABORT);
2847
2848 /*
2849 * Reschedule timeout.
2850 */
2851 timeout = ecb->timeout;
2852 if (timeout > 1000000)
2853 timeout = (timeout / 1000) * hz;
2854 else
2855 timeout = (timeout * hz) / 1000;
2856 callout_reset(&ecb->xs->xs_callout, timeout,
2857 ncr53c9x_timeout, ecb);
2858 } else {
2859 /*
2860 * Just leave the command where it is.
2861 * XXX - what choice do we have but to reset the SCSI
2862 * eventually?
2863 */
2864 if (sc->sc_state == NCR_IDLE)
2865 ncr53c9x_sched(sc);
2866 }
2867 }
2868
2869 void
2870 ncr53c9x_timeout(arg)
2871 void *arg;
2872 {
2873 struct ncr53c9x_ecb *ecb = arg;
2874 struct scsipi_xfer *xs = ecb->xs;
2875 struct scsipi_periph *periph = xs->xs_periph;
2876 struct ncr53c9x_softc *sc =
2877 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2878 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
2879 int s;
2880
2881 scsipi_printaddr(periph);
2882 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2883 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2884 "msg(q %x,o %x) %s>",
2885 sc->sc_dev.dv_xname,
2886 ecb, ecb->flags, ecb->dleft, ecb->stat,
2887 sc->sc_state, sc->sc_nexus,
2888 NCR_READ_REG(sc, NCR_STAT),
2889 sc->sc_phase, sc->sc_prevphase,
2890 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2891 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2892 #if NCR53C9X_DEBUG > 1
2893 printf("TRACE: %s.", ecb->trace);
2894 #endif
2895
2896 s = splbio();
2897
2898 if (ecb->flags & ECB_ABORT) {
2899 /* abort timed out */
2900 printf(" AGAIN\n");
2901
2902 ncr53c9x_init(sc, 1);
2903 } else {
2904 /* abort the operation that has timed out */
2905 printf("\n");
2906 xs->error = XS_TIMEOUT;
2907 ncr53c9x_abort(sc, ecb);
2908
2909 /* Disable sync mode if stuck in a data phase */
2910 if (ecb == sc->sc_nexus &&
2911 (ti->flags & T_SYNCMODE) != 0 &&
2912 (sc->sc_phase & (MSGI|CDI)) == 0) {
2913 /* XXX ASYNC CALLBACK! */
2914 scsipi_printaddr(periph);
2915 printf("sync negotiation disabled\n");
2916 sc->sc_cfflags |= (1 << (periph->periph_target + 8));
2917 ncr53c9x_update_xfer_mode(sc, periph->periph_target);
2918 }
2919 }
2920
2921 splx(s);
2922 }
2923
2924 void
2925 ncr53c9x_watch(arg)
2926 void *arg;
2927 {
2928 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
2929 struct ncr53c9x_tinfo *ti;
2930 struct ncr53c9x_linfo *li;
2931 int t, s;
2932 /* Delete any structures that have not been used in 10min. */
2933 time_t old = time.tv_sec - (10 * 60);
2934
2935 s = splbio();
2936 for (t = 0; t < NCR_NTARG; t++) {
2937 ti = &sc->sc_tinfo[t];
2938 li = LIST_FIRST(&ti->luns);
2939 while (li) {
2940 if (li->last_used < old &&
2941 li->untagged == NULL &&
2942 li->used == 0) {
2943 if (li->lun < NCR_NLUN)
2944 ti->lun[li->lun] = NULL;
2945 LIST_REMOVE(li, link);
2946 free(li, M_DEVBUF);
2947 /* Restart the search at the beginning */
2948 li = LIST_FIRST(&ti->luns);
2949 continue;
2950 }
2951 li = LIST_NEXT(li, link);
2952 }
2953 }
2954 splx(s);
2955 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
2956 }
2957
2958