ncr53c9x.c revision 1.91
1 /* $NetBSD: ncr53c9x.c,v 1.91 2002/03/24 17:16:19 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.91 2002/03/24 17:16:19 jdolecek Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/callout.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/malloc.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 #include <sys/pool.h> 94 #include <sys/scsiio.h> 95 96 #include <dev/scsipi/scsi_all.h> 97 #include <dev/scsipi/scsipi_all.h> 98 #include <dev/scsipi/scsiconf.h> 99 #include <dev/scsipi/scsi_message.h> 100 101 #include <dev/ic/ncr53c9xreg.h> 102 #include <dev/ic/ncr53c9xvar.h> 103 104 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 105 #ifdef DEBUG 106 int ncr53c9x_notag = 0; 107 #endif 108 109 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 110 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 111 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 112 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 113 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 114 struct scsipi_xfer *, int); 115 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 116 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 117 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 118 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 119 /*static*/ void ncr53c9x_timeout(void *arg); 120 /*static*/ void ncr53c9x_watch(void *arg); 121 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 122 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 123 struct ncr53c9x_ecb *); 124 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 125 caddr_t, int, struct proc *); 126 127 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 128 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 129 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 130 131 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 132 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 133 struct ncr53c9x_tinfo *); 134 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 135 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 136 int64_t lun); 137 138 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 139 140 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 141 #define NCR_RDFIFO_START 0 142 #define NCR_RDFIFO_CONTINUE 1 143 144 145 #define NCR_SET_COUNT(sc, size) do { \ 146 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 147 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 148 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 149 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 150 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 151 } \ 152 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 153 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 154 } \ 155 } while (0) 156 157 static int ecb_pool_initialized = 0; 158 static struct pool ecb_pool; 159 160 /* 161 * Names for the NCR53c9x variants, correspnding to the variant tags 162 * in ncr53c9xvar.h. 163 */ 164 static const char *ncr53c9x_variant_names[] = { 165 "ESP100", 166 "ESP100A", 167 "ESP200", 168 "NCR53C94", 169 "NCR53C96", 170 "ESP406", 171 "FAS408", 172 "FAS216", 173 "AM53C974", 174 "FAS366/HME", 175 "NCR53C90 (86C01)", 176 }; 177 178 /* 179 * Search linked list for LUN info by LUN id. 180 */ 181 static struct ncr53c9x_linfo * 182 ncr53c9x_lunsearch(ti, lun) 183 struct ncr53c9x_tinfo *ti; 184 int64_t lun; 185 { 186 struct ncr53c9x_linfo *li; 187 LIST_FOREACH(li, &ti->luns, link) 188 if (li->lun == lun) 189 return (li); 190 return (NULL); 191 } 192 193 /* 194 * Attach this instance, and then all the sub-devices 195 */ 196 void 197 ncr53c9x_attach(sc) 198 struct ncr53c9x_softc *sc; 199 { 200 struct scsipi_adapter *adapt = &sc->sc_adapter; 201 struct scsipi_channel *chan = &sc->sc_channel; 202 203 callout_init(&sc->sc_watchdog); 204 /* 205 * Allocate SCSI message buffers. 206 * Front-ends can override allocation to avoid alignment 207 * handling in the DMA engines. Note that that ncr53c9x_msgout() 208 * can request a 1 byte DMA transfer. 209 */ 210 if (sc->sc_omess == NULL) 211 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 212 213 if (sc->sc_imess == NULL) 214 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 215 216 if (sc->sc_omess == NULL || sc->sc_imess == NULL) { 217 printf("out of memory\n"); 218 return; 219 } 220 221 /* 222 * Note, the front-end has set us up to print the chip variation. 223 */ 224 if (sc->sc_rev >= NCR_VARIANT_MAX) { 225 printf("\n%s: unknown variant %d, devices not attached\n", 226 sc->sc_dev.dv_xname, sc->sc_rev); 227 return; 228 } 229 230 printf(": %s, %dMHz, SCSI ID %d\n", 231 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 232 233 /* 234 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 235 * from now on. 236 */ 237 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 238 sc->sc_rev = NCR_VARIANT_ESP100; 239 240 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 241 242 /* The value *must not* be == 1. Make it 2 */ 243 if (sc->sc_ccf == 1) 244 sc->sc_ccf = 2; 245 246 /* 247 * The recommended timeout is 250ms. This register is loaded 248 * with a value calculated as follows, from the docs: 249 * 250 * (timout period) x (CLK frequency) 251 * reg = ------------------------------------- 252 * 8192 x (Clock Conversion Factor) 253 * 254 * Since CCF has a linear relation to CLK, this generally computes 255 * to the constant of 153. 256 */ 257 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 258 259 /* CCF register only has 3 bits; 0 is actually 8 */ 260 sc->sc_ccf &= 7; 261 262 /* 263 * Fill in the scsipi_adapter. 264 */ 265 adapt->adapt_dev = &sc->sc_dev; 266 adapt->adapt_nchannels = 1; 267 adapt->adapt_openings = 256; 268 adapt->adapt_max_periph = 256; 269 adapt->adapt_ioctl = ncr53c9x_ioctl; 270 /* adapt_request initialized by front-end */ 271 /* adapt_minphys initialized by front-end */ 272 273 /* 274 * Fill in the scsipi_channel. 275 */ 276 memset(chan, 0, sizeof(*chan)); 277 chan->chan_adapter = adapt; 278 chan->chan_bustype = &scsi_bustype; 279 chan->chan_channel = 0; 280 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */ 281 chan->chan_nluns = 8; 282 chan->chan_id = sc->sc_id; 283 284 /* 285 * Add reference to adapter so that we drop the reference after 286 * config_found() to make sure the adatper is disabled. 287 */ 288 if (scsipi_adapter_addref(adapt) != 0) { 289 printf("%s: unable to enable controller\n", 290 sc->sc_dev.dv_xname); 291 return; 292 } 293 294 /* Reset state & bus */ 295 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags; 296 sc->sc_state = 0; 297 ncr53c9x_init(sc, 1); 298 299 /* 300 * Now try to attach all the sub-devices 301 */ 302 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 303 304 scsipi_adapter_delref(adapt); 305 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc); 306 } 307 308 int 309 ncr53c9x_detach(sc, flags) 310 struct ncr53c9x_softc *sc; 311 int flags; 312 { 313 int error; 314 315 if (sc->sc_child) { 316 error = config_detach(sc->sc_child, flags); 317 if (error) 318 return (error); 319 } 320 321 free(sc->sc_imess, M_DEVBUF); 322 free(sc->sc_omess, M_DEVBUF); 323 324 return (0); 325 } 326 327 /* 328 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 329 * only this controller, but kills any on-going commands, and also stops 330 * and resets the DMA. 331 * 332 * After reset, registers are loaded with the defaults from the attach 333 * routine above. 334 */ 335 void 336 ncr53c9x_reset(sc) 337 struct ncr53c9x_softc *sc; 338 { 339 340 /* reset DMA first */ 341 NCRDMA_RESET(sc); 342 343 /* reset SCSI chip */ 344 NCRCMD(sc, NCRCMD_RSTCHIP); 345 NCRCMD(sc, NCRCMD_NOP); 346 DELAY(500); 347 348 /* do these backwards, and fall through */ 349 switch (sc->sc_rev) { 350 case NCR_VARIANT_ESP406: 351 case NCR_VARIANT_FAS408: 352 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 353 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 354 case NCR_VARIANT_AM53C974: 355 case NCR_VARIANT_FAS216: 356 case NCR_VARIANT_NCR53C94: 357 case NCR_VARIANT_NCR53C96: 358 case NCR_VARIANT_ESP200: 359 sc->sc_features |= NCR_F_HASCFG3; 360 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 361 case NCR_VARIANT_ESP100A: 362 sc->sc_features |= NCR_F_SELATN3; 363 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 364 case NCR_VARIANT_ESP100: 365 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 366 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 367 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 368 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 369 break; 370 371 case NCR_VARIANT_FAS366: 372 sc->sc_features |= 373 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 374 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 375 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 376 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 377 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 378 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 379 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 380 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 381 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 382 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 383 break; 384 385 default: 386 printf("%s: unknown revision code, assuming ESP100\n", 387 sc->sc_dev.dv_xname); 388 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 389 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 390 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 391 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 392 } 393 394 if (sc->sc_rev == NCR_VARIANT_AM53C974) 395 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 396 397 #if 0 398 printf("%s: ncr53c9x_reset: revision %d\n", 399 sc->sc_dev.dv_xname, sc->sc_rev); 400 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 401 "ccf 0x%x, timeout 0x%x\n", 402 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 403 sc->sc_ccf, sc->sc_timeout); 404 #endif 405 } 406 407 /* 408 * Reset the SCSI bus, but not the chip 409 */ 410 void 411 ncr53c9x_scsi_reset(sc) 412 struct ncr53c9x_softc *sc; 413 { 414 415 (*sc->sc_glue->gl_dma_stop)(sc); 416 417 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 418 NCRCMD(sc, NCRCMD_RSTSCSI); 419 } 420 421 /* 422 * Initialize ncr53c9x state machine 423 */ 424 void 425 ncr53c9x_init(sc, doreset) 426 struct ncr53c9x_softc *sc; 427 int doreset; 428 { 429 struct ncr53c9x_ecb *ecb; 430 struct ncr53c9x_linfo *li; 431 int i, r; 432 433 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 434 435 if (!ecb_pool_initialized) { 436 /* All instances share this pool */ 437 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 438 "ncr53c9x_ecb", NULL); 439 ecb_pool_initialized = 1; 440 } 441 442 if (sc->sc_state == 0) { 443 /* First time through; initialize. */ 444 445 TAILQ_INIT(&sc->ready_list); 446 sc->sc_nexus = NULL; 447 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 448 for (r = 0; r < NCR_NTARG; r++) { 449 LIST_INIT(&sc->sc_tinfo[r].luns); 450 } 451 } else { 452 /* Cancel any active commands. */ 453 sc->sc_state = NCR_CLEANING; 454 sc->sc_msgify = 0; 455 if ((ecb = sc->sc_nexus) != NULL) { 456 ecb->xs->error = XS_TIMEOUT; 457 ncr53c9x_done(sc, ecb); 458 } 459 /* Cancel outstanding disconnected commands on each LUN */ 460 for (r = 0; r < 8; r++) { 461 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 462 if ((ecb = li->untagged) != NULL) { 463 li->untagged = NULL; 464 /* 465 * XXXXXXX 466 * 467 * Should we terminate a command 468 * that never reached the disk? 469 */ 470 li->busy = 0; 471 ecb->xs->error = XS_TIMEOUT; 472 ncr53c9x_done(sc, ecb); 473 } 474 for (i = 0; i < 256; i++) 475 if ((ecb = li->queued[i])) { 476 li->queued[i] = NULL; 477 ecb->xs->error = XS_TIMEOUT; 478 ncr53c9x_done(sc, ecb); 479 } 480 li->used = 0; 481 } 482 } 483 } 484 485 /* 486 * reset the chip to a known state 487 */ 488 ncr53c9x_reset(sc); 489 490 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 491 for (r = 0; r < 8; r++) { 492 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 493 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 494 495 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8)))) 496 ? 0 : T_SYNCHOFF) | 497 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) | 498 T_NEED_TO_RESET; 499 #ifdef DEBUG 500 if (ncr53c9x_notag) 501 ti->flags &= ~T_TAG; 502 #endif 503 ti->period = sc->sc_minsync; 504 ti->offset = 0; 505 ti->cfg3 = 0; 506 } 507 508 if (doreset) { 509 sc->sc_state = NCR_SBR; 510 NCRCMD(sc, NCRCMD_RSTSCSI); 511 } else { 512 sc->sc_state = NCR_IDLE; 513 ncr53c9x_sched(sc); 514 } 515 } 516 517 /* 518 * Read the NCR registers, and save their contents for later use. 519 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 520 * NCR_INTR - so make sure it is the last read. 521 * 522 * I think that (from reading the docs) most bits in these registers 523 * only make sense when he DMA CSR has an interrupt showing. Call only 524 * if an interrupt is pending. 525 */ 526 __inline__ void 527 ncr53c9x_readregs(sc) 528 struct ncr53c9x_softc *sc; 529 { 530 531 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 532 /* Only the stepo bits are of interest */ 533 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 534 535 if (sc->sc_rev == NCR_VARIANT_FAS366) 536 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 537 538 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 539 540 if (sc->sc_glue->gl_clear_latched_intr != NULL) 541 (*sc->sc_glue->gl_clear_latched_intr)(sc); 542 543 /* 544 * Determine the SCSI bus phase, return either a real SCSI bus phase 545 * or some pseudo phase we use to detect certain exceptions. 546 */ 547 548 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 549 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 550 551 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 552 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 553 } 554 555 /* 556 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 557 */ 558 static inline int 559 ncr53c9x_stp2cpb(sc, period) 560 struct ncr53c9x_softc *sc; 561 int period; 562 { 563 int v; 564 v = (sc->sc_freq * period) / 250; 565 if (ncr53c9x_cpb2stp(sc, v) < period) 566 /* Correct round-down error */ 567 v++; 568 return (v); 569 } 570 571 static inline void 572 ncr53c9x_setsync(sc, ti) 573 struct ncr53c9x_softc *sc; 574 struct ncr53c9x_tinfo *ti; 575 { 576 u_char syncoff, synctp; 577 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 578 579 if (ti->flags & T_SYNCMODE) { 580 syncoff = ti->offset; 581 synctp = ncr53c9x_stp2cpb(sc, ti->period); 582 if (sc->sc_features & NCR_F_FASTSCSI) { 583 /* 584 * If the period is 200ns or less (ti->period <= 50), 585 * put the chip in Fast SCSI mode. 586 */ 587 if (ti->period <= 50) 588 /* 589 * There are (at least) 4 variations of the 590 * configuration 3 register. The drive attach 591 * routine sets the appropriate bit to put the 592 * chip into Fast SCSI mode so that it doesn't 593 * have to be figured out here each time. 594 */ 595 cfg3 |= sc->sc_cfg3_fscsi; 596 } 597 598 /* 599 * Am53c974 requires different SYNCTP values when the 600 * FSCSI bit is off. 601 */ 602 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 603 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 604 synctp--; 605 } else { 606 syncoff = 0; 607 synctp = 0; 608 } 609 610 if (sc->sc_features & NCR_F_HASCFG3) 611 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 612 613 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 614 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 615 } 616 617 /* 618 * Send a command to a target, set the driver state to NCR_SELECTING 619 * and let the caller take care of the rest. 620 * 621 * Keeping this as a function allows me to say that this may be done 622 * by DMA instead of programmed I/O soon. 623 */ 624 void 625 ncr53c9x_select(sc, ecb) 626 struct ncr53c9x_softc *sc; 627 struct ncr53c9x_ecb *ecb; 628 { 629 struct scsipi_periph *periph = ecb->xs->xs_periph; 630 int target = periph->periph_target; 631 int lun = periph->periph_lun; 632 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 633 int tiflags = ti->flags; 634 u_char *cmd; 635 int clen; 636 int selatn3, selatns; 637 size_t dmasize; 638 639 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 640 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 641 642 sc->sc_state = NCR_SELECTING; 643 /* 644 * Schedule the timeout now, the first time we will go away 645 * expecting to come back due to an interrupt, because it is 646 * always possible that the interrupt may never happen. 647 */ 648 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 649 int timeout = ecb->timeout; 650 651 if (timeout > 1000000) 652 timeout = (timeout / 1000) * hz; 653 else 654 timeout = (timeout * hz) / 1000; 655 656 callout_reset(&ecb->xs->xs_callout, timeout, 657 ncr53c9x_timeout, ecb); 658 } 659 660 /* 661 * The docs say the target register is never reset, and I 662 * can't think of a better place to set it 663 */ 664 if (sc->sc_rev == NCR_VARIANT_FAS366) { 665 NCRCMD(sc, NCRCMD_FLUSH); 666 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 667 } else { 668 NCR_WRITE_REG(sc, NCR_SELID, target); 669 } 670 ncr53c9x_setsync(sc, ti); 671 672 if ((ecb->flags & ECB_SENSE) != 0) { 673 /* 674 * For REQUEST SENSE, we should not send an IDENTIFY or 675 * otherwise mangle the target. There should be no MESSAGE IN 676 * phase. 677 */ 678 if (sc->sc_features & NCR_F_DMASELECT) { 679 /* setup DMA transfer for command */ 680 dmasize = clen = ecb->clen; 681 sc->sc_cmdlen = clen; 682 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 683 684 /* Program the SCSI counter */ 685 NCR_SET_COUNT(sc, dmasize); 686 687 if (sc->sc_rev != NCR_VARIANT_FAS366) 688 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 689 690 /* And get the targets attention */ 691 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 692 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 693 &dmasize); 694 NCRDMA_GO(sc); 695 } else { 696 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 697 NCRCMD(sc, NCRCMD_SELNATN); 698 } 699 return; 700 } 701 702 selatn3 = selatns = 0; 703 if (ecb->tag[0] != 0) { 704 if (sc->sc_features & NCR_F_SELATN3) 705 /* use SELATN3 to send tag messages */ 706 selatn3 = 1; 707 else 708 /* We don't have SELATN3; use SELATNS to send tags */ 709 selatns = 1; 710 } 711 712 if (ti->flags & T_NEGOTIATE) { 713 /* We have to use SELATNS to send sync/wide messages */ 714 selatn3 = 0; 715 selatns = 1; 716 } 717 718 cmd = (u_char *)&ecb->cmd.cmd; 719 720 if (selatn3) { 721 /* We'll use tags with SELATN3 */ 722 clen = ecb->clen + 3; 723 cmd -= 3; 724 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 725 cmd[1] = ecb->tag[0]; /* msg[1] */ 726 cmd[2] = ecb->tag[1]; /* msg[2] */ 727 } else { 728 /* We don't have tags, or will send messages with SELATNS */ 729 clen = ecb->clen + 1; 730 cmd -= 1; 731 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 732 } 733 734 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 735 736 /* setup DMA transfer for command */ 737 dmasize = clen; 738 sc->sc_cmdlen = clen; 739 sc->sc_cmdp = cmd; 740 741 /* Program the SCSI counter */ 742 NCR_SET_COUNT(sc, dmasize); 743 744 /* load the count in */ 745 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 746 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 747 748 /* And get the targets attention */ 749 if (selatn3) { 750 sc->sc_msgout = SEND_TAG; 751 sc->sc_flags |= NCR_ATN; 752 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 753 } else 754 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 755 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 756 NCRDMA_GO(sc); 757 return; 758 } 759 760 /* 761 * Who am I. This is where we tell the target that we are 762 * happy for it to disconnect etc. 763 */ 764 765 /* Now get the command into the FIFO */ 766 ncr53c9x_wrfifo(sc, cmd, clen); 767 768 /* And get the targets attention */ 769 if (selatns) { 770 NCR_MISC(("SELATNS \n")); 771 /* Arbitrate, select and stop after IDENTIFY message */ 772 NCRCMD(sc, NCRCMD_SELATNS); 773 } else if (selatn3) { 774 sc->sc_msgout = SEND_TAG; 775 sc->sc_flags |= NCR_ATN; 776 NCRCMD(sc, NCRCMD_SELATN3); 777 } else 778 NCRCMD(sc, NCRCMD_SELATN); 779 } 780 781 void 782 ncr53c9x_free_ecb(sc, ecb) 783 struct ncr53c9x_softc *sc; 784 struct ncr53c9x_ecb *ecb; 785 { 786 int s; 787 788 s = splbio(); 789 ecb->flags = 0; 790 pool_put(&ecb_pool, (void *)ecb); 791 splx(s); 792 return; 793 } 794 795 struct ncr53c9x_ecb * 796 ncr53c9x_get_ecb(sc, flags) 797 struct ncr53c9x_softc *sc; 798 int flags; 799 { 800 struct ncr53c9x_ecb *ecb; 801 int s; 802 803 s = splbio(); 804 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 805 splx(s); 806 if (ecb) { 807 memset(ecb, 0, sizeof(*ecb)); 808 ecb->flags |= ECB_ALLOC; 809 } 810 return (ecb); 811 } 812 813 /* 814 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 815 */ 816 817 /* 818 * Start a SCSI-command 819 * This function is called by the higher level SCSI-driver to queue/run 820 * SCSI-commands. 821 */ 822 823 void 824 ncr53c9x_scsipi_request(chan, req, arg) 825 struct scsipi_channel *chan; 826 scsipi_adapter_req_t req; 827 void *arg; 828 { 829 struct scsipi_xfer *xs; 830 struct scsipi_periph *periph; 831 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 832 struct ncr53c9x_ecb *ecb; 833 int s, flags; 834 835 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 836 837 switch (req) { 838 case ADAPTER_REQ_RUN_XFER: 839 xs = arg; 840 periph = xs->xs_periph; 841 flags = xs->xs_control; 842 843 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 844 periph->periph_target)); 845 846 /* Get an ECB to use. */ 847 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 848 /* 849 * This should never happen as we track resources 850 * in the mid-layer. 851 */ 852 if (ecb == NULL) { 853 scsipi_printaddr(periph); 854 printf("unable to allocate ecb\n"); 855 xs->error = XS_RESOURCE_SHORTAGE; 856 scsipi_done(xs); 857 return; 858 } 859 860 /* Initialize ecb */ 861 ecb->xs = xs; 862 ecb->timeout = xs->timeout; 863 864 if (flags & XS_CTL_RESET) { 865 ecb->flags |= ECB_RESET; 866 ecb->clen = 0; 867 ecb->dleft = 0; 868 } else { 869 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 870 ecb->clen = xs->cmdlen; 871 ecb->daddr = xs->data; 872 ecb->dleft = xs->datalen; 873 } 874 ecb->stat = 0; 875 876 s = splbio(); 877 878 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 879 ecb->flags |= ECB_READY; 880 if (sc->sc_state == NCR_IDLE) 881 ncr53c9x_sched(sc); 882 883 splx(s); 884 885 if ((flags & XS_CTL_POLL) == 0) 886 return; 887 888 /* Not allowed to use interrupts, use polling instead */ 889 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 890 ncr53c9x_timeout(ecb); 891 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 892 ncr53c9x_timeout(ecb); 893 } 894 return; 895 896 case ADAPTER_REQ_GROW_RESOURCES: 897 /* XXX Not supported. */ 898 return; 899 900 case ADAPTER_REQ_SET_XFER_MODE: 901 { 902 struct ncr53c9x_tinfo *ti; 903 struct scsipi_xfer_mode *xm = arg; 904 905 ti = &sc->sc_tinfo[xm->xm_target]; 906 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 907 ti->period = 0; 908 ti->offset = 0; 909 910 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 && 911 (xm->xm_mode & PERIPH_CAP_TQING)) 912 ti->flags |= T_TAG; 913 else 914 ti->flags &= ~T_TAG; 915 916 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 917 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 918 sc->sc_dev.dv_xname, xm->xm_target)); 919 if (sc->sc_rev == NCR_VARIANT_FAS366) { 920 ti->flags |= T_WIDE; 921 ti->width = 1; 922 } 923 } 924 925 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 926 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 927 NCR_MISC(("%s: target %d: sync negotiation\n", 928 sc->sc_dev.dv_xname, xm->xm_target)); 929 ti->flags |= T_NEGOTIATE; 930 ti->period = sc->sc_minsync; 931 } 932 /* 933 * If we're not going to negotiate, send the notification 934 * now, since it won't happen later. 935 */ 936 if ((ti->flags & T_NEGOTIATE) == 0) 937 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 938 return; 939 } 940 } 941 } 942 943 void 944 ncr53c9x_update_xfer_mode(sc, target) 945 struct ncr53c9x_softc *sc; 946 int target; 947 { 948 struct scsipi_xfer_mode xm; 949 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 950 951 xm.xm_target = target; 952 xm.xm_mode = 0; 953 xm.xm_period = 0; 954 xm.xm_offset = 0; 955 956 if (ti->flags & T_SYNCMODE) { 957 xm.xm_mode |= PERIPH_CAP_SYNC; 958 xm.xm_period = ti->period; 959 xm.xm_offset = ti->offset; 960 } 961 if (ti->width) 962 xm.xm_mode |= PERIPH_CAP_WIDE16; 963 964 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 965 xm.xm_mode |= PERIPH_CAP_TQING; 966 967 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 968 } 969 970 /* 971 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 972 */ 973 int 974 ncr53c9x_poll(sc, xs, count) 975 struct ncr53c9x_softc *sc; 976 struct scsipi_xfer *xs; 977 int count; 978 { 979 980 NCR_TRACE(("[ncr53c9x_poll] ")); 981 while (count) { 982 if (NCRDMA_ISINTR(sc)) { 983 ncr53c9x_intr(sc); 984 } 985 #if alternatively 986 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 987 ncr53c9x_intr(sc); 988 #endif 989 if ((xs->xs_status & XS_STS_DONE) != 0) 990 return (0); 991 if (sc->sc_state == NCR_IDLE) { 992 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 993 ncr53c9x_sched(sc); 994 } 995 DELAY(1000); 996 count--; 997 } 998 return (1); 999 } 1000 1001 int 1002 ncr53c9x_ioctl(chan, cmd, arg, flag, p) 1003 struct scsipi_channel *chan; 1004 u_long cmd; 1005 caddr_t arg; 1006 int flag; 1007 struct proc *p; 1008 { 1009 /* struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; */ 1010 int s, error = 0; 1011 1012 s = splbio(); 1013 1014 switch (cmd) { 1015 default: 1016 error = ENOTTY; 1017 break; 1018 } 1019 splx(s); 1020 return (error); 1021 } 1022 1023 1024 /* 1025 * LOW LEVEL SCSI UTILITIES 1026 */ 1027 1028 /* 1029 * Schedule a scsi operation. This has now been pulled out of the interrupt 1030 * handler so that we may call it from ncr53c9x_scsipi_request and 1031 * ncr53c9x_done. This may save us an unecessary interrupt just to get 1032 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1033 */ 1034 void 1035 ncr53c9x_sched(sc) 1036 struct ncr53c9x_softc *sc; 1037 { 1038 struct ncr53c9x_ecb *ecb; 1039 struct scsipi_periph *periph; 1040 struct ncr53c9x_tinfo *ti; 1041 int lun; 1042 struct ncr53c9x_linfo *li; 1043 int s, tag; 1044 1045 NCR_TRACE(("[ncr53c9x_sched] ")); 1046 if (sc->sc_state != NCR_IDLE) 1047 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1048 1049 /* 1050 * Find first ecb in ready queue that is for a target/lunit 1051 * combinations that is not busy. 1052 */ 1053 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1054 ecb = TAILQ_NEXT(ecb, chain)) { 1055 periph = ecb->xs->xs_periph; 1056 ti = &sc->sc_tinfo[periph->periph_target]; 1057 lun = periph->periph_lun; 1058 1059 /* Select type of tag for this command */ 1060 if ((ti->flags & (T_RSELECTOFF)) != 0) 1061 tag = 0; 1062 else if ((ti->flags & (T_TAG)) == 0) 1063 tag = 0; 1064 else if ((ecb->flags & ECB_SENSE) != 0) 1065 tag = 0; 1066 else 1067 tag = ecb->xs->xs_tag_type; 1068 #if 0 1069 /* XXXX Use tags for polled commands? */ 1070 if (ecb->xs->xs_control & XS_CTL_POLL) 1071 tag = 0; 1072 #endif 1073 1074 s = splbio(); 1075 li = TINFO_LUN(ti, lun); 1076 if (li == NULL) { 1077 /* Initialize LUN info and add to list. */ 1078 if ((li = malloc(sizeof(*li), 1079 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) { 1080 splx(s); 1081 continue; 1082 } 1083 li->lun = lun; 1084 1085 LIST_INSERT_HEAD(&ti->luns, li, link); 1086 if (lun < NCR_NLUN) 1087 ti->lun[lun] = li; 1088 } 1089 li->last_used = time.tv_sec; 1090 if (tag == 0) { 1091 /* Try to issue this as an un-tagged command */ 1092 if (li->untagged == NULL) 1093 li->untagged = ecb; 1094 } 1095 if (li->untagged != NULL) { 1096 tag = 0; 1097 if ((li->busy != 1) && li->used == 0) { 1098 /* We need to issue this untagged command now */ 1099 ecb = li->untagged; 1100 periph = ecb->xs->xs_periph; 1101 } else { 1102 /* Not ready yet */ 1103 splx(s); 1104 continue; 1105 } 1106 } 1107 ecb->tag[0] = tag; 1108 if (tag != 0) { 1109 li->queued[ecb->xs->xs_tag_id] = ecb; 1110 ecb->tag[1] = ecb->xs->xs_tag_id; 1111 li->used++; 1112 } 1113 splx(s); 1114 if (li->untagged != NULL && (li->busy != 1)) { 1115 li->busy = 1; 1116 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1117 ecb->flags &= ~ECB_READY; 1118 sc->sc_nexus = ecb; 1119 ncr53c9x_select(sc, ecb); 1120 break; 1121 } 1122 if (li->untagged == NULL && tag != 0) { 1123 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1124 ecb->flags &= ~ECB_READY; 1125 sc->sc_nexus = ecb; 1126 ncr53c9x_select(sc, ecb); 1127 break; 1128 } else 1129 NCR_MISC(("%d:%d busy\n", 1130 periph->periph_target, 1131 periph->periph_lun)); 1132 } 1133 } 1134 1135 void 1136 ncr53c9x_sense(sc, ecb) 1137 struct ncr53c9x_softc *sc; 1138 struct ncr53c9x_ecb *ecb; 1139 { 1140 struct scsipi_xfer *xs = ecb->xs; 1141 struct scsipi_periph *periph = xs->xs_periph; 1142 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1143 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd; 1144 struct ncr53c9x_linfo *li; 1145 int lun = periph->periph_lun; 1146 1147 NCR_MISC(("requesting sense ")); 1148 /* Next, setup a request sense command block */ 1149 memset(ss, 0, sizeof(*ss)); 1150 ss->opcode = REQUEST_SENSE; 1151 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1152 ss->length = sizeof(struct scsipi_sense_data); 1153 ecb->clen = sizeof(*ss); 1154 ecb->daddr = (char *)&xs->sense.scsi_sense; 1155 ecb->dleft = sizeof(struct scsipi_sense_data); 1156 ecb->flags |= ECB_SENSE; 1157 ecb->timeout = NCR_SENSE_TIMEOUT; 1158 ti->senses++; 1159 li = TINFO_LUN(ti, lun); 1160 if (li->busy) 1161 li->busy = 0; 1162 ncr53c9x_dequeue(sc, ecb); 1163 li->untagged = ecb; /* must be executed first to fix C/A */ 1164 li->busy = 2; 1165 if (ecb == sc->sc_nexus) { 1166 ncr53c9x_select(sc, ecb); 1167 } else { 1168 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1169 ecb->flags |= ECB_READY; 1170 if (sc->sc_state == NCR_IDLE) 1171 ncr53c9x_sched(sc); 1172 } 1173 } 1174 1175 /* 1176 * POST PROCESSING OF SCSI_CMD (usually current) 1177 */ 1178 void 1179 ncr53c9x_done(sc, ecb) 1180 struct ncr53c9x_softc *sc; 1181 struct ncr53c9x_ecb *ecb; 1182 { 1183 struct scsipi_xfer *xs = ecb->xs; 1184 struct scsipi_periph *periph = xs->xs_periph; 1185 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1186 int lun = periph->periph_lun; 1187 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1188 1189 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1190 1191 callout_stop(&ecb->xs->xs_callout); 1192 1193 /* 1194 * Now, if we've come here with no error code, i.e. we've kept the 1195 * initial XS_NOERROR, and the status code signals that we should 1196 * check sense, we'll need to set up a request sense cmd block and 1197 * push the command back into the ready queue *before* any other 1198 * commands for this target/lunit, else we lose the sense info. 1199 * We don't support chk sense conditions for the request sense cmd. 1200 */ 1201 if (xs->error == XS_NOERROR) { 1202 xs->status = ecb->stat; 1203 if ((ecb->flags & ECB_ABORT) != 0) { 1204 xs->error = XS_TIMEOUT; 1205 } else if ((ecb->flags & ECB_SENSE) != 0) { 1206 xs->error = XS_SENSE; 1207 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1208 /* First, save the return values */ 1209 xs->resid = ecb->dleft; 1210 ncr53c9x_sense(sc, ecb); 1211 return; 1212 } else { 1213 xs->resid = ecb->dleft; 1214 } 1215 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1216 xs->error = XS_BUSY; 1217 } 1218 1219 #ifdef NCR53C9X_DEBUG 1220 if (ncr53c9x_debug & NCR_SHOWMISC) { 1221 if (xs->resid != 0) 1222 printf("resid=%d ", xs->resid); 1223 if (xs->error == XS_SENSE) 1224 printf("sense=0x%02x\n", 1225 xs->sense.scsi_sense.error_code); 1226 else 1227 printf("error=%d\n", xs->error); 1228 } 1229 #endif 1230 1231 /* 1232 * Remove the ECB from whatever queue it's on. 1233 */ 1234 ncr53c9x_dequeue(sc, ecb); 1235 if (ecb == sc->sc_nexus) { 1236 sc->sc_nexus = NULL; 1237 if (sc->sc_state != NCR_CLEANING) { 1238 sc->sc_state = NCR_IDLE; 1239 ncr53c9x_sched(sc); 1240 } 1241 } 1242 1243 if (xs->error == XS_SELTIMEOUT) { 1244 /* Selection timeout -- discard this LUN if empty */ 1245 if (li->untagged == NULL && li->used == 0) { 1246 if (lun < NCR_NLUN) 1247 ti->lun[lun] = NULL; 1248 LIST_REMOVE(li, link); 1249 free(li, M_DEVBUF); 1250 } 1251 } 1252 1253 ncr53c9x_free_ecb(sc, ecb); 1254 ti->cmds++; 1255 scsipi_done(xs); 1256 } 1257 1258 void 1259 ncr53c9x_dequeue(sc, ecb) 1260 struct ncr53c9x_softc *sc; 1261 struct ncr53c9x_ecb *ecb; 1262 { 1263 struct ncr53c9x_tinfo *ti = 1264 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1265 struct ncr53c9x_linfo *li; 1266 int64_t lun = ecb->xs->xs_periph->periph_lun; 1267 1268 li = TINFO_LUN(ti, lun); 1269 #ifdef DIAGNOSTIC 1270 if (li == NULL || li->lun != lun) 1271 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n", 1272 (long long) lun, ecb); 1273 #endif 1274 if (li->untagged == ecb) { 1275 li->busy = 0; 1276 li->untagged = NULL; 1277 } 1278 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1279 #ifdef DIAGNOSTIC 1280 if (li->queued[ecb->tag[1]] != NULL && 1281 (li->queued[ecb->tag[1]] != ecb)) 1282 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1283 "instead of ecb %p\n", ecb->tag[1], 1284 (long long) lun, 1285 li->queued[ecb->tag[1]], ecb); 1286 #endif 1287 li->queued[ecb->tag[1]] = NULL; 1288 li->used--; 1289 } 1290 1291 if ((ecb->flags & ECB_READY) != 0) { 1292 ecb->flags &= ~ECB_READY; 1293 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1294 } 1295 } 1296 1297 /* 1298 * INTERRUPT/PROTOCOL ENGINE 1299 */ 1300 1301 /* 1302 * Schedule an outgoing message by prioritizing it, and asserting 1303 * attention on the bus. We can only do this when we are the initiator 1304 * else there will be an illegal command interrupt. 1305 */ 1306 #define ncr53c9x_sched_msgout(m) \ 1307 do { \ 1308 NCR_MISC(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1309 NCRCMD(sc, NCRCMD_SETATN); \ 1310 sc->sc_flags |= NCR_ATN; \ 1311 sc->sc_msgpriq |= (m); \ 1312 } while (0) 1313 1314 static void 1315 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1316 { 1317 NCR_MISC(("[flushfifo] ")); 1318 1319 NCRCMD(sc, NCRCMD_FLUSH); 1320 1321 if (sc->sc_phase == COMMAND_PHASE || 1322 sc->sc_phase == MESSAGE_OUT_PHASE) 1323 DELAY(2); 1324 } 1325 1326 static int 1327 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1328 { 1329 int i, n; 1330 u_char *buf; 1331 1332 switch(how) { 1333 case NCR_RDFIFO_START: 1334 buf = sc->sc_imess; 1335 sc->sc_imlen = 0; 1336 break; 1337 case NCR_RDFIFO_CONTINUE: 1338 buf = sc->sc_imess + sc->sc_imlen; 1339 break; 1340 default: 1341 panic("ncr53c9x_rdfifo: bad flag\n"); 1342 break; 1343 } 1344 1345 /* 1346 * XXX buffer (sc_imess) size for message 1347 */ 1348 1349 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1350 1351 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1352 n *= 2; 1353 1354 for (i = 0; i < n; i++) 1355 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1356 1357 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1358 1359 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1360 buf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1361 1362 NCR_READ_REG(sc, NCR_FIFO); 1363 1364 ncr53c9x_flushfifo(sc); 1365 } 1366 } else { 1367 for (i = 0; i < n; i++) 1368 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1369 } 1370 1371 sc->sc_imlen += i; 1372 1373 #ifdef NCR53C9X_DEBUG 1374 { 1375 int j; 1376 1377 NCR_TRACE(("\n[rdfifo %s (%d):", 1378 (how == NCR_RDFIFO_START) ? "start" : "cont", 1379 (int)sc->sc_imlen)); 1380 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1381 for (j = 0; j < sc->sc_imlen; j++) 1382 printf(" %02x", sc->sc_imess[j]); 1383 printf("]\n"); 1384 } 1385 } 1386 #endif 1387 return sc->sc_imlen; 1388 } 1389 1390 static void 1391 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1392 { 1393 int i; 1394 1395 #ifdef NCR53C9X_DEBUG 1396 NCR_MISC(("[wrfifo(%d):", len)); 1397 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1398 for (i = 0; i < len; i++) 1399 printf(" %02x", p[i]); 1400 printf("]\n"); 1401 } 1402 #endif 1403 1404 for (i = 0; i < len; i++) { 1405 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1406 1407 if (sc->sc_rev == NCR_VARIANT_FAS366) 1408 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1409 } 1410 } 1411 1412 int 1413 ncr53c9x_reselect(sc, message, tagtype, tagid) 1414 struct ncr53c9x_softc *sc; 1415 int message; 1416 int tagtype, tagid; 1417 { 1418 u_char selid, target, lun; 1419 struct ncr53c9x_ecb *ecb = NULL; 1420 struct ncr53c9x_tinfo *ti; 1421 struct ncr53c9x_linfo *li; 1422 1423 1424 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1425 target = sc->sc_selid; 1426 } else { 1427 /* 1428 * The SCSI chip made a snapshot of the data bus 1429 * while the reselection was being negotiated. 1430 * This enables us to determine which target did 1431 * the reselect. 1432 */ 1433 selid = sc->sc_selid & ~(1 << sc->sc_id); 1434 if (selid & (selid - 1)) { 1435 printf("%s: reselect with invalid selid %02x;" 1436 " sending DEVICE RESET\n", 1437 sc->sc_dev.dv_xname, selid); 1438 goto reset; 1439 } 1440 1441 target = ffs(selid) - 1; 1442 } 1443 lun = message & 0x07; 1444 1445 /* 1446 * Search wait queue for disconnected cmd 1447 * The list should be short, so I haven't bothered with 1448 * any more sophisticated structures than a simple 1449 * singly linked list. 1450 */ 1451 ti = &sc->sc_tinfo[target]; 1452 li = TINFO_LUN(ti, lun); 1453 1454 /* 1455 * We can get as far as the LUN with the IDENTIFY 1456 * message. Check to see if we're running an 1457 * un-tagged command. Otherwise ack the IDENTIFY 1458 * and wait for a tag message. 1459 */ 1460 if (li != NULL) { 1461 if (li->untagged != NULL && li->busy) 1462 ecb = li->untagged; 1463 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1464 /* Wait for tag to come by */ 1465 sc->sc_state = NCR_IDENTIFIED; 1466 return (0); 1467 } else if (tagtype) 1468 ecb = li->queued[tagid]; 1469 } 1470 if (ecb == NULL) { 1471 printf("%s: reselect from target %d lun %d tag %x:%x " 1472 "with no nexus; sending ABORT\n", 1473 sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1474 goto abort; 1475 } 1476 1477 /* Make this nexus active again. */ 1478 sc->sc_state = NCR_CONNECTED; 1479 sc->sc_nexus = ecb; 1480 ncr53c9x_setsync(sc, ti); 1481 1482 if (ecb->flags & ECB_RESET) 1483 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1484 else if (ecb->flags & ECB_ABORT) 1485 ncr53c9x_sched_msgout(SEND_ABORT); 1486 1487 /* Do an implicit RESTORE POINTERS. */ 1488 sc->sc_dp = ecb->daddr; 1489 sc->sc_dleft = ecb->dleft; 1490 1491 return (0); 1492 1493 reset: 1494 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1495 return (1); 1496 1497 abort: 1498 ncr53c9x_sched_msgout(SEND_ABORT); 1499 return (1); 1500 } 1501 1502 static inline int 1503 __verify_msg_format(u_char *p, int len) 1504 { 1505 1506 if (len == 1 && MSG_IS1BYTE(p[0])) 1507 return 1; 1508 if (len == 2 && MSG_IS2BYTE(p[0])) 1509 return 1; 1510 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1511 len == p[1] + 2) 1512 return 1; 1513 1514 return 0; 1515 } 1516 1517 /* 1518 * Get an incoming message as initiator. 1519 * 1520 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1521 * byte in the FIFO 1522 */ 1523 void 1524 ncr53c9x_msgin(sc) 1525 struct ncr53c9x_softc *sc; 1526 { 1527 1528 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1529 1530 if (sc->sc_imlen == 0) { 1531 printf("%s: msgin: no msg byte available\n", 1532 sc->sc_dev.dv_xname); 1533 return; 1534 } 1535 1536 /* 1537 * Prepare for a new message. A message should (according 1538 * to the SCSI standard) be transmitted in one single 1539 * MESSAGE_IN_PHASE. If we have been in some other phase, 1540 * then this is a new message. 1541 */ 1542 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1543 sc->sc_state != NCR_RESELECTED) { 1544 printf("%s: phase change, dropping message, " 1545 "prev %d, state %d\n", 1546 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1547 sc->sc_flags &= ~NCR_DROP_MSGI; 1548 sc->sc_imlen = 0; 1549 } 1550 1551 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0])); 1552 1553 /* 1554 * If we're going to reject the message, don't bother storing 1555 * the incoming bytes. But still, we need to ACK them. 1556 */ 1557 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1558 NCRCMD(sc, NCRCMD_MSGOK); 1559 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1560 return; 1561 } 1562 1563 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1564 ncr53c9x_sched_msgout(SEND_REJECT); 1565 sc->sc_flags |= NCR_DROP_MSGI; 1566 } else { 1567 u_char *pb; 1568 int plen; 1569 1570 switch (sc->sc_state) { 1571 /* 1572 * if received message is the first of reselection 1573 * then first byte is selid, and then message 1574 */ 1575 case NCR_RESELECTED: 1576 pb = sc->sc_imess + 1; 1577 plen = sc->sc_imlen - 1; 1578 break; 1579 default: 1580 pb = sc->sc_imess; 1581 plen = sc->sc_imlen; 1582 break; 1583 } 1584 1585 if (__verify_msg_format(pb, plen)) 1586 goto gotit; 1587 } 1588 1589 /* Ack what we have so far */ 1590 NCRCMD(sc, NCRCMD_MSGOK); 1591 return; 1592 1593 gotit: 1594 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1595 /* we got complete message, flush the imess, */ 1596 /* XXX nobody uses imlen below */ 1597 sc->sc_imlen = 0; 1598 /* 1599 * Now we should have a complete message (1 byte, 2 byte 1600 * and moderately long extended messages). We only handle 1601 * extended messages which total length is shorter than 1602 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1603 */ 1604 switch (sc->sc_state) { 1605 struct ncr53c9x_ecb *ecb; 1606 struct ncr53c9x_tinfo *ti; 1607 struct ncr53c9x_linfo *li; 1608 int lun; 1609 1610 case NCR_CONNECTED: 1611 ecb = sc->sc_nexus; 1612 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1613 1614 switch (sc->sc_imess[0]) { 1615 case MSG_CMDCOMPLETE: 1616 NCR_MSGS(("cmdcomplete ")); 1617 if (sc->sc_dleft < 0) { 1618 scsipi_printaddr(ecb->xs->xs_periph); 1619 printf("got %ld extra bytes\n", 1620 -(long)sc->sc_dleft); 1621 sc->sc_dleft = 0; 1622 } 1623 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1624 0 : sc->sc_dleft; 1625 if ((ecb->flags & ECB_SENSE) == 0) 1626 ecb->xs->resid = ecb->dleft; 1627 sc->sc_state = NCR_CMDCOMPLETE; 1628 break; 1629 1630 case MSG_MESSAGE_REJECT: 1631 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1632 switch (sc->sc_msgout) { 1633 case SEND_TAG: 1634 /* 1635 * Target does not like tagged queuing. 1636 * - Flush the command queue 1637 * - Disable tagged queuing for the target 1638 * - Dequeue ecb from the queued array. 1639 */ 1640 printf("%s: tagged queuing rejected: " 1641 "target %d\n", 1642 sc->sc_dev.dv_xname, 1643 ecb->xs->xs_periph->periph_target); 1644 1645 NCR_MSGS(("(rejected sent tag)")); 1646 NCRCMD(sc, NCRCMD_FLUSH); 1647 DELAY(1); 1648 ti->flags &= ~T_TAG; 1649 lun = ecb->xs->xs_periph->periph_lun; 1650 li = TINFO_LUN(ti, lun); 1651 if (ecb->tag[0] && 1652 li->queued[ecb->tag[1]] != NULL) { 1653 li->queued[ecb->tag[1]] = NULL; 1654 li->used--; 1655 } 1656 ecb->tag[0] = ecb->tag[1] = 0; 1657 li->untagged = ecb; 1658 li->busy = 1; 1659 break; 1660 1661 case SEND_SDTR: 1662 printf("%s: sync transfer rejected: " 1663 "target %d\n", 1664 sc->sc_dev.dv_xname, 1665 ecb->xs->xs_periph->periph_target); 1666 1667 sc->sc_flags &= ~NCR_SYNCHNEGO; 1668 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1669 ncr53c9x_setsync(sc, ti); 1670 ncr53c9x_update_xfer_mode(sc, 1671 ecb->xs->xs_periph->periph_target); 1672 break; 1673 1674 case SEND_WDTR: 1675 printf("%s: wide transfer rejected: " 1676 "target %d\n", 1677 sc->sc_dev.dv_xname, 1678 ecb->xs->xs_periph->periph_target); 1679 ti->flags &= ~T_WIDE; 1680 ti->width = 0; 1681 break; 1682 1683 case SEND_INIT_DET_ERR: 1684 goto abort; 1685 } 1686 break; 1687 1688 case MSG_NOOP: 1689 NCR_MSGS(("noop ")); 1690 break; 1691 1692 case MSG_HEAD_OF_Q_TAG: 1693 case MSG_SIMPLE_Q_TAG: 1694 case MSG_ORDERED_Q_TAG: 1695 NCR_MSGS(("TAG %x:%x", 1696 sc->sc_imess[0], sc->sc_imess[1])); 1697 break; 1698 1699 case MSG_DISCONNECT: 1700 NCR_MSGS(("disconnect ")); 1701 ti->dconns++; 1702 sc->sc_state = NCR_DISCONNECT; 1703 1704 /* 1705 * Mark the fact that all bytes have moved. The 1706 * target may not bother to do a SAVE POINTERS 1707 * at this stage. This flag will set the residual 1708 * count to zero on MSG COMPLETE. 1709 */ 1710 if (sc->sc_dleft == 0) 1711 ecb->flags |= ECB_TENTATIVE_DONE; 1712 1713 break; 1714 1715 case MSG_SAVEDATAPOINTER: 1716 NCR_MSGS(("save datapointer ")); 1717 ecb->daddr = sc->sc_dp; 1718 ecb->dleft = sc->sc_dleft; 1719 break; 1720 1721 case MSG_RESTOREPOINTERS: 1722 NCR_MSGS(("restore datapointer ")); 1723 sc->sc_dp = ecb->daddr; 1724 sc->sc_dleft = ecb->dleft; 1725 break; 1726 1727 case MSG_EXTENDED: 1728 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1729 switch (sc->sc_imess[2]) { 1730 case MSG_EXT_SDTR: 1731 NCR_MSGS(("SDTR period %d, offset %d ", 1732 sc->sc_imess[3], sc->sc_imess[4])); 1733 if (sc->sc_imess[1] != 3) 1734 goto reject; 1735 ti->period = sc->sc_imess[3]; 1736 ti->offset = sc->sc_imess[4]; 1737 ti->flags &= ~T_NEGOTIATE; 1738 if (sc->sc_minsync == 0 || 1739 ti->offset == 0 || 1740 ti->period > 124) { 1741 #if 0 1742 #ifdef NCR53C9X_DEBUG 1743 scsipi_printaddr(ecb->xs->xs_periph); 1744 printf("async mode\n"); 1745 #endif 1746 #endif 1747 ti->flags &= ~T_SYNCMODE; 1748 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1749 /* 1750 * target initiated negotiation 1751 */ 1752 ti->offset = 0; 1753 ncr53c9x_sched_msgout( 1754 SEND_SDTR); 1755 } 1756 } else { 1757 #if 0 1758 int r = 250/ti->period; 1759 int s = (100*250)/ti->period - 100*r; 1760 #endif 1761 int p; 1762 1763 p = ncr53c9x_stp2cpb(sc, ti->period); 1764 ti->period = ncr53c9x_cpb2stp(sc, p); 1765 #if 0 1766 #ifdef NCR53C9X_DEBUG 1767 scsipi_printaddr(ecb->xs->xs_periph); 1768 printf("max sync rate %d.%02dMB/s\n", 1769 r, s); 1770 #endif 1771 #endif 1772 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1773 /* 1774 * target initiated negotiation 1775 */ 1776 if (ti->period < 1777 sc->sc_minsync) 1778 ti->period = 1779 sc->sc_minsync; 1780 if (ti->offset > 15) 1781 ti->offset = 15; 1782 ti->flags &= ~T_SYNCMODE; 1783 ncr53c9x_sched_msgout( 1784 SEND_SDTR); 1785 } else { 1786 /* we are sync */ 1787 ti->flags |= T_SYNCMODE; 1788 } 1789 } 1790 ncr53c9x_update_xfer_mode(sc, 1791 ecb->xs->xs_periph->periph_target); 1792 sc->sc_flags &= ~NCR_SYNCHNEGO; 1793 ncr53c9x_setsync(sc, ti); 1794 break; 1795 1796 case MSG_EXT_WDTR: 1797 printf("%s: wide mode %d\n", 1798 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1799 if (sc->sc_imess[3] == 1) { 1800 ti->cfg3 |= NCRFASCFG3_EWIDE; 1801 ncr53c9x_setsync(sc, ti); 1802 } else 1803 ti->width = 0; 1804 ti->flags &= ~T_WIDE; 1805 break; 1806 default: 1807 scsipi_printaddr(ecb->xs->xs_periph); 1808 printf("unrecognized MESSAGE EXTENDED;" 1809 " sending REJECT\n"); 1810 goto reject; 1811 } 1812 break; 1813 1814 default: 1815 NCR_MSGS(("ident ")); 1816 scsipi_printaddr(ecb->xs->xs_periph); 1817 printf("unrecognized MESSAGE; sending REJECT\n"); 1818 reject: 1819 ncr53c9x_sched_msgout(SEND_REJECT); 1820 break; 1821 } 1822 break; 1823 1824 case NCR_IDENTIFIED: 1825 /* 1826 * IDENTIFY message was received and queue tag is expected now 1827 */ 1828 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1829 (sc->sc_msgify == 0)) { 1830 printf("%s: TAG reselect without IDENTIFY;" 1831 " MSG %x;" 1832 " sending DEVICE RESET\n", 1833 sc->sc_dev.dv_xname, 1834 sc->sc_imess[0]); 1835 goto reset; 1836 } 1837 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 1838 sc->sc_imess[0], sc->sc_imess[1]); 1839 break; 1840 1841 case NCR_RESELECTED: 1842 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1843 sc->sc_msgify = sc->sc_imess[1]; 1844 } else { 1845 printf("%s: reselect without IDENTIFY;" 1846 " MSG %x;" 1847 " sending DEVICE RESET\n", 1848 sc->sc_dev.dv_xname, 1849 sc->sc_imess[1]); 1850 goto reset; 1851 } 1852 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1853 break; 1854 1855 default: 1856 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1857 sc->sc_dev.dv_xname); 1858 reset: 1859 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1860 break; 1861 1862 abort: 1863 ncr53c9x_sched_msgout(SEND_ABORT); 1864 break; 1865 } 1866 1867 /* if we have more messages to send set ATN */ 1868 if (sc->sc_msgpriq) 1869 NCRCMD(sc, NCRCMD_SETATN); 1870 1871 /* Ack last message byte */ 1872 NCRCMD(sc, NCRCMD_MSGOK); 1873 1874 /* Done, reset message pointer. */ 1875 sc->sc_flags &= ~NCR_DROP_MSGI; 1876 sc->sc_imlen = 0; 1877 } 1878 1879 1880 /* 1881 * Send the highest priority, scheduled message 1882 */ 1883 void 1884 ncr53c9x_msgout(sc) 1885 struct ncr53c9x_softc *sc; 1886 { 1887 struct ncr53c9x_tinfo *ti; 1888 struct ncr53c9x_ecb *ecb; 1889 size_t size; 1890 1891 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1892 sc->sc_msgpriq, sc->sc_prevphase)); 1893 1894 /* 1895 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1896 * condition on the SCSI bus. The 53c9x chip 1897 * automatically turns off ATN before sending the 1898 * message byte. (see also the comment below in the 1899 * default case when picking out a message to send) 1900 */ 1901 if (sc->sc_flags & NCR_ATN) { 1902 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1903 new: 1904 NCRCMD(sc, NCRCMD_FLUSH); 1905 /* DELAY(1); */ 1906 sc->sc_msgoutq = 0; 1907 sc->sc_omlen = 0; 1908 } 1909 } else { 1910 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1911 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1912 goto new; 1913 } else { 1914 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1915 sc->sc_dev.dv_xname, __LINE__); 1916 } 1917 } 1918 1919 if (sc->sc_omlen == 0) { 1920 /* Pick up highest priority message */ 1921 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1922 sc->sc_msgoutq |= sc->sc_msgout; 1923 sc->sc_msgpriq &= ~sc->sc_msgout; 1924 sc->sc_omlen = 1; /* "Default" message len */ 1925 switch (sc->sc_msgout) { 1926 case SEND_SDTR: 1927 ecb = sc->sc_nexus; 1928 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1929 sc->sc_omess[0] = MSG_EXTENDED; 1930 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1931 sc->sc_omess[2] = MSG_EXT_SDTR; 1932 sc->sc_omess[3] = ti->period; 1933 sc->sc_omess[4] = ti->offset; 1934 sc->sc_omlen = 5; 1935 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1936 ti->flags |= T_SYNCMODE; 1937 ncr53c9x_setsync(sc, ti); 1938 } 1939 break; 1940 case SEND_WDTR: 1941 ecb = sc->sc_nexus; 1942 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1943 sc->sc_omess[0] = MSG_EXTENDED; 1944 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1945 sc->sc_omess[2] = MSG_EXT_WDTR; 1946 sc->sc_omess[3] = ti->width; 1947 sc->sc_omlen = 4; 1948 break; 1949 case SEND_IDENTIFY: 1950 if (sc->sc_state != NCR_CONNECTED) { 1951 printf("%s at line %d: no nexus\n", 1952 sc->sc_dev.dv_xname, __LINE__); 1953 } 1954 ecb = sc->sc_nexus; 1955 sc->sc_omess[0] = 1956 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1957 break; 1958 case SEND_TAG: 1959 if (sc->sc_state != NCR_CONNECTED) { 1960 printf("%s at line %d: no nexus\n", 1961 sc->sc_dev.dv_xname, __LINE__); 1962 } 1963 ecb = sc->sc_nexus; 1964 sc->sc_omess[0] = ecb->tag[0]; 1965 sc->sc_omess[1] = ecb->tag[1]; 1966 sc->sc_omlen = 2; 1967 break; 1968 case SEND_DEV_RESET: 1969 sc->sc_flags |= NCR_ABORTING; 1970 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1971 ecb = sc->sc_nexus; 1972 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1973 ti->flags &= ~T_SYNCMODE; 1974 ncr53c9x_update_xfer_mode(sc, 1975 ecb->xs->xs_periph->periph_target); 1976 if ((ti->flags & T_SYNCHOFF) == 0) 1977 /* We can re-start sync negotiation */ 1978 ti->flags |= T_NEGOTIATE; 1979 break; 1980 case SEND_PARITY_ERROR: 1981 sc->sc_omess[0] = MSG_PARITY_ERROR; 1982 break; 1983 case SEND_ABORT: 1984 sc->sc_flags |= NCR_ABORTING; 1985 sc->sc_omess[0] = MSG_ABORT; 1986 break; 1987 case SEND_INIT_DET_ERR: 1988 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1989 break; 1990 case SEND_REJECT: 1991 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1992 break; 1993 default: 1994 /* 1995 * We normally do not get here, since the chip 1996 * automatically turns off ATN before the last 1997 * byte of a message is sent to the target. 1998 * However, if the target rejects our (multi-byte) 1999 * message early by switching to MSG IN phase 2000 * ATN remains on, so the target may return to 2001 * MSG OUT phase. If there are no scheduled messages 2002 * left we send a NO-OP. 2003 * 2004 * XXX - Note that this leaves no useful purpose for 2005 * the NCR_ATN flag. 2006 */ 2007 sc->sc_flags &= ~NCR_ATN; 2008 sc->sc_omess[0] = MSG_NOOP; 2009 break; 2010 } 2011 sc->sc_omp = sc->sc_omess; 2012 } 2013 2014 #ifdef DEBUG 2015 { 2016 int i; 2017 2018 NCR_MISC(("<msgout:")); 2019 for (i = 0; i < sc->sc_omlen; i++) 2020 NCR_MISC((" %02x", sc->sc_omess[i])); 2021 NCR_MISC(("> ")); 2022 } 2023 #endif 2024 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2025 /* 2026 * XXX fifo size 2027 */ 2028 ncr53c9x_flushfifo(sc); 2029 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2030 NCRCMD(sc, NCRCMD_TRANS); 2031 } else { 2032 /* (re)send the message */ 2033 size = min(sc->sc_omlen, sc->sc_maxxfer); 2034 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2035 /* Program the SCSI counter */ 2036 NCR_SET_COUNT(sc, size); 2037 2038 /* Load the count in and start the message-out transfer */ 2039 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2040 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2041 NCRDMA_GO(sc); 2042 } 2043 } 2044 2045 /* 2046 * This is the most critical part of the driver, and has to know 2047 * how to deal with *all* error conditions and phases from the SCSI 2048 * bus. If there are no errors and the DMA was active, then call the 2049 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2050 * and we can return from here without further processing. 2051 * 2052 * Most of this needs verifying. 2053 */ 2054 int 2055 ncr53c9x_intr(arg) 2056 void *arg; 2057 { 2058 struct ncr53c9x_softc *sc = arg; 2059 struct ncr53c9x_ecb *ecb; 2060 struct scsipi_periph *periph; 2061 struct ncr53c9x_tinfo *ti; 2062 size_t size; 2063 int nfifo; 2064 2065 NCR_MISC(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2066 2067 if (!NCRDMA_ISINTR(sc)) 2068 return (0); 2069 2070 again: 2071 /* and what do the registers say... */ 2072 ncr53c9x_readregs(sc); 2073 2074 sc->sc_intrcnt.ev_count++; 2075 2076 /* 2077 * At the moment, only a SCSI Bus Reset or Illegal 2078 * Command are classed as errors. A disconnect is a 2079 * valid condition, and we let the code check is the 2080 * "NCR_BUSFREE_OK" flag was set before declaring it 2081 * and error. 2082 * 2083 * Also, the status register tells us about "Gross 2084 * Errors" and "Parity errors". Only the Gross Error 2085 * is really bad, and the parity errors are dealt 2086 * with later 2087 * 2088 * TODO 2089 * If there are too many parity error, go to slow 2090 * cable mode ? 2091 */ 2092 2093 /* SCSI Reset */ 2094 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2095 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2096 NCRCMD(sc, NCRCMD_FLUSH); 2097 DELAY(1); 2098 } 2099 if (sc->sc_state != NCR_SBR) { 2100 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 2101 ncr53c9x_init(sc, 0); /* Restart everything */ 2102 return (1); 2103 } 2104 #if 0 2105 /*XXX*/ printf("<expected bus reset: " 2106 "[intr %x, stat %x, step %d]>\n", 2107 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2108 #endif 2109 if (sc->sc_nexus != NULL) 2110 panic("%s: nexus in reset state", 2111 sc->sc_dev.dv_xname); 2112 goto sched; 2113 } 2114 2115 ecb = sc->sc_nexus; 2116 2117 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2118 if (sc->sc_espintr & NCRINTR_ERR || 2119 sc->sc_espstat & NCRSTAT_GE) { 2120 2121 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2122 /* Gross Error; no target ? */ 2123 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2124 NCRCMD(sc, NCRCMD_FLUSH); 2125 DELAY(1); 2126 } 2127 if (sc->sc_state == NCR_CONNECTED || 2128 sc->sc_state == NCR_SELECTING) { 2129 ecb->xs->error = XS_TIMEOUT; 2130 ncr53c9x_done(sc, ecb); 2131 } 2132 return (1); 2133 } 2134 2135 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2136 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2137 /* 2138 * Eat away "Illegal command" interrupt 2139 * on a ESP100 caused by a re-selection 2140 * while we were trying to select 2141 * another target. 2142 */ 2143 #ifdef DEBUG 2144 printf("%s: ESP100 work-around activated\n", 2145 sc->sc_dev.dv_xname); 2146 #endif 2147 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2148 return (1); 2149 } 2150 /* illegal command, out of sync ? */ 2151 printf("%s: illegal command: 0x%x " 2152 "(state %d, phase %x, prevphase %x)\n", 2153 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2154 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2155 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2156 NCRCMD(sc, NCRCMD_FLUSH); 2157 DELAY(1); 2158 } 2159 ncr53c9x_init(sc, 1); /* Restart everything */ 2160 return (1); 2161 } 2162 } 2163 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2164 2165 /* 2166 * Call if DMA is active. 2167 * 2168 * If DMA_INTR returns true, then maybe go 'round the loop 2169 * again in case there is no more DMA queued, but a phase 2170 * change is expected. 2171 */ 2172 if (NCRDMA_ISACTIVE(sc)) { 2173 int r = NCRDMA_INTR(sc); 2174 if (r == -1) { 2175 printf("%s: DMA error; resetting\n", 2176 sc->sc_dev.dv_xname); 2177 ncr53c9x_init(sc, 1); 2178 } 2179 /* If DMA active here, then go back to work... */ 2180 if (NCRDMA_ISACTIVE(sc)) 2181 return (1); 2182 2183 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2184 /* 2185 * DMA not completed. If we can not find a 2186 * acceptable explanation, print a diagnostic. 2187 */ 2188 if (sc->sc_state == NCR_SELECTING) 2189 /* 2190 * This can happen if we are reselected 2191 * while using DMA to select a target. 2192 */ 2193 /*void*/; 2194 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2195 /* 2196 * Our (multi-byte) message (eg SDTR) was 2197 * interrupted by the target to send 2198 * a MSG REJECT. 2199 * Print diagnostic if current phase 2200 * is not MESSAGE IN. 2201 */ 2202 if (sc->sc_phase != MESSAGE_IN_PHASE) 2203 printf("%s: !TC on MSG OUT" 2204 " [intr %x, stat %x, step %d]" 2205 " prevphase %x, resid %lx\n", 2206 sc->sc_dev.dv_xname, 2207 sc->sc_espintr, 2208 sc->sc_espstat, 2209 sc->sc_espstep, 2210 sc->sc_prevphase, 2211 (u_long)sc->sc_omlen); 2212 } else if (sc->sc_dleft == 0) { 2213 /* 2214 * The DMA operation was started for 2215 * a DATA transfer. Print a diagnostic 2216 * if the DMA counter and TC bit 2217 * appear to be out of sync. 2218 */ 2219 printf("%s: !TC on DATA XFER" 2220 " [intr %x, stat %x, step %d]" 2221 " prevphase %x, resid %x\n", 2222 sc->sc_dev.dv_xname, 2223 sc->sc_espintr, 2224 sc->sc_espstat, 2225 sc->sc_espstep, 2226 sc->sc_prevphase, 2227 ecb ? ecb->dleft : -1); 2228 } 2229 } 2230 } 2231 2232 /* 2233 * Check for less serious errors. 2234 */ 2235 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2236 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2237 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2238 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2239 else 2240 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2241 } 2242 2243 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2244 sc->sc_msgify = 0; 2245 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>", 2246 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2247 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2248 NCRCMD(sc, NCRCMD_FLUSH); 2249 /* DELAY(1); */ 2250 } 2251 /* 2252 * This command must (apparently) be issued within 2253 * 250mS of a disconnect. So here you are... 2254 */ 2255 NCRCMD(sc, NCRCMD_ENSEL); 2256 2257 switch (sc->sc_state) { 2258 case NCR_RESELECTED: 2259 goto sched; 2260 2261 case NCR_SELECTING: 2262 { 2263 struct ncr53c9x_linfo *li; 2264 2265 ecb->xs->error = XS_SELTIMEOUT; 2266 2267 /* Selection timeout -- discard all LUNs if empty */ 2268 periph = ecb->xs->xs_periph; 2269 ti = &sc->sc_tinfo[periph->periph_target]; 2270 li = LIST_FIRST(&ti->luns); 2271 while (li != NULL) { 2272 if (li->untagged == NULL && li->used == 0) { 2273 if (li->lun < NCR_NLUN) 2274 ti->lun[li->lun] = NULL; 2275 LIST_REMOVE(li, link); 2276 free(li, M_DEVBUF); 2277 /* 2278 * Restart the search at the beginning 2279 */ 2280 li = LIST_FIRST(&ti->luns); 2281 continue; 2282 } 2283 li = LIST_NEXT(li, link); 2284 } 2285 goto finish; 2286 } 2287 case NCR_CONNECTED: 2288 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2289 #ifdef NCR53C9X_DEBUG 2290 if (ecb != NULL) 2291 scsipi_printaddr(ecb->xs->xs_periph); 2292 printf("sync nego not completed!\n"); 2293 #endif 2294 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 2295 sc->sc_flags &= ~NCR_SYNCHNEGO; 2296 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2297 } 2298 2299 /* it may be OK to disconnect */ 2300 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2301 /* 2302 * Section 5.1.1 of the SCSI 2 spec 2303 * suggests issuing a REQUEST SENSE 2304 * following an unexpected disconnect. 2305 * Some devices go into a contingent 2306 * allegiance condition when 2307 * disconnecting, and this is necessary 2308 * to clean up their state. 2309 */ 2310 printf("%s: unexpected disconnect; ", 2311 sc->sc_dev.dv_xname); 2312 if ((ecb->flags & ECB_SENSE) != 0) { 2313 printf("resetting\n"); 2314 goto reset; 2315 } 2316 printf("sending REQUEST SENSE\n"); 2317 callout_stop(&ecb->xs->xs_callout); 2318 ncr53c9x_sense(sc, ecb); 2319 goto out; 2320 } 2321 2322 ecb->xs->error = XS_TIMEOUT; 2323 goto finish; 2324 2325 case NCR_DISCONNECT: 2326 sc->sc_nexus = NULL; 2327 goto sched; 2328 2329 case NCR_CMDCOMPLETE: 2330 goto finish; 2331 } 2332 } 2333 2334 switch (sc->sc_state) { 2335 2336 case NCR_SBR: 2337 printf("%s: waiting for SCSI Bus Reset to happen\n", 2338 sc->sc_dev.dv_xname); 2339 return (1); 2340 2341 case NCR_RESELECTED: 2342 /* 2343 * we must be continuing a message ? 2344 */ 2345 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2346 printf("%s: target didn't identify\n", 2347 sc->sc_dev.dv_xname); 2348 ncr53c9x_init(sc, 1); 2349 return (1); 2350 } 2351 printf("<<RESELECT CONT'd>>"); 2352 #if XXXX 2353 ncr53c9x_msgin(sc); 2354 if (sc->sc_state != NCR_CONNECTED) { 2355 /* IDENTIFY fail?! */ 2356 printf("%s: identify failed\n", 2357 sc->sc_dev.dv_xname, sc->sc_state); 2358 ncr53c9x_init(sc, 1); 2359 return (1); 2360 } 2361 #endif 2362 break; 2363 2364 case NCR_IDENTIFIED: 2365 ecb = sc->sc_nexus; 2366 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2367 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2368 /* 2369 * Things are seriously fucked up. 2370 * Pull the brakes, i.e. reset 2371 */ 2372 printf("%s: target didn't send tag: %d bytes in fifo\n", 2373 sc->sc_dev.dv_xname, i); 2374 /* Drain and display fifo */ 2375 while (i-- > 0) 2376 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2377 2378 ncr53c9x_init(sc, 1); 2379 return (1); 2380 } else 2381 goto msgin; 2382 2383 break; 2384 2385 case NCR_IDLE: 2386 case NCR_SELECTING: 2387 ecb = sc->sc_nexus; 2388 if (sc->sc_espintr & NCRINTR_RESEL) { 2389 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2390 sc->sc_flags = 0; 2391 /* 2392 * If we're trying to select a 2393 * target ourselves, push our command 2394 * back into the ready list. 2395 */ 2396 if (sc->sc_state == NCR_SELECTING) { 2397 NCR_MISC(("backoff selector ")); 2398 callout_stop(&ecb->xs->xs_callout); 2399 ncr53c9x_dequeue(sc, ecb); 2400 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2401 ecb->flags |= ECB_READY; 2402 ecb = sc->sc_nexus = NULL; 2403 } 2404 sc->sc_state = NCR_RESELECTED; 2405 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2406 /* 2407 * Things are seriously fucked up. 2408 * Pull the brakes, i.e. reset 2409 */ 2410 printf("%s: target didn't identify\n", 2411 sc->sc_dev.dv_xname); 2412 ncr53c9x_init(sc, 1); 2413 return (1); 2414 } 2415 /* 2416 * The C90 only inhibits FIFO writes until 2417 * reselection is complete, instead of 2418 * waiting until the interrupt status register 2419 * has been read. So, if the reselect happens 2420 * while we were entering a command bytes (for 2421 * another target) some of those bytes can 2422 * appear in the FIFO here, after the 2423 * interrupt is taken. 2424 */ 2425 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2426 2427 if (nfifo < 2 || 2428 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) { 2429 printf("%s: RESELECT: %d bytes in FIFO! " 2430 "[intr %x, stat %x, step %d, " 2431 "prevphase %x]\n", 2432 sc->sc_dev.dv_xname, 2433 nfifo, 2434 sc->sc_espintr, 2435 sc->sc_espstat, 2436 sc->sc_espstep, 2437 sc->sc_prevphase); 2438 ncr53c9x_init(sc, 1); 2439 return (1); 2440 } 2441 sc->sc_selid = sc->sc_imess[0]; 2442 NCR_MISC(("selid=%02x ", sc->sc_selid)); 2443 2444 /* Handle identify message */ 2445 ncr53c9x_msgin(sc); 2446 if (nfifo != 2) { 2447 /* 2448 * Note: this should not happen 2449 * with `dmaselect' on. 2450 */ 2451 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2452 NCRCMD(sc, NCRCMD_FLUSH); 2453 } else if (sc->sc_features & NCR_F_DMASELECT && 2454 sc->sc_rev == NCR_VARIANT_ESP100) { 2455 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2456 } 2457 2458 if (sc->sc_state != NCR_CONNECTED && 2459 sc->sc_state != NCR_IDENTIFIED) { 2460 /* IDENTIFY fail?! */ 2461 printf("%s: identify failed, " 2462 "state %d, intr %02x\n", 2463 sc->sc_dev.dv_xname, sc->sc_state, 2464 sc->sc_espintr); 2465 ncr53c9x_init(sc, 1); 2466 return (1); 2467 } 2468 goto shortcut; /* ie. next phase expected soon */ 2469 } 2470 2471 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2472 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2473 /* 2474 * Arbitration won; examine the `step' register 2475 * to determine how far the selection could progress. 2476 */ 2477 ecb = sc->sc_nexus; 2478 if (ecb == NULL) 2479 panic("ncr53c9x: no nexus"); 2480 2481 periph = ecb->xs->xs_periph; 2482 ti = &sc->sc_tinfo[periph->periph_target]; 2483 2484 switch (sc->sc_espstep) { 2485 case 0: 2486 /* 2487 * The target did not respond with a 2488 * message out phase - probably an old 2489 * device that doesn't recognize ATN. 2490 * Clear ATN and just continue, the 2491 * target should be in the command 2492 * phase. 2493 * XXXX check for command phase? 2494 */ 2495 NCRCMD(sc, NCRCMD_RSTATN); 2496 break; 2497 case 1: 2498 if ((ti->flags & T_NEGOTIATE) == 0 && 2499 ecb->tag[0] == 0) { 2500 printf("%s: step 1 & !NEG\n", 2501 sc->sc_dev.dv_xname); 2502 goto reset; 2503 } 2504 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2505 printf("%s: !MSGOUT\n", 2506 sc->sc_dev.dv_xname); 2507 goto reset; 2508 } 2509 if (ti->flags & T_WIDE) { 2510 ncr53c9x_sched_msgout(SEND_WDTR); 2511 } 2512 if (ti->flags & T_NEGOTIATE) { 2513 /* Start negotiating */ 2514 ti->period = sc->sc_minsync; 2515 ti->offset = 15; 2516 sc->sc_flags |= NCR_SYNCHNEGO; 2517 if (ecb->tag[0]) 2518 ncr53c9x_sched_msgout( 2519 SEND_TAG|SEND_SDTR); 2520 else 2521 ncr53c9x_sched_msgout( 2522 SEND_SDTR); 2523 } else { 2524 /* Could not do ATN3 so send TAG */ 2525 ncr53c9x_sched_msgout(SEND_TAG); 2526 } 2527 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2528 break; 2529 case 3: 2530 /* 2531 * Grr, this is supposed to mean 2532 * "target left command phase prematurely". 2533 * It seems to happen regularly when 2534 * sync mode is on. 2535 * Look at FIFO to see if command went out. 2536 * (Timing problems?) 2537 */ 2538 if (sc->sc_features & NCR_F_DMASELECT) { 2539 if (sc->sc_cmdlen == 0) 2540 /* Hope for the best.. */ 2541 break; 2542 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2543 & NCRFIFO_FF) == 0) { 2544 /* Hope for the best.. */ 2545 break; 2546 } 2547 printf("(%s:%d:%d): selection failed;" 2548 " %d left in FIFO " 2549 "[intr %x, stat %x, step %d]\n", 2550 sc->sc_dev.dv_xname, 2551 periph->periph_target, 2552 periph->periph_lun, 2553 NCR_READ_REG(sc, NCR_FFLAG) 2554 & NCRFIFO_FF, 2555 sc->sc_espintr, sc->sc_espstat, 2556 sc->sc_espstep); 2557 NCRCMD(sc, NCRCMD_FLUSH); 2558 ncr53c9x_sched_msgout(SEND_ABORT); 2559 return (1); 2560 case 2: 2561 /* Select stuck at Command Phase */ 2562 NCRCMD(sc, NCRCMD_FLUSH); 2563 break; 2564 case 4: 2565 if (sc->sc_features & NCR_F_DMASELECT && 2566 sc->sc_cmdlen != 0) 2567 printf("(%s:%d:%d): select; " 2568 "%lu left in DMA buffer " 2569 "[intr %x, stat %x, step %d]\n", 2570 sc->sc_dev.dv_xname, 2571 periph->periph_target, 2572 periph->periph_lun, 2573 (u_long)sc->sc_cmdlen, 2574 sc->sc_espintr, 2575 sc->sc_espstat, 2576 sc->sc_espstep); 2577 /* So far, everything went fine */ 2578 break; 2579 } 2580 2581 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2582 /* Do an implicit RESTORE POINTERS. */ 2583 sc->sc_dp = ecb->daddr; 2584 sc->sc_dleft = ecb->dleft; 2585 sc->sc_state = NCR_CONNECTED; 2586 break; 2587 2588 } else { 2589 2590 printf("%s: unexpected status after select" 2591 ": [intr %x, stat %x, step %x]\n", 2592 sc->sc_dev.dv_xname, 2593 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2594 NCRCMD(sc, NCRCMD_FLUSH); 2595 DELAY(1); 2596 goto reset; 2597 } 2598 if (sc->sc_state == NCR_IDLE) { 2599 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); 2600 return (0); 2601 } 2602 break; 2603 2604 case NCR_CONNECTED: 2605 if ((sc->sc_flags & NCR_ICCS) != 0) { 2606 /* "Initiate Command Complete Steps" in progress */ 2607 u_char msg; 2608 2609 sc->sc_flags &= ~NCR_ICCS; 2610 2611 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2612 printf("%s: ICCS: " 2613 ": [intr %x, stat %x, step %x]\n", 2614 sc->sc_dev.dv_xname, 2615 sc->sc_espintr, sc->sc_espstat, 2616 sc->sc_espstep); 2617 } 2618 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2619 if (sc->sc_imlen < 2) 2620 printf("%s: can't get status, only %d bytes\n", 2621 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2622 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2623 msg = sc->sc_imess[sc->sc_imlen - 1]; 2624 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2625 if (msg == MSG_CMDCOMPLETE) { 2626 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2627 ? 0 : sc->sc_dleft; 2628 if ((ecb->flags & ECB_SENSE) == 0) 2629 ecb->xs->resid = ecb->dleft; 2630 sc->sc_state = NCR_CMDCOMPLETE; 2631 } else 2632 printf("%s: STATUS_PHASE: msg %d\n", 2633 sc->sc_dev.dv_xname, msg); 2634 sc->sc_imlen = 0; 2635 NCRCMD(sc, NCRCMD_MSGOK); 2636 goto shortcut; /* ie. wait for disconnect */ 2637 } 2638 break; 2639 2640 default: 2641 /* Don't panic: reset. */ 2642 printf("%s: invalid state: %d\n", 2643 sc->sc_dev.dv_xname, sc->sc_state); 2644 ncr53c9x_scsi_reset(sc); 2645 goto out; 2646 } 2647 2648 /* 2649 * Driver is now in state NCR_CONNECTED, i.e. we 2650 * have a current command working the SCSI bus. 2651 */ 2652 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2653 panic("ncr53c9x: no nexus"); 2654 } 2655 2656 switch (sc->sc_phase) { 2657 case MESSAGE_OUT_PHASE: 2658 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2659 ncr53c9x_msgout(sc); 2660 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2661 break; 2662 2663 case MESSAGE_IN_PHASE: 2664 msgin: 2665 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2666 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2667 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2668 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2669 NCRCMD(sc, NCRCMD_FLUSH); 2670 } 2671 sc->sc_flags |= NCR_WAITI; 2672 NCRCMD(sc, NCRCMD_TRANS); 2673 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2674 if ((sc->sc_flags & NCR_WAITI) == 0) { 2675 printf("%s: MSGIN: unexpected FC bit: " 2676 "[intr %x, stat %x, step %x]\n", 2677 sc->sc_dev.dv_xname, 2678 sc->sc_espintr, sc->sc_espstat, 2679 sc->sc_espstep); 2680 } 2681 sc->sc_flags &= ~NCR_WAITI; 2682 ncr53c9x_rdfifo(sc, 2683 (sc->sc_prevphase == sc->sc_phase) ? 2684 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2685 ncr53c9x_msgin(sc); 2686 } else { 2687 printf("%s: MSGIN: weird bits: " 2688 "[intr %x, stat %x, step %x]\n", 2689 sc->sc_dev.dv_xname, 2690 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2691 } 2692 sc->sc_prevphase = MESSAGE_IN_PHASE; 2693 goto shortcut; /* i.e. expect data to be ready */ 2694 break; 2695 2696 case COMMAND_PHASE: 2697 /* 2698 * Send the command block. Normally we don't see this 2699 * phase because the SEL_ATN command takes care of 2700 * all this. However, we end up here if either the 2701 * target or we wanted to exchange some more messages 2702 * first (e.g. to start negotiations). 2703 */ 2704 2705 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2706 ecb->cmd.cmd.opcode, ecb->clen)); 2707 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2708 NCRCMD(sc, NCRCMD_FLUSH); 2709 /* DELAY(1);*/ 2710 } 2711 if (sc->sc_features & NCR_F_DMASELECT) { 2712 size_t size; 2713 /* setup DMA transfer for command */ 2714 size = ecb->clen; 2715 sc->sc_cmdlen = size; 2716 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 2717 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2718 0, &size); 2719 /* Program the SCSI counter */ 2720 NCR_SET_COUNT(sc, size); 2721 2722 /* load the count in */ 2723 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2724 2725 /* start the command transfer */ 2726 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2727 NCRDMA_GO(sc); 2728 } else { 2729 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2730 NCRCMD(sc, NCRCMD_TRANS); 2731 } 2732 sc->sc_prevphase = COMMAND_PHASE; 2733 break; 2734 2735 case DATA_OUT_PHASE: 2736 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2737 NCRCMD(sc, NCRCMD_FLUSH); 2738 size = min(sc->sc_dleft, sc->sc_maxxfer); 2739 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2740 sc->sc_prevphase = DATA_OUT_PHASE; 2741 goto setup_xfer; 2742 2743 case DATA_IN_PHASE: 2744 NCR_PHASE(("DATA_IN_PHASE ")); 2745 if (sc->sc_rev == NCR_VARIANT_ESP100) 2746 NCRCMD(sc, NCRCMD_FLUSH); 2747 size = min(sc->sc_dleft, sc->sc_maxxfer); 2748 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2749 sc->sc_prevphase = DATA_IN_PHASE; 2750 setup_xfer: 2751 /* Target returned to data phase: wipe "done" memory */ 2752 ecb->flags &= ~ECB_TENTATIVE_DONE; 2753 2754 /* Program the SCSI counter */ 2755 NCR_SET_COUNT(sc, size); 2756 2757 /* load the count in */ 2758 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2759 2760 /* 2761 * Note that if `size' is 0, we've already transceived 2762 * all the bytes we want but we're still in DATA PHASE. 2763 * Apparently, the device needs padding. Also, a 2764 * transfer size of 0 means "maximum" to the chip 2765 * DMA logic. 2766 */ 2767 NCRCMD(sc, 2768 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2769 NCRDMA_GO(sc); 2770 return (1); 2771 2772 case STATUS_PHASE: 2773 NCR_PHASE(("STATUS_PHASE ")); 2774 sc->sc_flags |= NCR_ICCS; 2775 NCRCMD(sc, NCRCMD_ICCS); 2776 sc->sc_prevphase = STATUS_PHASE; 2777 goto shortcut; /* i.e. expect status results soon */ 2778 break; 2779 2780 case INVALID_PHASE: 2781 break; 2782 2783 default: 2784 printf("%s: unexpected bus phase; resetting\n", 2785 sc->sc_dev.dv_xname); 2786 goto reset; 2787 } 2788 2789 out: 2790 return (1); 2791 2792 reset: 2793 ncr53c9x_init(sc, 1); 2794 goto out; 2795 2796 finish: 2797 ncr53c9x_done(sc, ecb); 2798 goto out; 2799 2800 sched: 2801 sc->sc_state = NCR_IDLE; 2802 ncr53c9x_sched(sc); 2803 goto out; 2804 2805 shortcut: 2806 /* 2807 * The idea is that many of the SCSI operations take very little 2808 * time, and going away and getting interrupted is too high an 2809 * overhead to pay. For example, selecting, sending a message 2810 * and command and then doing some work can be done in one "pass". 2811 * 2812 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2813 * at 40MHz. This needs testing. 2814 */ 2815 { 2816 struct timeval wait, cur; 2817 2818 microtime(&wait); 2819 wait.tv_usec += 50 / sc->sc_freq; 2820 if (wait.tv_usec > 1000000) { 2821 wait.tv_sec++; 2822 wait.tv_usec -= 1000000; 2823 } 2824 do { 2825 if (NCRDMA_ISINTR(sc)) 2826 goto again; 2827 microtime(&cur); 2828 } while (cur.tv_sec <= wait.tv_sec && 2829 cur.tv_usec <= wait.tv_usec); 2830 } 2831 goto out; 2832 } 2833 2834 void 2835 ncr53c9x_abort(sc, ecb) 2836 struct ncr53c9x_softc *sc; 2837 struct ncr53c9x_ecb *ecb; 2838 { 2839 2840 /* 2 secs for the abort */ 2841 ecb->timeout = NCR_ABORT_TIMEOUT; 2842 ecb->flags |= ECB_ABORT; 2843 2844 if (ecb == sc->sc_nexus) { 2845 int timeout; 2846 2847 /* 2848 * If we're still selecting, the message will be scheduled 2849 * after selection is complete. 2850 */ 2851 if (sc->sc_state == NCR_CONNECTED) 2852 ncr53c9x_sched_msgout(SEND_ABORT); 2853 2854 /* 2855 * Reschedule timeout. 2856 */ 2857 timeout = ecb->timeout; 2858 if (timeout > 1000000) 2859 timeout = (timeout / 1000) * hz; 2860 else 2861 timeout = (timeout * hz) / 1000; 2862 callout_reset(&ecb->xs->xs_callout, timeout, 2863 ncr53c9x_timeout, ecb); 2864 } else { 2865 /* 2866 * Just leave the command where it is. 2867 * XXX - what choice do we have but to reset the SCSI 2868 * eventually? 2869 */ 2870 if (sc->sc_state == NCR_IDLE) 2871 ncr53c9x_sched(sc); 2872 } 2873 } 2874 2875 void 2876 ncr53c9x_timeout(arg) 2877 void *arg; 2878 { 2879 struct ncr53c9x_ecb *ecb = arg; 2880 struct scsipi_xfer *xs = ecb->xs; 2881 struct scsipi_periph *periph = xs->xs_periph; 2882 struct ncr53c9x_softc *sc = 2883 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2884 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2885 int s; 2886 2887 scsipi_printaddr(periph); 2888 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2889 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2890 "msg(q %x,o %x) %s>", 2891 sc->sc_dev.dv_xname, 2892 ecb, ecb->flags, ecb->dleft, ecb->stat, 2893 sc->sc_state, sc->sc_nexus, 2894 NCR_READ_REG(sc, NCR_STAT), 2895 sc->sc_phase, sc->sc_prevphase, 2896 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2897 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2898 #if NCR53C9X_DEBUG > 1 2899 printf("TRACE: %s.", ecb->trace); 2900 #endif 2901 2902 s = splbio(); 2903 2904 if (ecb->flags & ECB_ABORT) { 2905 /* abort timed out */ 2906 printf(" AGAIN\n"); 2907 2908 ncr53c9x_init(sc, 1); 2909 } else { 2910 /* abort the operation that has timed out */ 2911 printf("\n"); 2912 xs->error = XS_TIMEOUT; 2913 ncr53c9x_abort(sc, ecb); 2914 2915 /* Disable sync mode if stuck in a data phase */ 2916 if (ecb == sc->sc_nexus && 2917 (ti->flags & T_SYNCMODE) != 0 && 2918 (sc->sc_phase & (MSGI|CDI)) == 0) { 2919 /* XXX ASYNC CALLBACK! */ 2920 scsipi_printaddr(periph); 2921 printf("sync negotiation disabled\n"); 2922 sc->sc_cfflags |= (1 << (periph->periph_target + 8)); 2923 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2924 } 2925 } 2926 2927 splx(s); 2928 } 2929 2930 void 2931 ncr53c9x_watch(arg) 2932 void *arg; 2933 { 2934 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2935 struct ncr53c9x_tinfo *ti; 2936 struct ncr53c9x_linfo *li; 2937 int t, s; 2938 /* Delete any structures that have not been used in 10min. */ 2939 time_t old = time.tv_sec - (10 * 60); 2940 2941 s = splbio(); 2942 for (t = 0; t < NCR_NTARG; t++) { 2943 ti = &sc->sc_tinfo[t]; 2944 li = LIST_FIRST(&ti->luns); 2945 while (li) { 2946 if (li->last_used < old && 2947 li->untagged == NULL && 2948 li->used == 0) { 2949 if (li->lun < NCR_NLUN) 2950 ti->lun[li->lun] = NULL; 2951 LIST_REMOVE(li, link); 2952 free(li, M_DEVBUF); 2953 /* Restart the search at the beginning */ 2954 li = LIST_FIRST(&ti->luns); 2955 continue; 2956 } 2957 li = LIST_NEXT(li, link); 2958 } 2959 } 2960 splx(s); 2961 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2962 } 2963 2964
Indexes created Mon Sep 29 21:09:56 GMT 2025