ncr53c9x.c revision 1.97
1 /* $NetBSD: ncr53c9x.c,v 1.97 2002/09/16 21:49:15 petrov Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.97 2002/09/16 21:49:15 petrov Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/callout.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/malloc.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 #include <sys/pool.h> 94 #include <sys/scsiio.h> 95 96 #include <dev/scsipi/scsi_all.h> 97 #include <dev/scsipi/scsipi_all.h> 98 #include <dev/scsipi/scsiconf.h> 99 #include <dev/scsipi/scsi_message.h> 100 101 #include <dev/ic/ncr53c9xreg.h> 102 #include <dev/ic/ncr53c9xvar.h> 103 104 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 105 #ifdef DEBUG 106 int ncr53c9x_notag = 0; 107 #endif 108 109 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 110 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 111 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 112 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 113 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 114 struct scsipi_xfer *, int); 115 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 116 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 117 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 118 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 119 /*static*/ void ncr53c9x_timeout(void *arg); 120 /*static*/ void ncr53c9x_watch(void *arg); 121 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 122 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 123 struct ncr53c9x_ecb *); 124 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 125 caddr_t, int, struct proc *); 126 127 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 128 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 129 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 130 131 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 132 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 133 struct ncr53c9x_tinfo *); 134 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 135 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 136 int64_t lun); 137 138 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 139 140 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 141 #define NCR_RDFIFO_START 0 142 #define NCR_RDFIFO_CONTINUE 1 143 144 145 #define NCR_SET_COUNT(sc, size) do { \ 146 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 147 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 148 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 149 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 150 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 151 } \ 152 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 153 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 154 } \ 155 } while (0) 156 157 static int ecb_pool_initialized = 0; 158 static struct pool ecb_pool; 159 160 /* 161 * Names for the NCR53c9x variants, correspnding to the variant tags 162 * in ncr53c9xvar.h. 163 */ 164 static const char *ncr53c9x_variant_names[] = { 165 "ESP100", 166 "ESP100A", 167 "ESP200", 168 "NCR53C94", 169 "NCR53C96", 170 "ESP406", 171 "FAS408", 172 "FAS216", 173 "AM53C974", 174 "FAS366/HME", 175 "NCR53C90 (86C01)", 176 }; 177 178 /* 179 * Search linked list for LUN info by LUN id. 180 */ 181 static struct ncr53c9x_linfo * 182 ncr53c9x_lunsearch(ti, lun) 183 struct ncr53c9x_tinfo *ti; 184 int64_t lun; 185 { 186 struct ncr53c9x_linfo *li; 187 LIST_FOREACH(li, &ti->luns, link) 188 if (li->lun == lun) 189 return (li); 190 return (NULL); 191 } 192 193 /* 194 * Attach this instance, and then all the sub-devices 195 */ 196 void 197 ncr53c9x_attach(sc) 198 struct ncr53c9x_softc *sc; 199 { 200 struct scsipi_adapter *adapt = &sc->sc_adapter; 201 struct scsipi_channel *chan = &sc->sc_channel; 202 203 callout_init(&sc->sc_watchdog); 204 /* 205 * Allocate SCSI message buffers. 206 * Front-ends can override allocation to avoid alignment 207 * handling in the DMA engines. Note that that ncr53c9x_msgout() 208 * can request a 1 byte DMA transfer. 209 */ 210 if (sc->sc_omess == NULL) 211 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 212 213 if (sc->sc_imess == NULL) 214 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 215 216 if (sc->sc_omess == NULL || sc->sc_imess == NULL) { 217 printf("out of memory\n"); 218 return; 219 } 220 221 /* 222 * Note, the front-end has set us up to print the chip variation. 223 */ 224 if (sc->sc_rev >= NCR_VARIANT_MAX) { 225 printf("\n%s: unknown variant %d, devices not attached\n", 226 sc->sc_dev.dv_xname, sc->sc_rev); 227 return; 228 } 229 230 printf(": %s, %dMHz, SCSI ID %d\n", 231 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 232 233 /* 234 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 235 * from now on. 236 */ 237 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 238 sc->sc_rev = NCR_VARIANT_ESP100; 239 240 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 241 242 /* The value *must not* be == 1. Make it 2 */ 243 if (sc->sc_ccf == 1) 244 sc->sc_ccf = 2; 245 246 /* 247 * The recommended timeout is 250ms. This register is loaded 248 * with a value calculated as follows, from the docs: 249 * 250 * (timout period) x (CLK frequency) 251 * reg = ------------------------------------- 252 * 8192 x (Clock Conversion Factor) 253 * 254 * Since CCF has a linear relation to CLK, this generally computes 255 * to the constant of 153. 256 */ 257 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 258 259 /* CCF register only has 3 bits; 0 is actually 8 */ 260 sc->sc_ccf &= 7; 261 262 /* 263 * Fill in the scsipi_adapter. 264 */ 265 adapt->adapt_dev = &sc->sc_dev; 266 adapt->adapt_nchannels = 1; 267 adapt->adapt_openings = 256; 268 adapt->adapt_max_periph = 256; 269 adapt->adapt_ioctl = ncr53c9x_ioctl; 270 /* adapt_request initialized by front-end */ 271 /* adapt_minphys initialized by front-end */ 272 273 /* 274 * Fill in the scsipi_channel. 275 */ 276 memset(chan, 0, sizeof(*chan)); 277 chan->chan_adapter = adapt; 278 chan->chan_bustype = &scsi_bustype; 279 chan->chan_channel = 0; 280 chan->chan_ntargets = 8; /* XXX fas has 16(not supported) */ 281 chan->chan_nluns = 8; 282 chan->chan_id = sc->sc_id; 283 284 /* 285 * Add reference to adapter so that we drop the reference after 286 * config_found() to make sure the adatper is disabled. 287 */ 288 if (scsipi_adapter_addref(adapt) != 0) { 289 printf("%s: unable to enable controller\n", 290 sc->sc_dev.dv_xname); 291 return; 292 } 293 294 /* Reset state & bus */ 295 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags; 296 sc->sc_state = 0; 297 ncr53c9x_init(sc, 1); 298 299 /* 300 * Now try to attach all the sub-devices 301 */ 302 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 303 304 scsipi_adapter_delref(adapt); 305 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc); 306 } 307 308 int 309 ncr53c9x_detach(sc, flags) 310 struct ncr53c9x_softc *sc; 311 int flags; 312 { 313 int error; 314 315 if (sc->sc_child) { 316 error = config_detach(sc->sc_child, flags); 317 if (error) 318 return (error); 319 } 320 321 free(sc->sc_imess, M_DEVBUF); 322 free(sc->sc_omess, M_DEVBUF); 323 324 return (0); 325 } 326 327 /* 328 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 329 * only this controller, but kills any on-going commands, and also stops 330 * and resets the DMA. 331 * 332 * After reset, registers are loaded with the defaults from the attach 333 * routine above. 334 */ 335 void 336 ncr53c9x_reset(sc) 337 struct ncr53c9x_softc *sc; 338 { 339 340 /* reset DMA first */ 341 NCRDMA_RESET(sc); 342 343 /* reset SCSI chip */ 344 NCRCMD(sc, NCRCMD_RSTCHIP); 345 NCRCMD(sc, NCRCMD_NOP); 346 DELAY(500); 347 348 /* do these backwards, and fall through */ 349 switch (sc->sc_rev) { 350 case NCR_VARIANT_ESP406: 351 case NCR_VARIANT_FAS408: 352 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 353 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 354 case NCR_VARIANT_AM53C974: 355 case NCR_VARIANT_FAS216: 356 case NCR_VARIANT_NCR53C94: 357 case NCR_VARIANT_NCR53C96: 358 case NCR_VARIANT_ESP200: 359 sc->sc_features |= NCR_F_HASCFG3; 360 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 361 case NCR_VARIANT_ESP100A: 362 sc->sc_features |= NCR_F_SELATN3; 363 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 364 case NCR_VARIANT_ESP100: 365 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 366 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 367 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 368 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 369 break; 370 371 case NCR_VARIANT_FAS366: 372 sc->sc_features |= 373 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 374 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 375 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 376 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 377 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 378 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 379 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 380 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 381 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 382 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 383 break; 384 385 default: 386 printf("%s: unknown revision code, assuming ESP100\n", 387 sc->sc_dev.dv_xname); 388 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 389 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 390 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 391 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 392 } 393 394 if (sc->sc_rev == NCR_VARIANT_AM53C974) 395 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 396 397 #if 0 398 printf("%s: ncr53c9x_reset: revision %d\n", 399 sc->sc_dev.dv_xname, sc->sc_rev); 400 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 401 "ccf 0x%x, timeout 0x%x\n", 402 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 403 sc->sc_ccf, sc->sc_timeout); 404 #endif 405 } 406 407 /* 408 * Reset the SCSI bus, but not the chip 409 */ 410 void 411 ncr53c9x_scsi_reset(sc) 412 struct ncr53c9x_softc *sc; 413 { 414 415 (*sc->sc_glue->gl_dma_stop)(sc); 416 417 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 418 NCRCMD(sc, NCRCMD_RSTSCSI); 419 } 420 421 /* 422 * Initialize ncr53c9x state machine 423 */ 424 void 425 ncr53c9x_init(sc, doreset) 426 struct ncr53c9x_softc *sc; 427 int doreset; 428 { 429 struct ncr53c9x_ecb *ecb; 430 struct ncr53c9x_linfo *li; 431 int i, r; 432 433 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 434 435 if (!ecb_pool_initialized) { 436 /* All instances share this pool */ 437 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 438 "ncr53c9x_ecb", NULL); 439 ecb_pool_initialized = 1; 440 } 441 442 if (sc->sc_state == 0) { 443 /* First time through; initialize. */ 444 445 TAILQ_INIT(&sc->ready_list); 446 sc->sc_nexus = NULL; 447 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 448 for (r = 0; r < NCR_NTARG; r++) { 449 LIST_INIT(&sc->sc_tinfo[r].luns); 450 } 451 } else { 452 /* Cancel any active commands. */ 453 sc->sc_state = NCR_CLEANING; 454 sc->sc_msgify = 0; 455 if ((ecb = sc->sc_nexus) != NULL) { 456 ecb->xs->error = XS_TIMEOUT; 457 ncr53c9x_done(sc, ecb); 458 } 459 /* Cancel outstanding disconnected commands on each LUN */ 460 for (r = 0; r < 8; r++) { 461 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 462 if ((ecb = li->untagged) != NULL) { 463 li->untagged = NULL; 464 /* 465 * XXXXXXX 466 * 467 * Should we terminate a command 468 * that never reached the disk? 469 */ 470 li->busy = 0; 471 ecb->xs->error = XS_TIMEOUT; 472 ncr53c9x_done(sc, ecb); 473 } 474 for (i = 0; i < 256; i++) 475 if ((ecb = li->queued[i])) { 476 li->queued[i] = NULL; 477 ecb->xs->error = XS_TIMEOUT; 478 ncr53c9x_done(sc, ecb); 479 } 480 li->used = 0; 481 } 482 } 483 } 484 485 /* 486 * reset the chip to a known state 487 */ 488 ncr53c9x_reset(sc); 489 490 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 491 for (r = 0; r < 8; r++) { 492 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 493 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 494 495 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8)))) 496 ? 0 : T_SYNCHOFF) | 497 ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0); 498 #ifdef DEBUG 499 if (ncr53c9x_notag) 500 ti->flags &= ~T_TAG; 501 #endif 502 ti->period = sc->sc_minsync; 503 ti->offset = 0; 504 ti->cfg3 = 0; 505 506 ncr53c9x_update_xfer_mode(sc, r); 507 } 508 509 if (doreset) { 510 sc->sc_state = NCR_SBR; 511 NCRCMD(sc, NCRCMD_RSTSCSI); 512 } else { 513 sc->sc_state = NCR_IDLE; 514 ncr53c9x_sched(sc); 515 } 516 } 517 518 /* 519 * Read the NCR registers, and save their contents for later use. 520 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 521 * NCR_INTR - so make sure it is the last read. 522 * 523 * I think that (from reading the docs) most bits in these registers 524 * only make sense when he DMA CSR has an interrupt showing. Call only 525 * if an interrupt is pending. 526 */ 527 __inline__ void 528 ncr53c9x_readregs(sc) 529 struct ncr53c9x_softc *sc; 530 { 531 532 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 533 /* Only the stepo bits are of interest */ 534 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 535 536 if (sc->sc_rev == NCR_VARIANT_FAS366) 537 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 538 539 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 540 541 if (sc->sc_glue->gl_clear_latched_intr != NULL) 542 (*sc->sc_glue->gl_clear_latched_intr)(sc); 543 544 /* 545 * Determine the SCSI bus phase, return either a real SCSI bus phase 546 * or some pseudo phase we use to detect certain exceptions. 547 */ 548 549 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 550 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 551 552 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 553 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 554 } 555 556 /* 557 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 558 */ 559 static inline int 560 ncr53c9x_stp2cpb(sc, period) 561 struct ncr53c9x_softc *sc; 562 int period; 563 { 564 int v; 565 v = (sc->sc_freq * period) / 250; 566 if (ncr53c9x_cpb2stp(sc, v) < period) 567 /* Correct round-down error */ 568 v++; 569 return (v); 570 } 571 572 static inline void 573 ncr53c9x_setsync(sc, ti) 574 struct ncr53c9x_softc *sc; 575 struct ncr53c9x_tinfo *ti; 576 { 577 u_char syncoff, synctp; 578 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 579 580 if (ti->flags & T_SYNCMODE) { 581 syncoff = ti->offset; 582 synctp = ncr53c9x_stp2cpb(sc, ti->period); 583 if (sc->sc_features & NCR_F_FASTSCSI) { 584 /* 585 * If the period is 200ns or less (ti->period <= 50), 586 * put the chip in Fast SCSI mode. 587 */ 588 if (ti->period <= 50) 589 /* 590 * There are (at least) 4 variations of the 591 * configuration 3 register. The drive attach 592 * routine sets the appropriate bit to put the 593 * chip into Fast SCSI mode so that it doesn't 594 * have to be figured out here each time. 595 */ 596 cfg3 |= sc->sc_cfg3_fscsi; 597 } 598 599 /* 600 * Am53c974 requires different SYNCTP values when the 601 * FSCSI bit is off. 602 */ 603 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 604 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 605 synctp--; 606 } else { 607 syncoff = 0; 608 synctp = 0; 609 } 610 611 if (sc->sc_features & NCR_F_HASCFG3) 612 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 613 614 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 615 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 616 } 617 618 /* 619 * Send a command to a target, set the driver state to NCR_SELECTING 620 * and let the caller take care of the rest. 621 * 622 * Keeping this as a function allows me to say that this may be done 623 * by DMA instead of programmed I/O soon. 624 */ 625 void 626 ncr53c9x_select(sc, ecb) 627 struct ncr53c9x_softc *sc; 628 struct ncr53c9x_ecb *ecb; 629 { 630 struct scsipi_periph *periph = ecb->xs->xs_periph; 631 int target = periph->periph_target; 632 int lun = periph->periph_lun; 633 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 634 int tiflags = ti->flags; 635 u_char *cmd; 636 int clen; 637 int selatn3, selatns; 638 size_t dmasize; 639 640 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 641 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 642 643 sc->sc_state = NCR_SELECTING; 644 /* 645 * Schedule the timeout now, the first time we will go away 646 * expecting to come back due to an interrupt, because it is 647 * always possible that the interrupt may never happen. 648 */ 649 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 650 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 651 ncr53c9x_timeout, ecb); 652 } 653 654 /* 655 * The docs say the target register is never reset, and I 656 * can't think of a better place to set it 657 */ 658 if (sc->sc_rev == NCR_VARIANT_FAS366) { 659 NCRCMD(sc, NCRCMD_FLUSH); 660 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 661 } else { 662 NCR_WRITE_REG(sc, NCR_SELID, target); 663 } 664 ncr53c9x_setsync(sc, ti); 665 666 if ((ecb->flags & ECB_SENSE) != 0) { 667 /* 668 * For REQUEST SENSE, we should not send an IDENTIFY or 669 * otherwise mangle the target. There should be no MESSAGE IN 670 * phase. 671 */ 672 if (sc->sc_features & NCR_F_DMASELECT) { 673 /* setup DMA transfer for command */ 674 dmasize = clen = ecb->clen; 675 sc->sc_cmdlen = clen; 676 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 677 678 /* Program the SCSI counter */ 679 NCR_SET_COUNT(sc, dmasize); 680 681 if (sc->sc_rev != NCR_VARIANT_FAS366) 682 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 683 684 /* And get the targets attention */ 685 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 686 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 687 &dmasize); 688 NCRDMA_GO(sc); 689 } else { 690 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 691 NCRCMD(sc, NCRCMD_SELNATN); 692 } 693 return; 694 } 695 696 selatn3 = selatns = 0; 697 if (ecb->tag[0] != 0) { 698 if (sc->sc_features & NCR_F_SELATN3) 699 /* use SELATN3 to send tag messages */ 700 selatn3 = 1; 701 else 702 /* We don't have SELATN3; use SELATNS to send tags */ 703 selatns = 1; 704 } 705 706 if (ti->flags & T_NEGOTIATE) { 707 /* We have to use SELATNS to send sync/wide messages */ 708 selatn3 = 0; 709 selatns = 1; 710 } 711 712 cmd = (u_char *)&ecb->cmd.cmd; 713 714 if (selatn3) { 715 /* We'll use tags with SELATN3 */ 716 clen = ecb->clen + 3; 717 cmd -= 3; 718 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 719 cmd[1] = ecb->tag[0]; /* msg[1] */ 720 cmd[2] = ecb->tag[1]; /* msg[2] */ 721 } else { 722 /* We don't have tags, or will send messages with SELATNS */ 723 clen = ecb->clen + 1; 724 cmd -= 1; 725 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 726 } 727 728 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 729 730 /* setup DMA transfer for command */ 731 dmasize = clen; 732 sc->sc_cmdlen = clen; 733 sc->sc_cmdp = cmd; 734 735 /* Program the SCSI counter */ 736 NCR_SET_COUNT(sc, dmasize); 737 738 /* load the count in */ 739 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 740 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 741 742 /* And get the targets attention */ 743 if (selatn3) { 744 sc->sc_msgout = SEND_TAG; 745 sc->sc_flags |= NCR_ATN; 746 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 747 } else 748 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 749 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 750 NCRDMA_GO(sc); 751 return; 752 } 753 754 /* 755 * Who am I. This is where we tell the target that we are 756 * happy for it to disconnect etc. 757 */ 758 759 /* Now get the command into the FIFO */ 760 ncr53c9x_wrfifo(sc, cmd, clen); 761 762 /* And get the targets attention */ 763 if (selatns) { 764 NCR_MSGS(("SELATNS \n")); 765 /* Arbitrate, select and stop after IDENTIFY message */ 766 NCRCMD(sc, NCRCMD_SELATNS); 767 } else if (selatn3) { 768 sc->sc_msgout = SEND_TAG; 769 sc->sc_flags |= NCR_ATN; 770 NCRCMD(sc, NCRCMD_SELATN3); 771 } else 772 NCRCMD(sc, NCRCMD_SELATN); 773 } 774 775 void 776 ncr53c9x_free_ecb(sc, ecb) 777 struct ncr53c9x_softc *sc; 778 struct ncr53c9x_ecb *ecb; 779 { 780 int s; 781 782 s = splbio(); 783 ecb->flags = 0; 784 pool_put(&ecb_pool, (void *)ecb); 785 splx(s); 786 return; 787 } 788 789 struct ncr53c9x_ecb * 790 ncr53c9x_get_ecb(sc, flags) 791 struct ncr53c9x_softc *sc; 792 int flags; 793 { 794 struct ncr53c9x_ecb *ecb; 795 int s; 796 797 s = splbio(); 798 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 799 splx(s); 800 if (ecb) { 801 memset(ecb, 0, sizeof(*ecb)); 802 ecb->flags |= ECB_ALLOC; 803 } 804 return (ecb); 805 } 806 807 /* 808 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 809 */ 810 811 /* 812 * Start a SCSI-command 813 * This function is called by the higher level SCSI-driver to queue/run 814 * SCSI-commands. 815 */ 816 817 void 818 ncr53c9x_scsipi_request(chan, req, arg) 819 struct scsipi_channel *chan; 820 scsipi_adapter_req_t req; 821 void *arg; 822 { 823 struct scsipi_xfer *xs; 824 struct scsipi_periph *periph; 825 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 826 struct ncr53c9x_ecb *ecb; 827 int s, flags; 828 829 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 830 831 switch (req) { 832 case ADAPTER_REQ_RUN_XFER: 833 xs = arg; 834 periph = xs->xs_periph; 835 flags = xs->xs_control; 836 837 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 838 periph->periph_target)); 839 840 /* Get an ECB to use. */ 841 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 842 /* 843 * This should never happen as we track resources 844 * in the mid-layer. 845 */ 846 if (ecb == NULL) { 847 scsipi_printaddr(periph); 848 printf("unable to allocate ecb\n"); 849 xs->error = XS_RESOURCE_SHORTAGE; 850 scsipi_done(xs); 851 return; 852 } 853 854 /* Initialize ecb */ 855 ecb->xs = xs; 856 ecb->timeout = xs->timeout; 857 858 if (flags & XS_CTL_RESET) { 859 ecb->flags |= ECB_RESET; 860 ecb->clen = 0; 861 ecb->dleft = 0; 862 } else { 863 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 864 ecb->clen = xs->cmdlen; 865 ecb->daddr = xs->data; 866 ecb->dleft = xs->datalen; 867 } 868 ecb->stat = 0; 869 870 s = splbio(); 871 872 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 873 ecb->flags |= ECB_READY; 874 if (sc->sc_state == NCR_IDLE) 875 ncr53c9x_sched(sc); 876 877 splx(s); 878 879 if ((flags & XS_CTL_POLL) == 0) 880 return; 881 882 /* Not allowed to use interrupts, use polling instead */ 883 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 884 ncr53c9x_timeout(ecb); 885 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 886 ncr53c9x_timeout(ecb); 887 } 888 return; 889 890 case ADAPTER_REQ_GROW_RESOURCES: 891 /* XXX Not supported. */ 892 return; 893 894 case ADAPTER_REQ_SET_XFER_MODE: 895 { 896 struct ncr53c9x_tinfo *ti; 897 struct scsipi_xfer_mode *xm = arg; 898 899 ti = &sc->sc_tinfo[xm->xm_target]; 900 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 901 ti->period = 0; 902 ti->offset = 0; 903 904 if ((sc->sc_cfflags & (1<<(xm->xm_target+16))) == 0 && 905 (xm->xm_mode & PERIPH_CAP_TQING)) { 906 NCR_MISC(("%s: target %d: tagged queuing\n", 907 sc->sc_dev.dv_xname, xm->xm_target)); 908 ti->flags |= T_TAG; 909 } else 910 ti->flags &= ~T_TAG; 911 912 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 913 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 914 sc->sc_dev.dv_xname, xm->xm_target)); 915 if (sc->sc_rev == NCR_VARIANT_FAS366) { 916 ti->flags |= T_WIDE; 917 ti->width = 1; 918 } 919 } 920 921 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 922 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 923 NCR_MISC(("%s: target %d: sync negotiation\n", 924 sc->sc_dev.dv_xname, xm->xm_target)); 925 ti->flags |= T_NEGOTIATE; 926 ti->period = sc->sc_minsync; 927 } 928 /* 929 * If we're not going to negotiate, send the notification 930 * now, since it won't happen later. 931 */ 932 if ((ti->flags & T_NEGOTIATE) == 0) 933 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 934 return; 935 } 936 } 937 } 938 939 void 940 ncr53c9x_update_xfer_mode(sc, target) 941 struct ncr53c9x_softc *sc; 942 int target; 943 { 944 struct scsipi_xfer_mode xm; 945 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 946 947 xm.xm_target = target; 948 xm.xm_mode = 0; 949 xm.xm_period = 0; 950 xm.xm_offset = 0; 951 952 if (ti->flags & T_SYNCMODE) { 953 xm.xm_mode |= PERIPH_CAP_SYNC; 954 xm.xm_period = ti->period; 955 xm.xm_offset = ti->offset; 956 } 957 if (ti->width) 958 xm.xm_mode |= PERIPH_CAP_WIDE16; 959 960 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 961 xm.xm_mode |= PERIPH_CAP_TQING; 962 963 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 964 } 965 966 /* 967 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 968 */ 969 int 970 ncr53c9x_poll(sc, xs, count) 971 struct ncr53c9x_softc *sc; 972 struct scsipi_xfer *xs; 973 int count; 974 { 975 976 NCR_TRACE(("[ncr53c9x_poll] ")); 977 while (count) { 978 if (NCRDMA_ISINTR(sc)) { 979 ncr53c9x_intr(sc); 980 } 981 #if alternatively 982 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 983 ncr53c9x_intr(sc); 984 #endif 985 if ((xs->xs_status & XS_STS_DONE) != 0) 986 return (0); 987 if (sc->sc_state == NCR_IDLE) { 988 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 989 ncr53c9x_sched(sc); 990 } 991 DELAY(1000); 992 count--; 993 } 994 return (1); 995 } 996 997 int 998 ncr53c9x_ioctl(chan, cmd, arg, flag, p) 999 struct scsipi_channel *chan; 1000 u_long cmd; 1001 caddr_t arg; 1002 int flag; 1003 struct proc *p; 1004 { 1005 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1006 int s, error = 0; 1007 1008 switch (cmd) { 1009 case SCBUSIORESET: 1010 s = splbio(); 1011 ncr53c9x_scsi_reset(sc); 1012 splx(s); 1013 break; 1014 default: 1015 error = ENOTTY; 1016 break; 1017 } 1018 return (error); 1019 } 1020 1021 1022 /* 1023 * LOW LEVEL SCSI UTILITIES 1024 */ 1025 1026 /* 1027 * Schedule a scsi operation. This has now been pulled out of the interrupt 1028 * handler so that we may call it from ncr53c9x_scsipi_request and 1029 * ncr53c9x_done. This may save us an unecessary interrupt just to get 1030 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1031 */ 1032 void 1033 ncr53c9x_sched(sc) 1034 struct ncr53c9x_softc *sc; 1035 { 1036 struct ncr53c9x_ecb *ecb; 1037 struct scsipi_periph *periph; 1038 struct ncr53c9x_tinfo *ti; 1039 int lun; 1040 struct ncr53c9x_linfo *li; 1041 int s, tag; 1042 1043 NCR_TRACE(("[ncr53c9x_sched] ")); 1044 if (sc->sc_state != NCR_IDLE) 1045 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1046 1047 /* 1048 * Find first ecb in ready queue that is for a target/lunit 1049 * combinations that is not busy. 1050 */ 1051 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1052 ecb = TAILQ_NEXT(ecb, chain)) { 1053 periph = ecb->xs->xs_periph; 1054 ti = &sc->sc_tinfo[periph->periph_target]; 1055 lun = periph->periph_lun; 1056 1057 /* Select type of tag for this command */ 1058 if ((ti->flags & (T_RSELECTOFF)) != 0) 1059 tag = 0; 1060 else if ((ti->flags & (T_TAG)) == 0) 1061 tag = 0; 1062 else if ((ecb->flags & ECB_SENSE) != 0) 1063 tag = 0; 1064 else 1065 tag = ecb->xs->xs_tag_type; 1066 #if 0 1067 /* XXXX Use tags for polled commands? */ 1068 if (ecb->xs->xs_control & XS_CTL_POLL) 1069 tag = 0; 1070 #endif 1071 1072 s = splbio(); 1073 li = TINFO_LUN(ti, lun); 1074 if (li == NULL) { 1075 /* Initialize LUN info and add to list. */ 1076 if ((li = malloc(sizeof(*li), 1077 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) { 1078 splx(s); 1079 continue; 1080 } 1081 li->lun = lun; 1082 1083 LIST_INSERT_HEAD(&ti->luns, li, link); 1084 if (lun < NCR_NLUN) 1085 ti->lun[lun] = li; 1086 } 1087 li->last_used = time.tv_sec; 1088 if (tag == 0) { 1089 /* Try to issue this as an un-tagged command */ 1090 if (li->untagged == NULL) 1091 li->untagged = ecb; 1092 } 1093 if (li->untagged != NULL) { 1094 tag = 0; 1095 if ((li->busy != 1) && li->used == 0) { 1096 /* We need to issue this untagged command now */ 1097 ecb = li->untagged; 1098 periph = ecb->xs->xs_periph; 1099 } else { 1100 /* Not ready yet */ 1101 splx(s); 1102 continue; 1103 } 1104 } 1105 ecb->tag[0] = tag; 1106 if (tag != 0) { 1107 li->queued[ecb->xs->xs_tag_id] = ecb; 1108 ecb->tag[1] = ecb->xs->xs_tag_id; 1109 li->used++; 1110 } 1111 splx(s); 1112 if (li->untagged != NULL && (li->busy != 1)) { 1113 li->busy = 1; 1114 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1115 ecb->flags &= ~ECB_READY; 1116 sc->sc_nexus = ecb; 1117 ncr53c9x_select(sc, ecb); 1118 break; 1119 } 1120 if (li->untagged == NULL && tag != 0) { 1121 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1122 ecb->flags &= ~ECB_READY; 1123 sc->sc_nexus = ecb; 1124 ncr53c9x_select(sc, ecb); 1125 break; 1126 } else 1127 NCR_TRACE(("%d:%d busy\n", 1128 periph->periph_target, 1129 periph->periph_lun)); 1130 } 1131 } 1132 1133 void 1134 ncr53c9x_sense(sc, ecb) 1135 struct ncr53c9x_softc *sc; 1136 struct ncr53c9x_ecb *ecb; 1137 { 1138 struct scsipi_xfer *xs = ecb->xs; 1139 struct scsipi_periph *periph = xs->xs_periph; 1140 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1141 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd; 1142 struct ncr53c9x_linfo *li; 1143 int lun = periph->periph_lun; 1144 1145 NCR_TRACE(("requesting sense ")); 1146 /* Next, setup a request sense command block */ 1147 memset(ss, 0, sizeof(*ss)); 1148 ss->opcode = REQUEST_SENSE; 1149 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1150 ss->length = sizeof(struct scsipi_sense_data); 1151 ecb->clen = sizeof(*ss); 1152 ecb->daddr = (char *)&xs->sense.scsi_sense; 1153 ecb->dleft = sizeof(struct scsipi_sense_data); 1154 ecb->flags |= ECB_SENSE; 1155 ecb->timeout = NCR_SENSE_TIMEOUT; 1156 ti->senses++; 1157 li = TINFO_LUN(ti, lun); 1158 if (li->busy) 1159 li->busy = 0; 1160 ncr53c9x_dequeue(sc, ecb); 1161 li->untagged = ecb; /* must be executed first to fix C/A */ 1162 li->busy = 2; 1163 if (ecb == sc->sc_nexus) { 1164 ncr53c9x_select(sc, ecb); 1165 } else { 1166 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1167 ecb->flags |= ECB_READY; 1168 if (sc->sc_state == NCR_IDLE) 1169 ncr53c9x_sched(sc); 1170 } 1171 } 1172 1173 /* 1174 * POST PROCESSING OF SCSI_CMD (usually current) 1175 */ 1176 void 1177 ncr53c9x_done(sc, ecb) 1178 struct ncr53c9x_softc *sc; 1179 struct ncr53c9x_ecb *ecb; 1180 { 1181 struct scsipi_xfer *xs = ecb->xs; 1182 struct scsipi_periph *periph = xs->xs_periph; 1183 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1184 int lun = periph->periph_lun; 1185 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1186 1187 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1188 1189 callout_stop(&ecb->xs->xs_callout); 1190 1191 /* 1192 * Now, if we've come here with no error code, i.e. we've kept the 1193 * initial XS_NOERROR, and the status code signals that we should 1194 * check sense, we'll need to set up a request sense cmd block and 1195 * push the command back into the ready queue *before* any other 1196 * commands for this target/lunit, else we lose the sense info. 1197 * We don't support chk sense conditions for the request sense cmd. 1198 */ 1199 if (xs->error == XS_NOERROR) { 1200 xs->status = ecb->stat; 1201 if ((ecb->flags & ECB_ABORT) != 0) { 1202 xs->error = XS_TIMEOUT; 1203 } else if ((ecb->flags & ECB_SENSE) != 0) { 1204 xs->error = XS_SENSE; 1205 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1206 /* First, save the return values */ 1207 xs->resid = ecb->dleft; 1208 ncr53c9x_sense(sc, ecb); 1209 return; 1210 } else { 1211 xs->resid = ecb->dleft; 1212 } 1213 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1214 xs->error = XS_BUSY; 1215 } 1216 1217 #ifdef NCR53C9X_DEBUG 1218 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1219 if (xs->resid != 0) 1220 printf("resid=%d ", xs->resid); 1221 if (xs->error == XS_SENSE) 1222 printf("sense=0x%02x\n", 1223 xs->sense.scsi_sense.error_code); 1224 else 1225 printf("error=%d\n", xs->error); 1226 } 1227 #endif 1228 1229 /* 1230 * Remove the ECB from whatever queue it's on. 1231 */ 1232 ncr53c9x_dequeue(sc, ecb); 1233 if (ecb == sc->sc_nexus) { 1234 sc->sc_nexus = NULL; 1235 if (sc->sc_state != NCR_CLEANING) { 1236 sc->sc_state = NCR_IDLE; 1237 ncr53c9x_sched(sc); 1238 } 1239 } 1240 1241 if (xs->error == XS_SELTIMEOUT) { 1242 /* Selection timeout -- discard this LUN if empty */ 1243 if (li->untagged == NULL && li->used == 0) { 1244 if (lun < NCR_NLUN) 1245 ti->lun[lun] = NULL; 1246 LIST_REMOVE(li, link); 1247 free(li, M_DEVBUF); 1248 } 1249 } 1250 1251 ncr53c9x_free_ecb(sc, ecb); 1252 ti->cmds++; 1253 scsipi_done(xs); 1254 } 1255 1256 void 1257 ncr53c9x_dequeue(sc, ecb) 1258 struct ncr53c9x_softc *sc; 1259 struct ncr53c9x_ecb *ecb; 1260 { 1261 struct ncr53c9x_tinfo *ti = 1262 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1263 struct ncr53c9x_linfo *li; 1264 int64_t lun = ecb->xs->xs_periph->periph_lun; 1265 1266 li = TINFO_LUN(ti, lun); 1267 #ifdef DIAGNOSTIC 1268 if (li == NULL || li->lun != lun) 1269 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist\n", 1270 (long long) lun, ecb); 1271 #endif 1272 if (li->untagged == ecb) { 1273 li->busy = 0; 1274 li->untagged = NULL; 1275 } 1276 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1277 #ifdef DIAGNOSTIC 1278 if (li->queued[ecb->tag[1]] != NULL && 1279 (li->queued[ecb->tag[1]] != ecb)) 1280 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1281 "instead of ecb %p\n", ecb->tag[1], 1282 (long long) lun, 1283 li->queued[ecb->tag[1]], ecb); 1284 #endif 1285 li->queued[ecb->tag[1]] = NULL; 1286 li->used--; 1287 } 1288 1289 if ((ecb->flags & ECB_READY) != 0) { 1290 ecb->flags &= ~ECB_READY; 1291 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1292 } 1293 } 1294 1295 /* 1296 * INTERRUPT/PROTOCOL ENGINE 1297 */ 1298 1299 /* 1300 * Schedule an outgoing message by prioritizing it, and asserting 1301 * attention on the bus. We can only do this when we are the initiator 1302 * else there will be an illegal command interrupt. 1303 */ 1304 #define ncr53c9x_sched_msgout(m) \ 1305 do { \ 1306 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1307 NCRCMD(sc, NCRCMD_SETATN); \ 1308 sc->sc_flags |= NCR_ATN; \ 1309 sc->sc_msgpriq |= (m); \ 1310 } while (0) 1311 1312 static void 1313 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1314 { 1315 NCR_TRACE(("[flushfifo] ")); 1316 1317 NCRCMD(sc, NCRCMD_FLUSH); 1318 1319 if (sc->sc_phase == COMMAND_PHASE || 1320 sc->sc_phase == MESSAGE_OUT_PHASE) 1321 DELAY(2); 1322 } 1323 1324 static int 1325 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1326 { 1327 int i, n; 1328 u_char *buf; 1329 1330 switch(how) { 1331 case NCR_RDFIFO_START: 1332 buf = sc->sc_imess; 1333 sc->sc_imlen = 0; 1334 break; 1335 case NCR_RDFIFO_CONTINUE: 1336 buf = sc->sc_imess + sc->sc_imlen; 1337 break; 1338 default: 1339 panic("ncr53c9x_rdfifo: bad flag\n"); 1340 break; 1341 } 1342 1343 /* 1344 * XXX buffer (sc_imess) size for message 1345 */ 1346 1347 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1348 1349 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1350 n *= 2; 1351 1352 for (i = 0; i < n; i++) 1353 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1354 1355 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1356 1357 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1358 buf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1359 1360 NCR_READ_REG(sc, NCR_FIFO); 1361 1362 ncr53c9x_flushfifo(sc); 1363 } 1364 } else { 1365 for (i = 0; i < n; i++) 1366 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1367 } 1368 1369 sc->sc_imlen += i; 1370 1371 #if 0 1372 #ifdef NCR53C9X_DEBUG 1373 { 1374 int j; 1375 1376 NCR_TRACE(("\n[rdfifo %s (%d):", 1377 (how == NCR_RDFIFO_START) ? "start" : "cont", 1378 (int)sc->sc_imlen)); 1379 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1380 for (j = 0; j < sc->sc_imlen; j++) 1381 printf(" %02x", sc->sc_imess[j]); 1382 printf("]\n"); 1383 } 1384 } 1385 #endif 1386 #endif 1387 return sc->sc_imlen; 1388 } 1389 1390 static void 1391 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1392 { 1393 int i; 1394 1395 #ifdef NCR53C9X_DEBUG 1396 NCR_MSGS(("[wrfifo(%d):", len)); 1397 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1398 for (i = 0; i < len; i++) 1399 printf(" %02x", p[i]); 1400 printf("]\n"); 1401 } 1402 #endif 1403 1404 for (i = 0; i < len; i++) { 1405 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1406 1407 if (sc->sc_rev == NCR_VARIANT_FAS366) 1408 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1409 } 1410 } 1411 1412 int 1413 ncr53c9x_reselect(sc, message, tagtype, tagid) 1414 struct ncr53c9x_softc *sc; 1415 int message; 1416 int tagtype, tagid; 1417 { 1418 u_char selid, target, lun; 1419 struct ncr53c9x_ecb *ecb = NULL; 1420 struct ncr53c9x_tinfo *ti; 1421 struct ncr53c9x_linfo *li; 1422 1423 1424 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1425 target = sc->sc_selid; 1426 } else { 1427 /* 1428 * The SCSI chip made a snapshot of the data bus 1429 * while the reselection was being negotiated. 1430 * This enables us to determine which target did 1431 * the reselect. 1432 */ 1433 selid = sc->sc_selid & ~(1 << sc->sc_id); 1434 if (selid & (selid - 1)) { 1435 printf("%s: reselect with invalid selid %02x;" 1436 " sending DEVICE RESET\n", 1437 sc->sc_dev.dv_xname, selid); 1438 goto reset; 1439 } 1440 1441 target = ffs(selid) - 1; 1442 } 1443 lun = message & 0x07; 1444 1445 /* 1446 * Search wait queue for disconnected cmd 1447 * The list should be short, so I haven't bothered with 1448 * any more sophisticated structures than a simple 1449 * singly linked list. 1450 */ 1451 ti = &sc->sc_tinfo[target]; 1452 li = TINFO_LUN(ti, lun); 1453 1454 /* 1455 * We can get as far as the LUN with the IDENTIFY 1456 * message. Check to see if we're running an 1457 * un-tagged command. Otherwise ack the IDENTIFY 1458 * and wait for a tag message. 1459 */ 1460 if (li != NULL) { 1461 if (li->untagged != NULL && li->busy) 1462 ecb = li->untagged; 1463 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1464 /* Wait for tag to come by */ 1465 sc->sc_state = NCR_IDENTIFIED; 1466 return (0); 1467 } else if (tagtype) 1468 ecb = li->queued[tagid]; 1469 } 1470 if (ecb == NULL) { 1471 printf("%s: reselect from target %d lun %d tag %x:%x " 1472 "with no nexus; sending ABORT\n", 1473 sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1474 goto abort; 1475 } 1476 1477 /* Make this nexus active again. */ 1478 sc->sc_state = NCR_CONNECTED; 1479 sc->sc_nexus = ecb; 1480 ncr53c9x_setsync(sc, ti); 1481 1482 if (ecb->flags & ECB_RESET) 1483 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1484 else if (ecb->flags & ECB_ABORT) 1485 ncr53c9x_sched_msgout(SEND_ABORT); 1486 1487 /* Do an implicit RESTORE POINTERS. */ 1488 sc->sc_dp = ecb->daddr; 1489 sc->sc_dleft = ecb->dleft; 1490 1491 return (0); 1492 1493 reset: 1494 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1495 return (1); 1496 1497 abort: 1498 ncr53c9x_sched_msgout(SEND_ABORT); 1499 return (1); 1500 } 1501 1502 static inline int 1503 __verify_msg_format(u_char *p, int len) 1504 { 1505 1506 if (len == 1 && MSG_IS1BYTE(p[0])) 1507 return 1; 1508 if (len == 2 && MSG_IS2BYTE(p[0])) 1509 return 1; 1510 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1511 len == p[1] + 2) 1512 return 1; 1513 1514 return 0; 1515 } 1516 1517 /* 1518 * Get an incoming message as initiator. 1519 * 1520 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1521 * byte in the FIFO 1522 */ 1523 void 1524 ncr53c9x_msgin(sc) 1525 struct ncr53c9x_softc *sc; 1526 { 1527 1528 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1529 1530 if (sc->sc_imlen == 0) { 1531 printf("%s: msgin: no msg byte available\n", 1532 sc->sc_dev.dv_xname); 1533 return; 1534 } 1535 1536 /* 1537 * Prepare for a new message. A message should (according 1538 * to the SCSI standard) be transmitted in one single 1539 * MESSAGE_IN_PHASE. If we have been in some other phase, 1540 * then this is a new message. 1541 */ 1542 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1543 sc->sc_state != NCR_RESELECTED) { 1544 printf("%s: phase change, dropping message, " 1545 "prev %d, state %d\n", 1546 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1547 sc->sc_flags &= ~NCR_DROP_MSGI; 1548 sc->sc_imlen = 0; 1549 } 1550 1551 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0])); 1552 1553 /* 1554 * If we're going to reject the message, don't bother storing 1555 * the incoming bytes. But still, we need to ACK them. 1556 */ 1557 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1558 NCRCMD(sc, NCRCMD_MSGOK); 1559 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1560 return; 1561 } 1562 1563 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1564 ncr53c9x_sched_msgout(SEND_REJECT); 1565 sc->sc_flags |= NCR_DROP_MSGI; 1566 } else { 1567 u_char *pb; 1568 int plen; 1569 1570 switch (sc->sc_state) { 1571 /* 1572 * if received message is the first of reselection 1573 * then first byte is selid, and then message 1574 */ 1575 case NCR_RESELECTED: 1576 pb = sc->sc_imess + 1; 1577 plen = sc->sc_imlen - 1; 1578 break; 1579 default: 1580 pb = sc->sc_imess; 1581 plen = sc->sc_imlen; 1582 break; 1583 } 1584 1585 if (__verify_msg_format(pb, plen)) 1586 goto gotit; 1587 } 1588 1589 /* Ack what we have so far */ 1590 NCRCMD(sc, NCRCMD_MSGOK); 1591 return; 1592 1593 gotit: 1594 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1595 /* we got complete message, flush the imess, */ 1596 /* XXX nobody uses imlen below */ 1597 sc->sc_imlen = 0; 1598 /* 1599 * Now we should have a complete message (1 byte, 2 byte 1600 * and moderately long extended messages). We only handle 1601 * extended messages which total length is shorter than 1602 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1603 */ 1604 switch (sc->sc_state) { 1605 struct ncr53c9x_ecb *ecb; 1606 struct ncr53c9x_tinfo *ti; 1607 struct ncr53c9x_linfo *li; 1608 int lun; 1609 1610 case NCR_CONNECTED: 1611 ecb = sc->sc_nexus; 1612 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1613 1614 switch (sc->sc_imess[0]) { 1615 case MSG_CMDCOMPLETE: 1616 NCR_MSGS(("cmdcomplete ")); 1617 if (sc->sc_dleft < 0) { 1618 scsipi_printaddr(ecb->xs->xs_periph); 1619 printf("got %ld extra bytes\n", 1620 -(long)sc->sc_dleft); 1621 sc->sc_dleft = 0; 1622 } 1623 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1624 0 : sc->sc_dleft; 1625 if ((ecb->flags & ECB_SENSE) == 0) 1626 ecb->xs->resid = ecb->dleft; 1627 sc->sc_state = NCR_CMDCOMPLETE; 1628 break; 1629 1630 case MSG_MESSAGE_REJECT: 1631 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1632 switch (sc->sc_msgout) { 1633 case SEND_TAG: 1634 /* 1635 * Target does not like tagged queuing. 1636 * - Flush the command queue 1637 * - Disable tagged queuing for the target 1638 * - Dequeue ecb from the queued array. 1639 */ 1640 printf("%s: tagged queuing rejected: " 1641 "target %d\n", 1642 sc->sc_dev.dv_xname, 1643 ecb->xs->xs_periph->periph_target); 1644 1645 NCR_MSGS(("(rejected sent tag)")); 1646 NCRCMD(sc, NCRCMD_FLUSH); 1647 DELAY(1); 1648 ti->flags &= ~T_TAG; 1649 lun = ecb->xs->xs_periph->periph_lun; 1650 li = TINFO_LUN(ti, lun); 1651 if (ecb->tag[0] && 1652 li->queued[ecb->tag[1]] != NULL) { 1653 li->queued[ecb->tag[1]] = NULL; 1654 li->used--; 1655 } 1656 ecb->tag[0] = ecb->tag[1] = 0; 1657 li->untagged = ecb; 1658 li->busy = 1; 1659 break; 1660 1661 case SEND_SDTR: 1662 printf("%s: sync transfer rejected: " 1663 "target %d\n", 1664 sc->sc_dev.dv_xname, 1665 ecb->xs->xs_periph->periph_target); 1666 1667 sc->sc_flags &= ~NCR_SYNCHNEGO; 1668 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1669 ncr53c9x_setsync(sc, ti); 1670 ncr53c9x_update_xfer_mode(sc, 1671 ecb->xs->xs_periph->periph_target); 1672 break; 1673 1674 case SEND_WDTR: 1675 printf("%s: wide transfer rejected: " 1676 "target %d\n", 1677 sc->sc_dev.dv_xname, 1678 ecb->xs->xs_periph->periph_target); 1679 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1680 ti->width = 0; 1681 break; 1682 1683 case SEND_INIT_DET_ERR: 1684 goto abort; 1685 } 1686 break; 1687 1688 case MSG_NOOP: 1689 NCR_MSGS(("noop ")); 1690 break; 1691 1692 case MSG_HEAD_OF_Q_TAG: 1693 case MSG_SIMPLE_Q_TAG: 1694 case MSG_ORDERED_Q_TAG: 1695 NCR_MSGS(("TAG %x:%x", 1696 sc->sc_imess[0], sc->sc_imess[1])); 1697 break; 1698 1699 case MSG_DISCONNECT: 1700 NCR_MSGS(("disconnect ")); 1701 ti->dconns++; 1702 sc->sc_state = NCR_DISCONNECT; 1703 1704 /* 1705 * Mark the fact that all bytes have moved. The 1706 * target may not bother to do a SAVE POINTERS 1707 * at this stage. This flag will set the residual 1708 * count to zero on MSG COMPLETE. 1709 */ 1710 if (sc->sc_dleft == 0) 1711 ecb->flags |= ECB_TENTATIVE_DONE; 1712 1713 break; 1714 1715 case MSG_SAVEDATAPOINTER: 1716 NCR_MSGS(("save datapointer ")); 1717 ecb->daddr = sc->sc_dp; 1718 ecb->dleft = sc->sc_dleft; 1719 break; 1720 1721 case MSG_RESTOREPOINTERS: 1722 NCR_MSGS(("restore datapointer ")); 1723 sc->sc_dp = ecb->daddr; 1724 sc->sc_dleft = ecb->dleft; 1725 break; 1726 1727 case MSG_EXTENDED: 1728 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1729 switch (sc->sc_imess[2]) { 1730 case MSG_EXT_SDTR: 1731 NCR_MSGS(("SDTR period %d, offset %d ", 1732 sc->sc_imess[3], sc->sc_imess[4])); 1733 if (sc->sc_imess[1] != 3) 1734 goto reject; 1735 ti->period = sc->sc_imess[3]; 1736 ti->offset = sc->sc_imess[4]; 1737 ti->flags &= ~T_NEGOTIATE; 1738 if (sc->sc_minsync == 0 || 1739 ti->offset == 0 || 1740 ti->period > 124) { 1741 #if 0 1742 #ifdef NCR53C9X_DEBUG 1743 scsipi_printaddr(ecb->xs->xs_periph); 1744 printf("async mode\n"); 1745 #endif 1746 #endif 1747 ti->flags &= ~T_SYNCMODE; 1748 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1749 /* 1750 * target initiated negotiation 1751 */ 1752 ti->offset = 0; 1753 ncr53c9x_sched_msgout( 1754 SEND_SDTR); 1755 } 1756 } else { 1757 #if 0 1758 int r = 250/ti->period; 1759 int s = (100*250)/ti->period - 100*r; 1760 #endif 1761 int p; 1762 1763 p = ncr53c9x_stp2cpb(sc, ti->period); 1764 ti->period = ncr53c9x_cpb2stp(sc, p); 1765 #if 0 1766 #ifdef NCR53C9X_DEBUG 1767 scsipi_printaddr(ecb->xs->xs_periph); 1768 printf("max sync rate %d.%02dMB/s\n", 1769 r, s); 1770 #endif 1771 #endif 1772 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1773 /* 1774 * target initiated negotiation 1775 */ 1776 if (ti->period < 1777 sc->sc_minsync) 1778 ti->period = 1779 sc->sc_minsync; 1780 if (ti->offset > 15) 1781 ti->offset = 15; 1782 ti->flags &= ~T_SYNCMODE; 1783 ncr53c9x_sched_msgout( 1784 SEND_SDTR); 1785 } else { 1786 /* we are sync */ 1787 ti->flags |= T_SYNCMODE; 1788 } 1789 } 1790 ncr53c9x_update_xfer_mode(sc, 1791 ecb->xs->xs_periph->periph_target); 1792 sc->sc_flags &= ~NCR_SYNCHNEGO; 1793 ncr53c9x_setsync(sc, ti); 1794 break; 1795 1796 case MSG_EXT_WDTR: 1797 printf("%s: wide mode %d\n", 1798 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1799 if (sc->sc_imess[3] == 1) { 1800 ti->cfg3 |= NCRFASCFG3_EWIDE; 1801 ncr53c9x_setsync(sc, ti); 1802 } else 1803 ti->width = 0; 1804 /* 1805 * Device started width negotiation. 1806 */ 1807 if (!(ti->flags & T_WDTRSENT)) 1808 ncr53c9x_sched_msgout(SEND_WDTR); 1809 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1810 break; 1811 default: 1812 scsipi_printaddr(ecb->xs->xs_periph); 1813 printf("unrecognized MESSAGE EXTENDED;" 1814 " sending REJECT\n"); 1815 goto reject; 1816 } 1817 break; 1818 1819 default: 1820 NCR_MSGS(("ident ")); 1821 scsipi_printaddr(ecb->xs->xs_periph); 1822 printf("unrecognized MESSAGE; sending REJECT\n"); 1823 reject: 1824 ncr53c9x_sched_msgout(SEND_REJECT); 1825 break; 1826 } 1827 break; 1828 1829 case NCR_IDENTIFIED: 1830 /* 1831 * IDENTIFY message was received and queue tag is expected now 1832 */ 1833 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1834 (sc->sc_msgify == 0)) { 1835 printf("%s: TAG reselect without IDENTIFY;" 1836 " MSG %x;" 1837 " sending DEVICE RESET\n", 1838 sc->sc_dev.dv_xname, 1839 sc->sc_imess[0]); 1840 goto reset; 1841 } 1842 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 1843 sc->sc_imess[0], sc->sc_imess[1]); 1844 break; 1845 1846 case NCR_RESELECTED: 1847 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1848 sc->sc_msgify = sc->sc_imess[1]; 1849 } else { 1850 printf("%s: reselect without IDENTIFY;" 1851 " MSG %x;" 1852 " sending DEVICE RESET\n", 1853 sc->sc_dev.dv_xname, 1854 sc->sc_imess[1]); 1855 goto reset; 1856 } 1857 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1858 break; 1859 1860 default: 1861 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1862 sc->sc_dev.dv_xname); 1863 reset: 1864 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1865 break; 1866 1867 abort: 1868 ncr53c9x_sched_msgout(SEND_ABORT); 1869 break; 1870 } 1871 1872 /* if we have more messages to send set ATN */ 1873 if (sc->sc_msgpriq) 1874 NCRCMD(sc, NCRCMD_SETATN); 1875 1876 /* Ack last message byte */ 1877 NCRCMD(sc, NCRCMD_MSGOK); 1878 1879 /* Done, reset message pointer. */ 1880 sc->sc_flags &= ~NCR_DROP_MSGI; 1881 sc->sc_imlen = 0; 1882 } 1883 1884 1885 /* 1886 * Send the highest priority, scheduled message 1887 */ 1888 void 1889 ncr53c9x_msgout(sc) 1890 struct ncr53c9x_softc *sc; 1891 { 1892 struct ncr53c9x_tinfo *ti; 1893 struct ncr53c9x_ecb *ecb; 1894 size_t size; 1895 1896 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1897 sc->sc_msgpriq, sc->sc_prevphase)); 1898 1899 /* 1900 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1901 * condition on the SCSI bus. The 53c9x chip 1902 * automatically turns off ATN before sending the 1903 * message byte. (see also the comment below in the 1904 * default case when picking out a message to send) 1905 */ 1906 if (sc->sc_flags & NCR_ATN) { 1907 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1908 new: 1909 NCRCMD(sc, NCRCMD_FLUSH); 1910 /* DELAY(1); */ 1911 sc->sc_msgoutq = 0; 1912 sc->sc_omlen = 0; 1913 } 1914 } else { 1915 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1916 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1917 goto new; 1918 } else { 1919 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1920 sc->sc_dev.dv_xname, __LINE__); 1921 } 1922 } 1923 1924 if (sc->sc_omlen == 0) { 1925 /* Pick up highest priority message */ 1926 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1927 sc->sc_msgoutq |= sc->sc_msgout; 1928 sc->sc_msgpriq &= ~sc->sc_msgout; 1929 sc->sc_omlen = 1; /* "Default" message len */ 1930 switch (sc->sc_msgout) { 1931 case SEND_SDTR: 1932 ecb = sc->sc_nexus; 1933 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1934 sc->sc_omess[0] = MSG_EXTENDED; 1935 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1936 sc->sc_omess[2] = MSG_EXT_SDTR; 1937 sc->sc_omess[3] = ti->period; 1938 sc->sc_omess[4] = ti->offset; 1939 sc->sc_omlen = 5; 1940 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1941 ti->flags |= T_SYNCMODE; 1942 ncr53c9x_setsync(sc, ti); 1943 } 1944 break; 1945 case SEND_WDTR: 1946 ecb = sc->sc_nexus; 1947 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1948 sc->sc_omess[0] = MSG_EXTENDED; 1949 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1950 sc->sc_omess[2] = MSG_EXT_WDTR; 1951 sc->sc_omess[3] = ti->width; 1952 sc->sc_omlen = 4; 1953 break; 1954 case SEND_IDENTIFY: 1955 if (sc->sc_state != NCR_CONNECTED) { 1956 printf("%s at line %d: no nexus\n", 1957 sc->sc_dev.dv_xname, __LINE__); 1958 } 1959 ecb = sc->sc_nexus; 1960 sc->sc_omess[0] = 1961 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1962 break; 1963 case SEND_TAG: 1964 if (sc->sc_state != NCR_CONNECTED) { 1965 printf("%s at line %d: no nexus\n", 1966 sc->sc_dev.dv_xname, __LINE__); 1967 } 1968 ecb = sc->sc_nexus; 1969 sc->sc_omess[0] = ecb->tag[0]; 1970 sc->sc_omess[1] = ecb->tag[1]; 1971 sc->sc_omlen = 2; 1972 break; 1973 case SEND_DEV_RESET: 1974 sc->sc_flags |= NCR_ABORTING; 1975 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1976 ecb = sc->sc_nexus; 1977 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1978 ti->flags &= ~T_SYNCMODE; 1979 ncr53c9x_update_xfer_mode(sc, 1980 ecb->xs->xs_periph->periph_target); 1981 if ((ti->flags & T_SYNCHOFF) == 0) 1982 /* We can re-start sync negotiation */ 1983 ti->flags |= T_NEGOTIATE; 1984 break; 1985 case SEND_PARITY_ERROR: 1986 sc->sc_omess[0] = MSG_PARITY_ERROR; 1987 break; 1988 case SEND_ABORT: 1989 sc->sc_flags |= NCR_ABORTING; 1990 sc->sc_omess[0] = MSG_ABORT; 1991 break; 1992 case SEND_INIT_DET_ERR: 1993 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1994 break; 1995 case SEND_REJECT: 1996 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1997 break; 1998 default: 1999 /* 2000 * We normally do not get here, since the chip 2001 * automatically turns off ATN before the last 2002 * byte of a message is sent to the target. 2003 * However, if the target rejects our (multi-byte) 2004 * message early by switching to MSG IN phase 2005 * ATN remains on, so the target may return to 2006 * MSG OUT phase. If there are no scheduled messages 2007 * left we send a NO-OP. 2008 * 2009 * XXX - Note that this leaves no useful purpose for 2010 * the NCR_ATN flag. 2011 */ 2012 sc->sc_flags &= ~NCR_ATN; 2013 sc->sc_omess[0] = MSG_NOOP; 2014 break; 2015 } 2016 sc->sc_omp = sc->sc_omess; 2017 } 2018 2019 #ifdef DEBUG 2020 { 2021 int i; 2022 2023 NCR_MSGS(("<msgout:")); 2024 for (i = 0; i < sc->sc_omlen; i++) 2025 NCR_MSGS((" %02x", sc->sc_omess[i])); 2026 NCR_MSGS(("> ")); 2027 } 2028 #endif 2029 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2030 /* 2031 * XXX fifo size 2032 */ 2033 ncr53c9x_flushfifo(sc); 2034 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2035 NCRCMD(sc, NCRCMD_TRANS); 2036 } else { 2037 /* (re)send the message */ 2038 size = min(sc->sc_omlen, sc->sc_maxxfer); 2039 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2040 /* Program the SCSI counter */ 2041 NCR_SET_COUNT(sc, size); 2042 2043 /* Load the count in and start the message-out transfer */ 2044 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2045 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2046 NCRDMA_GO(sc); 2047 } 2048 } 2049 2050 /* 2051 * This is the most critical part of the driver, and has to know 2052 * how to deal with *all* error conditions and phases from the SCSI 2053 * bus. If there are no errors and the DMA was active, then call the 2054 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2055 * and we can return from here without further processing. 2056 * 2057 * Most of this needs verifying. 2058 */ 2059 int 2060 ncr53c9x_intr(arg) 2061 void *arg; 2062 { 2063 struct ncr53c9x_softc *sc = arg; 2064 struct ncr53c9x_ecb *ecb; 2065 struct scsipi_periph *periph; 2066 struct ncr53c9x_tinfo *ti; 2067 size_t size; 2068 int nfifo; 2069 2070 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2071 2072 if (!NCRDMA_ISINTR(sc)) 2073 return (0); 2074 2075 again: 2076 /* and what do the registers say... */ 2077 ncr53c9x_readregs(sc); 2078 2079 sc->sc_intrcnt.ev_count++; 2080 2081 /* 2082 * At the moment, only a SCSI Bus Reset or Illegal 2083 * Command are classed as errors. A disconnect is a 2084 * valid condition, and we let the code check is the 2085 * "NCR_BUSFREE_OK" flag was set before declaring it 2086 * and error. 2087 * 2088 * Also, the status register tells us about "Gross 2089 * Errors" and "Parity errors". Only the Gross Error 2090 * is really bad, and the parity errors are dealt 2091 * with later 2092 * 2093 * TODO 2094 * If there are too many parity error, go to slow 2095 * cable mode ? 2096 */ 2097 2098 /* SCSI Reset */ 2099 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2100 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2101 NCRCMD(sc, NCRCMD_FLUSH); 2102 DELAY(1); 2103 } 2104 if (sc->sc_state != NCR_SBR) { 2105 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 2106 ncr53c9x_init(sc, 0); /* Restart everything */ 2107 return (1); 2108 } 2109 #if 0 2110 /*XXX*/ printf("<expected bus reset: " 2111 "[intr %x, stat %x, step %d]>\n", 2112 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2113 #endif 2114 if (sc->sc_nexus != NULL) 2115 panic("%s: nexus in reset state", 2116 sc->sc_dev.dv_xname); 2117 goto sched; 2118 } 2119 2120 ecb = sc->sc_nexus; 2121 2122 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2123 if (sc->sc_espintr & NCRINTR_ERR || 2124 sc->sc_espstat & NCRSTAT_GE) { 2125 2126 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2127 /* Gross Error; no target ? */ 2128 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2129 NCRCMD(sc, NCRCMD_FLUSH); 2130 DELAY(1); 2131 } 2132 if (sc->sc_state == NCR_CONNECTED || 2133 sc->sc_state == NCR_SELECTING) { 2134 ecb->xs->error = XS_TIMEOUT; 2135 ncr53c9x_done(sc, ecb); 2136 } 2137 return (1); 2138 } 2139 2140 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2141 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2142 /* 2143 * Eat away "Illegal command" interrupt 2144 * on a ESP100 caused by a re-selection 2145 * while we were trying to select 2146 * another target. 2147 */ 2148 #ifdef DEBUG 2149 printf("%s: ESP100 work-around activated\n", 2150 sc->sc_dev.dv_xname); 2151 #endif 2152 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2153 return (1); 2154 } 2155 /* illegal command, out of sync ? */ 2156 printf("%s: illegal command: 0x%x " 2157 "(state %d, phase %x, prevphase %x)\n", 2158 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2159 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2160 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2161 NCRCMD(sc, NCRCMD_FLUSH); 2162 DELAY(1); 2163 } 2164 ncr53c9x_init(sc, 1); /* Restart everything */ 2165 return (1); 2166 } 2167 } 2168 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2169 2170 /* 2171 * Call if DMA is active. 2172 * 2173 * If DMA_INTR returns true, then maybe go 'round the loop 2174 * again in case there is no more DMA queued, but a phase 2175 * change is expected. 2176 */ 2177 if (NCRDMA_ISACTIVE(sc)) { 2178 int r = NCRDMA_INTR(sc); 2179 if (r == -1) { 2180 printf("%s: DMA error; resetting\n", 2181 sc->sc_dev.dv_xname); 2182 ncr53c9x_init(sc, 1); 2183 return 1; 2184 } 2185 /* If DMA active here, then go back to work... */ 2186 if (NCRDMA_ISACTIVE(sc)) 2187 return (1); 2188 2189 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2190 /* 2191 * DMA not completed. If we can not find a 2192 * acceptable explanation, print a diagnostic. 2193 */ 2194 if (sc->sc_state == NCR_SELECTING) 2195 /* 2196 * This can happen if we are reselected 2197 * while using DMA to select a target. 2198 */ 2199 /*void*/; 2200 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2201 /* 2202 * Our (multi-byte) message (eg SDTR) was 2203 * interrupted by the target to send 2204 * a MSG REJECT. 2205 * Print diagnostic if current phase 2206 * is not MESSAGE IN. 2207 */ 2208 if (sc->sc_phase != MESSAGE_IN_PHASE) 2209 printf("%s: !TC on MSG OUT" 2210 " [intr %x, stat %x, step %d]" 2211 " prevphase %x, resid %lx\n", 2212 sc->sc_dev.dv_xname, 2213 sc->sc_espintr, 2214 sc->sc_espstat, 2215 sc->sc_espstep, 2216 sc->sc_prevphase, 2217 (u_long)sc->sc_omlen); 2218 } else if (sc->sc_dleft == 0) { 2219 /* 2220 * The DMA operation was started for 2221 * a DATA transfer. Print a diagnostic 2222 * if the DMA counter and TC bit 2223 * appear to be out of sync. 2224 */ 2225 printf("%s: !TC on DATA XFER" 2226 " [intr %x, stat %x, step %d]" 2227 " prevphase %x, resid %x\n", 2228 sc->sc_dev.dv_xname, 2229 sc->sc_espintr, 2230 sc->sc_espstat, 2231 sc->sc_espstep, 2232 sc->sc_prevphase, 2233 ecb ? ecb->dleft : -1); 2234 } 2235 } 2236 } 2237 2238 /* 2239 * Check for less serious errors. 2240 */ 2241 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2242 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2243 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2244 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2245 else 2246 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2247 } 2248 2249 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2250 sc->sc_msgify = 0; 2251 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2252 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2253 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2254 NCRCMD(sc, NCRCMD_FLUSH); 2255 /* DELAY(1); */ 2256 } 2257 /* 2258 * This command must (apparently) be issued within 2259 * 250mS of a disconnect. So here you are... 2260 */ 2261 NCRCMD(sc, NCRCMD_ENSEL); 2262 2263 switch (sc->sc_state) { 2264 case NCR_RESELECTED: 2265 goto sched; 2266 2267 case NCR_SELECTING: 2268 { 2269 struct ncr53c9x_linfo *li; 2270 2271 ecb->xs->error = XS_SELTIMEOUT; 2272 2273 /* Selection timeout -- discard all LUNs if empty */ 2274 periph = ecb->xs->xs_periph; 2275 ti = &sc->sc_tinfo[periph->periph_target]; 2276 li = LIST_FIRST(&ti->luns); 2277 while (li != NULL) { 2278 if (li->untagged == NULL && li->used == 0) { 2279 if (li->lun < NCR_NLUN) 2280 ti->lun[li->lun] = NULL; 2281 LIST_REMOVE(li, link); 2282 free(li, M_DEVBUF); 2283 /* 2284 * Restart the search at the beginning 2285 */ 2286 li = LIST_FIRST(&ti->luns); 2287 continue; 2288 } 2289 li = LIST_NEXT(li, link); 2290 } 2291 goto finish; 2292 } 2293 case NCR_CONNECTED: 2294 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2295 #ifdef NCR53C9X_DEBUG 2296 if (ecb != NULL) 2297 scsipi_printaddr(ecb->xs->xs_periph); 2298 printf("sync nego not completed!\n"); 2299 #endif 2300 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 2301 sc->sc_flags &= ~NCR_SYNCHNEGO; 2302 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2303 } 2304 2305 /* it may be OK to disconnect */ 2306 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2307 /* 2308 * Section 5.1.1 of the SCSI 2 spec 2309 * suggests issuing a REQUEST SENSE 2310 * following an unexpected disconnect. 2311 * Some devices go into a contingent 2312 * allegiance condition when 2313 * disconnecting, and this is necessary 2314 * to clean up their state. 2315 */ 2316 printf("%s: unexpected disconnect; ", 2317 sc->sc_dev.dv_xname); 2318 if ((ecb->flags & ECB_SENSE) != 0) { 2319 printf("resetting\n"); 2320 goto reset; 2321 } 2322 printf("sending REQUEST SENSE\n"); 2323 callout_stop(&ecb->xs->xs_callout); 2324 ncr53c9x_sense(sc, ecb); 2325 goto out; 2326 } 2327 2328 ecb->xs->error = XS_TIMEOUT; 2329 goto finish; 2330 2331 case NCR_DISCONNECT: 2332 sc->sc_nexus = NULL; 2333 goto sched; 2334 2335 case NCR_CMDCOMPLETE: 2336 goto finish; 2337 } 2338 } 2339 2340 switch (sc->sc_state) { 2341 2342 case NCR_SBR: 2343 printf("%s: waiting for SCSI Bus Reset to happen\n", 2344 sc->sc_dev.dv_xname); 2345 return (1); 2346 2347 case NCR_RESELECTED: 2348 /* 2349 * we must be continuing a message ? 2350 */ 2351 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2352 printf("%s: target didn't identify\n", 2353 sc->sc_dev.dv_xname); 2354 ncr53c9x_init(sc, 1); 2355 return (1); 2356 } 2357 printf("<<RESELECT CONT'd>>"); 2358 #if XXXX 2359 ncr53c9x_msgin(sc); 2360 if (sc->sc_state != NCR_CONNECTED) { 2361 /* IDENTIFY fail?! */ 2362 printf("%s: identify failed\n", 2363 sc->sc_dev.dv_xname, sc->sc_state); 2364 ncr53c9x_init(sc, 1); 2365 return (1); 2366 } 2367 #endif 2368 break; 2369 2370 case NCR_IDENTIFIED: 2371 ecb = sc->sc_nexus; 2372 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2373 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2374 /* 2375 * Things are seriously fucked up. 2376 * Pull the brakes, i.e. reset 2377 */ 2378 printf("%s: target didn't send tag: %d bytes in fifo\n", 2379 sc->sc_dev.dv_xname, i); 2380 /* Drain and display fifo */ 2381 while (i-- > 0) 2382 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2383 2384 ncr53c9x_init(sc, 1); 2385 return (1); 2386 } else 2387 goto msgin; 2388 2389 break; 2390 2391 case NCR_IDLE: 2392 case NCR_SELECTING: 2393 ecb = sc->sc_nexus; 2394 if (sc->sc_espintr & NCRINTR_RESEL) { 2395 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2396 sc->sc_flags = 0; 2397 /* 2398 * If we're trying to select a 2399 * target ourselves, push our command 2400 * back into the ready list. 2401 */ 2402 if (sc->sc_state == NCR_SELECTING) { 2403 NCR_INTS(("backoff selector ")); 2404 callout_stop(&ecb->xs->xs_callout); 2405 ncr53c9x_dequeue(sc, ecb); 2406 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2407 ecb->flags |= ECB_READY; 2408 ecb = sc->sc_nexus = NULL; 2409 } 2410 sc->sc_state = NCR_RESELECTED; 2411 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2412 /* 2413 * Things are seriously fucked up. 2414 * Pull the brakes, i.e. reset 2415 */ 2416 printf("%s: target didn't identify\n", 2417 sc->sc_dev.dv_xname); 2418 ncr53c9x_init(sc, 1); 2419 return (1); 2420 } 2421 /* 2422 * The C90 only inhibits FIFO writes until 2423 * reselection is complete, instead of 2424 * waiting until the interrupt status register 2425 * has been read. So, if the reselect happens 2426 * while we were entering a command bytes (for 2427 * another target) some of those bytes can 2428 * appear in the FIFO here, after the 2429 * interrupt is taken. 2430 */ 2431 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2432 2433 if (nfifo < 2 || 2434 (nfifo > 2 && sc->sc_rev != NCR_VARIANT_ESP100)) { 2435 printf("%s: RESELECT: %d bytes in FIFO! " 2436 "[intr %x, stat %x, step %d, " 2437 "prevphase %x]\n", 2438 sc->sc_dev.dv_xname, 2439 nfifo, 2440 sc->sc_espintr, 2441 sc->sc_espstat, 2442 sc->sc_espstep, 2443 sc->sc_prevphase); 2444 ncr53c9x_init(sc, 1); 2445 return (1); 2446 } 2447 sc->sc_selid = sc->sc_imess[0]; 2448 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2449 2450 /* Handle identify message */ 2451 ncr53c9x_msgin(sc); 2452 if (nfifo != 2) { 2453 /* 2454 * Note: this should not happen 2455 * with `dmaselect' on. 2456 */ 2457 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2458 NCRCMD(sc, NCRCMD_FLUSH); 2459 } else if (sc->sc_features & NCR_F_DMASELECT && 2460 sc->sc_rev == NCR_VARIANT_ESP100) { 2461 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2462 } 2463 2464 if (sc->sc_state != NCR_CONNECTED && 2465 sc->sc_state != NCR_IDENTIFIED) { 2466 /* IDENTIFY fail?! */ 2467 printf("%s: identify failed, " 2468 "state %d, intr %02x\n", 2469 sc->sc_dev.dv_xname, sc->sc_state, 2470 sc->sc_espintr); 2471 ncr53c9x_init(sc, 1); 2472 return (1); 2473 } 2474 goto shortcut; /* ie. next phase expected soon */ 2475 } 2476 2477 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2478 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2479 /* 2480 * Arbitration won; examine the `step' register 2481 * to determine how far the selection could progress. 2482 */ 2483 ecb = sc->sc_nexus; 2484 if (ecb == NULL) 2485 panic("ncr53c9x: no nexus"); 2486 2487 periph = ecb->xs->xs_periph; 2488 ti = &sc->sc_tinfo[periph->periph_target]; 2489 2490 switch (sc->sc_espstep) { 2491 case 0: 2492 /* 2493 * The target did not respond with a 2494 * message out phase - probably an old 2495 * device that doesn't recognize ATN. 2496 * Clear ATN and just continue, the 2497 * target should be in the command 2498 * phase. 2499 * XXXX check for command phase? 2500 */ 2501 NCRCMD(sc, NCRCMD_RSTATN); 2502 break; 2503 case 1: 2504 if ((ti->flags & T_NEGOTIATE) == 0 && 2505 ecb->tag[0] == 0) { 2506 printf("%s: step 1 & !NEG\n", 2507 sc->sc_dev.dv_xname); 2508 goto reset; 2509 } 2510 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2511 printf("%s: !MSGOUT\n", 2512 sc->sc_dev.dv_xname); 2513 goto reset; 2514 } 2515 if (ti->flags & T_WIDE) { 2516 ti->flags |= T_WDTRSENT; 2517 ncr53c9x_sched_msgout(SEND_WDTR); 2518 } 2519 if (ti->flags & T_NEGOTIATE) { 2520 /* Start negotiating */ 2521 ti->period = sc->sc_minsync; 2522 ti->offset = 15; 2523 sc->sc_flags |= NCR_SYNCHNEGO; 2524 if (ecb->tag[0]) 2525 ncr53c9x_sched_msgout( 2526 SEND_TAG|SEND_SDTR); 2527 else 2528 ncr53c9x_sched_msgout( 2529 SEND_SDTR); 2530 } else { 2531 /* Could not do ATN3 so send TAG */ 2532 ncr53c9x_sched_msgout(SEND_TAG); 2533 } 2534 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2535 break; 2536 case 3: 2537 /* 2538 * Grr, this is supposed to mean 2539 * "target left command phase prematurely". 2540 * It seems to happen regularly when 2541 * sync mode is on. 2542 * Look at FIFO to see if command went out. 2543 * (Timing problems?) 2544 */ 2545 if (sc->sc_features & NCR_F_DMASELECT) { 2546 if (sc->sc_cmdlen == 0) 2547 /* Hope for the best.. */ 2548 break; 2549 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2550 & NCRFIFO_FF) == 0) { 2551 /* Hope for the best.. */ 2552 break; 2553 } 2554 printf("(%s:%d:%d): selection failed;" 2555 " %d left in FIFO " 2556 "[intr %x, stat %x, step %d]\n", 2557 sc->sc_dev.dv_xname, 2558 periph->periph_target, 2559 periph->periph_lun, 2560 NCR_READ_REG(sc, NCR_FFLAG) 2561 & NCRFIFO_FF, 2562 sc->sc_espintr, sc->sc_espstat, 2563 sc->sc_espstep); 2564 NCRCMD(sc, NCRCMD_FLUSH); 2565 ncr53c9x_sched_msgout(SEND_ABORT); 2566 return (1); 2567 case 2: 2568 /* Select stuck at Command Phase */ 2569 NCRCMD(sc, NCRCMD_FLUSH); 2570 break; 2571 case 4: 2572 if (sc->sc_features & NCR_F_DMASELECT && 2573 sc->sc_cmdlen != 0) 2574 printf("(%s:%d:%d): select; " 2575 "%lu left in DMA buffer " 2576 "[intr %x, stat %x, step %d]\n", 2577 sc->sc_dev.dv_xname, 2578 periph->periph_target, 2579 periph->periph_lun, 2580 (u_long)sc->sc_cmdlen, 2581 sc->sc_espintr, 2582 sc->sc_espstat, 2583 sc->sc_espstep); 2584 /* So far, everything went fine */ 2585 break; 2586 } 2587 2588 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2589 /* Do an implicit RESTORE POINTERS. */ 2590 sc->sc_dp = ecb->daddr; 2591 sc->sc_dleft = ecb->dleft; 2592 sc->sc_state = NCR_CONNECTED; 2593 break; 2594 2595 } else { 2596 2597 printf("%s: unexpected status after select" 2598 ": [intr %x, stat %x, step %x]\n", 2599 sc->sc_dev.dv_xname, 2600 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2601 NCRCMD(sc, NCRCMD_FLUSH); 2602 DELAY(1); 2603 goto reset; 2604 } 2605 if (sc->sc_state == NCR_IDLE) { 2606 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); 2607 return (0); 2608 } 2609 break; 2610 2611 case NCR_CONNECTED: 2612 if ((sc->sc_flags & NCR_ICCS) != 0) { 2613 /* "Initiate Command Complete Steps" in progress */ 2614 u_char msg; 2615 2616 sc->sc_flags &= ~NCR_ICCS; 2617 2618 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2619 printf("%s: ICCS: " 2620 ": [intr %x, stat %x, step %x]\n", 2621 sc->sc_dev.dv_xname, 2622 sc->sc_espintr, sc->sc_espstat, 2623 sc->sc_espstep); 2624 } 2625 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2626 if (sc->sc_imlen < 2) 2627 printf("%s: can't get status, only %d bytes\n", 2628 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2629 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2630 msg = sc->sc_imess[sc->sc_imlen - 1]; 2631 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2632 if (msg == MSG_CMDCOMPLETE) { 2633 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2634 ? 0 : sc->sc_dleft; 2635 if ((ecb->flags & ECB_SENSE) == 0) 2636 ecb->xs->resid = ecb->dleft; 2637 sc->sc_state = NCR_CMDCOMPLETE; 2638 } else 2639 printf("%s: STATUS_PHASE: msg %d\n", 2640 sc->sc_dev.dv_xname, msg); 2641 sc->sc_imlen = 0; 2642 NCRCMD(sc, NCRCMD_MSGOK); 2643 goto shortcut; /* ie. wait for disconnect */ 2644 } 2645 break; 2646 2647 default: 2648 printf("%s: invalid state: %d\n", 2649 sc->sc_dev.dv_xname, sc->sc_state); 2650 goto reset; 2651 } 2652 2653 /* 2654 * Driver is now in state NCR_CONNECTED, i.e. we 2655 * have a current command working the SCSI bus. 2656 */ 2657 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2658 panic("ncr53c9x: no nexus"); 2659 } 2660 2661 switch (sc->sc_phase) { 2662 case MESSAGE_OUT_PHASE: 2663 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2664 ncr53c9x_msgout(sc); 2665 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2666 break; 2667 2668 case MESSAGE_IN_PHASE: 2669 msgin: 2670 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2671 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2672 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2673 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2674 NCRCMD(sc, NCRCMD_FLUSH); 2675 } 2676 sc->sc_flags |= NCR_WAITI; 2677 NCRCMD(sc, NCRCMD_TRANS); 2678 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2679 if ((sc->sc_flags & NCR_WAITI) == 0) { 2680 printf("%s: MSGIN: unexpected FC bit: " 2681 "[intr %x, stat %x, step %x]\n", 2682 sc->sc_dev.dv_xname, 2683 sc->sc_espintr, sc->sc_espstat, 2684 sc->sc_espstep); 2685 } 2686 sc->sc_flags &= ~NCR_WAITI; 2687 ncr53c9x_rdfifo(sc, 2688 (sc->sc_prevphase == sc->sc_phase) ? 2689 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2690 ncr53c9x_msgin(sc); 2691 } else { 2692 printf("%s: MSGIN: weird bits: " 2693 "[intr %x, stat %x, step %x]\n", 2694 sc->sc_dev.dv_xname, 2695 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2696 } 2697 sc->sc_prevphase = MESSAGE_IN_PHASE; 2698 goto shortcut; /* i.e. expect data to be ready */ 2699 break; 2700 2701 case COMMAND_PHASE: 2702 /* 2703 * Send the command block. Normally we don't see this 2704 * phase because the SEL_ATN command takes care of 2705 * all this. However, we end up here if either the 2706 * target or we wanted to exchange some more messages 2707 * first (e.g. to start negotiations). 2708 */ 2709 2710 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2711 ecb->cmd.cmd.opcode, ecb->clen)); 2712 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2713 NCRCMD(sc, NCRCMD_FLUSH); 2714 /* DELAY(1);*/ 2715 } 2716 if (sc->sc_features & NCR_F_DMASELECT) { 2717 size_t size; 2718 /* setup DMA transfer for command */ 2719 size = ecb->clen; 2720 sc->sc_cmdlen = size; 2721 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 2722 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2723 0, &size); 2724 /* Program the SCSI counter */ 2725 NCR_SET_COUNT(sc, size); 2726 2727 /* load the count in */ 2728 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2729 2730 /* start the command transfer */ 2731 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2732 NCRDMA_GO(sc); 2733 } else { 2734 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2735 NCRCMD(sc, NCRCMD_TRANS); 2736 } 2737 sc->sc_prevphase = COMMAND_PHASE; 2738 break; 2739 2740 case DATA_OUT_PHASE: 2741 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2742 NCRCMD(sc, NCRCMD_FLUSH); 2743 size = min(sc->sc_dleft, sc->sc_maxxfer); 2744 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2745 sc->sc_prevphase = DATA_OUT_PHASE; 2746 goto setup_xfer; 2747 2748 case DATA_IN_PHASE: 2749 NCR_PHASE(("DATA_IN_PHASE ")); 2750 if (sc->sc_rev == NCR_VARIANT_ESP100) 2751 NCRCMD(sc, NCRCMD_FLUSH); 2752 size = min(sc->sc_dleft, sc->sc_maxxfer); 2753 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2754 sc->sc_prevphase = DATA_IN_PHASE; 2755 setup_xfer: 2756 /* Target returned to data phase: wipe "done" memory */ 2757 ecb->flags &= ~ECB_TENTATIVE_DONE; 2758 2759 /* Program the SCSI counter */ 2760 NCR_SET_COUNT(sc, size); 2761 2762 /* load the count in */ 2763 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2764 2765 /* 2766 * Note that if `size' is 0, we've already transceived 2767 * all the bytes we want but we're still in DATA PHASE. 2768 * Apparently, the device needs padding. Also, a 2769 * transfer size of 0 means "maximum" to the chip 2770 * DMA logic. 2771 */ 2772 NCRCMD(sc, 2773 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2774 NCRDMA_GO(sc); 2775 return (1); 2776 2777 case STATUS_PHASE: 2778 NCR_PHASE(("STATUS_PHASE ")); 2779 sc->sc_flags |= NCR_ICCS; 2780 NCRCMD(sc, NCRCMD_ICCS); 2781 sc->sc_prevphase = STATUS_PHASE; 2782 goto shortcut; /* i.e. expect status results soon */ 2783 break; 2784 2785 case INVALID_PHASE: 2786 break; 2787 2788 default: 2789 printf("%s: unexpected bus phase; resetting\n", 2790 sc->sc_dev.dv_xname); 2791 goto reset; 2792 } 2793 2794 out: 2795 return (1); 2796 2797 reset: 2798 ncr53c9x_init(sc, 1); 2799 goto out; 2800 2801 finish: 2802 ncr53c9x_done(sc, ecb); 2803 goto out; 2804 2805 sched: 2806 sc->sc_state = NCR_IDLE; 2807 ncr53c9x_sched(sc); 2808 goto out; 2809 2810 shortcut: 2811 /* 2812 * The idea is that many of the SCSI operations take very little 2813 * time, and going away and getting interrupted is too high an 2814 * overhead to pay. For example, selecting, sending a message 2815 * and command and then doing some work can be done in one "pass". 2816 * 2817 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2818 * at 40MHz. This needs testing. 2819 */ 2820 { 2821 struct timeval wait, cur; 2822 2823 microtime(&wait); 2824 wait.tv_usec += 50 / sc->sc_freq; 2825 if (wait.tv_usec > 1000000) { 2826 wait.tv_sec++; 2827 wait.tv_usec -= 1000000; 2828 } 2829 do { 2830 if (NCRDMA_ISINTR(sc)) 2831 goto again; 2832 microtime(&cur); 2833 } while (cur.tv_sec <= wait.tv_sec && 2834 cur.tv_usec <= wait.tv_usec); 2835 } 2836 goto out; 2837 } 2838 2839 void 2840 ncr53c9x_abort(sc, ecb) 2841 struct ncr53c9x_softc *sc; 2842 struct ncr53c9x_ecb *ecb; 2843 { 2844 2845 /* 2 secs for the abort */ 2846 ecb->timeout = NCR_ABORT_TIMEOUT; 2847 ecb->flags |= ECB_ABORT; 2848 2849 if (ecb == sc->sc_nexus) { 2850 /* 2851 * If we're still selecting, the message will be scheduled 2852 * after selection is complete. 2853 */ 2854 if (sc->sc_state == NCR_CONNECTED) 2855 ncr53c9x_sched_msgout(SEND_ABORT); 2856 2857 /* 2858 * Reschedule timeout. 2859 */ 2860 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2861 ncr53c9x_timeout, ecb); 2862 } else { 2863 /* 2864 * Just leave the command where it is. 2865 * XXX - what choice do we have but to reset the SCSI 2866 * eventually? 2867 */ 2868 if (sc->sc_state == NCR_IDLE) 2869 ncr53c9x_sched(sc); 2870 } 2871 } 2872 2873 void 2874 ncr53c9x_timeout(arg) 2875 void *arg; 2876 { 2877 struct ncr53c9x_ecb *ecb = arg; 2878 struct scsipi_xfer *xs = ecb->xs; 2879 struct scsipi_periph *periph = xs->xs_periph; 2880 struct ncr53c9x_softc *sc = 2881 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2882 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2883 int s; 2884 2885 scsipi_printaddr(periph); 2886 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2887 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2888 "msg(q %x,o %x) %s>", 2889 sc->sc_dev.dv_xname, 2890 ecb, ecb->flags, ecb->dleft, ecb->stat, 2891 sc->sc_state, sc->sc_nexus, 2892 NCR_READ_REG(sc, NCR_STAT), 2893 sc->sc_phase, sc->sc_prevphase, 2894 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2895 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2896 #if NCR53C9X_DEBUG > 1 2897 printf("TRACE: %s.", ecb->trace); 2898 #endif 2899 2900 s = splbio(); 2901 2902 if (ecb->flags & ECB_ABORT) { 2903 /* abort timed out */ 2904 printf(" AGAIN\n"); 2905 2906 ncr53c9x_init(sc, 1); 2907 } else { 2908 /* abort the operation that has timed out */ 2909 printf("\n"); 2910 xs->error = XS_TIMEOUT; 2911 ncr53c9x_abort(sc, ecb); 2912 2913 /* Disable sync mode if stuck in a data phase */ 2914 if (ecb == sc->sc_nexus && 2915 (ti->flags & T_SYNCMODE) != 0 && 2916 (sc->sc_phase & (MSGI|CDI)) == 0) { 2917 /* XXX ASYNC CALLBACK! */ 2918 scsipi_printaddr(periph); 2919 printf("sync negotiation disabled\n"); 2920 sc->sc_cfflags |= (1 << (periph->periph_target + 8)); 2921 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2922 } 2923 } 2924 2925 splx(s); 2926 } 2927 2928 void 2929 ncr53c9x_watch(arg) 2930 void *arg; 2931 { 2932 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2933 struct ncr53c9x_tinfo *ti; 2934 struct ncr53c9x_linfo *li; 2935 int t, s; 2936 /* Delete any structures that have not been used in 10min. */ 2937 time_t old = time.tv_sec - (10 * 60); 2938 2939 s = splbio(); 2940 for (t = 0; t < NCR_NTARG; t++) { 2941 ti = &sc->sc_tinfo[t]; 2942 li = LIST_FIRST(&ti->luns); 2943 while (li) { 2944 if (li->last_used < old && 2945 li->untagged == NULL && 2946 li->used == 0) { 2947 if (li->lun < NCR_NLUN) 2948 ti->lun[li->lun] = NULL; 2949 LIST_REMOVE(li, link); 2950 free(li, M_DEVBUF); 2951 /* Restart the search at the beginning */ 2952 li = LIST_FIRST(&ti->luns); 2953 continue; 2954 } 2955 li = LIST_NEXT(li, link); 2956 } 2957 } 2958 splx(s); 2959 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2960 } 2961 2962
Indexes created Mon Sep 29 15:09:53 GMT 2025