ncr53c9xvar.h revision 1.2
1 /* $NetBSD: ncr53c9xvar.h,v 1.2 1997/02/27 13:59:34 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Jason R. Thorpe. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed for the NetBSD Project 18 * by Jason R. Thorpe. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1994 Peter Galbavy. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Peter Galbavy. 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 #define NCR53C9X_DEBUG 0 64 65 #define NCR_ABORT_TIMEOUT 2000 /* time to wait for abort */ 66 67 #define FREQTOCCF(freq) (((freq + 4) / 5)) 68 69 /* 70 * NCR 53c9x variants. Note, these values are used as indexes into 71 * a table; don't modify them unless you know what you're doing. 72 */ 73 #define NCR_VARIANT_ESP100 0 74 #define NCR_VARIANT_ESP100A 1 75 #define NCR_VARIANT_ESP200 2 76 #define NCR_VARIANT_NCR53C94 3 77 #define NCR_VARIANT_NCR53C96 4 78 #define NCR_VARIANT_MAX 5 79 80 /* 81 * ECB. Holds additional information for each SCSI command Comments: We 82 * need a separate scsi command block because we may need to overwrite it 83 * with a request sense command. Basicly, we refrain from fiddling with 84 * the scsi_xfer struct (except do the expected updating of return values). 85 * We'll generally update: xs->{flags,resid,error,sense,status} and 86 * occasionally xs->retries. 87 */ 88 struct ncr53c9x_ecb { 89 TAILQ_ENTRY(ncr53c9x_ecb) chain; 90 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ 91 int flags; 92 #define ECB_ALLOC 0x01 93 #define ECB_NEXUS 0x02 94 #define ECB_SENSE 0x04 95 #define ECB_ABORT 0x40 96 #define ECB_RESET 0x80 97 int timeout; 98 99 struct scsi_generic cmd; /* SCSI command block */ 100 int clen; 101 char *daddr; /* Saved data pointer */ 102 int dleft; /* Residue */ 103 u_char stat; /* SCSI status byte */ 104 105 #if NCR53C9X_DEBUG > 0 106 char trace[1000]; 107 #endif 108 }; 109 #if NCR53C9X_DEBUG > 0 110 #define ECB_TRACE(ecb, msg, a, b) do { \ 111 const char *f = "[" msg "]"; \ 112 int n = strlen((ecb)->trace); \ 113 if (n < (sizeof((ecb)->trace)-100)) \ 114 sprintf((ecb)->trace + n, f, a, b); \ 115 } while(0) 116 #else 117 #define ECB_TRACE(ecb, msg, a, b) 118 #endif 119 120 /* 121 * Some info about each (possible) target on the SCSI bus. This should 122 * probably have been a "per target+lunit" structure, but we'll leave it at 123 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 124 */ 125 struct ncr53c9x_tinfo { 126 int cmds; /* #commands processed */ 127 int dconns; /* #disconnects */ 128 int touts; /* #timeouts */ 129 int perrs; /* #parity errors */ 130 int senses; /* #request sense commands sent */ 131 ushort lubusy; /* What local units/subr. are busy? */ 132 u_char flags; 133 #define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ 134 #define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ 135 #define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ 136 #define T_SYNCMODE 0x08 /* sync mode has been negotiated */ 137 #define T_SYNCHOFF 0x10 /* .. */ 138 #define T_RSELECTOFF 0x20 /* .. */ 139 u_char period; /* Period suggestion */ 140 u_char offset; /* Offset suggestion */ 141 } tinfo_t; 142 143 /* Register a linenumber (for debugging) */ 144 #define LOGLINE(p) 145 146 #define NCR_SHOWECBS 0x01 147 #define NCR_SHOWINTS 0x02 148 #define NCR_SHOWCMDS 0x04 149 #define NCR_SHOWMISC 0x08 150 #define NCR_SHOWTRAC 0x10 151 #define NCR_SHOWSTART 0x20 152 #define NCR_SHOWPHASE 0x40 153 #define NCR_SHOWDMA 0x80 154 #define NCR_SHOWCCMDS 0x100 155 #define NCR_SHOWMSGS 0x200 156 157 #ifdef NCR53C9X_DEBUG 158 extern int ncr53c9x_debug; 159 #define NCR_ECBS(str) \ 160 do {if (ncr53c9x_debug & NCR_SHOWECBS) printf str;} while (0) 161 #define NCR_MISC(str) \ 162 do {if (ncr53c9x_debug & NCR_SHOWMISC) printf str;} while (0) 163 #define NCR_INTS(str) \ 164 do {if (ncr53c9x_debug & NCR_SHOWINTS) printf str;} while (0) 165 #define NCR_TRACE(str) \ 166 do {if (ncr53c9x_debug & NCR_SHOWTRAC) printf str;} while (0) 167 #define NCR_CMDS(str) \ 168 do {if (ncr53c9x_debug & NCR_SHOWCMDS) printf str;} while (0) 169 #define NCR_START(str) \ 170 do {if (ncr53c9x_debug & NCR_SHOWSTART) printf str;}while (0) 171 #define NCR_PHASE(str) \ 172 do {if (ncr53c9x_debug & NCR_SHOWPHASE) printf str;}while (0) 173 #define NCR_DMA(str) \ 174 do {if (ncr53c9x_debug & NCR_SHOWDMA) printf str;}while (0) 175 #define NCR_MSGS(str) \ 176 do {if (ncr53c9x_debug & NCR_SHOWMSGS) printf str;}while (0) 177 #else 178 #define NCR_ECBS(str) 179 #define NCR_MISC(str) 180 #define NCR_INTS(str) 181 #define NCR_TRACE(str) 182 #define NCR_CMDS(str) 183 #define NCR_START(str) 184 #define NCR_PHASE(str) 185 #define NCR_DMA(str) 186 #define NCR_MSGS(str) 187 #endif 188 189 #define NCR_MAX_MSG_LEN 8 190 191 struct ncr53c9x_softc; 192 193 /* 194 * Function switch used as glue to MD code. 195 */ 196 struct ncr53c9x_glue { 197 /* Mandatory entry points. */ 198 u_char (*gl_read_reg) __P((struct ncr53c9x_softc *, int)); 199 void (*gl_write_reg) __P((struct ncr53c9x_softc *, int, u_char)); 200 int (*gl_dma_isintr) __P((struct ncr53c9x_softc *)); 201 void (*gl_dma_reset) __P((struct ncr53c9x_softc *)); 202 int (*gl_dma_intr) __P((struct ncr53c9x_softc *)); 203 int (*gl_dma_setup) __P((struct ncr53c9x_softc *, 204 caddr_t *, size_t *, int, size_t *)); 205 void (*gl_dma_go) __P((struct ncr53c9x_softc *)); 206 void (*gl_dma_stop) __P((struct ncr53c9x_softc *)); 207 int (*gl_dma_isactive) __P((struct ncr53c9x_softc *)); 208 209 /* Optional entry points. */ 210 void (*gl_clear_latched_intr) __P((struct ncr53c9x_softc *)); 211 }; 212 213 struct ncr53c9x_softc { 214 struct device sc_dev; /* us as a device */ 215 216 struct evcnt sc_intrcnt; /* intr count */ 217 struct scsi_link sc_link; /* scsi lint struct */ 218 219 struct ncr53c9x_glue *sc_glue; /* glue to MD code */ 220 221 /* register defaults */ 222 u_char sc_cfg1; /* Config 1 */ 223 u_char sc_cfg2; /* Config 2, not ESP100 */ 224 u_char sc_cfg3; /* Config 3, only ESP200 */ 225 u_char sc_ccf; /* Clock Conversion */ 226 u_char sc_timeout; 227 228 /* register copies, see espreadregs() */ 229 u_char sc_espintr; 230 u_char sc_espstat; 231 u_char sc_espstep; 232 u_char sc_espfflags; 233 234 /* Lists of command blocks */ 235 TAILQ_HEAD(ecb_list, ncr53c9x_ecb) free_list, 236 ready_list, 237 nexus_list; 238 239 struct ncr53c9x_ecb *sc_nexus; /* current command */ 240 struct ncr53c9x_ecb sc_ecb[3*8]; /* three per target */ 241 struct ncr53c9x_tinfo sc_tinfo[8]; 242 243 /* Data about the current nexus (updated for every cmd switch) */ 244 caddr_t sc_dp; /* Current data pointer */ 245 ssize_t sc_dleft; /* Data left to transfer */ 246 247 /* Adapter state */ 248 int sc_phase; /* Copy of what bus phase we are in */ 249 int sc_prevphase; /* Copy of what bus phase we were in */ 250 u_char sc_state; /* State applicable to the adapter */ 251 u_char sc_flags; 252 u_char sc_selid; 253 u_char sc_lastcmd; 254 255 /* Message stuff */ 256 u_char sc_msgpriq; /* One or more messages to send (encoded) */ 257 u_char sc_msgout; /* What message is on its way out? */ 258 u_char sc_msgoutq; /* What messages have been sent so far? */ 259 u_char sc_omess[NCR_MAX_MSG_LEN]; 260 caddr_t sc_omp; /* Message pointer (for multibyte messages) */ 261 size_t sc_omlen; 262 u_char sc_imess[NCR_MAX_MSG_LEN + 1]; 263 caddr_t sc_imp; /* Message pointer (for multibyte messages) */ 264 size_t sc_imlen; 265 266 /* hardware/openprom stuff */ 267 int sc_freq; /* Freq in HZ */ 268 int sc_id; /* our scsi id */ 269 int sc_rev; /* esp revision */ 270 int sc_minsync; /* minimum sync period / 4 */ 271 int sc_maxxfer; /* maximum transfer size */ 272 }; 273 274 /* values for sc_state */ 275 #define NCR_IDLE 1 /* waiting for something to do */ 276 #define NCR_SELECTING 2 /* SCSI command is arbiting */ 277 #define NCR_RESELECTED 3 /* Has been reselected */ 278 #define NCR_CONNECTED 4 /* Actively using the SCSI bus */ 279 #define NCR_DISCONNECT 5 /* MSG_DISCONNECT received */ 280 #define NCR_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */ 281 #define NCR_CLEANING 7 282 #define NCR_SBR 8 /* Expect a SCSI RST because we commanded it */ 283 284 /* values for sc_flags */ 285 #define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ 286 #define NCR_ABORTING 0x02 /* Bailing out */ 287 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 288 #define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ 289 #define NCR_ICCS 0x10 /* Expect status phase results */ 290 #define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */ 291 #define NCR_ATN 0x40 /* ATN asserted */ 292 293 /* values for sc_msgout */ 294 #define SEND_DEV_RESET 0x01 295 #define SEND_PARITY_ERROR 0x02 296 #define SEND_INIT_DET_ERR 0x04 297 #define SEND_REJECT 0x08 298 #define SEND_IDENTIFY 0x10 299 #define SEND_ABORT 0x20 300 #define SEND_SDTR 0x40 301 #define SEND_WDTR 0x80 302 303 /* SCSI Status codes */ 304 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ 305 306 /* phase bits */ 307 #define IOI 0x01 308 #define CDI 0x02 309 #define MSGI 0x04 310 311 /* Information transfer phases */ 312 #define DATA_OUT_PHASE (0) 313 #define DATA_IN_PHASE (IOI) 314 #define COMMAND_PHASE (CDI) 315 #define STATUS_PHASE (CDI|IOI) 316 #define MESSAGE_OUT_PHASE (MSGI|CDI) 317 #define MESSAGE_IN_PHASE (MSGI|CDI|IOI) 318 319 #define PHASE_MASK (MSGI|CDI|IOI) 320 321 /* Some pseudo phases for getphase()*/ 322 #define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ 323 #define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ 324 #define PSEUDO_PHASE 0x100 /* "pseudo" bit */ 325 326 /* 327 * Macros to read and write the chip's registers. 328 */ 329 #define NCR_READ_REG(sc, reg) \ 330 (*(sc)->sc_glue->gl_read_reg)((sc), (reg)) 331 #define NCR_WRITE_REG(sc, reg, val) \ 332 (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val)) 333 334 #ifdef NCR53C9X_DEBUG 335 #define NCRCMD(sc, cmd) do { \ 336 if (ncr53c9x_debug & NCR_SHOWCCMDS) \ 337 printf("<cmd:0x%x>", (unsigned)cmd); \ 338 sc->sc_lastcmd = cmd; \ 339 NCR_WRITE_REG(sc, NCR_CMD, cmd); \ 340 } while (0) 341 #else 342 #define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd) 343 #endif 344 345 /* 346 * DMA macros for NCR53c9x 347 */ 348 #define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc)) 349 #define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc)) 350 #define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc)) 351 #define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \ 352 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize)) 353 #define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc)) 354 #define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc)) 355 356 /* 357 * Macro to convert the chip register Clock Per Byte value to 358 * Sunchronous Transfer Period. 359 */ 360 #define ncr53c9x_cpb2stp(sc, cpb) \ 361 ((250 * (cpb)) / (sc)->sc_freq) 362 363 void ncr53c9x_attach __P((struct ncr53c9x_softc *, 364 struct scsi_adapter *, struct scsi_device *)); 365 int ncr53c9x_scsi_cmd __P((struct scsi_xfer *)); 366 void ncr53c9x_reset __P((struct ncr53c9x_softc *)); 367 int ncr53c9x_intr __P((struct ncr53c9x_softc *)); 368
Indexes created Sat Oct 25 10:09:55 GMT 2025