ncr53c9xvar.h revision 1.23
1 /* $NetBSD: ncr53c9xvar.h,v 1.23 2000/03/29 03:03:28 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1994 Peter Galbavy. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by Peter Galbavy. 54 * 4. The name of the author may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 /* Set this to 1 for normal debug, or 2 for per-target tracing. */ 70 #define NCR53C9X_DEBUG 1 71 72 #define NCR_ABORT_TIMEOUT 2000 /* time to wait for abort */ 73 #define NCR_SENSE_TIMEOUT 1000 /* time to wait for sense */ 74 75 #define FREQTOCCF(freq) (((freq + 4) / 5)) 76 77 /* 78 * NCR 53c9x variants. Note, these values are used as indexes into 79 * a table; don't modify them unless you know what you're doing. 80 */ 81 #define NCR_VARIANT_ESP100 0 82 #define NCR_VARIANT_ESP100A 1 83 #define NCR_VARIANT_ESP200 2 84 #define NCR_VARIANT_NCR53C94 3 85 #define NCR_VARIANT_NCR53C96 4 86 #define NCR_VARIANT_ESP406 5 87 #define NCR_VARIANT_FAS408 6 88 #define NCR_VARIANT_FAS216 7 89 #define NCR_VARIANT_AM53C974 8 90 #define NCR_VARIANT_MAX 9 91 92 /* 93 * ECB. Holds additional information for each SCSI command Comments: We 94 * need a separate scsi command block because we may need to overwrite it 95 * with a request sense command. Basicly, we refrain from fiddling with 96 * the scsipi_xfer struct (except do the expected updating of return values). 97 * We'll generally update: xs->{flags,resid,error,sense,status} and 98 * occasionally xs->retries. 99 */ 100 struct ncr53c9x_ecb { 101 TAILQ_ENTRY(ncr53c9x_ecb) chain; 102 struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */ 103 int flags; 104 #define ECB_ALLOC 0x01 105 #define ECB_NEXUS 0x02 106 #define ECB_SENSE 0x04 107 #define ECB_ABORT 0x40 108 #define ECB_RESET 0x80 109 #define ECB_TENTATIVE_DONE 0x100 110 int timeout; 111 112 struct { 113 u_char id; /* Selection Id msg */ 114 struct scsi_generic cmd; /* SCSI command block */ 115 } cmd; 116 int clen; /* Size of command in cmd.cmd */ 117 char *daddr; /* Saved data pointer */ 118 int dleft; /* Residue */ 119 u_char stat; /* SCSI status byte */ 120 u_char pad[3]; 121 122 #if NCR53C9X_DEBUG > 1 123 char trace[1000]; 124 #endif 125 }; 126 #if NCR53C9X_DEBUG > 1 127 #define ECB_TRACE(ecb, msg, a, b) do { \ 128 const char *f = "[" msg "]"; \ 129 int n = strlen((ecb)->trace); \ 130 if (n < (sizeof((ecb)->trace)-100)) \ 131 sprintf((ecb)->trace + n, f, a, b); \ 132 } while(0) 133 #else 134 #define ECB_TRACE(ecb, msg, a, b) 135 #endif 136 137 /* 138 * Some info about each (possible) target on the SCSI bus. This should 139 * probably have been a "per target+lunit" structure, but we'll leave it at 140 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 141 */ 142 struct ncr53c9x_tinfo { 143 int cmds; /* #commands processed */ 144 int dconns; /* #disconnects */ 145 int touts; /* #timeouts */ 146 int perrs; /* #parity errors */ 147 int senses; /* #request sense commands sent */ 148 ushort lubusy; /* What local units/subr. are busy? */ 149 u_char flags; 150 #define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ 151 #define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ 152 #define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ 153 #define T_SYNCMODE 0x08 /* sync mode has been negotiated */ 154 #define T_SYNCHOFF 0x10 /* .. */ 155 #define T_RSELECTOFF 0x20 /* .. */ 156 u_char period; /* Period suggestion */ 157 u_char offset; /* Offset suggestion */ 158 u_char pad[3]; 159 }; 160 161 /* Register a linenumber (for debugging) */ 162 #define LOGLINE(p) 163 164 #define NCR_SHOWECBS 0x01 165 #define NCR_SHOWINTS 0x02 166 #define NCR_SHOWCMDS 0x04 167 #define NCR_SHOWMISC 0x08 168 #define NCR_SHOWTRAC 0x10 169 #define NCR_SHOWSTART 0x20 170 #define NCR_SHOWPHASE 0x40 171 #define NCR_SHOWDMA 0x80 172 #define NCR_SHOWCCMDS 0x100 173 #define NCR_SHOWMSGS 0x200 174 175 #ifdef NCR53C9X_DEBUG 176 extern int ncr53c9x_debug; 177 #define NCR_ECBS(str) \ 178 do {if (ncr53c9x_debug & NCR_SHOWECBS) printf str;} while (0) 179 #define NCR_MISC(str) \ 180 do {if (ncr53c9x_debug & NCR_SHOWMISC) printf str;} while (0) 181 #define NCR_INTS(str) \ 182 do {if (ncr53c9x_debug & NCR_SHOWINTS) printf str;} while (0) 183 #define NCR_TRACE(str) \ 184 do {if (ncr53c9x_debug & NCR_SHOWTRAC) printf str;} while (0) 185 #define NCR_CMDS(str) \ 186 do {if (ncr53c9x_debug & NCR_SHOWCMDS) printf str;} while (0) 187 #define NCR_START(str) \ 188 do {if (ncr53c9x_debug & NCR_SHOWSTART) printf str;}while (0) 189 #define NCR_PHASE(str) \ 190 do {if (ncr53c9x_debug & NCR_SHOWPHASE) printf str;}while (0) 191 #define NCR_DMA(str) \ 192 do {if (ncr53c9x_debug & NCR_SHOWDMA) printf str;}while (0) 193 #define NCR_MSGS(str) \ 194 do {if (ncr53c9x_debug & NCR_SHOWMSGS) printf str;}while (0) 195 #else 196 #define NCR_ECBS(str) 197 #define NCR_MISC(str) 198 #define NCR_INTS(str) 199 #define NCR_TRACE(str) 200 #define NCR_CMDS(str) 201 #define NCR_START(str) 202 #define NCR_PHASE(str) 203 #define NCR_DMA(str) 204 #define NCR_MSGS(str) 205 #endif 206 207 #define NCR_MAX_MSG_LEN 8 208 209 struct ncr53c9x_softc; 210 211 /* 212 * Function switch used as glue to MD code. 213 */ 214 struct ncr53c9x_glue { 215 /* Mandatory entry points. */ 216 u_char (*gl_read_reg) __P((struct ncr53c9x_softc *, int)); 217 void (*gl_write_reg) __P((struct ncr53c9x_softc *, int, u_char)); 218 int (*gl_dma_isintr) __P((struct ncr53c9x_softc *)); 219 void (*gl_dma_reset) __P((struct ncr53c9x_softc *)); 220 int (*gl_dma_intr) __P((struct ncr53c9x_softc *)); 221 int (*gl_dma_setup) __P((struct ncr53c9x_softc *, 222 caddr_t *, size_t *, int, size_t *)); 223 void (*gl_dma_go) __P((struct ncr53c9x_softc *)); 224 void (*gl_dma_stop) __P((struct ncr53c9x_softc *)); 225 int (*gl_dma_isactive) __P((struct ncr53c9x_softc *)); 226 227 /* Optional entry points. */ 228 void (*gl_clear_latched_intr) __P((struct ncr53c9x_softc *)); 229 }; 230 231 struct ncr53c9x_softc { 232 struct device sc_dev; /* us as a device */ 233 234 struct evcnt sc_intrcnt; /* intr count */ 235 struct scsipi_link sc_link; /* scsipi link struct */ 236 struct scsipi_adapter sc_adapter; /* scsipi adapter glue */ 237 struct device *sc_child; /* attached scsibus, if any */ 238 239 struct ncr53c9x_glue *sc_glue; /* glue to MD code */ 240 241 int sc_cfflags; /* Copy of config flags */ 242 243 /* register defaults */ 244 u_char sc_cfg1; /* Config 1 */ 245 u_char sc_cfg2; /* Config 2, not ESP100 */ 246 u_char sc_cfg3; /* Config 3, only ESP200 */ 247 u_char sc_cfg3_fscsi; /* Chip-specific FSCSI bit */ 248 u_char sc_cfg4; /* Config 3, only ESP200 */ 249 u_char sc_cfg5; /* Config 3, only ESP200 */ 250 u_char sc_ccf; /* Clock Conversion */ 251 u_char sc_timeout; 252 253 /* register copies, see espreadregs() */ 254 u_char sc_espintr; 255 u_char sc_espstat; 256 u_char sc_espstep; 257 u_char sc_espfflags; 258 259 /* Lists of command blocks */ 260 TAILQ_HEAD(ecb_list, ncr53c9x_ecb) 261 free_list, 262 ready_list, 263 nexus_list; 264 265 struct ncr53c9x_ecb *sc_nexus; /* Current command */ 266 struct ncr53c9x_ecb sc_ecb[3*8]; /* Three per target */ 267 struct ncr53c9x_tinfo sc_tinfo[8]; 268 269 /* Data about the current nexus (updated for every cmd switch) */ 270 caddr_t sc_dp; /* Current data pointer */ 271 ssize_t sc_dleft; /* Data left to transfer */ 272 273 /* Adapter state */ 274 int sc_phase; /* Copy of what bus phase we are in */ 275 int sc_prevphase; /* Copy of what bus phase we were in */ 276 u_char sc_state; /* State applicable to the adapter */ 277 u_char sc_flags; /* See below */ 278 u_char sc_selid; 279 u_char sc_lastcmd; 280 281 /* Message stuff */ 282 u_char sc_msgpriq; /* One or more messages to send (encoded) */ 283 u_char sc_msgout; /* What message is on its way out? */ 284 u_char sc_msgoutq; /* What messages have been sent so far? */ 285 u_char *sc_omess; /* MSGOUT buffer */ 286 caddr_t sc_omp; /* Message pointer (for multibyte messages) */ 287 size_t sc_omlen; 288 u_char *sc_imess; /* MSGIN buffer */ 289 caddr_t sc_imp; /* Message pointer (for multibyte messages) */ 290 size_t sc_imlen; 291 292 caddr_t sc_cmdp; /* Command pointer (for DMAed commands) */ 293 size_t sc_cmdlen; /* Size of command in transit */ 294 295 /* Hardware attributes */ 296 int sc_freq; /* SCSI bus frequency in MHz */ 297 int sc_id; /* Our SCSI id */ 298 int sc_rev; /* Chip revision */ 299 int sc_features; /* Chip features */ 300 int sc_minsync; /* Minimum sync period / 4 */ 301 int sc_maxxfer; /* Maximum transfer size */ 302 }; 303 304 /* values for sc_state */ 305 #define NCR_IDLE 1 /* waiting for something to do */ 306 #define NCR_SELECTING 2 /* SCSI command is arbiting */ 307 #define NCR_RESELECTED 3 /* Has been reselected */ 308 #define NCR_CONNECTED 4 /* Actively using the SCSI bus */ 309 #define NCR_DISCONNECT 5 /* MSG_DISCONNECT received */ 310 #define NCR_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */ 311 #define NCR_CLEANING 7 312 #define NCR_SBR 8 /* Expect a SCSI RST because we commanded it */ 313 314 /* values for sc_flags */ 315 #define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ 316 #define NCR_ABORTING 0x02 /* Bailing out */ 317 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 318 #define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ 319 #define NCR_ICCS 0x10 /* Expect status phase results */ 320 #define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */ 321 #define NCR_ATN 0x40 /* ATN asserted */ 322 #define NCR_EXPECT_ILLCMD 0x80 /* Expect Illegal Command Interrupt */ 323 324 /* values for sc_features */ 325 #define NCR_F_HASCFG3 0x01 /* chip has CFG3 register */ 326 #define NCR_F_FASTSCSI 0x02 /* chip supports Fast mode */ 327 328 /* values for sc_msgout */ 329 #define SEND_DEV_RESET 0x01 330 #define SEND_PARITY_ERROR 0x02 331 #define SEND_INIT_DET_ERR 0x04 332 #define SEND_REJECT 0x08 333 #define SEND_IDENTIFY 0x10 334 #define SEND_ABORT 0x20 335 #define SEND_SDTR 0x40 336 #define SEND_WDTR 0x80 337 338 /* SCSI Status codes */ 339 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ 340 341 /* phase bits */ 342 #define IOI 0x01 343 #define CDI 0x02 344 #define MSGI 0x04 345 346 /* Information transfer phases */ 347 #define DATA_OUT_PHASE (0) 348 #define DATA_IN_PHASE (IOI) 349 #define COMMAND_PHASE (CDI) 350 #define STATUS_PHASE (CDI|IOI) 351 #define MESSAGE_OUT_PHASE (MSGI|CDI) 352 #define MESSAGE_IN_PHASE (MSGI|CDI|IOI) 353 354 #define PHASE_MASK (MSGI|CDI|IOI) 355 356 /* Some pseudo phases for getphase()*/ 357 #define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ 358 #define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ 359 #define PSEUDO_PHASE 0x100 /* "pseudo" bit */ 360 361 /* 362 * Macros to read and write the chip's registers. 363 */ 364 #define NCR_READ_REG(sc, reg) \ 365 (*(sc)->sc_glue->gl_read_reg)((sc), (reg)) 366 #define NCR_WRITE_REG(sc, reg, val) \ 367 (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val)) 368 369 #ifdef NCR53C9X_DEBUG 370 #define NCRCMD(sc, cmd) do { \ 371 if (ncr53c9x_debug & NCR_SHOWCCMDS) \ 372 printf("<cmd:0x%x>", (unsigned)cmd); \ 373 sc->sc_lastcmd = cmd; \ 374 NCR_WRITE_REG(sc, NCR_CMD, cmd); \ 375 } while (0) 376 #else 377 #define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd) 378 #endif 379 380 /* 381 * DMA macros for NCR53c9x 382 */ 383 #define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc)) 384 #define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc)) 385 #define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc)) 386 #define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \ 387 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize)) 388 #define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc)) 389 #define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc)) 390 391 /* 392 * Macro to convert the chip register Clock Per Byte value to 393 * Sunchronous Transfer Period. 394 */ 395 #define ncr53c9x_cpb2stp(sc, cpb) \ 396 ((250 * (cpb)) / (sc)->sc_freq) 397 398 void ncr53c9x_attach __P((struct ncr53c9x_softc *, struct scsipi_device *)); 399 int ncr53c9x_detach __P((struct ncr53c9x_softc *, int)); 400 int ncr53c9x_scsi_cmd __P((struct scsipi_xfer *)); 401 void ncr53c9x_reset __P((struct ncr53c9x_softc *)); 402 int ncr53c9x_intr __P((void *)); 403 void ncr53c9x_init __P((struct ncr53c9x_softc *, int)); 404 405 extern int ncr53c9x_dmaselect; 406
Indexes created Thu Oct 23 22:10:10 GMT 2025