ncr53c9xvar.h revision 1.4
1 /* $NetBSD: ncr53c9xvar.h,v 1.4 1997/04/01 22:08:18 gwr Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Jason R. Thorpe. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed for the NetBSD Project 18 * by Jason R. Thorpe. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1994 Peter Galbavy. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Peter Galbavy. 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 /* Set this to 1 for normal debug, or 2 for per-target tracing. */ 64 #define NCR53C9X_DEBUG 0 65 66 #define NCR_ABORT_TIMEOUT 2000 /* time to wait for abort */ 67 #define NCR_SENSE_TIMEOUT 1000 /* time to wait for sense */ 68 69 #define FREQTOCCF(freq) (((freq + 4) / 5)) 70 71 /* 72 * NCR 53c9x variants. Note, these values are used as indexes into 73 * a table; don't modify them unless you know what you're doing. 74 */ 75 #define NCR_VARIANT_ESP100 0 76 #define NCR_VARIANT_ESP100A 1 77 #define NCR_VARIANT_ESP200 2 78 #define NCR_VARIANT_NCR53C94 3 79 #define NCR_VARIANT_NCR53C96 4 80 #define NCR_VARIANT_MAX 5 81 82 /* 83 * ECB. Holds additional information for each SCSI command Comments: We 84 * need a separate scsi command block because we may need to overwrite it 85 * with a request sense command. Basicly, we refrain from fiddling with 86 * the scsi_xfer struct (except do the expected updating of return values). 87 * We'll generally update: xs->{flags,resid,error,sense,status} and 88 * occasionally xs->retries. 89 */ 90 struct ncr53c9x_ecb { 91 TAILQ_ENTRY(ncr53c9x_ecb) chain; 92 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ 93 int flags; 94 #define ECB_ALLOC 0x01 95 #define ECB_NEXUS 0x02 96 #define ECB_SENSE 0x04 97 #define ECB_ABORT 0x40 98 #define ECB_RESET 0x80 99 int timeout; 100 101 struct scsi_generic cmd; /* SCSI command block */ 102 int clen; 103 char *daddr; /* Saved data pointer */ 104 int dleft; /* Residue */ 105 u_char stat; /* SCSI status byte */ 106 u_char pad[3]; 107 108 #if NCR53C9X_DEBUG > 1 109 char trace[1000]; 110 #endif 111 }; 112 #if NCR53C9X_DEBUG > 1 113 #define ECB_TRACE(ecb, msg, a, b) do { \ 114 const char *f = "[" msg "]"; \ 115 int n = strlen((ecb)->trace); \ 116 if (n < (sizeof((ecb)->trace)-100)) \ 117 sprintf((ecb)->trace + n, f, a, b); \ 118 } while(0) 119 #else 120 #define ECB_TRACE(ecb, msg, a, b) 121 #endif 122 123 /* 124 * Some info about each (possible) target on the SCSI bus. This should 125 * probably have been a "per target+lunit" structure, but we'll leave it at 126 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 127 */ 128 struct ncr53c9x_tinfo { 129 int cmds; /* #commands processed */ 130 int dconns; /* #disconnects */ 131 int touts; /* #timeouts */ 132 int perrs; /* #parity errors */ 133 int senses; /* #request sense commands sent */ 134 ushort lubusy; /* What local units/subr. are busy? */ 135 u_char flags; 136 #define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ 137 #define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ 138 #define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ 139 #define T_SYNCMODE 0x08 /* sync mode has been negotiated */ 140 #define T_SYNCHOFF 0x10 /* .. */ 141 #define T_RSELECTOFF 0x20 /* .. */ 142 u_char period; /* Period suggestion */ 143 u_char offset; /* Offset suggestion */ 144 u_char pad[3]; 145 } tinfo_t; 146 147 /* Register a linenumber (for debugging) */ 148 #define LOGLINE(p) 149 150 #define NCR_SHOWECBS 0x01 151 #define NCR_SHOWINTS 0x02 152 #define NCR_SHOWCMDS 0x04 153 #define NCR_SHOWMISC 0x08 154 #define NCR_SHOWTRAC 0x10 155 #define NCR_SHOWSTART 0x20 156 #define NCR_SHOWPHASE 0x40 157 #define NCR_SHOWDMA 0x80 158 #define NCR_SHOWCCMDS 0x100 159 #define NCR_SHOWMSGS 0x200 160 161 #ifdef NCR53C9X_DEBUG 162 extern int ncr53c9x_debug; 163 #define NCR_ECBS(str) \ 164 do {if (ncr53c9x_debug & NCR_SHOWECBS) printf str;} while (0) 165 #define NCR_MISC(str) \ 166 do {if (ncr53c9x_debug & NCR_SHOWMISC) printf str;} while (0) 167 #define NCR_INTS(str) \ 168 do {if (ncr53c9x_debug & NCR_SHOWINTS) printf str;} while (0) 169 #define NCR_TRACE(str) \ 170 do {if (ncr53c9x_debug & NCR_SHOWTRAC) printf str;} while (0) 171 #define NCR_CMDS(str) \ 172 do {if (ncr53c9x_debug & NCR_SHOWCMDS) printf str;} while (0) 173 #define NCR_START(str) \ 174 do {if (ncr53c9x_debug & NCR_SHOWSTART) printf str;}while (0) 175 #define NCR_PHASE(str) \ 176 do {if (ncr53c9x_debug & NCR_SHOWPHASE) printf str;}while (0) 177 #define NCR_DMA(str) \ 178 do {if (ncr53c9x_debug & NCR_SHOWDMA) printf str;}while (0) 179 #define NCR_MSGS(str) \ 180 do {if (ncr53c9x_debug & NCR_SHOWMSGS) printf str;}while (0) 181 #else 182 #define NCR_ECBS(str) 183 #define NCR_MISC(str) 184 #define NCR_INTS(str) 185 #define NCR_TRACE(str) 186 #define NCR_CMDS(str) 187 #define NCR_START(str) 188 #define NCR_PHASE(str) 189 #define NCR_DMA(str) 190 #define NCR_MSGS(str) 191 #endif 192 193 #define NCR_MAX_MSG_LEN 8 194 195 struct ncr53c9x_softc; 196 197 /* 198 * Function switch used as glue to MD code. 199 */ 200 struct ncr53c9x_glue { 201 /* Mandatory entry points. */ 202 u_char (*gl_read_reg) __P((struct ncr53c9x_softc *, int)); 203 void (*gl_write_reg) __P((struct ncr53c9x_softc *, int, u_char)); 204 int (*gl_dma_isintr) __P((struct ncr53c9x_softc *)); 205 void (*gl_dma_reset) __P((struct ncr53c9x_softc *)); 206 int (*gl_dma_intr) __P((struct ncr53c9x_softc *)); 207 int (*gl_dma_setup) __P((struct ncr53c9x_softc *, 208 caddr_t *, size_t *, int, size_t *)); 209 void (*gl_dma_go) __P((struct ncr53c9x_softc *)); 210 void (*gl_dma_stop) __P((struct ncr53c9x_softc *)); 211 int (*gl_dma_isactive) __P((struct ncr53c9x_softc *)); 212 213 /* Optional entry points. */ 214 void (*gl_clear_latched_intr) __P((struct ncr53c9x_softc *)); 215 }; 216 217 struct ncr53c9x_softc { 218 struct device sc_dev; /* us as a device */ 219 220 struct evcnt sc_intrcnt; /* intr count */ 221 struct scsi_link sc_link; /* scsi lint struct */ 222 223 struct ncr53c9x_glue *sc_glue; /* glue to MD code */ 224 225 /* register defaults */ 226 u_char sc_cfg1; /* Config 1 */ 227 u_char sc_cfg2; /* Config 2, not ESP100 */ 228 u_char sc_cfg3; /* Config 3, only ESP200 */ 229 u_char sc_ccf; /* Clock Conversion */ 230 u_char sc_timeout; 231 232 /* register copies, see espreadregs() */ 233 u_char sc_espintr; 234 u_char sc_espstat; 235 u_char sc_espstep; 236 u_char sc_espfflags; 237 238 /* Lists of command blocks */ 239 TAILQ_HEAD(ecb_list, ncr53c9x_ecb) free_list, 240 ready_list, 241 nexus_list; 242 243 struct ncr53c9x_ecb *sc_nexus; /* current command */ 244 struct ncr53c9x_ecb sc_ecb[3*8]; /* three per target */ 245 struct ncr53c9x_tinfo sc_tinfo[8]; 246 247 /* Data about the current nexus (updated for every cmd switch) */ 248 caddr_t sc_dp; /* Current data pointer */ 249 ssize_t sc_dleft; /* Data left to transfer */ 250 251 /* Adapter state */ 252 int sc_phase; /* Copy of what bus phase we are in */ 253 int sc_prevphase; /* Copy of what bus phase we were in */ 254 u_char sc_state; /* State applicable to the adapter */ 255 u_char sc_flags; 256 u_char sc_selid; 257 u_char sc_lastcmd; 258 259 /* Message stuff */ 260 u_char sc_msgpriq; /* One or more messages to send (encoded) */ 261 u_char sc_msgout; /* What message is on its way out? */ 262 u_char sc_msgoutq; /* What messages have been sent so far? */ 263 u_char sc_omess[NCR_MAX_MSG_LEN]; 264 caddr_t sc_omp; /* Message pointer (for multibyte messages) */ 265 size_t sc_omlen; 266 u_char sc_imess[NCR_MAX_MSG_LEN + 1]; 267 caddr_t sc_imp; /* Message pointer (for multibyte messages) */ 268 size_t sc_imlen; 269 270 /* hardware/openprom stuff */ 271 int sc_freq; /* Freq in HZ */ 272 int sc_id; /* our scsi id */ 273 int sc_rev; /* esp revision */ 274 int sc_minsync; /* minimum sync period / 4 */ 275 int sc_maxxfer; /* maximum transfer size */ 276 }; 277 278 /* values for sc_state */ 279 #define NCR_IDLE 1 /* waiting for something to do */ 280 #define NCR_SELECTING 2 /* SCSI command is arbiting */ 281 #define NCR_RESELECTED 3 /* Has been reselected */ 282 #define NCR_CONNECTED 4 /* Actively using the SCSI bus */ 283 #define NCR_DISCONNECT 5 /* MSG_DISCONNECT received */ 284 #define NCR_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */ 285 #define NCR_CLEANING 7 286 #define NCR_SBR 8 /* Expect a SCSI RST because we commanded it */ 287 288 /* values for sc_flags */ 289 #define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ 290 #define NCR_ABORTING 0x02 /* Bailing out */ 291 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 292 #define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ 293 #define NCR_ICCS 0x10 /* Expect status phase results */ 294 #define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */ 295 #define NCR_ATN 0x40 /* ATN asserted */ 296 297 /* values for sc_msgout */ 298 #define SEND_DEV_RESET 0x01 299 #define SEND_PARITY_ERROR 0x02 300 #define SEND_INIT_DET_ERR 0x04 301 #define SEND_REJECT 0x08 302 #define SEND_IDENTIFY 0x10 303 #define SEND_ABORT 0x20 304 #define SEND_SDTR 0x40 305 #define SEND_WDTR 0x80 306 307 /* SCSI Status codes */ 308 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ 309 310 /* phase bits */ 311 #define IOI 0x01 312 #define CDI 0x02 313 #define MSGI 0x04 314 315 /* Information transfer phases */ 316 #define DATA_OUT_PHASE (0) 317 #define DATA_IN_PHASE (IOI) 318 #define COMMAND_PHASE (CDI) 319 #define STATUS_PHASE (CDI|IOI) 320 #define MESSAGE_OUT_PHASE (MSGI|CDI) 321 #define MESSAGE_IN_PHASE (MSGI|CDI|IOI) 322 323 #define PHASE_MASK (MSGI|CDI|IOI) 324 325 /* Some pseudo phases for getphase()*/ 326 #define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ 327 #define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ 328 #define PSEUDO_PHASE 0x100 /* "pseudo" bit */ 329 330 /* 331 * Macros to read and write the chip's registers. 332 */ 333 #define NCR_READ_REG(sc, reg) \ 334 (*(sc)->sc_glue->gl_read_reg)((sc), (reg)) 335 #define NCR_WRITE_REG(sc, reg, val) \ 336 (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val)) 337 338 #ifdef NCR53C9X_DEBUG 339 #define NCRCMD(sc, cmd) do { \ 340 if (ncr53c9x_debug & NCR_SHOWCCMDS) \ 341 printf("<cmd:0x%x>", (unsigned)cmd); \ 342 sc->sc_lastcmd = cmd; \ 343 NCR_WRITE_REG(sc, NCR_CMD, cmd); \ 344 } while (0) 345 #else 346 #define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd) 347 #endif 348 349 /* 350 * DMA macros for NCR53c9x 351 */ 352 #define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc)) 353 #define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc)) 354 #define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc)) 355 #define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \ 356 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize)) 357 #define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc)) 358 #define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc)) 359 360 /* 361 * Macro to convert the chip register Clock Per Byte value to 362 * Sunchronous Transfer Period. 363 */ 364 #define ncr53c9x_cpb2stp(sc, cpb) \ 365 ((250 * (cpb)) / (sc)->sc_freq) 366 367 void ncr53c9x_attach __P((struct ncr53c9x_softc *, 368 struct scsi_adapter *, struct scsi_device *)); 369 int ncr53c9x_scsi_cmd __P((struct scsi_xfer *)); 370 void ncr53c9x_reset __P((struct ncr53c9x_softc *)); 371 int ncr53c9x_intr __P((struct ncr53c9x_softc *)); 372
Indexes created Sat Nov 01 05:10:12 GMT 2025