ncr53c9xvar.h revision 1.6.2.2
1 /* $NetBSD: ncr53c9xvar.h,v 1.6.2.2 1997/07/22 12:21:13 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Jason R. Thorpe. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed for the NetBSD Project 18 * by Jason R. Thorpe. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1994 Peter Galbavy. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Peter Galbavy. 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 /* Set this to 1 for normal debug, or 2 for per-target tracing. */ 64 #define NCR53C9X_DEBUG 1 65 66 #define NCR_ABORT_TIMEOUT 2000 /* time to wait for abort */ 67 #define NCR_SENSE_TIMEOUT 1000 /* time to wait for sense */ 68 69 #define FREQTOCCF(freq) (((freq + 4) / 5)) 70 71 /* 72 * NCR 53c9x variants. Note, these values are used as indexes into 73 * a table; don't modify them unless you know what you're doing. 74 */ 75 #define NCR_VARIANT_ESP100 0 76 #define NCR_VARIANT_ESP100A 1 77 #define NCR_VARIANT_ESP200 2 78 #define NCR_VARIANT_NCR53C94 3 79 #define NCR_VARIANT_NCR53C96 4 80 #define NCR_VARIANT_ESP406 5 81 #define NCR_VARIANT_FAS408 6 82 #define NCR_VARIANT_MAX 7 83 84 /* 85 * ECB. Holds additional information for each SCSI command Comments: We 86 * need a separate scsi command block because we may need to overwrite it 87 * with a request sense command. Basicly, we refrain from fiddling with 88 * the scsipi_xfer struct (except do the expected updating of return values). 89 * We'll generally update: xs->{flags,resid,error,sense,status} and 90 * occasionally xs->retries. 91 */ 92 struct ncr53c9x_ecb { 93 TAILQ_ENTRY(ncr53c9x_ecb) chain; 94 struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */ 95 int flags; 96 #define ECB_ALLOC 0x01 97 #define ECB_NEXUS 0x02 98 #define ECB_SENSE 0x04 99 #define ECB_ABORT 0x40 100 #define ECB_RESET 0x80 101 #define ECB_TENTATIVE_DONE 0x100 102 int timeout; 103 104 struct { 105 u_char id; /* Selection Id msg */ 106 struct scsi_generic cmd; /* SCSI command block */ 107 } cmd; 108 int clen; /* Size of command in cmd.cmd */ 109 char *daddr; /* Saved data pointer */ 110 int dleft; /* Residue */ 111 u_char stat; /* SCSI status byte */ 112 u_char pad[3]; 113 114 #if NCR53C9X_DEBUG > 1 115 char trace[1000]; 116 #endif 117 }; 118 #if NCR53C9X_DEBUG > 1 119 #define ECB_TRACE(ecb, msg, a, b) do { \ 120 const char *f = "[" msg "]"; \ 121 int n = strlen((ecb)->trace); \ 122 if (n < (sizeof((ecb)->trace)-100)) \ 123 sprintf((ecb)->trace + n, f, a, b); \ 124 } while(0) 125 #else 126 #define ECB_TRACE(ecb, msg, a, b) 127 #endif 128 129 /* 130 * Some info about each (possible) target on the SCSI bus. This should 131 * probably have been a "per target+lunit" structure, but we'll leave it at 132 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 133 */ 134 struct ncr53c9x_tinfo { 135 int cmds; /* #commands processed */ 136 int dconns; /* #disconnects */ 137 int touts; /* #timeouts */ 138 int perrs; /* #parity errors */ 139 int senses; /* #request sense commands sent */ 140 ushort lubusy; /* What local units/subr. are busy? */ 141 u_char flags; 142 #define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ 143 #define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ 144 #define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ 145 #define T_SYNCMODE 0x08 /* sync mode has been negotiated */ 146 #define T_SYNCHOFF 0x10 /* .. */ 147 #define T_RSELECTOFF 0x20 /* .. */ 148 u_char period; /* Period suggestion */ 149 u_char offset; /* Offset suggestion */ 150 u_char pad[3]; 151 } tinfo_t; 152 153 /* Register a linenumber (for debugging) */ 154 #define LOGLINE(p) 155 156 #define NCR_SHOWECBS 0x01 157 #define NCR_SHOWINTS 0x02 158 #define NCR_SHOWCMDS 0x04 159 #define NCR_SHOWMISC 0x08 160 #define NCR_SHOWTRAC 0x10 161 #define NCR_SHOWSTART 0x20 162 #define NCR_SHOWPHASE 0x40 163 #define NCR_SHOWDMA 0x80 164 #define NCR_SHOWCCMDS 0x100 165 #define NCR_SHOWMSGS 0x200 166 167 #ifdef NCR53C9X_DEBUG 168 extern int ncr53c9x_debug; 169 #define NCR_ECBS(str) \ 170 do {if (ncr53c9x_debug & NCR_SHOWECBS) printf str;} while (0) 171 #define NCR_MISC(str) \ 172 do {if (ncr53c9x_debug & NCR_SHOWMISC) printf str;} while (0) 173 #define NCR_INTS(str) \ 174 do {if (ncr53c9x_debug & NCR_SHOWINTS) printf str;} while (0) 175 #define NCR_TRACE(str) \ 176 do {if (ncr53c9x_debug & NCR_SHOWTRAC) printf str;} while (0) 177 #define NCR_CMDS(str) \ 178 do {if (ncr53c9x_debug & NCR_SHOWCMDS) printf str;} while (0) 179 #define NCR_START(str) \ 180 do {if (ncr53c9x_debug & NCR_SHOWSTART) printf str;}while (0) 181 #define NCR_PHASE(str) \ 182 do {if (ncr53c9x_debug & NCR_SHOWPHASE) printf str;}while (0) 183 #define NCR_DMA(str) \ 184 do {if (ncr53c9x_debug & NCR_SHOWDMA) printf str;}while (0) 185 #define NCR_MSGS(str) \ 186 do {if (ncr53c9x_debug & NCR_SHOWMSGS) printf str;}while (0) 187 #else 188 #define NCR_ECBS(str) 189 #define NCR_MISC(str) 190 #define NCR_INTS(str) 191 #define NCR_TRACE(str) 192 #define NCR_CMDS(str) 193 #define NCR_START(str) 194 #define NCR_PHASE(str) 195 #define NCR_DMA(str) 196 #define NCR_MSGS(str) 197 #endif 198 199 #define NCR_MAX_MSG_LEN 8 200 201 struct ncr53c9x_softc; 202 203 /* 204 * Function switch used as glue to MD code. 205 */ 206 struct ncr53c9x_glue { 207 /* Mandatory entry points. */ 208 u_char (*gl_read_reg) __P((struct ncr53c9x_softc *, int)); 209 void (*gl_write_reg) __P((struct ncr53c9x_softc *, int, u_char)); 210 int (*gl_dma_isintr) __P((struct ncr53c9x_softc *)); 211 void (*gl_dma_reset) __P((struct ncr53c9x_softc *)); 212 int (*gl_dma_intr) __P((struct ncr53c9x_softc *)); 213 int (*gl_dma_setup) __P((struct ncr53c9x_softc *, 214 caddr_t *, size_t *, int, size_t *)); 215 void (*gl_dma_go) __P((struct ncr53c9x_softc *)); 216 void (*gl_dma_stop) __P((struct ncr53c9x_softc *)); 217 int (*gl_dma_isactive) __P((struct ncr53c9x_softc *)); 218 219 /* Optional entry points. */ 220 void (*gl_clear_latched_intr) __P((struct ncr53c9x_softc *)); 221 }; 222 223 struct ncr53c9x_softc { 224 struct device sc_dev; /* us as a device */ 225 226 struct evcnt sc_intrcnt; /* intr count */ 227 struct scsipi_link sc_link; /* scsipi lint struct */ 228 229 struct ncr53c9x_glue *sc_glue; /* glue to MD code */ 230 231 /* register defaults */ 232 u_char sc_cfg1; /* Config 1 */ 233 u_char sc_cfg2; /* Config 2, not ESP100 */ 234 u_char sc_cfg3; /* Config 3, only ESP200 */ 235 u_char sc_ccf; /* Clock Conversion */ 236 u_char sc_timeout; 237 238 /* register copies, see espreadregs() */ 239 u_char sc_espintr; 240 u_char sc_espstat; 241 u_char sc_espstep; 242 u_char sc_espfflags; 243 244 /* Lists of command blocks */ 245 TAILQ_HEAD(ecb_list, ncr53c9x_ecb) free_list, 246 ready_list, 247 nexus_list; 248 249 struct ncr53c9x_ecb *sc_nexus; /* current command */ 250 struct ncr53c9x_ecb sc_ecb[3*8]; /* three per target */ 251 struct ncr53c9x_tinfo sc_tinfo[8]; 252 253 /* Data about the current nexus (updated for every cmd switch) */ 254 caddr_t sc_dp; /* Current data pointer */ 255 ssize_t sc_dleft; /* Data left to transfer */ 256 257 /* Adapter state */ 258 int sc_phase; /* Copy of what bus phase we are in */ 259 int sc_prevphase; /* Copy of what bus phase we were in */ 260 u_char sc_state; /* State applicable to the adapter */ 261 u_char sc_flags; 262 u_char sc_selid; 263 u_char sc_lastcmd; 264 265 /* Message stuff */ 266 u_char sc_msgpriq; /* One or more messages to send (encoded) */ 267 u_char sc_msgout; /* What message is on its way out? */ 268 u_char sc_msgoutq; /* What messages have been sent so far? */ 269 u_char sc_omess[NCR_MAX_MSG_LEN]; 270 caddr_t sc_omp; /* Message pointer (for multibyte messages) */ 271 size_t sc_omlen; 272 u_char sc_imess[NCR_MAX_MSG_LEN + 1]; 273 caddr_t sc_imp; /* Message pointer (for multibyte messages) */ 274 size_t sc_imlen; 275 276 caddr_t sc_cmdp; /* Command pointer (for DMAed commands) */ 277 size_t sc_cmdlen; /* Size of command in transit */ 278 279 /* hardware/openprom stuff */ 280 int sc_freq; /* Freq in HZ */ 281 int sc_id; /* our scsi id */ 282 int sc_rev; /* esp revision */ 283 int sc_minsync; /* minimum sync period / 4 */ 284 int sc_maxxfer; /* maximum transfer size */ 285 }; 286 287 /* values for sc_state */ 288 #define NCR_IDLE 1 /* waiting for something to do */ 289 #define NCR_SELECTING 2 /* SCSI command is arbiting */ 290 #define NCR_RESELECTED 3 /* Has been reselected */ 291 #define NCR_CONNECTED 4 /* Actively using the SCSI bus */ 292 #define NCR_DISCONNECT 5 /* MSG_DISCONNECT received */ 293 #define NCR_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */ 294 #define NCR_CLEANING 7 295 #define NCR_SBR 8 /* Expect a SCSI RST because we commanded it */ 296 297 /* values for sc_flags */ 298 #define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ 299 #define NCR_ABORTING 0x02 /* Bailing out */ 300 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 301 #define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ 302 #define NCR_ICCS 0x10 /* Expect status phase results */ 303 #define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */ 304 #define NCR_ATN 0x40 /* ATN asserted */ 305 #define NCR_EXPECT_ILLCMD 0x80 /* Expect Illegal Command Interrupt */ 306 307 /* values for sc_msgout */ 308 #define SEND_DEV_RESET 0x01 309 #define SEND_PARITY_ERROR 0x02 310 #define SEND_INIT_DET_ERR 0x04 311 #define SEND_REJECT 0x08 312 #define SEND_IDENTIFY 0x10 313 #define SEND_ABORT 0x20 314 #define SEND_SDTR 0x40 315 #define SEND_WDTR 0x80 316 317 /* SCSI Status codes */ 318 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ 319 320 /* phase bits */ 321 #define IOI 0x01 322 #define CDI 0x02 323 #define MSGI 0x04 324 325 /* Information transfer phases */ 326 #define DATA_OUT_PHASE (0) 327 #define DATA_IN_PHASE (IOI) 328 #define COMMAND_PHASE (CDI) 329 #define STATUS_PHASE (CDI|IOI) 330 #define MESSAGE_OUT_PHASE (MSGI|CDI) 331 #define MESSAGE_IN_PHASE (MSGI|CDI|IOI) 332 333 #define PHASE_MASK (MSGI|CDI|IOI) 334 335 /* Some pseudo phases for getphase()*/ 336 #define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ 337 #define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ 338 #define PSEUDO_PHASE 0x100 /* "pseudo" bit */ 339 340 /* 341 * Macros to read and write the chip's registers. 342 */ 343 #define NCR_READ_REG(sc, reg) \ 344 (*(sc)->sc_glue->gl_read_reg)((sc), (reg)) 345 #define NCR_WRITE_REG(sc, reg, val) \ 346 (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val)) 347 348 #ifdef NCR53C9X_DEBUG 349 #define NCRCMD(sc, cmd) do { \ 350 if (ncr53c9x_debug & NCR_SHOWCCMDS) \ 351 printf("<cmd:0x%x>", (unsigned)cmd); \ 352 sc->sc_lastcmd = cmd; \ 353 NCR_WRITE_REG(sc, NCR_CMD, cmd); \ 354 } while (0) 355 #else 356 #define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd) 357 #endif 358 359 /* 360 * DMA macros for NCR53c9x 361 */ 362 #define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc)) 363 #define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc)) 364 #define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc)) 365 #define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \ 366 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize)) 367 #define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc)) 368 #define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc)) 369 370 /* 371 * Macro to convert the chip register Clock Per Byte value to 372 * Sunchronous Transfer Period. 373 */ 374 #define ncr53c9x_cpb2stp(sc, cpb) \ 375 ((250 * (cpb)) / (sc)->sc_freq) 376 377 void ncr53c9x_attach __P((struct ncr53c9x_softc *, 378 struct scsipi_adapter *, struct scsipi_device *)); 379 int ncr53c9x_scsi_cmd __P((struct scsipi_xfer *)); 380 void ncr53c9x_reset __P((struct ncr53c9x_softc *)); 381 int ncr53c9x_intr __P((struct ncr53c9x_softc *)); 382 383 extern int ncr53c9x_dmaselect; 384
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