ne2000.c revision 1.21 1 /* $NetBSD: ne2000.c,v 1.21 1999/09/27 04:52:19 enami Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 * adapters.
43 *
44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 *
46 * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 * copied, distributed, and sold, in both source and binary form provided that
48 * the above copyright and these terms are retained. Under no circumstances is
49 * the author responsible for the proper functioning of this software, nor does
50 * the author assume any responsibility for damages incurred with its use.
51 */
52
53 /*
54 * Common code shared by all NE2000-compatible Ethernet interfaces.
55 */
56
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/device.h>
60 #include <sys/socket.h>
61 #include <sys/mbuf.h>
62 #include <sys/syslog.h>
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_types.h>
67 #include <net/if_media.h>
68
69 #include <net/if_ether.h>
70
71 #include <machine/bswap.h>
72 #include <machine/bus.h>
73
74 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
75 #define bus_space_write_stream_2 bus_space_write_2
76 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
77 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
78 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
79
80 #include <dev/ic/dp8390reg.h>
81 #include <dev/ic/dp8390var.h>
82
83 #include <dev/ic/ne2000reg.h>
84 #include <dev/ic/ne2000var.h>
85
86 #if BYTE_ORDER == BIG_ENDIAN
87 #include <machine/bswap.h>
88 #endif
89
90 int ne2000_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int));
91 int ne2000_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short));
92 void ne2000_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *));
93 int ne2000_test_mem __P((struct dp8390_softc *));
94
95 void ne2000_writemem __P((bus_space_tag_t, bus_space_handle_t,
96 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t,
97 int, int));
98 void ne2000_readmem __P((bus_space_tag_t, bus_space_handle_t,
99 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int));
100
101 void
102 ne2000_attach(nsc, myea, media, nmedia, defmedia)
103 struct ne2000_softc *nsc;
104 u_int8_t *myea;
105 int *media, nmedia, defmedia;
106 {
107 struct dp8390_softc *dsc = &nsc->sc_dp8390;
108 bus_space_tag_t nict = dsc->sc_regt;
109 bus_space_handle_t nich = dsc->sc_regh;
110 bus_space_tag_t asict = nsc->sc_asict;
111 bus_space_handle_t asich = nsc->sc_asich;
112 u_int8_t romdata[16];
113 int memsize, i, useword;
114
115 /*
116 * Detect it again unless caller specified it; this gives us
117 * the memory size.
118 */
119 if (nsc->sc_type == 0) {
120 nsc->sc_type = ne2000_detect(nict, nich, asict, asich);
121 if (nsc->sc_type == 0) {
122 printf("%s: where did the card go?\n",
123 dsc->sc_dev.dv_xname);
124 return;
125 }
126 }
127
128 useword = NE2000_USE_WORD(nsc->sc_type);
129
130 dsc->cr_proto = ED_CR_RD2;
131
132 /*
133 * DCR gets:
134 *
135 * FIFO threshold to 8, No auto-init Remote DMA,
136 * byte order=80x86.
137 *
138 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA.
139 */
140 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
141
142 dsc->test_mem = ne2000_test_mem;
143 dsc->ring_copy = ne2000_ring_copy;
144 dsc->write_mbuf = ne2000_write_mbuf;
145 dsc->read_hdr = ne2000_read_hdr;
146
147 /* Registers are linear. */
148 for (i = 0; i < 16; i++)
149 dsc->sc_reg_map[i] = i;
150
151 /*
152 * 8k of memory plus an additional 8k if an NE2000.
153 */
154 memsize = 8192 + (nsc->sc_type == NE2000_TYPE_NE2000 ? 8192 : 0);
155
156 /*
157 * NIC memory doens't start at zero on an NE board.
158 * The start address is tied to the bus width.
159 * (It happens to be computed the same way as mem size.)
160 */
161 dsc->mem_start = memsize;
162
163 #ifdef GWETHER
164 {
165 int x, mstart = 0;
166 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE],
167 tbuf[ED_PAGE_SIZE];
168
169 for (i = 0; i < ED_PAGE_SIZE; i++)
170 pbuf0[i] = 0;
171
172 /* Search for the start of RAM. */
173 for (x = 1; x < 256; x++) {
174 ne2000_writemem(nict, nich, asict, asich, pbuf0,
175 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
176 ne2000_readmem(nict, nich, asict, asich,
177 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
178 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
179 for (i = 0; i < ED_PAGE_SIZE; i++)
180 pbuf[i] = 255 - x;
181 ne2000_writemem(nict, nich, asict, asich,
182 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
183 useword, 0);
184 ne2000_readmem(nict, nich, asict, asich,
185 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
186 useword);
187 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
188 mstart = x << ED_PAGE_SHIFT;
189 memsize = ED_PAGE_SIZE;
190 break;
191 }
192 }
193 }
194
195 if (mstart == 0) {
196 printf("%s: cannot find start of RAM\n",
197 dsc->sc_dev.dv_xname);
198 return;
199 }
200
201 /* Search for the end of RAM. */
202 for (++x; x < 256; x++) {
203 ne2000_writemem(nict, nich, asict, asich, pbuf0,
204 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
205 ne2000_readmem(nict, nich, asict, asich,
206 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
207 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
208 for (i = 0; i < ED_PAGE_SIZE; i++)
209 pbuf[i] = 255 - x;
210 ne2000_writemem(nict, nich, asict, asich,
211 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
212 useword, 0);
213 ne2000_readmem(nict, nich, asict, asich,
214 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
215 useword);
216 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
217 memsize += ED_PAGE_SIZE;
218 else
219 break;
220 } else
221 break;
222 }
223
224 printf("%s: RAM start 0x%x, size %d\n",
225 dsc->sc_dev.dv_xname, mstart, memsize);
226
227 dsc->mem_start = mstart;
228 }
229 #endif /* GWETHER */
230
231 dsc->mem_size = memsize;
232
233 if (myea == NULL) {
234 /* Read the station address. */
235 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
236 sizeof(romdata), useword);
237 for (i = 0; i < ETHER_ADDR_LEN; i++)
238 dsc->sc_enaddr[i] = romdata[i * (useword ? 2 : 1)];
239 } else
240 bcopy(myea, dsc->sc_enaddr, sizeof(dsc->sc_enaddr));
241
242 /* Clear any pending interrupts that might have occurred above. */
243 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
244
245 if (dp8390_config(dsc, media, nmedia, defmedia)) {
246 printf("%s: setup failed\n", dsc->sc_dev.dv_xname);
247 return;
248 }
249
250 /*
251 * We need to compute mem_ring a bit differently; override the
252 * value set up in dp8390_config().
253 */
254 dsc->mem_ring =
255 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
256 }
257
258 /*
259 * Detect an NE-2000 or compatible. Returns a model code.
260 */
261 int
262 ne2000_detect(nict, nich, asict, asich)
263 bus_space_tag_t nict;
264 bus_space_handle_t nich;
265 bus_space_tag_t asict;
266 bus_space_handle_t asich;
267 {
268 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern";
269 u_int8_t test_buffer[32], tmp;
270 int i, rv = 0;
271
272 /* Reset the board. */
273 #ifdef GWETHER
274 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0);
275 delay(200);
276 #endif /* GWETHER */
277 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
278 delay(10000);
279
280 /*
281 * I don't know if this is necessary; probably cruft leftover from
282 * Clarkson packet driver code. Doesn't do a thing on the boards I've
283 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
284 * non-invasive...but some boards don't seem to reset and I don't have
285 * complete documentation on what the 'right' thing to do is...so we do
286 * the invasive thing for now. Yuck.]
287 */
288 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
289 delay(5000);
290
291 /*
292 * This is needed because some NE clones apparently don't reset the
293 * NIC properly (or the NIC chip doesn't reset fully on power-up).
294 * XXX - this makes the probe invasive! Done against my better
295 * judgement. -DLG
296 */
297 bus_space_write_1(nict, nich, ED_P0_CR,
298 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
299
300 delay(5000);
301
302 /*
303 * Generic probe routine for testing for the existance of a DS8390.
304 * Must be performed after the NIC has just been reset. This
305 * works by looking at certain register values that are guaranteed
306 * to be initialized a certain way after power-up or reset.
307 *
308 * Specifically:
309 *
310 * Register reset bits set bits
311 * -------- ---------- --------
312 * CR TXP, STA RD2, STP
313 * ISR RST
314 * IMR <all>
315 * DCR LAS
316 * TCR LB1, LB0
317 *
318 * We only look at CR and ISR, however, since looking at the others
319 * would require changing register pages, which would be intrusive
320 * if this isn't an 8390.
321 */
322
323 tmp = bus_space_read_1(nict, nich, ED_P0_CR);
324 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
325 (ED_CR_RD2 | ED_CR_STP))
326 goto out;
327
328 tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
329 if ((tmp & ED_ISR_RST) != ED_ISR_RST)
330 goto out;
331
332 bus_space_write_1(nict, nich,
333 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
334
335 for (i = 0; i < 100; i++) {
336 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) ==
337 ED_ISR_RST) {
338 /* Ack the reset bit. */
339 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST);
340 break;
341 }
342 delay(100);
343 }
344
345 #if 0
346 /* XXX */
347 if (i == 100)
348 goto out;
349 #endif
350
351 /*
352 * Test the ability to read and write to the NIC memory. This has
353 * the side effect of determining if this is an NE1000 or an NE2000.
354 */
355
356 /*
357 * This prevents packets from being stored in the NIC memory when
358 * the readmem routine turns on the start bit in the CR.
359 */
360 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON);
361
362 /* Temporarily initialize DCR for byte operations. */
363 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
364
365 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
366 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
367
368 /*
369 * Write a test pattern in byte mode. If this fails, then there
370 * probably isn't any memory at 8k - which likely means that the
371 * board is an NE2000.
372 */
373 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192,
374 sizeof(test_pattern), 0, 1);
375 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer,
376 sizeof(test_buffer), 0);
377
378 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
379 /* not an NE1000 - try NE2000 */
380 bus_space_write_1(nict, nich, ED_P0_DCR,
381 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
382 bus_space_write_1(nict, nich, ED_P0_PSTART,
383 16384 >> ED_PAGE_SHIFT);
384 bus_space_write_1(nict, nich, ED_P0_PSTOP,
385 32768 >> ED_PAGE_SHIFT);
386
387 /*
388 * Write the test pattern in word mode. If this also fails,
389 * then we don't know what this board is.
390 */
391 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384,
392 sizeof(test_pattern), 1, 0);
393 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer,
394 sizeof(test_buffer), 1);
395
396 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
397 goto out; /* not an NE2000 either */
398
399 rv = NE2000_TYPE_NE2000;
400 } else {
401 /* We're an NE1000. */
402 rv = NE2000_TYPE_NE1000;
403 }
404
405 /* Clear any pending interrupts that might have occurred above. */
406 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
407
408 out:
409 return (rv);
410 }
411
412 /*
413 * Write an mbuf chain to the destination NIC memory address using programmed
414 * I/O.
415 */
416 int
417 ne2000_write_mbuf(sc, m, buf)
418 struct dp8390_softc *sc;
419 struct mbuf *m;
420 int buf;
421 {
422 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
423 bus_space_tag_t nict = sc->sc_regt;
424 bus_space_handle_t nich = sc->sc_regh;
425 bus_space_tag_t asict = nsc->sc_asict;
426 bus_space_handle_t asich = nsc->sc_asich;
427 int savelen;
428 int maxwait = 100; /* about 120us */
429
430 savelen = m->m_pkthdr.len;
431
432 /* Select page 0 registers. */
433 bus_space_write_1(nict, nich, ED_P0_CR,
434 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
435
436 /* Reset remote DMA complete flag. */
437 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
438
439 /* Set up DMA byte count. */
440 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen);
441 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8);
442
443 /* Set up destination address in NIC mem. */
444 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
445 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
446
447 /* Set remote DMA write. */
448 bus_space_write_1(nict, nich,
449 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
450
451 /*
452 * Transfer the mbuf chain to the NIC memory. NE2000 cards
453 * require that data be transferred as words, and only words,
454 * so that case requires some extra code to patch over odd-length
455 * mbufs.
456 */
457 if (nsc->sc_type == NE2000_TYPE_NE1000) {
458 /* NE1000s are easy. */
459 for (; m != 0; m = m->m_next) {
460 if (m->m_len) {
461 bus_space_write_multi_1(asict, asich,
462 NE2000_ASIC_DATA, mtod(m, u_int8_t *),
463 m->m_len);
464 }
465 }
466 } else {
467 /* NE2000s are a bit trickier. */
468 u_int8_t *data, savebyte[2];
469 int l, leftover;
470 #ifdef DIAGNOSTIC
471 u_int8_t *lim;
472 #endif
473 /* Start out with no leftover data. */
474 leftover = 0;
475 savebyte[0] = savebyte[1] = 0;
476
477 for (; m != 0; m = m->m_next) {
478 l = m->m_len;
479 if (l == 0)
480 continue;
481 data = mtod(m, u_int8_t *);
482 #ifdef DIAGNOSTIC
483 lim = data + l;
484 #endif
485 while (l > 0) {
486 if (leftover) {
487 /*
488 * Data left over (from mbuf or
489 * realignment). Buffer the next
490 * byte, and write it and the
491 * leftover data out.
492 */
493 savebyte[1] = *data++;
494 l--;
495 bus_space_write_stream_2(asict, asich,
496 NE2000_ASIC_DATA,
497 *(u_int16_t *)savebyte);
498 leftover = 0;
499 } else if (BUS_SPACE_ALIGNED_POINTER(data,
500 u_int16_t) == 0) {
501 /*
502 * Unaligned data; buffer the next
503 * byte.
504 */
505 savebyte[0] = *data++;
506 l--;
507 leftover = 1;
508 } else {
509 /*
510 * Aligned data; output contiguous
511 * words as much as we can, then
512 * buffer the remaining byte, if any.
513 */
514 leftover = l & 1;
515 l &= ~1;
516 bus_space_write_multi_stream_2(asict,
517 asich, NE2000_ASIC_DATA,
518 (u_int16_t *)data, l >> 1);
519 data += l;
520 if (leftover)
521 savebyte[0] = *data++;
522 l = 0;
523 }
524 }
525 if (l < 0)
526 panic("ne2000_write_mbuf: negative len");
527 #ifdef DIAGNOSTIC
528 if (data != lim)
529 panic("ne2000_write_mbuf: data != lim");
530 #endif
531 }
532 if (leftover) {
533 savebyte[1] = 0;
534 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
535 *(u_int16_t *)savebyte);
536 }
537 }
538
539 /*
540 * Wait for remote DMA to complete. This is necessary because on the
541 * transmit side, data is handled internally by the NIC in bursts, and
542 * we can't start another remote DMA until this one completes. Not
543 * waiting causes really bad things to happen - like the NIC wedging
544 * the bus.
545 */
546 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
547 ED_ISR_RDC) && --maxwait);
548
549 if (maxwait == 0) {
550 log(LOG_WARNING,
551 "%s: remote transmit DMA failed to complete\n",
552 sc->sc_dev.dv_xname);
553 dp8390_reset(sc);
554 }
555
556 return (savelen);
557 }
558
559 /*
560 * Given a source and destination address, copy 'amout' of a packet from
561 * the ring buffer into a linear destination buffer. Takes into account
562 * ring-wrap.
563 */
564 int
565 ne2000_ring_copy(sc, src, dst, amount)
566 struct dp8390_softc *sc;
567 int src;
568 caddr_t dst;
569 u_short amount;
570 {
571 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
572 bus_space_tag_t nict = sc->sc_regt;
573 bus_space_handle_t nich = sc->sc_regh;
574 bus_space_tag_t asict = nsc->sc_asict;
575 bus_space_handle_t asich = nsc->sc_asich;
576 u_short tmp_amount;
577 int useword = NE2000_USE_WORD(nsc->sc_type);
578
579 /* Does copy wrap to lower addr in ring buffer? */
580 if (src + amount > sc->mem_end) {
581 tmp_amount = sc->mem_end - src;
582
583 /* Copy amount up to end of NIC memory. */
584 ne2000_readmem(nict, nich, asict, asich, src,
585 (u_int8_t *)dst, tmp_amount, useword);
586
587 amount -= tmp_amount;
588 src = sc->mem_ring;
589 dst += tmp_amount;
590 }
591
592 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
593 amount, useword);
594
595 return (src + amount);
596 }
597
598 void
599 ne2000_read_hdr(sc, buf, hdr)
600 struct dp8390_softc *sc;
601 int buf;
602 struct dp8390_ring *hdr;
603 {
604 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
605
606 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
607 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
608 NE2000_USE_WORD(nsc->sc_type));
609 #if BYTE_ORDER == BIG_ENDIAN
610 hdr->count = bswap16(hdr->count);
611 #endif
612 }
613
614 int
615 ne2000_test_mem(sc)
616 struct dp8390_softc *sc;
617 {
618
619 /* Noop. */
620 return (0);
621 }
622
623 /*
624 * Given a NIC memory source address and a host memory destination address,
625 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is
626 * rounded up to a word - ok as long as mbufs are word sized.
627 */
628 void
629 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword)
630 bus_space_tag_t nict;
631 bus_space_handle_t nich;
632 bus_space_tag_t asict;
633 bus_space_handle_t asich;
634 int src;
635 u_int8_t *dst;
636 size_t amount;
637 int useword;
638 {
639
640 /* Select page 0 registers. */
641 bus_space_write_1(nict, nich, ED_P0_CR,
642 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
643
644 /* Round up to a word. */
645 if (amount & 1)
646 ++amount;
647
648 /* Set up DMA byte count. */
649 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount);
650 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8);
651
652 /* Set up source address in NIC mem. */
653 bus_space_write_1(nict, nich, ED_P0_RSAR0, src);
654 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8);
655
656 bus_space_write_1(nict, nich, ED_P0_CR,
657 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
658
659 if (useword)
660 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
661 (u_int16_t *)dst, amount >> 1);
662 else
663 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
664 dst, amount);
665 }
666
667 /*
668 * Stripped down routine for writing a linear buffer to NIC memory. Only
669 * used in the probe routine to test the memory. 'len' must be even.
670 */
671 void
672 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet)
673 bus_space_tag_t nict;
674 bus_space_handle_t nich;
675 bus_space_tag_t asict;
676 bus_space_handle_t asich;
677 u_int8_t *src;
678 int dst;
679 size_t len;
680 int useword;
681 int quiet;
682 {
683 int maxwait = 100; /* about 120us */
684
685 /* Select page 0 registers. */
686 bus_space_write_1(nict, nich, ED_P0_CR,
687 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
688
689 /* Reset remote DMA complete flag. */
690 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
691
692 /* Set up DMA byte count. */
693 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
694 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
695
696 /* Set up destination address in NIC mem. */
697 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst);
698 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8);
699
700 /* Set remote DMA write. */
701 bus_space_write_1(nict, nich, ED_P0_CR,
702 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
703
704 if (useword)
705 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
706 (u_int16_t *)src, len >> 1);
707 else
708 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA,
709 src, len);
710
711 /*
712 * Wait for remote DMA to complete. This is necessary because on the
713 * transmit side, data is handled internally by the NIC in bursts, and
714 * we can't start another remote DMA until this one completes. Not
715 * waiting causes really bad things to happen - like the NIC wedging
716 * the bus.
717 */
718 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
719 ED_ISR_RDC) && --maxwait);
720
721 if (!quiet && maxwait == 0)
722 printf("ne2000_writemem: failed to complete\n");
723 }
724