ne2000.c revision 1.28
1 /* $NetBSD: ne2000.c,v 1.28 2000/03/22 18:02:59 ws Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Common code shared by all NE2000-compatible Ethernet interfaces. 55 */ 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/device.h> 60 #include <sys/socket.h> 61 #include <sys/mbuf.h> 62 #include <sys/syslog.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_types.h> 67 #include <net/if_media.h> 68 69 #include <net/if_ether.h> 70 71 #include <machine/bswap.h> 72 #include <machine/bus.h> 73 74 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 75 #define bus_space_write_stream_2 bus_space_write_2 76 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 77 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 78 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 79 80 #include <dev/ic/dp8390reg.h> 81 #include <dev/ic/dp8390var.h> 82 83 #include <dev/ic/ne2000reg.h> 84 #include <dev/ic/ne2000var.h> 85 86 #if BYTE_ORDER == BIG_ENDIAN 87 #include <machine/bswap.h> 88 #endif 89 90 int ne2000_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int)); 91 int ne2000_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short)); 92 void ne2000_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *)); 93 int ne2000_test_mem __P((struct dp8390_softc *)); 94 95 void ne2000_writemem __P((bus_space_tag_t, bus_space_handle_t, 96 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t, 97 int, int)); 98 void ne2000_readmem __P((bus_space_tag_t, bus_space_handle_t, 99 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int)); 100 101 int 102 ne2000_attach(nsc, myea, media, nmedia, defmedia) 103 struct ne2000_softc *nsc; 104 u_int8_t *myea; 105 int *media, nmedia, defmedia; 106 { 107 struct dp8390_softc *dsc = &nsc->sc_dp8390; 108 bus_space_tag_t nict = dsc->sc_regt; 109 bus_space_handle_t nich = dsc->sc_regh; 110 bus_space_tag_t asict = nsc->sc_asict; 111 bus_space_handle_t asich = nsc->sc_asich; 112 u_int8_t romdata[16]; 113 int memsize, i, useword; 114 115 /* 116 * Detect it again unless caller specified it; this gives us 117 * the memory size. 118 */ 119 if (nsc->sc_type == 0) { 120 nsc->sc_type = ne2000_detect(nict, nich, asict, asich); 121 if (nsc->sc_type == 0) { 122 printf("%s: where did the card go?\n", 123 dsc->sc_dev.dv_xname); 124 return (1); 125 } 126 } 127 128 useword = NE2000_USE_WORD(nsc); 129 130 dsc->cr_proto = ED_CR_RD2; 131 if (nsc->sc_type == NE2000_TYPE_AX88190) { 132 dsc->rcr_proto = ED_RCR_INTT; 133 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 134 } else 135 dsc->rcr_proto = 0; 136 137 /* 138 * DCR gets: 139 * 140 * FIFO threshold to 8, No auto-init Remote DMA, 141 * byte order=80x86. 142 * 143 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 144 */ 145 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 146 147 dsc->test_mem = ne2000_test_mem; 148 dsc->ring_copy = ne2000_ring_copy; 149 dsc->write_mbuf = ne2000_write_mbuf; 150 dsc->read_hdr = ne2000_read_hdr; 151 152 /* Registers are linear. */ 153 for (i = 0; i < 16; i++) 154 dsc->sc_reg_map[i] = i; 155 156 /* 157 * 8k of memory for NE1000, 16k for NE2000 and 24k for the 158 * card uses DL10019. 159 */ 160 switch (nsc->sc_type) { 161 case NE2000_TYPE_NE1000: 162 memsize = 8192; 163 break; 164 case NE2000_TYPE_NE2000: 165 case NE2000_TYPE_AX88190: /* XXX really? */ 166 memsize = 8192 * 2; 167 break; 168 case NE2000_TYPE_DL10019: 169 memsize = 8192 * 3; 170 break; 171 } 172 173 /* 174 * NIC memory doens't start at zero on an NE board. 175 * The start address is tied to the bus width. 176 * (It happens to be computed the same way as mem size.) 177 */ 178 dsc->mem_start = memsize; 179 180 #ifdef GWETHER 181 { 182 int x, mstart = 0; 183 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 184 tbuf[ED_PAGE_SIZE]; 185 186 for (i = 0; i < ED_PAGE_SIZE; i++) 187 pbuf0[i] = 0; 188 189 /* Search for the start of RAM. */ 190 for (x = 1; x < 256; x++) { 191 ne2000_writemem(nict, nich, asict, asich, pbuf0, 192 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 193 ne2000_readmem(nict, nich, asict, asich, 194 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 195 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 196 for (i = 0; i < ED_PAGE_SIZE; i++) 197 pbuf[i] = 255 - x; 198 ne2000_writemem(nict, nich, asict, asich, 199 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 200 useword, 0); 201 ne2000_readmem(nict, nich, asict, asich, 202 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 203 useword); 204 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 205 mstart = x << ED_PAGE_SHIFT; 206 memsize = ED_PAGE_SIZE; 207 break; 208 } 209 } 210 } 211 212 if (mstart == 0) { 213 printf("%s: cannot find start of RAM\n", 214 dsc->sc_dev.dv_xname); 215 return (1); 216 } 217 218 /* Search for the end of RAM. */ 219 for (++x; x < 256; x++) { 220 ne2000_writemem(nict, nich, asict, asich, pbuf0, 221 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 222 ne2000_readmem(nict, nich, asict, asich, 223 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 224 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 225 for (i = 0; i < ED_PAGE_SIZE; i++) 226 pbuf[i] = 255 - x; 227 ne2000_writemem(nict, nich, asict, asich, 228 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 229 useword, 0); 230 ne2000_readmem(nict, nich, asict, asich, 231 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 232 useword); 233 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 234 memsize += ED_PAGE_SIZE; 235 else 236 break; 237 } else 238 break; 239 } 240 241 printf("%s: RAM start 0x%x, size %d\n", 242 dsc->sc_dev.dv_xname, mstart, memsize); 243 244 dsc->mem_start = mstart; 245 } 246 #endif /* GWETHER */ 247 248 dsc->mem_size = memsize; 249 250 if (myea == NULL) { 251 /* Read the station address. */ 252 if (nsc->sc_type == NE2000_TYPE_AX88190) { 253 /* Select page 0 registers. */ 254 NIC_BARRIER(nict, nich); 255 bus_space_write_1(nict, nich, ED_P0_CR, 256 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 257 NIC_BARRIER(nict, nich); 258 /* Select word transfer. */ 259 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 260 NIC_BARRIER(nict, nich); 261 ne2000_readmem(nict, nich, asict, asich, 262 NE2000_AX88190_NODEID_OFFSET, dsc->sc_enaddr, 263 ETHER_ADDR_LEN, useword); 264 } else { 265 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 266 sizeof(romdata), useword); 267 for (i = 0; i < ETHER_ADDR_LEN; i++) 268 dsc->sc_enaddr[i] = 269 romdata[i * (useword ? 2 : 1)]; 270 } 271 } else 272 bcopy(myea, dsc->sc_enaddr, sizeof(dsc->sc_enaddr)); 273 274 /* Clear any pending interrupts that might have occurred above. */ 275 NIC_BARRIER(nict, nich); 276 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 277 NIC_BARRIER(nict, nich); 278 279 if (dp8390_config(dsc, media, nmedia, defmedia)) { 280 printf("%s: setup failed\n", dsc->sc_dev.dv_xname); 281 return (1); 282 } 283 284 /* 285 * We need to compute mem_ring a bit differently; override the 286 * value set up in dp8390_config(). 287 */ 288 dsc->mem_ring = 289 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 290 291 return (0); 292 } 293 294 /* 295 * Detect an NE-2000 or compatible. Returns a model code. 296 */ 297 int 298 ne2000_detect(nict, nich, asict, asich) 299 bus_space_tag_t nict; 300 bus_space_handle_t nich; 301 bus_space_tag_t asict; 302 bus_space_handle_t asich; 303 { 304 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern"; 305 u_int8_t test_buffer[32], tmp; 306 int i, rv = 0; 307 308 /* Reset the board. */ 309 #ifdef GWETHER 310 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 311 bus_space_barrier(asict, asich, 0, NE2000_NPORTS, 312 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 313 delay(200); 314 #endif /* GWETHER */ 315 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 316 bus_space_barrier(asict, asich, 0, NE2000_NPORTS, 317 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 318 delay(10000); 319 320 /* 321 * I don't know if this is necessary; probably cruft leftover from 322 * Clarkson packet driver code. Doesn't do a thing on the boards I've 323 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 324 * non-invasive...but some boards don't seem to reset and I don't have 325 * complete documentation on what the 'right' thing to do is...so we do 326 * the invasive thing for now. Yuck.] 327 */ 328 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 329 bus_space_barrier(asict, asich, 0, NE2000_NPORTS, 330 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 331 delay(5000); 332 333 /* 334 * This is needed because some NE clones apparently don't reset the 335 * NIC properly (or the NIC chip doesn't reset fully on power-up). 336 * XXX - this makes the probe invasive! Done against my better 337 * judgement. -DLG 338 */ 339 bus_space_write_1(nict, nich, ED_P0_CR, 340 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 341 NIC_BARRIER(nict, nich); 342 343 delay(5000); 344 345 /* 346 * Generic probe routine for testing for the existance of a DS8390. 347 * Must be performed after the NIC has just been reset. This 348 * works by looking at certain register values that are guaranteed 349 * to be initialized a certain way after power-up or reset. 350 * 351 * Specifically: 352 * 353 * Register reset bits set bits 354 * -------- ---------- -------- 355 * CR TXP, STA RD2, STP 356 * ISR RST 357 * IMR <all> 358 * DCR LAS 359 * TCR LB1, LB0 360 * 361 * We only look at CR and ISR, however, since looking at the others 362 * would require changing register pages, which would be intrusive 363 * if this isn't an 8390. 364 */ 365 366 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 367 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 368 (ED_CR_RD2 | ED_CR_STP)) 369 goto out; 370 371 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 372 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 373 goto out; 374 375 bus_space_write_1(nict, nich, 376 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 377 NIC_BARRIER(nict, nich); 378 379 for (i = 0; i < 100; i++) { 380 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 381 ED_ISR_RST) { 382 /* Ack the reset bit. */ 383 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 384 NIC_BARRIER(nict, nich); 385 break; 386 } 387 delay(100); 388 } 389 390 #if 0 391 /* XXX */ 392 if (i == 100) 393 goto out; 394 #endif 395 396 /* 397 * Test the ability to read and write to the NIC memory. This has 398 * the side effect of determining if this is an NE1000 or an NE2000. 399 */ 400 401 /* 402 * This prevents packets from being stored in the NIC memory when 403 * the readmem routine turns on the start bit in the CR. 404 */ 405 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 406 NIC_BARRIER(nict, nich); 407 408 /* Temporarily initialize DCR for byte operations. */ 409 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 410 411 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 412 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 413 414 /* 415 * Write a test pattern in byte mode. If this fails, then there 416 * probably isn't any memory at 8k - which likely means that the 417 * board is an NE2000. 418 */ 419 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 420 sizeof(test_pattern), 0, 1); 421 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 422 sizeof(test_buffer), 0); 423 424 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 425 /* not an NE1000 - try NE2000 */ 426 bus_space_write_1(nict, nich, ED_P0_DCR, 427 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 428 bus_space_write_1(nict, nich, ED_P0_PSTART, 429 16384 >> ED_PAGE_SHIFT); 430 bus_space_write_1(nict, nich, ED_P0_PSTOP, 431 32768 >> ED_PAGE_SHIFT); 432 433 /* 434 * Write the test pattern in word mode. If this also fails, 435 * then we don't know what this board is. 436 */ 437 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 438 sizeof(test_pattern), 1, 0); 439 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 440 sizeof(test_buffer), 1); 441 442 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) 443 goto out; /* not an NE2000 either */ 444 445 rv = NE2000_TYPE_NE2000; 446 } else { 447 /* We're an NE1000. */ 448 rv = NE2000_TYPE_NE1000; 449 } 450 451 /* Clear any pending interrupts that might have occurred above. */ 452 NIC_BARRIER(nict, nich); 453 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 454 455 out: 456 return (rv); 457 } 458 459 /* 460 * Write an mbuf chain to the destination NIC memory address using programmed 461 * I/O. 462 */ 463 int 464 ne2000_write_mbuf(sc, m, buf) 465 struct dp8390_softc *sc; 466 struct mbuf *m; 467 int buf; 468 { 469 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 470 bus_space_tag_t nict = sc->sc_regt; 471 bus_space_handle_t nich = sc->sc_regh; 472 bus_space_tag_t asict = nsc->sc_asict; 473 bus_space_handle_t asich = nsc->sc_asich; 474 int savelen; 475 int maxwait = 100; /* about 120us */ 476 477 savelen = m->m_pkthdr.len; 478 479 /* Select page 0 registers. */ 480 NIC_BARRIER(nict, nich); 481 bus_space_write_1(nict, nich, ED_P0_CR, 482 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 483 NIC_BARRIER(nict, nich); 484 485 /* Reset remote DMA complete flag. */ 486 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 487 NIC_BARRIER(nict, nich); 488 489 /* Set up DMA byte count. */ 490 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 491 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 492 493 /* Set up destination address in NIC mem. */ 494 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 495 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 496 497 /* Set remote DMA write. */ 498 NIC_BARRIER(nict, nich); 499 bus_space_write_1(nict, nich, 500 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 501 NIC_BARRIER(nict, nich); 502 503 /* 504 * Transfer the mbuf chain to the NIC memory. NE2000 cards 505 * require that data be transferred as words, and only words, 506 * so that case requires some extra code to patch over odd-length 507 * mbufs. 508 */ 509 if (nsc->sc_type == NE2000_TYPE_NE1000) { 510 /* NE1000s are easy. */ 511 for (; m != 0; m = m->m_next) { 512 if (m->m_len) { 513 bus_space_write_multi_1(asict, asich, 514 NE2000_ASIC_DATA, mtod(m, u_int8_t *), 515 m->m_len); 516 } 517 } 518 } else { 519 /* NE2000s are a bit trickier. */ 520 u_int8_t *data, savebyte[2]; 521 int l, leftover; 522 #ifdef DIAGNOSTIC 523 u_int8_t *lim; 524 #endif 525 /* Start out with no leftover data. */ 526 leftover = 0; 527 savebyte[0] = savebyte[1] = 0; 528 529 for (; m != 0; m = m->m_next) { 530 l = m->m_len; 531 if (l == 0) 532 continue; 533 data = mtod(m, u_int8_t *); 534 #ifdef DIAGNOSTIC 535 lim = data + l; 536 #endif 537 while (l > 0) { 538 if (leftover) { 539 /* 540 * Data left over (from mbuf or 541 * realignment). Buffer the next 542 * byte, and write it and the 543 * leftover data out. 544 */ 545 savebyte[1] = *data++; 546 l--; 547 bus_space_write_stream_2(asict, asich, 548 NE2000_ASIC_DATA, 549 *(u_int16_t *)savebyte); 550 leftover = 0; 551 } else if (BUS_SPACE_ALIGNED_POINTER(data, 552 u_int16_t) == 0) { 553 /* 554 * Unaligned data; buffer the next 555 * byte. 556 */ 557 savebyte[0] = *data++; 558 l--; 559 leftover = 1; 560 } else { 561 /* 562 * Aligned data; output contiguous 563 * words as much as we can, then 564 * buffer the remaining byte, if any. 565 */ 566 leftover = l & 1; 567 l &= ~1; 568 bus_space_write_multi_stream_2(asict, 569 asich, NE2000_ASIC_DATA, 570 (u_int16_t *)data, l >> 1); 571 data += l; 572 if (leftover) 573 savebyte[0] = *data++; 574 l = 0; 575 } 576 } 577 if (l < 0) 578 panic("ne2000_write_mbuf: negative len"); 579 #ifdef DIAGNOSTIC 580 if (data != lim) 581 panic("ne2000_write_mbuf: data != lim"); 582 #endif 583 } 584 if (leftover) { 585 savebyte[1] = 0; 586 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 587 *(u_int16_t *)savebyte); 588 } 589 } 590 NIC_BARRIER(nict, nich); 591 592 /* 593 * Wait for remote DMA to complete. This is necessary because on the 594 * transmit side, data is handled internally by the NIC in bursts, and 595 * we can't start another remote DMA until this one completes. Not 596 * waiting causes really bad things to happen - like the NIC wedging 597 * the bus. 598 */ 599 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 600 ED_ISR_RDC) && --maxwait) { 601 bus_space_read_1(nict, nich, ED_P0_CRDA1); 602 bus_space_read_1(nict, nich, ED_P0_CRDA0); 603 NIC_BARRIER(nict, nich); 604 DELAY(1); 605 } 606 607 if (maxwait == 0) { 608 log(LOG_WARNING, 609 "%s: remote transmit DMA failed to complete\n", 610 sc->sc_dev.dv_xname); 611 dp8390_reset(sc); 612 } 613 614 return (savelen); 615 } 616 617 /* 618 * Given a source and destination address, copy 'amout' of a packet from 619 * the ring buffer into a linear destination buffer. Takes into account 620 * ring-wrap. 621 */ 622 int 623 ne2000_ring_copy(sc, src, dst, amount) 624 struct dp8390_softc *sc; 625 int src; 626 caddr_t dst; 627 u_short amount; 628 { 629 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 630 bus_space_tag_t nict = sc->sc_regt; 631 bus_space_handle_t nich = sc->sc_regh; 632 bus_space_tag_t asict = nsc->sc_asict; 633 bus_space_handle_t asich = nsc->sc_asich; 634 u_short tmp_amount; 635 int useword = NE2000_USE_WORD(nsc); 636 637 /* Does copy wrap to lower addr in ring buffer? */ 638 if (src + amount > sc->mem_end) { 639 tmp_amount = sc->mem_end - src; 640 641 /* Copy amount up to end of NIC memory. */ 642 ne2000_readmem(nict, nich, asict, asich, src, 643 (u_int8_t *)dst, tmp_amount, useword); 644 645 amount -= tmp_amount; 646 src = sc->mem_ring; 647 dst += tmp_amount; 648 } 649 650 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 651 amount, useword); 652 653 return (src + amount); 654 } 655 656 void 657 ne2000_read_hdr(sc, buf, hdr) 658 struct dp8390_softc *sc; 659 int buf; 660 struct dp8390_ring *hdr; 661 { 662 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 663 664 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 665 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 666 NE2000_USE_WORD(nsc)); 667 #if BYTE_ORDER == BIG_ENDIAN 668 hdr->count = bswap16(hdr->count); 669 #endif 670 } 671 672 int 673 ne2000_test_mem(sc) 674 struct dp8390_softc *sc; 675 { 676 677 /* Noop. */ 678 return (0); 679 } 680 681 /* 682 * Given a NIC memory source address and a host memory destination address, 683 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 684 * rounded up to a word - ok as long as mbufs are word sized. 685 */ 686 void 687 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword) 688 bus_space_tag_t nict; 689 bus_space_handle_t nich; 690 bus_space_tag_t asict; 691 bus_space_handle_t asich; 692 int src; 693 u_int8_t *dst; 694 size_t amount; 695 int useword; 696 { 697 698 /* Select page 0 registers. */ 699 NIC_BARRIER(nict, nich); 700 bus_space_write_1(nict, nich, ED_P0_CR, 701 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 702 NIC_BARRIER(nict, nich); 703 704 /* Round up to a word. */ 705 if (amount & 1) 706 ++amount; 707 708 /* Set up DMA byte count. */ 709 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 710 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 711 712 /* Set up source address in NIC mem. */ 713 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 714 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 715 716 NIC_BARRIER(nict, nich); 717 bus_space_write_1(nict, nich, ED_P0_CR, 718 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 719 NIC_BARRIER(nict, nich); 720 721 if (useword) 722 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 723 (u_int16_t *)dst, amount >> 1); 724 else 725 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 726 dst, amount); 727 } 728 729 /* 730 * Stripped down routine for writing a linear buffer to NIC memory. Only 731 * used in the probe routine to test the memory. 'len' must be even. 732 */ 733 void 734 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet) 735 bus_space_tag_t nict; 736 bus_space_handle_t nich; 737 bus_space_tag_t asict; 738 bus_space_handle_t asich; 739 u_int8_t *src; 740 int dst; 741 size_t len; 742 int useword; 743 int quiet; 744 { 745 int maxwait = 100; /* about 120us */ 746 747 /* Select page 0 registers. */ 748 NIC_BARRIER(nict, nich); 749 bus_space_write_1(nict, nich, ED_P0_CR, 750 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 751 NIC_BARRIER(nict, nich); 752 753 /* Reset remote DMA complete flag. */ 754 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 755 NIC_BARRIER(nict, nich); 756 757 /* Set up DMA byte count. */ 758 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 759 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 760 761 /* Set up destination address in NIC mem. */ 762 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 763 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 764 765 /* Set remote DMA write. */ 766 NIC_BARRIER(nict, nich); 767 bus_space_write_1(nict, nich, ED_P0_CR, 768 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 769 NIC_BARRIER(nict, nich); 770 771 if (useword) 772 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 773 (u_int16_t *)src, len >> 1); 774 else 775 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 776 src, len); 777 778 /* 779 * Wait for remote DMA to complete. This is necessary because on the 780 * transmit side, data is handled internally by the NIC in bursts, and 781 * we can't start another remote DMA until this one completes. Not 782 * waiting causes really bad things to happen - like the NIC wedging 783 * the bus. 784 */ 785 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 786 ED_ISR_RDC) && --maxwait) 787 DELAY(1); 788 789 if (!quiet && maxwait == 0) 790 printf("ne2000_writemem: failed to complete\n"); 791 } 792 793 int 794 ne2000_detach(sc, flags) 795 struct ne2000_softc *sc; 796 int flags; 797 { 798 799 return (dp8390_detach(&sc->sc_dp8390, flags)); 800 } 801
Indexes created Fri Sep 26 20:09:58 GMT 2025