ne2000.c revision 1.40 1 /* $NetBSD: ne2000.c,v 1.40 2003/10/25 18:35:43 christos Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 * adapters.
43 *
44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 *
46 * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 * copied, distributed, and sold, in both source and binary form provided that
48 * the above copyright and these terms are retained. Under no circumstances is
49 * the author responsible for the proper functioning of this software, nor does
50 * the author assume any responsibility for damages incurred with its use.
51 */
52
53 /*
54 * Common code shared by all NE2000-compatible Ethernet interfaces.
55 */
56
57 #include <sys/cdefs.h>
58 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.40 2003/10/25 18:35:43 christos Exp $");
59
60 #include "opt_ipkdb.h"
61
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/device.h>
65 #include <sys/socket.h>
66 #include <sys/mbuf.h>
67 #include <sys/syslog.h>
68
69 #include <net/if.h>
70 #include <net/if_dl.h>
71 #include <net/if_types.h>
72 #include <net/if_media.h>
73
74 #include <net/if_ether.h>
75
76 #include <machine/bswap.h>
77 #include <machine/bus.h>
78
79 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
80 #define bus_space_write_stream_2 bus_space_write_2
81 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
82 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
83 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
84
85 #ifdef IPKDB_NE
86 #include <ipkdb/ipkdb.h>
87 #endif
88
89 #include <dev/ic/dp8390reg.h>
90 #include <dev/ic/dp8390var.h>
91
92 #include <dev/ic/ne2000reg.h>
93 #include <dev/ic/ne2000var.h>
94
95 #include <dev/ic/ax88190reg.h>
96
97 #if BYTE_ORDER == BIG_ENDIAN
98 #include <machine/bswap.h>
99 #endif
100
101 int ne2000_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int));
102 int ne2000_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short));
103 void ne2000_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *));
104 int ne2000_test_mem __P((struct dp8390_softc *));
105
106 void ne2000_writemem __P((bus_space_tag_t, bus_space_handle_t,
107 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t,
108 int, int));
109 void ne2000_readmem __P((bus_space_tag_t, bus_space_handle_t,
110 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int));
111
112 int
113 ne2000_attach(nsc, myea)
114 struct ne2000_softc *nsc;
115 u_int8_t *myea;
116 {
117 struct dp8390_softc *dsc = &nsc->sc_dp8390;
118 bus_space_tag_t nict = dsc->sc_regt;
119 bus_space_handle_t nich = dsc->sc_regh;
120 bus_space_tag_t asict = nsc->sc_asict;
121 bus_space_handle_t asich = nsc->sc_asich;
122 u_int8_t romdata[16];
123 int memsize, i, useword;
124
125 /*
126 * Detect it again unless caller specified it; this gives us
127 * the memory size.
128 */
129 if (nsc->sc_type == 0) {
130 nsc->sc_type = ne2000_detect(nict, nich, asict, asich);
131 if (nsc->sc_type == 0) {
132 printf("%s: where did the card go?\n",
133 dsc->sc_dev.dv_xname);
134 return (1);
135 }
136 }
137
138 useword = NE2000_USE_WORD(nsc);
139
140 dsc->cr_proto = ED_CR_RD2;
141 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
142 nsc->sc_type == NE2000_TYPE_AX88790) {
143 dsc->rcr_proto = ED_RCR_INTT;
144 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
145 } else
146 dsc->rcr_proto = 0;
147
148 /*
149 * DCR gets:
150 *
151 * FIFO threshold to 8, No auto-init Remote DMA,
152 * byte order=80x86.
153 *
154 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA.
155 */
156 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
157
158 dsc->test_mem = ne2000_test_mem;
159 dsc->ring_copy = ne2000_ring_copy;
160 dsc->write_mbuf = ne2000_write_mbuf;
161 dsc->read_hdr = ne2000_read_hdr;
162
163 /* Registers are linear. */
164 for (i = 0; i < 16; i++)
165 dsc->sc_reg_map[i] = i;
166
167 /*
168 * 8k of memory for NE1000, 16k for NE2000 and 24k for the
169 * card uses DL10019.
170 */
171 switch (nsc->sc_type) {
172 case NE2000_TYPE_NE1000:
173 memsize = 8192;
174 break;
175 case NE2000_TYPE_NE2000:
176 case NE2000_TYPE_AX88190: /* XXX really? */
177 case NE2000_TYPE_AX88790:
178 memsize = 8192 * 2;
179 break;
180 case NE2000_TYPE_DL10019:
181 case NE2000_TYPE_DL10022:
182 memsize = 8192 * 3;
183 break;
184 default:
185 memsize = 0;
186 break;
187 }
188
189 /*
190 * NIC memory doens't start at zero on an NE board.
191 * The start address is tied to the bus width.
192 * (It happens to be computed the same way as mem size.)
193 */
194 dsc->mem_start = memsize;
195
196 #ifdef GWETHER
197 {
198 int x, mstart = 0;
199 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE],
200 tbuf[ED_PAGE_SIZE];
201
202 for (i = 0; i < ED_PAGE_SIZE; i++)
203 pbuf0[i] = 0;
204
205 /* Search for the start of RAM. */
206 for (x = 1; x < 256; x++) {
207 ne2000_writemem(nict, nich, asict, asich, pbuf0,
208 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
209 ne2000_readmem(nict, nich, asict, asich,
210 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
211 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
212 for (i = 0; i < ED_PAGE_SIZE; i++)
213 pbuf[i] = 255 - x;
214 ne2000_writemem(nict, nich, asict, asich,
215 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
216 useword, 0);
217 ne2000_readmem(nict, nich, asict, asich,
218 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
219 useword);
220 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
221 mstart = x << ED_PAGE_SHIFT;
222 memsize = ED_PAGE_SIZE;
223 break;
224 }
225 }
226 }
227
228 if (mstart == 0) {
229 printf("%s: cannot find start of RAM\n",
230 dsc->sc_dev.dv_xname);
231 return (1);
232 }
233
234 /* Search for the end of RAM. */
235 for (++x; x < 256; x++) {
236 ne2000_writemem(nict, nich, asict, asich, pbuf0,
237 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
238 ne2000_readmem(nict, nich, asict, asich,
239 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
240 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
241 for (i = 0; i < ED_PAGE_SIZE; i++)
242 pbuf[i] = 255 - x;
243 ne2000_writemem(nict, nich, asict, asich,
244 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
245 useword, 0);
246 ne2000_readmem(nict, nich, asict, asich,
247 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
248 useword);
249 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
250 memsize += ED_PAGE_SIZE;
251 else
252 break;
253 } else
254 break;
255 }
256
257 printf("%s: RAM start 0x%x, size %d\n",
258 dsc->sc_dev.dv_xname, mstart, memsize);
259
260 dsc->mem_start = mstart;
261 }
262 #endif /* GWETHER */
263
264 dsc->mem_size = memsize;
265
266 if (myea == NULL) {
267 /* Read the station address. */
268 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
269 nsc->sc_type == NE2000_TYPE_AX88790) {
270 /* Select page 0 registers. */
271 NIC_BARRIER(nict, nich);
272 bus_space_write_1(nict, nich, ED_P0_CR,
273 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
274 NIC_BARRIER(nict, nich);
275 /* Select word transfer. */
276 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS);
277 NIC_BARRIER(nict, nich);
278 ne2000_readmem(nict, nich, asict, asich,
279 AX88190_NODEID_OFFSET, dsc->sc_enaddr,
280 ETHER_ADDR_LEN, useword);
281 } else {
282 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
283 sizeof(romdata), useword);
284 for (i = 0; i < ETHER_ADDR_LEN; i++)
285 dsc->sc_enaddr[i] =
286 romdata[i * (useword ? 2 : 1)];
287 }
288 } else
289 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr));
290
291 /* Clear any pending interrupts that might have occurred above. */
292 NIC_BARRIER(nict, nich);
293 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
294 NIC_BARRIER(nict, nich);
295
296 if (dsc->sc_media_init == NULL)
297 dsc->sc_media_init = dp8390_media_init;
298
299 if (dp8390_config(dsc)) {
300 printf("%s: setup failed\n", dsc->sc_dev.dv_xname);
301 return (1);
302 }
303
304 /*
305 * We need to compute mem_ring a bit differently; override the
306 * value set up in dp8390_config().
307 */
308 dsc->mem_ring =
309 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
310
311 return (0);
312 }
313
314 /*
315 * Detect an NE-2000 or compatible. Returns a model code.
316 */
317 int
318 ne2000_detect(nict, nich, asict, asich)
319 bus_space_tag_t nict;
320 bus_space_handle_t nich;
321 bus_space_tag_t asict;
322 bus_space_handle_t asich;
323 {
324 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern";
325 u_int8_t test_buffer[32], tmp;
326 int i, rv = 0;
327
328 /* Reset the board. */
329 #ifdef GWETHER
330 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0);
331 bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
332 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
333 delay(200);
334 #endif /* GWETHER */
335 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
336 bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
337 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
338 delay(10000);
339
340 /*
341 * I don't know if this is necessary; probably cruft leftover from
342 * Clarkson packet driver code. Doesn't do a thing on the boards I've
343 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
344 * non-invasive...but some boards don't seem to reset and I don't have
345 * complete documentation on what the 'right' thing to do is...so we do
346 * the invasive thing for now. Yuck.]
347 */
348 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
349 bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
350 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
351 delay(5000);
352
353 /*
354 * This is needed because some NE clones apparently don't reset the
355 * NIC properly (or the NIC chip doesn't reset fully on power-up).
356 * XXX - this makes the probe invasive! Done against my better
357 * judgement. -DLG
358 */
359 bus_space_write_1(nict, nich, ED_P0_CR,
360 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
361 NIC_BARRIER(nict, nich);
362
363 delay(5000);
364
365 /*
366 * Generic probe routine for testing for the existance of a DS8390.
367 * Must be performed after the NIC has just been reset. This
368 * works by looking at certain register values that are guaranteed
369 * to be initialized a certain way after power-up or reset.
370 *
371 * Specifically:
372 *
373 * Register reset bits set bits
374 * -------- ---------- --------
375 * CR TXP, STA RD2, STP
376 * ISR RST
377 * IMR <all>
378 * DCR LAS
379 * TCR LB1, LB0
380 *
381 * We only look at CR and ISR, however, since looking at the others
382 * would require changing register pages, which would be intrusive
383 * if this isn't an 8390.
384 */
385
386 tmp = bus_space_read_1(nict, nich, ED_P0_CR);
387 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
388 (ED_CR_RD2 | ED_CR_STP))
389 goto out;
390
391 tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
392 if ((tmp & ED_ISR_RST) != ED_ISR_RST)
393 goto out;
394
395 bus_space_write_1(nict, nich,
396 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
397 NIC_BARRIER(nict, nich);
398
399 for (i = 0; i < 100; i++) {
400 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) ==
401 ED_ISR_RST) {
402 /* Ack the reset bit. */
403 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST);
404 NIC_BARRIER(nict, nich);
405 break;
406 }
407 delay(100);
408 }
409
410 #if 0
411 /* XXX */
412 if (i == 100)
413 goto out;
414 #endif
415
416 /*
417 * Test the ability to read and write to the NIC memory. This has
418 * the side effect of determining if this is an NE1000 or an NE2000.
419 */
420
421 /*
422 * This prevents packets from being stored in the NIC memory when
423 * the readmem routine turns on the start bit in the CR.
424 */
425 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON);
426 NIC_BARRIER(nict, nich);
427
428 /* Temporarily initialize DCR for byte operations. */
429 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
430
431 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
432 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
433
434 /*
435 * Write a test pattern in byte mode. If this fails, then there
436 * probably isn't any memory at 8k - which likely means that the
437 * board is an NE2000.
438 */
439 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192,
440 sizeof(test_pattern), 0, 1);
441 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer,
442 sizeof(test_buffer), 0);
443
444 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
445 /* not an NE1000 - try NE2000 */
446 bus_space_write_1(nict, nich, ED_P0_DCR,
447 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
448 bus_space_write_1(nict, nich, ED_P0_PSTART,
449 16384 >> ED_PAGE_SHIFT);
450 bus_space_write_1(nict, nich, ED_P0_PSTOP,
451 32768 >> ED_PAGE_SHIFT);
452
453 /*
454 * Write the test pattern in word mode. If this also fails,
455 * then we don't know what this board is.
456 */
457 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384,
458 sizeof(test_pattern), 1, 0);
459 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer,
460 sizeof(test_buffer), 1);
461
462 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)))
463 goto out; /* not an NE2000 either */
464
465 rv = NE2000_TYPE_NE2000;
466 } else {
467 /* We're an NE1000. */
468 rv = NE2000_TYPE_NE1000;
469 }
470
471 /* Clear any pending interrupts that might have occurred above. */
472 NIC_BARRIER(nict, nich);
473 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
474
475 out:
476 return (rv);
477 }
478
479 /*
480 * Write an mbuf chain to the destination NIC memory address using programmed
481 * I/O.
482 */
483 int
484 ne2000_write_mbuf(sc, m, buf)
485 struct dp8390_softc *sc;
486 struct mbuf *m;
487 int buf;
488 {
489 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
490 bus_space_tag_t nict = sc->sc_regt;
491 bus_space_handle_t nich = sc->sc_regh;
492 bus_space_tag_t asict = nsc->sc_asict;
493 bus_space_handle_t asich = nsc->sc_asich;
494 int savelen, padlen;
495 int maxwait = 100; /* about 120us */
496
497 savelen = m->m_pkthdr.len;
498 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
499 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen;
500 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
501 } else
502 padlen = 0;
503
504
505 /* Select page 0 registers. */
506 NIC_BARRIER(nict, nich);
507 bus_space_write_1(nict, nich, ED_P0_CR,
508 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
509 NIC_BARRIER(nict, nich);
510
511 /* Reset remote DMA complete flag. */
512 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
513 NIC_BARRIER(nict, nich);
514
515 /* Set up DMA byte count. */
516 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen);
517 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8);
518
519 /* Set up destination address in NIC mem. */
520 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
521 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
522
523 /* Set remote DMA write. */
524 NIC_BARRIER(nict, nich);
525 bus_space_write_1(nict, nich,
526 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
527 NIC_BARRIER(nict, nich);
528
529 /*
530 * Transfer the mbuf chain to the NIC memory. NE2000 cards
531 * require that data be transferred as words, and only words,
532 * so that case requires some extra code to patch over odd-length
533 * mbufs.
534 */
535 if (nsc->sc_type == NE2000_TYPE_NE1000) {
536 /* NE1000s are easy. */
537 for (; m != 0; m = m->m_next) {
538 if (m->m_len) {
539 bus_space_write_multi_1(asict, asich,
540 NE2000_ASIC_DATA, mtod(m, u_int8_t *),
541 m->m_len);
542 }
543 }
544 if (padlen) {
545 for(; padlen > 0; padlen--)
546 bus_space_write_1(asict, asich,
547 NE2000_ASIC_DATA, 0);
548 }
549 } else {
550 /* NE2000s are a bit trickier. */
551 u_int8_t *data, savebyte[2];
552 int l, leftover;
553 #ifdef DIAGNOSTIC
554 u_int8_t *lim;
555 #endif
556 /* Start out with no leftover data. */
557 leftover = 0;
558 savebyte[0] = savebyte[1] = 0;
559
560 for (; m != 0; m = m->m_next) {
561 l = m->m_len;
562 if (l == 0)
563 continue;
564 data = mtod(m, u_int8_t *);
565 #ifdef DIAGNOSTIC
566 lim = data + l;
567 #endif
568 while (l > 0) {
569 if (leftover) {
570 /*
571 * Data left over (from mbuf or
572 * realignment). Buffer the next
573 * byte, and write it and the
574 * leftover data out.
575 */
576 savebyte[1] = *data++;
577 l--;
578 bus_space_write_stream_2(asict, asich,
579 NE2000_ASIC_DATA,
580 *(u_int16_t *)savebyte);
581 leftover = 0;
582 } else if (BUS_SPACE_ALIGNED_POINTER(data,
583 u_int16_t) == 0) {
584 /*
585 * Unaligned data; buffer the next
586 * byte.
587 */
588 savebyte[0] = *data++;
589 l--;
590 leftover = 1;
591 } else {
592 /*
593 * Aligned data; output contiguous
594 * words as much as we can, then
595 * buffer the remaining byte, if any.
596 */
597 leftover = l & 1;
598 l &= ~1;
599 bus_space_write_multi_stream_2(asict,
600 asich, NE2000_ASIC_DATA,
601 (u_int16_t *)data, l >> 1);
602 data += l;
603 if (leftover)
604 savebyte[0] = *data++;
605 l = 0;
606 }
607 }
608 if (l < 0)
609 panic("ne2000_write_mbuf: negative len");
610 #ifdef DIAGNOSTIC
611 if (data != lim)
612 panic("ne2000_write_mbuf: data != lim");
613 #endif
614 }
615 if (leftover) {
616 savebyte[1] = 0;
617 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
618 *(u_int16_t *)savebyte);
619 }
620 if (padlen) {
621 for(; padlen > 0; padlen -= 2)
622 bus_space_write_stream_2(asict, asich,
623 NE2000_ASIC_DATA, 0);
624 }
625 }
626 NIC_BARRIER(nict, nich);
627
628 /*
629 * Wait for remote DMA to complete. This is necessary because on the
630 * transmit side, data is handled internally by the NIC in bursts, and
631 * we can't start another remote DMA until this one completes. Not
632 * waiting causes really bad things to happen - like the NIC wedging
633 * the bus.
634 */
635 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
636 ED_ISR_RDC) && --maxwait) {
637 bus_space_read_1(nict, nich, ED_P0_CRDA1);
638 bus_space_read_1(nict, nich, ED_P0_CRDA0);
639 NIC_BARRIER(nict, nich);
640 DELAY(1);
641 }
642
643 if (maxwait == 0) {
644 log(LOG_WARNING,
645 "%s: remote transmit DMA failed to complete\n",
646 sc->sc_dev.dv_xname);
647 dp8390_reset(sc);
648 }
649
650 return (savelen);
651 }
652
653 /*
654 * Given a source and destination address, copy 'amout' of a packet from
655 * the ring buffer into a linear destination buffer. Takes into account
656 * ring-wrap.
657 */
658 int
659 ne2000_ring_copy(sc, src, dst, amount)
660 struct dp8390_softc *sc;
661 int src;
662 caddr_t dst;
663 u_short amount;
664 {
665 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
666 bus_space_tag_t nict = sc->sc_regt;
667 bus_space_handle_t nich = sc->sc_regh;
668 bus_space_tag_t asict = nsc->sc_asict;
669 bus_space_handle_t asich = nsc->sc_asich;
670 u_short tmp_amount;
671 int useword = NE2000_USE_WORD(nsc);
672
673 /* Does copy wrap to lower addr in ring buffer? */
674 if (src + amount > sc->mem_end) {
675 tmp_amount = sc->mem_end - src;
676
677 /* Copy amount up to end of NIC memory. */
678 ne2000_readmem(nict, nich, asict, asich, src,
679 (u_int8_t *)dst, tmp_amount, useword);
680
681 amount -= tmp_amount;
682 src = sc->mem_ring;
683 dst += tmp_amount;
684 }
685
686 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
687 amount, useword);
688
689 return (src + amount);
690 }
691
692 void
693 ne2000_read_hdr(sc, buf, hdr)
694 struct dp8390_softc *sc;
695 int buf;
696 struct dp8390_ring *hdr;
697 {
698 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
699
700 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
701 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
702 NE2000_USE_WORD(nsc));
703 #if BYTE_ORDER == BIG_ENDIAN
704 hdr->count = bswap16(hdr->count);
705 #endif
706 }
707
708 int
709 ne2000_test_mem(sc)
710 struct dp8390_softc *sc;
711 {
712
713 /* Noop. */
714 return (0);
715 }
716
717 /*
718 * Given a NIC memory source address and a host memory destination address,
719 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is
720 * rounded up to a word - ok as long as mbufs are word sized.
721 */
722 void
723 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword)
724 bus_space_tag_t nict;
725 bus_space_handle_t nich;
726 bus_space_tag_t asict;
727 bus_space_handle_t asich;
728 int src;
729 u_int8_t *dst;
730 size_t amount;
731 int useword;
732 {
733
734 /* Select page 0 registers. */
735 NIC_BARRIER(nict, nich);
736 bus_space_write_1(nict, nich, ED_P0_CR,
737 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
738 NIC_BARRIER(nict, nich);
739
740 /* Round up to a word. */
741 if (amount & 1)
742 ++amount;
743
744 /* Set up DMA byte count. */
745 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount);
746 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8);
747
748 /* Set up source address in NIC mem. */
749 bus_space_write_1(nict, nich, ED_P0_RSAR0, src);
750 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8);
751
752 NIC_BARRIER(nict, nich);
753 bus_space_write_1(nict, nich, ED_P0_CR,
754 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
755
756 bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
757 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
758 if (useword)
759 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
760 (u_int16_t *)dst, amount >> 1);
761 else
762 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
763 dst, amount);
764 }
765
766 /*
767 * Stripped down routine for writing a linear buffer to NIC memory. Only
768 * used in the probe routine to test the memory. 'len' must be even.
769 */
770 void
771 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet)
772 bus_space_tag_t nict;
773 bus_space_handle_t nich;
774 bus_space_tag_t asict;
775 bus_space_handle_t asich;
776 u_int8_t *src;
777 int dst;
778 size_t len;
779 int useword;
780 int quiet;
781 {
782 int maxwait = 100; /* about 120us */
783
784 /* Select page 0 registers. */
785 NIC_BARRIER(nict, nich);
786 bus_space_write_1(nict, nich, ED_P0_CR,
787 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
788 NIC_BARRIER(nict, nich);
789
790 /* Reset remote DMA complete flag. */
791 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
792 NIC_BARRIER(nict, nich);
793
794 /* Set up DMA byte count. */
795 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
796 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
797
798 /* Set up destination address in NIC mem. */
799 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst);
800 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8);
801
802 /* Set remote DMA write. */
803 NIC_BARRIER(nict, nich);
804 bus_space_write_1(nict, nich, ED_P0_CR,
805 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
806
807 bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
808 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
809 if (useword)
810 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
811 (u_int16_t *)src, len >> 1);
812 else
813 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA,
814 src, len);
815
816 /*
817 * Wait for remote DMA to complete. This is necessary because on the
818 * transmit side, data is handled internally by the NIC in bursts, and
819 * we can't start another remote DMA until this one completes. Not
820 * waiting causes really bad things to happen - like the NIC wedging
821 * the bus.
822 */
823 bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
824 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
825 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
826 ED_ISR_RDC) && --maxwait)
827 DELAY(1);
828
829 if (!quiet && maxwait == 0)
830 printf("ne2000_writemem: failed to complete\n");
831 }
832
833 int
834 ne2000_detach(sc, flags)
835 struct ne2000_softc *sc;
836 int flags;
837 {
838
839 return (dp8390_detach(&sc->sc_dp8390, flags));
840 }
841
842 #ifdef IPKDB_NE
843 /*
844 * This code is essentially the same as ne2000_attach above.
845 */
846 int
847 ne2000_ipkdb_attach(kip)
848 struct ipkdb_if *kip;
849 {
850 struct ne2000_softc *np = kip->port;
851 struct dp8390_softc *dp = &np->sc_dp8390;
852 bus_space_tag_t nict = dp->sc_regt;
853 bus_space_handle_t nich = dp->sc_regh;
854 int i, useword;
855
856 #ifdef GWETHER
857 /* Not supported (yet?) */
858 return -1;
859 #endif
860
861 if (np->sc_type == 0)
862 np->sc_type = ne2000_detect(nict, nich,
863 np->sc_asict, np->sc_asich);
864 if (np->sc_type == 0)
865 return -1;
866
867 useword = NE2000_USE_WORD(np);
868
869 dp->cr_proto = ED_CR_RD2;
870 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
871 dp->rcr_proto = 0;
872
873 dp->test_mem = ne2000_test_mem;
874 dp->ring_copy = ne2000_ring_copy;
875 dp->write_mbuf = ne2000_write_mbuf;
876 dp->read_hdr = ne2000_read_hdr;
877
878 for (i = 0; i < 16; i++)
879 dp->sc_reg_map[i] = i;
880
881 switch (np->sc_type) {
882 case NE2000_TYPE_NE1000:
883 dp->mem_start = dp->mem_size = 8192;
884 kip->name = "ne1000";
885 break;
886 case NE2000_TYPE_NE2000:
887 dp->mem_start = dp->mem_size = 8192 * 2;
888 kip->name = "ne2000";
889 break;
890 case NE2000_TYPE_DL10019:
891 case NE2000_TYPE_DL10022:
892 dp->mem_start = dp->mem_size = 8192 * 3;
893 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ?
894 "dl10022" : "dl10019";
895 break;
896 case NE2000_TYPE_AX88190:
897 case NE2000_TYPE_AX88790:
898 dp->rcr_proto = ED_RCR_INTT;
899 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
900 dp->mem_start = dp->mem_size = 8192 * 2;
901 kip->name = "ax88190";
902 break;
903 }
904
905 if (dp8390_ipkdb_attach(kip))
906 return -1;
907
908 dp->mem_ring = dp->mem_start
909 + ((dp->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
910
911 if (!(kip->flags & IPKDB_MYHW)) {
912 char romdata[16];
913
914 /* Read the station address. */
915 if (np->sc_type == NE2000_TYPE_AX88190 ||
916 np->sc_type == NE2000_TYPE_AX88790) {
917 /* Select page 0 registers. */
918 NIC_BARRIER(nict, nich);
919 bus_space_write_1(nict, nich, ED_P0_CR,
920 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
921 NIC_BARRIER(nict, nich);
922 /* Select word transfer */
923 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS);
924 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich,
925 AX88190_NODEID_OFFSET, kip->myenetaddr,
926 ETHER_ADDR_LEN, useword);
927 } else {
928 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich,
929 0, romdata, sizeof romdata, useword);
930 useword = useword ? 2 : 1;
931 for (i = 0; i < ETHER_ADDR_LEN; i++)
932 kip->myenetaddr[i] = romdata[i * useword];
933 }
934 kip->flags |= IPKDB_MYHW;
935
936 }
937 dp8390_stop(dp);
938
939 return 0;
940 }
941 #endif
942