ne2000.c revision 1.52
1 /* $NetBSD: ne2000.c,v 1.52 2006/11/16 01:32:52 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Common code shared by all NE2000-compatible Ethernet interfaces. 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.52 2006/11/16 01:32:52 christos Exp $"); 59 60 #include "opt_ipkdb.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/device.h> 65 #include <sys/socket.h> 66 #include <sys/mbuf.h> 67 #include <sys/syslog.h> 68 69 #include <net/if.h> 70 #include <net/if_dl.h> 71 #include <net/if_types.h> 72 #include <net/if_media.h> 73 74 #include <net/if_ether.h> 75 76 #include <sys/bswap.h> 77 #include <machine/bus.h> 78 79 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 80 #define bus_space_write_stream_2 bus_space_write_2 81 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 82 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 83 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 84 85 #ifdef IPKDB_NE 86 #include <ipkdb/ipkdb.h> 87 #endif 88 89 #include <dev/ic/dp8390reg.h> 90 #include <dev/ic/dp8390var.h> 91 92 #include <dev/ic/ne2000reg.h> 93 #include <dev/ic/ne2000var.h> 94 95 #include <dev/ic/ax88190reg.h> 96 97 int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int); 98 int ne2000_ring_copy(struct dp8390_softc *, int, caddr_t, u_short); 99 void ne2000_read_hdr(struct dp8390_softc *, int, struct dp8390_ring *); 100 int ne2000_test_mem(struct dp8390_softc *); 101 102 void ne2000_writemem(bus_space_tag_t, bus_space_handle_t, 103 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t, 104 int, int); 105 void ne2000_readmem(bus_space_tag_t, bus_space_handle_t, 106 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int); 107 108 #define ASIC_BARRIER(asict, asich) \ 109 bus_space_barrier((asict), (asich), 0, 0x10, \ 110 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 111 112 int 113 ne2000_attach(nsc, myea) 114 struct ne2000_softc *nsc; 115 u_int8_t *myea; 116 { 117 struct dp8390_softc *dsc = &nsc->sc_dp8390; 118 bus_space_tag_t nict = dsc->sc_regt; 119 bus_space_handle_t nich = dsc->sc_regh; 120 bus_space_tag_t asict = nsc->sc_asict; 121 bus_space_handle_t asich = nsc->sc_asich; 122 u_int8_t romdata[16]; 123 int memsize, i, useword; 124 125 /* 126 * Detect it again unless caller specified it; this gives us 127 * the memory size. 128 */ 129 if (nsc->sc_type == NE2000_TYPE_UNKNOWN) 130 nsc->sc_type = ne2000_detect(nict, nich, asict, asich); 131 132 /* 133 * 8k of memory for NE1000, 16k for NE2000 and 24k for the 134 * card uses DL10019. 135 */ 136 switch (nsc->sc_type) { 137 case NE2000_TYPE_UNKNOWN: 138 default: 139 printf("%s: where did the card go?\n", dsc->sc_dev.dv_xname); 140 return (1); 141 case NE2000_TYPE_NE1000: 142 memsize = 8192; 143 useword = 0; 144 break; 145 case NE2000_TYPE_NE2000: 146 case NE2000_TYPE_AX88190: /* XXX really? */ 147 case NE2000_TYPE_AX88790: 148 memsize = 8192 * 2; 149 useword = 1; 150 break; 151 case NE2000_TYPE_DL10019: 152 case NE2000_TYPE_DL10022: 153 memsize = 8192 * 3; 154 useword = 1; 155 break; 156 } 157 158 nsc->sc_useword = useword; 159 160 dsc->cr_proto = ED_CR_RD2; 161 if (nsc->sc_type == NE2000_TYPE_AX88190 || 162 nsc->sc_type == NE2000_TYPE_AX88790) { 163 dsc->rcr_proto = ED_RCR_INTT; 164 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 165 } else 166 dsc->rcr_proto = 0; 167 168 /* 169 * DCR gets: 170 * 171 * FIFO threshold to 8, No auto-init Remote DMA, 172 * byte order=80x86. 173 * 174 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 175 */ 176 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 177 178 dsc->test_mem = ne2000_test_mem; 179 dsc->ring_copy = ne2000_ring_copy; 180 dsc->write_mbuf = ne2000_write_mbuf; 181 dsc->read_hdr = ne2000_read_hdr; 182 183 /* Registers are linear. */ 184 for (i = 0; i < 16; i++) 185 dsc->sc_reg_map[i] = i; 186 187 /* 188 * NIC memory doens't start at zero on an NE board. 189 * The start address is tied to the bus width. 190 * (It happens to be computed the same way as mem size.) 191 */ 192 dsc->mem_start = memsize; 193 194 #ifdef GWETHER 195 { 196 int x, mstart = 0; 197 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 198 tbuf[ED_PAGE_SIZE]; 199 200 for (i = 0; i < ED_PAGE_SIZE; i++) 201 pbuf0[i] = 0; 202 203 /* Search for the start of RAM. */ 204 for (x = 1; x < 256; x++) { 205 ne2000_writemem(nict, nich, asict, asich, pbuf0, 206 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 207 ne2000_readmem(nict, nich, asict, asich, 208 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 209 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 210 for (i = 0; i < ED_PAGE_SIZE; i++) 211 pbuf[i] = 255 - x; 212 ne2000_writemem(nict, nich, asict, asich, 213 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 214 useword, 0); 215 ne2000_readmem(nict, nich, asict, asich, 216 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 217 useword); 218 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 219 mstart = x << ED_PAGE_SHIFT; 220 memsize = ED_PAGE_SIZE; 221 break; 222 } 223 } 224 } 225 226 if (mstart == 0) { 227 printf("%s: cannot find start of RAM\n", 228 dsc->sc_dev.dv_xname); 229 return (1); 230 } 231 232 /* Search for the end of RAM. */ 233 for (++x; x < 256; x++) { 234 ne2000_writemem(nict, nich, asict, asich, pbuf0, 235 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 236 ne2000_readmem(nict, nich, asict, asich, 237 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 238 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 239 for (i = 0; i < ED_PAGE_SIZE; i++) 240 pbuf[i] = 255 - x; 241 ne2000_writemem(nict, nich, asict, asich, 242 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 243 useword, 0); 244 ne2000_readmem(nict, nich, asict, asich, 245 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 246 useword); 247 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 248 memsize += ED_PAGE_SIZE; 249 else 250 break; 251 } else 252 break; 253 } 254 255 printf("%s: RAM start 0x%x, size %d\n", 256 dsc->sc_dev.dv_xname, mstart, memsize); 257 258 dsc->mem_start = mstart; 259 } 260 #endif /* GWETHER */ 261 262 dsc->mem_size = memsize; 263 264 if (myea == NULL) { 265 /* Read the station address. */ 266 if (nsc->sc_type == NE2000_TYPE_AX88190 || 267 nsc->sc_type == NE2000_TYPE_AX88790) { 268 /* Select page 0 registers. */ 269 NIC_BARRIER(nict, nich); 270 bus_space_write_1(nict, nich, ED_P0_CR, 271 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 272 NIC_BARRIER(nict, nich); 273 /* Select word transfer. */ 274 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 275 NIC_BARRIER(nict, nich); 276 ne2000_readmem(nict, nich, asict, asich, 277 AX88190_NODEID_OFFSET, dsc->sc_enaddr, 278 ETHER_ADDR_LEN, useword); 279 } else { 280 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 281 sizeof(romdata), useword); 282 for (i = 0; i < ETHER_ADDR_LEN; i++) 283 dsc->sc_enaddr[i] = 284 romdata[i * (useword ? 2 : 1)]; 285 } 286 } else 287 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr)); 288 289 /* Clear any pending interrupts that might have occurred above. */ 290 NIC_BARRIER(nict, nich); 291 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 292 NIC_BARRIER(nict, nich); 293 294 if (dsc->sc_media_init == NULL) 295 dsc->sc_media_init = dp8390_media_init; 296 297 if (dp8390_config(dsc)) { 298 printf("%s: setup failed\n", dsc->sc_dev.dv_xname); 299 return (1); 300 } 301 302 /* 303 * We need to compute mem_ring a bit differently; override the 304 * value set up in dp8390_config(). 305 */ 306 dsc->mem_ring = 307 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 308 309 return (0); 310 } 311 312 /* 313 * Detect an NE-2000 or compatible. Returns a model code. 314 */ 315 int 316 ne2000_detect(nict, nich, asict, asich) 317 bus_space_tag_t nict; 318 bus_space_handle_t nich; 319 bus_space_tag_t asict; 320 bus_space_handle_t asich; 321 { 322 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern"; 323 u_int8_t test_buffer[32], tmp; 324 int i, rv = 0; 325 326 /* Reset the board. */ 327 #ifdef GWETHER 328 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 329 ASIC_BARRIER(asict, asich); 330 delay(200); 331 #endif /* GWETHER */ 332 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 333 ASIC_BARRIER(asict, asich); 334 delay(10000); 335 336 /* 337 * I don't know if this is necessary; probably cruft leftover from 338 * Clarkson packet driver code. Doesn't do a thing on the boards I've 339 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 340 * non-invasive...but some boards don't seem to reset and I don't have 341 * complete documentation on what the 'right' thing to do is...so we do 342 * the invasive thing for now. Yuck.] 343 */ 344 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 345 ASIC_BARRIER(asict, asich); 346 delay(5000); 347 348 /* 349 * This is needed because some NE clones apparently don't reset the 350 * NIC properly (or the NIC chip doesn't reset fully on power-up). 351 * XXX - this makes the probe invasive! Done against my better 352 * judgement. -DLG 353 */ 354 bus_space_write_1(nict, nich, ED_P0_CR, 355 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 356 NIC_BARRIER(nict, nich); 357 358 delay(5000); 359 360 /* 361 * Generic probe routine for testing for the existence of a DS8390. 362 * Must be performed after the NIC has just been reset. This 363 * works by looking at certain register values that are guaranteed 364 * to be initialized a certain way after power-up or reset. 365 * 366 * Specifically: 367 * 368 * Register reset bits set bits 369 * -------- ---------- -------- 370 * CR TXP, STA RD2, STP 371 * ISR RST 372 * IMR <all> 373 * DCR LAS 374 * TCR LB1, LB0 375 * 376 * We only look at CR and ISR, however, since looking at the others 377 * would require changing register pages, which would be intrusive 378 * if this isn't an 8390. 379 */ 380 381 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 382 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 383 (ED_CR_RD2 | ED_CR_STP)) 384 goto out; 385 386 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 387 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 388 goto out; 389 390 bus_space_write_1(nict, nich, 391 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 392 NIC_BARRIER(nict, nich); 393 394 for (i = 0; i < 100; i++) { 395 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 396 ED_ISR_RST) { 397 /* Ack the reset bit. */ 398 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 399 NIC_BARRIER(nict, nich); 400 break; 401 } 402 delay(100); 403 } 404 405 #if 0 406 /* XXX */ 407 if (i == 100) 408 goto out; 409 #endif 410 411 /* 412 * Test the ability to read and write to the NIC memory. This has 413 * the side effect of determining if this is an NE1000 or an NE2000. 414 */ 415 416 /* 417 * This prevents packets from being stored in the NIC memory when 418 * the readmem routine turns on the start bit in the CR. 419 */ 420 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 421 NIC_BARRIER(nict, nich); 422 423 /* Temporarily initialize DCR for byte operations. */ 424 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 425 426 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 427 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 428 429 /* 430 * Write a test pattern in byte mode. If this fails, then there 431 * probably isn't any memory at 8k - which likely means that the 432 * board is an NE2000. 433 */ 434 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 435 sizeof(test_pattern), 0, 1); 436 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 437 sizeof(test_buffer), 0); 438 439 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 440 /* not an NE1000 - try NE2000 */ 441 bus_space_write_1(nict, nich, ED_P0_DCR, 442 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 443 bus_space_write_1(nict, nich, ED_P0_PSTART, 444 16384 >> ED_PAGE_SHIFT); 445 bus_space_write_1(nict, nich, ED_P0_PSTOP, 446 32768 >> ED_PAGE_SHIFT); 447 448 /* 449 * Write the test pattern in word mode. If this also fails, 450 * then we don't know what this board is. 451 */ 452 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 453 sizeof(test_pattern), 1, 0); 454 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 455 sizeof(test_buffer), 1); 456 457 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) 458 goto out; /* not an NE2000 either */ 459 460 rv = NE2000_TYPE_NE2000; 461 } else { 462 /* We're an NE1000. */ 463 rv = NE2000_TYPE_NE1000; 464 } 465 466 /* Clear any pending interrupts that might have occurred above. */ 467 NIC_BARRIER(nict, nich); 468 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 469 470 out: 471 return (rv); 472 } 473 474 /* 475 * Write an mbuf chain to the destination NIC memory address using programmed 476 * I/O. 477 */ 478 int 479 ne2000_write_mbuf(sc, m, buf) 480 struct dp8390_softc *sc; 481 struct mbuf *m; 482 int buf; 483 { 484 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 485 bus_space_tag_t nict = sc->sc_regt; 486 bus_space_handle_t nich = sc->sc_regh; 487 bus_space_tag_t asict = nsc->sc_asict; 488 bus_space_handle_t asich = nsc->sc_asich; 489 int savelen, padlen; 490 int maxwait = 100; /* about 120us */ 491 492 savelen = m->m_pkthdr.len; 493 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) { 494 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen; 495 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN; 496 } else 497 padlen = 0; 498 499 500 /* Select page 0 registers. */ 501 NIC_BARRIER(nict, nich); 502 bus_space_write_1(nict, nich, ED_P0_CR, 503 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 504 NIC_BARRIER(nict, nich); 505 506 /* Reset remote DMA complete flag. */ 507 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 508 NIC_BARRIER(nict, nich); 509 510 /* Set up DMA byte count. */ 511 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 512 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 513 514 /* Set up destination address in NIC mem. */ 515 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 516 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 517 518 /* Set remote DMA write. */ 519 NIC_BARRIER(nict, nich); 520 bus_space_write_1(nict, nich, 521 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 522 NIC_BARRIER(nict, nich); 523 524 /* 525 * Transfer the mbuf chain to the NIC memory. NE2000 cards 526 * require that data be transferred as words, and only words, 527 * so that case requires some extra code to patch over odd-length 528 * mbufs. 529 */ 530 if (nsc->sc_type == NE2000_TYPE_NE1000) { 531 /* NE1000s are easy. */ 532 for (; m != 0; m = m->m_next) { 533 if (m->m_len) { 534 bus_space_write_multi_1(asict, asich, 535 NE2000_ASIC_DATA, mtod(m, u_int8_t *), 536 m->m_len); 537 } 538 } 539 if (padlen) { 540 for(; padlen > 0; padlen--) 541 bus_space_write_1(asict, asich, 542 NE2000_ASIC_DATA, 0); 543 } 544 } else { 545 /* NE2000s are a bit trickier. */ 546 u_int8_t *data, savebyte[2]; 547 int l, leftover; 548 #ifdef DIAGNOSTIC 549 u_int8_t *lim; 550 #endif 551 /* Start out with no leftover data. */ 552 leftover = 0; 553 savebyte[0] = savebyte[1] = 0; 554 555 for (; m != 0; m = m->m_next) { 556 l = m->m_len; 557 if (l == 0) 558 continue; 559 data = mtod(m, u_int8_t *); 560 #ifdef DIAGNOSTIC 561 lim = data + l; 562 #endif 563 while (l > 0) { 564 if (leftover) { 565 /* 566 * Data left over (from mbuf or 567 * realignment). Buffer the next 568 * byte, and write it and the 569 * leftover data out. 570 */ 571 savebyte[1] = *data++; 572 l--; 573 bus_space_write_stream_2(asict, asich, 574 NE2000_ASIC_DATA, 575 *(u_int16_t *)savebyte); 576 leftover = 0; 577 } else if (BUS_SPACE_ALIGNED_POINTER(data, 578 u_int16_t) == 0) { 579 /* 580 * Unaligned data; buffer the next 581 * byte. 582 */ 583 savebyte[0] = *data++; 584 l--; 585 leftover = 1; 586 } else { 587 /* 588 * Aligned data; output contiguous 589 * words as much as we can, then 590 * buffer the remaining byte, if any. 591 */ 592 leftover = l & 1; 593 l &= ~1; 594 bus_space_write_multi_stream_2(asict, 595 asich, NE2000_ASIC_DATA, 596 (u_int16_t *)data, l >> 1); 597 data += l; 598 if (leftover) 599 savebyte[0] = *data++; 600 l = 0; 601 } 602 } 603 if (l < 0) 604 panic("ne2000_write_mbuf: negative len"); 605 #ifdef DIAGNOSTIC 606 if (data != lim) 607 panic("ne2000_write_mbuf: data != lim"); 608 #endif 609 } 610 if (leftover) { 611 savebyte[1] = 0; 612 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 613 *(u_int16_t *)savebyte); 614 } 615 if (padlen) { 616 for(; padlen > 1; padlen -= 2) 617 bus_space_write_stream_2(asict, asich, 618 NE2000_ASIC_DATA, 0); 619 } 620 } 621 NIC_BARRIER(nict, nich); 622 623 /* AX88796 doesn't seem to have remote DMA complete */ 624 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE) 625 return(savelen); 626 627 /* 628 * Wait for remote DMA to complete. This is necessary because on the 629 * transmit side, data is handled internally by the NIC in bursts, and 630 * we can't start another remote DMA until this one completes. Not 631 * waiting causes really bad things to happen - like the NIC wedging 632 * the bus. 633 */ 634 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 635 ED_ISR_RDC) && --maxwait) { 636 (void)bus_space_read_1(nict, nich, ED_P0_CRDA1); 637 (void)bus_space_read_1(nict, nich, ED_P0_CRDA0); 638 NIC_BARRIER(nict, nich); 639 DELAY(1); 640 } 641 642 if (maxwait == 0) { 643 log(LOG_WARNING, 644 "%s: remote transmit DMA failed to complete\n", 645 sc->sc_dev.dv_xname); 646 dp8390_reset(sc); 647 } 648 649 return (savelen); 650 } 651 652 /* 653 * Given a source and destination address, copy 'amout' of a packet from 654 * the ring buffer into a linear destination buffer. Takes into account 655 * ring-wrap. 656 */ 657 int 658 ne2000_ring_copy(sc, src, dst, amount) 659 struct dp8390_softc *sc; 660 int src; 661 caddr_t dst; 662 u_short amount; 663 { 664 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 665 bus_space_tag_t nict = sc->sc_regt; 666 bus_space_handle_t nich = sc->sc_regh; 667 bus_space_tag_t asict = nsc->sc_asict; 668 bus_space_handle_t asich = nsc->sc_asich; 669 u_short tmp_amount; 670 int useword = nsc->sc_useword; 671 672 /* Does copy wrap to lower addr in ring buffer? */ 673 if (src + amount > sc->mem_end) { 674 tmp_amount = sc->mem_end - src; 675 676 /* Copy amount up to end of NIC memory. */ 677 ne2000_readmem(nict, nich, asict, asich, src, 678 (u_int8_t *)dst, tmp_amount, useword); 679 680 amount -= tmp_amount; 681 src = sc->mem_ring; 682 dst += tmp_amount; 683 } 684 685 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 686 amount, useword); 687 688 return (src + amount); 689 } 690 691 void 692 ne2000_read_hdr(sc, buf, hdr) 693 struct dp8390_softc *sc; 694 int buf; 695 struct dp8390_ring *hdr; 696 { 697 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 698 699 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 700 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 701 nsc->sc_useword); 702 #if BYTE_ORDER == BIG_ENDIAN 703 hdr->count = bswap16(hdr->count); 704 #endif 705 } 706 707 int 708 ne2000_test_mem(struct dp8390_softc *sc) 709 { 710 711 /* Noop. */ 712 return (0); 713 } 714 715 /* 716 * Given a NIC memory source address and a host memory destination address, 717 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 718 * rounded up to a word - ok as long as mbufs are word sized. 719 */ 720 void 721 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword) 722 bus_space_tag_t nict; 723 bus_space_handle_t nich; 724 bus_space_tag_t asict; 725 bus_space_handle_t asich; 726 int src; 727 u_int8_t *dst; 728 size_t amount; 729 int useword; 730 { 731 732 /* Select page 0 registers. */ 733 NIC_BARRIER(nict, nich); 734 bus_space_write_1(nict, nich, ED_P0_CR, 735 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 736 NIC_BARRIER(nict, nich); 737 738 /* Round up to a word. */ 739 if (amount & 1) 740 ++amount; 741 742 /* Set up DMA byte count. */ 743 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 744 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 745 746 /* Set up source address in NIC mem. */ 747 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 748 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 749 750 NIC_BARRIER(nict, nich); 751 bus_space_write_1(nict, nich, ED_P0_CR, 752 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 753 754 ASIC_BARRIER(asict, asich); 755 if (useword) 756 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 757 (u_int16_t *)dst, amount >> 1); 758 else 759 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 760 dst, amount); 761 } 762 763 /* 764 * Stripped down routine for writing a linear buffer to NIC memory. Only 765 * used in the probe routine to test the memory. 'len' must be even. 766 */ 767 void 768 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet) 769 bus_space_tag_t nict; 770 bus_space_handle_t nich; 771 bus_space_tag_t asict; 772 bus_space_handle_t asich; 773 u_int8_t *src; 774 int dst; 775 size_t len; 776 int useword; 777 int quiet; 778 { 779 int maxwait = 100; /* about 120us */ 780 781 /* Select page 0 registers. */ 782 NIC_BARRIER(nict, nich); 783 bus_space_write_1(nict, nich, ED_P0_CR, 784 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 785 NIC_BARRIER(nict, nich); 786 787 /* Reset remote DMA complete flag. */ 788 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 789 NIC_BARRIER(nict, nich); 790 791 /* Set up DMA byte count. */ 792 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 793 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 794 795 /* Set up destination address in NIC mem. */ 796 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 797 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 798 799 /* Set remote DMA write. */ 800 NIC_BARRIER(nict, nich); 801 bus_space_write_1(nict, nich, ED_P0_CR, 802 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 803 NIC_BARRIER(nict, nich); 804 805 ASIC_BARRIER(asict, asich); 806 if (useword) 807 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 808 (u_int16_t *)src, len >> 1); 809 else 810 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 811 src, len); 812 ASIC_BARRIER(asict, asich); 813 814 /* 815 * Wait for remote DMA to complete. This is necessary because on the 816 * transmit side, data is handled internally by the NIC in bursts, and 817 * we can't start another remote DMA until this one completes. Not 818 * waiting causes really bad things to happen - like the NIC wedging 819 * the bus. 820 */ 821 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 822 ED_ISR_RDC) && --maxwait) 823 DELAY(1); 824 825 if (!quiet && maxwait == 0) 826 printf("ne2000_writemem: failed to complete\n"); 827 } 828 829 int 830 ne2000_detach(sc, flags) 831 struct ne2000_softc *sc; 832 int flags; 833 { 834 835 return (dp8390_detach(&sc->sc_dp8390, flags)); 836 } 837 838 #ifdef IPKDB_NE 839 /* 840 * This code is essentially the same as ne2000_attach above. 841 */ 842 int 843 ne2000_ipkdb_attach(kip) 844 struct ipkdb_if *kip; 845 { 846 struct ne2000_softc *np = kip->port; 847 struct dp8390_softc *dp = &np->sc_dp8390; 848 bus_space_tag_t nict = dp->sc_regt; 849 bus_space_handle_t nich = dp->sc_regh; 850 int i, useword; 851 852 #ifdef GWETHER 853 /* Not supported (yet?) */ 854 return -1; 855 #endif 856 857 if (np->sc_type == 0) 858 np->sc_type = ne2000_detect(nict, nich, 859 np->sc_asict, np->sc_asich); 860 if (np->sc_type == 0) 861 return -1; 862 863 useword = np->sc_useword; 864 865 dp->cr_proto = ED_CR_RD2; 866 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 867 dp->rcr_proto = 0; 868 869 dp->test_mem = ne2000_test_mem; 870 dp->ring_copy = ne2000_ring_copy; 871 dp->write_mbuf = ne2000_write_mbuf; 872 dp->read_hdr = ne2000_read_hdr; 873 874 for (i = 0; i < 16; i++) 875 dp->sc_reg_map[i] = i; 876 877 switch (np->sc_type) { 878 case NE2000_TYPE_NE1000: 879 dp->mem_start = dp->mem_size = 8192; 880 kip->name = "ne1000"; 881 break; 882 case NE2000_TYPE_NE2000: 883 dp->mem_start = dp->mem_size = 8192 * 2; 884 kip->name = "ne2000"; 885 break; 886 case NE2000_TYPE_DL10019: 887 case NE2000_TYPE_DL10022: 888 dp->mem_start = dp->mem_size = 8192 * 3; 889 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ? 890 "dl10022" : "dl10019"; 891 break; 892 case NE2000_TYPE_AX88190: 893 case NE2000_TYPE_AX88790: 894 dp->rcr_proto = ED_RCR_INTT; 895 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 896 dp->mem_start = dp->mem_size = 8192 * 2; 897 kip->name = "ax88190"; 898 break; 899 } 900 901 if (dp8390_ipkdb_attach(kip)) 902 return -1; 903 904 dp->mem_ring = dp->mem_start 905 + ((dp->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 906 907 if (!(kip->flags & IPKDB_MYHW)) { 908 char romdata[16]; 909 910 /* Read the station address. */ 911 if (np->sc_type == NE2000_TYPE_AX88190 || 912 np->sc_type == NE2000_TYPE_AX88790) { 913 /* Select page 0 registers. */ 914 NIC_BARRIER(nict, nich); 915 bus_space_write_1(nict, nich, ED_P0_CR, 916 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 917 NIC_BARRIER(nict, nich); 918 /* Select word transfer */ 919 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 920 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 921 AX88190_NODEID_OFFSET, kip->myenetaddr, 922 ETHER_ADDR_LEN, useword); 923 } else { 924 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 925 0, romdata, sizeof romdata, useword); 926 for (i = 0; i < ETHER_ADDR_LEN; i++) 927 kip->myenetaddr[i] = romdata[i << useword]; 928 } 929 kip->flags |= IPKDB_MYHW; 930 931 } 932 dp8390_stop(dp); 933 934 return 0; 935 } 936 #endif 937 938 void 939 ne2000_power(int why, void *arg) 940 { 941 struct ne2000_softc *sc = arg; 942 struct dp8390_softc *dsc = &sc->sc_dp8390; 943 struct ifnet *ifp = &dsc->sc_ec.ec_if; 944 int s; 945 946 s = splnet(); 947 switch (why) { 948 case PWR_SUSPEND: 949 case PWR_STANDBY: 950 dp8390_stop(dsc); 951 dp8390_disable(dsc); 952 break; 953 case PWR_RESUME: 954 if (ifp->if_flags & IFF_UP) { 955 if (dp8390_enable(dsc) == 0) 956 dp8390_init(dsc); 957 } 958 break; 959 case PWR_SOFTSUSPEND: 960 case PWR_SOFTSTANDBY: 961 case PWR_SOFTRESUME: 962 break; 963 } 964 splx(s); 965 } 966
Indexes created Mon Sep 22 13:09:51 GMT 2025