ne2000.c revision 1.58.4.4 1 /* $NetBSD: ne2000.c,v 1.58.4.4 2010/03/11 15:03:33 yamt Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
35 * adapters.
36 *
37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
38 *
39 * Copyright (C) 1993, David Greenman. This software may be used, modified,
40 * copied, distributed, and sold, in both source and binary form provided that
41 * the above copyright and these terms are retained. Under no circumstances is
42 * the author responsible for the proper functioning of this software, nor does
43 * the author assume any responsibility for damages incurred with its use.
44 */
45
46 /*
47 * Common code shared by all NE2000-compatible Ethernet interfaces.
48 */
49
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.58.4.4 2010/03/11 15:03:33 yamt Exp $");
52
53 #include "opt_ipkdb.h"
54
55 #include "rtl80x9.h"
56
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/device.h>
60 #include <sys/socket.h>
61 #include <sys/mbuf.h>
62 #include <sys/syslog.h>
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_types.h>
67 #include <net/if_media.h>
68
69 #include <net/if_ether.h>
70
71 #include <sys/bswap.h>
72 #include <sys/bus.h>
73
74 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
75 #define bus_space_write_stream_2 bus_space_write_2
76 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
77 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
78 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
79
80 #ifdef IPKDB_NE
81 #include <ipkdb/ipkdb.h>
82 #endif
83
84 #include <dev/ic/dp8390reg.h>
85 #include <dev/ic/dp8390var.h>
86
87 #include <dev/ic/ne2000reg.h>
88 #include <dev/ic/ne2000var.h>
89
90 #include <dev/ic/rtl80x9reg.h>
91 #include <dev/ic/rtl80x9var.h>
92
93 #include <dev/ic/ax88190reg.h>
94
95 int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int);
96 int ne2000_ring_copy(struct dp8390_softc *, int, void *, u_short);
97 void ne2000_read_hdr(struct dp8390_softc *, int, struct dp8390_ring *);
98 int ne2000_test_mem(struct dp8390_softc *);
99
100 void ne2000_writemem(bus_space_tag_t, bus_space_handle_t,
101 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t,
102 int, int);
103 void ne2000_readmem(bus_space_tag_t, bus_space_handle_t,
104 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int);
105
106 #ifdef NE2000_DETECT_8BIT
107 static bool ne2000_detect_8bit(bus_space_tag_t, bus_space_handle_t,
108 bus_space_tag_t, bus_space_handle_t);
109 #endif
110
111 #define ASIC_BARRIER(asict, asich) \
112 bus_space_barrier((asict), (asich), 0, 0x10, \
113 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
114
115 int
116 ne2000_attach(struct ne2000_softc *nsc, u_int8_t *myea)
117 {
118 struct dp8390_softc *dsc = &nsc->sc_dp8390;
119 bus_space_tag_t nict = dsc->sc_regt;
120 bus_space_handle_t nich = dsc->sc_regh;
121 bus_space_tag_t asict = nsc->sc_asict;
122 bus_space_handle_t asich = nsc->sc_asich;
123 u_int8_t romdata[16];
124 int memstart, memsize, i, useword;
125
126 /*
127 * Detect it again unless caller specified it; this gives us
128 * the memory size.
129 */
130 if (nsc->sc_type == NE2000_TYPE_UNKNOWN)
131 nsc->sc_type = ne2000_detect(nict, nich, asict, asich);
132
133 /*
134 * 8k of memory for NE1000, 16k for NE2000 and 24k for the
135 * card uses DL10019.
136 */
137 switch (nsc->sc_type) {
138 case NE2000_TYPE_UNKNOWN:
139 default:
140 aprint_error_dev(dsc->sc_dev, "where did the card go?\n");
141 return (1);
142 case NE2000_TYPE_NE1000:
143 memstart = 8192;
144 memsize = 8192;
145 useword = 0;
146 break;
147 case NE2000_TYPE_NE2000:
148 case NE2000_TYPE_AX88190: /* XXX really? */
149 case NE2000_TYPE_AX88790:
150 #if NRTL80X9 > 0
151 case NE2000_TYPE_RTL8019:
152 #endif
153 memstart = 16384;
154 memsize = 16384;
155 useword = 1;
156 if (
157 #ifdef NE2000_DETECT_8BIT
158 ne2000_detect_8bit(nict, nich, asict, asich) ||
159 #endif
160 (nsc->sc_quirk & NE2000_QUIRK_8BIT) != 0) {
161 /* in 8 bit mode, only 8KB memory can be used */
162 memsize = 8192;
163 useword = 0;
164 }
165 break;
166 case NE2000_TYPE_DL10019:
167 case NE2000_TYPE_DL10022:
168 memstart = 8192 * 3;
169 memsize = 8192 * 3;
170 useword = 1;
171 break;
172 }
173
174 nsc->sc_useword = useword;
175 #if NRTL80X9 > 0
176 if (nsc->sc_type == NE2000_TYPE_RTL8019) {
177 dsc->init_card = rtl80x9_init_card;
178 dsc->sc_media_init = rtl80x9_media_init;
179 dsc->sc_mediachange = rtl80x9_mediachange;
180 dsc->sc_mediastatus = rtl80x9_mediastatus;
181 }
182 #endif
183
184 dsc->cr_proto = ED_CR_RD2;
185 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
186 nsc->sc_type == NE2000_TYPE_AX88790) {
187 dsc->rcr_proto = ED_RCR_INTT;
188 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
189 } else
190 dsc->rcr_proto = 0;
191
192 /*
193 * DCR gets:
194 *
195 * FIFO threshold to 8, No auto-init Remote DMA,
196 * byte order=80x86.
197 *
198 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA.
199 */
200 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
201
202 dsc->test_mem = ne2000_test_mem;
203 dsc->ring_copy = ne2000_ring_copy;
204 dsc->write_mbuf = ne2000_write_mbuf;
205 dsc->read_hdr = ne2000_read_hdr;
206
207 /* Registers are linear. */
208 for (i = 0; i < 16; i++)
209 dsc->sc_reg_map[i] = i;
210
211 /*
212 * NIC memory doens't start at zero on an NE board.
213 * The start address is tied to the bus width.
214 */
215 #ifdef GWETHER
216 {
217 int x;
218 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE],
219 tbuf[ED_PAGE_SIZE];
220
221 memstart = 0;
222 for (i = 0; i < ED_PAGE_SIZE; i++)
223 pbuf0[i] = 0;
224
225 /* Search for the start of RAM. */
226 for (x = 1; x < 256; x++) {
227 ne2000_writemem(nict, nich, asict, asich, pbuf0,
228 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
229 ne2000_readmem(nict, nich, asict, asich,
230 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
231 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
232 for (i = 0; i < ED_PAGE_SIZE; i++)
233 pbuf[i] = 255 - x;
234 ne2000_writemem(nict, nich, asict, asich,
235 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
236 useword, 0);
237 ne2000_readmem(nict, nich, asict, asich,
238 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
239 useword);
240 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
241 memstart = x << ED_PAGE_SHIFT;
242 memsize = ED_PAGE_SIZE;
243 break;
244 }
245 }
246 }
247
248 if (memstart == 0) {
249 aprint_error_dev(&dsc->sc_dev, "cannot find start of RAM\n");
250 return (1);
251 }
252
253 /* Search for the end of RAM. */
254 for (++x; x < 256; x++) {
255 ne2000_writemem(nict, nich, asict, asich, pbuf0,
256 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
257 ne2000_readmem(nict, nich, asict, asich,
258 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
259 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
260 for (i = 0; i < ED_PAGE_SIZE; i++)
261 pbuf[i] = 255 - x;
262 ne2000_writemem(nict, nich, asict, asich,
263 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
264 useword, 0);
265 ne2000_readmem(nict, nich, asict, asich,
266 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
267 useword);
268 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
269 memsize += ED_PAGE_SIZE;
270 else
271 break;
272 } else
273 break;
274 }
275
276 printf("%s: RAM start 0x%x, size %d\n",
277 device_xname(&dsc->sc_dev), memstart, memsize);
278 }
279 #endif /* GWETHER */
280 dsc->mem_start = memstart;
281
282 dsc->mem_size = memsize;
283
284 if (myea == NULL) {
285 /* Read the station address. */
286 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
287 nsc->sc_type == NE2000_TYPE_AX88790) {
288 /* Select page 0 registers. */
289 NIC_BARRIER(nict, nich);
290 bus_space_write_1(nict, nich, ED_P0_CR,
291 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
292 NIC_BARRIER(nict, nich);
293 /* Select word transfer. */
294 bus_space_write_1(nict, nich, ED_P0_DCR,
295 useword ? ED_DCR_WTS : 0);
296 NIC_BARRIER(nict, nich);
297 ne2000_readmem(nict, nich, asict, asich,
298 AX88190_NODEID_OFFSET, dsc->sc_enaddr,
299 ETHER_ADDR_LEN, useword);
300 } else {
301 bool ne1000 = (nsc->sc_type == NE2000_TYPE_NE1000);
302
303 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
304 sizeof(romdata), useword);
305 for (i = 0; i < ETHER_ADDR_LEN; i++)
306 dsc->sc_enaddr[i] =
307 romdata[i * (ne1000 ? 1 : 2)];
308 }
309 } else
310 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr));
311
312 /* Clear any pending interrupts that might have occurred above. */
313 NIC_BARRIER(nict, nich);
314 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
315 NIC_BARRIER(nict, nich);
316
317 if (dsc->sc_media_init == NULL)
318 dsc->sc_media_init = dp8390_media_init;
319
320 if (dp8390_config(dsc)) {
321 aprint_error_dev(dsc->sc_dev, "setup failed\n");
322 return (1);
323 }
324
325 return (0);
326 }
327
328 /*
329 * Detect an NE-2000 or compatible. Returns a model code.
330 */
331 int
332 ne2000_detect(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich)
333 {
334 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern";
335 u_int8_t test_buffer[32], tmp;
336 int i, rv = NE2000_TYPE_UNKNOWN;
337 int useword;
338
339 /* Reset the board. */
340 #ifdef GWETHER
341 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0);
342 ASIC_BARRIER(asict, asich);
343 delay(200);
344 #endif /* GWETHER */
345 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
346 ASIC_BARRIER(asict, asich);
347 delay(10000);
348
349 /*
350 * I don't know if this is necessary; probably cruft leftover from
351 * Clarkson packet driver code. Doesn't do a thing on the boards I've
352 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
353 * non-invasive...but some boards don't seem to reset and I don't have
354 * complete documentation on what the 'right' thing to do is...so we do
355 * the invasive thing for now. Yuck.]
356 */
357 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
358 ASIC_BARRIER(asict, asich);
359 delay(5000);
360
361 /*
362 * This is needed because some NE clones apparently don't reset the
363 * NIC properly (or the NIC chip doesn't reset fully on power-up).
364 * XXX - this makes the probe invasive! Done against my better
365 * judgement. -DLG
366 */
367 bus_space_write_1(nict, nich, ED_P0_CR,
368 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
369 NIC_BARRIER(nict, nich);
370
371 delay(5000);
372
373 /*
374 * Generic probe routine for testing for the existence of a DS8390.
375 * Must be performed after the NIC has just been reset. This
376 * works by looking at certain register values that are guaranteed
377 * to be initialized a certain way after power-up or reset.
378 *
379 * Specifically:
380 *
381 * Register reset bits set bits
382 * -------- ---------- --------
383 * CR TXP, STA RD2, STP
384 * ISR RST
385 * IMR <all>
386 * DCR LAS
387 * TCR LB1, LB0
388 *
389 * We only look at CR and ISR, however, since looking at the others
390 * would require changing register pages, which would be intrusive
391 * if this isn't an 8390.
392 */
393
394 tmp = bus_space_read_1(nict, nich, ED_P0_CR);
395 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
396 (ED_CR_RD2 | ED_CR_STP))
397 goto out;
398
399 tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
400 if ((tmp & ED_ISR_RST) != ED_ISR_RST)
401 goto out;
402
403 bus_space_write_1(nict, nich,
404 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
405 NIC_BARRIER(nict, nich);
406
407 for (i = 0; i < 100; i++) {
408 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) ==
409 ED_ISR_RST) {
410 /* Ack the reset bit. */
411 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST);
412 NIC_BARRIER(nict, nich);
413 break;
414 }
415 delay(100);
416 }
417
418 #if 0
419 /* XXX */
420 if (i == 100)
421 goto out;
422 #endif
423
424 /*
425 * Test the ability to read and write to the NIC memory. This has
426 * the side effect of determining if this is an NE1000 or an NE2000.
427 */
428
429 /*
430 * This prevents packets from being stored in the NIC memory when
431 * the readmem routine turns on the start bit in the CR.
432 */
433 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON);
434 NIC_BARRIER(nict, nich);
435
436 /* Temporarily initialize DCR for byte operations. */
437 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
438
439 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
440 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
441
442 /*
443 * Write a test pattern in byte mode. If this fails, then there
444 * probably isn't any memory at 8k - which likely means that the
445 * board is an NE2000.
446 */
447 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192,
448 sizeof(test_pattern), 0, 1);
449 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer,
450 sizeof(test_buffer), 0);
451
452 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
453 /* We're an NE1000. */
454 rv = NE2000_TYPE_NE1000;
455 goto out;
456 }
457
458 /* not an NE1000 - try NE2000 */
459
460 /* try 16 bit mode first */
461 useword = 1;
462
463 #ifdef NE2000_DETECT_8BIT
464 /*
465 * Check bus type in EEPROM first because some NE2000 compatible wedges
466 * on 16 bit DMA access if the chip is configured in 8 bit mode.
467 */
468 if (ne2000_detect_8bit(nict, nich, asict, asich))
469 useword = 0;
470 #endif
471 again:
472 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS |
473 (useword ? ED_DCR_WTS : 0));
474 bus_space_write_1(nict, nich, ED_P0_PSTART, 16384 >> ED_PAGE_SHIFT);
475 bus_space_write_1(nict, nich, ED_P0_PSTOP,
476 (16384 + (useword ? 16384 : 8192)) >> ED_PAGE_SHIFT);
477
478 /*
479 * Write the test pattern in word mode. If this also fails,
480 * then we don't know what this board is.
481 */
482 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384,
483 sizeof(test_pattern), useword, 0);
484 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer,
485 sizeof(test_buffer), useword);
486
487 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) {
488 if (useword == 1) {
489 /* try 8 bit mode */
490 useword = 0;
491 goto again;
492 }
493 return NE2000_TYPE_UNKNOWN; /* not an NE2000 either */
494 }
495
496 rv = NE2000_TYPE_NE2000;
497
498 #if NRTL80X9 > 0
499 /* Check for a Realtek RTL8019. */
500 if (bus_space_read_1(nict, nich, NERTL_RTL0_8019ID0) == RTL0_8019ID0 &&
501 bus_space_read_1(nict, nich, NERTL_RTL0_8019ID1) == RTL0_8019ID1)
502 rv = NE2000_TYPE_RTL8019;
503 #endif
504
505 out:
506 /* Clear any pending interrupts that might have occurred above. */
507 NIC_BARRIER(nict, nich);
508 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
509
510 return (rv);
511 }
512
513 #ifdef NE2000_DETECT_8BIT
514 static bool
515 ne2000_detect_8bit(bus_space_tag_t nict, bus_space_handle_t nich,
516 bus_space_tag_t asict, bus_space_handle_t asich)
517 {
518 bool is8bit;
519 uint8_t romdata[32];
520
521 is8bit = false;
522
523 /* Set DCR for 8 bit DMA. */
524 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
525 /* Read PROM area. */
526 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
527 sizeof(romdata), 0);
528 if (romdata[28] == 'B' && romdata[30] == 'B') {
529 /* 'B' (0x42) in 8 bit mode, 'W' (0x57) in 16 bit mode */
530 is8bit = true;
531 }
532 if (!is8bit) {
533 /* not in 8 bit mode; put back DCR setting for 16 bit DMA */
534 bus_space_write_1(nict, nich, ED_P0_DCR,
535 ED_DCR_FT1 | ED_DCR_LS | ED_DCR_WTS);
536 }
537
538 return is8bit;
539 }
540 #endif
541
542 /*
543 * Write an mbuf chain to the destination NIC memory address using programmed
544 * I/O.
545 */
546 int
547 ne2000_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
548 {
549 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
550 bus_space_tag_t nict = sc->sc_regt;
551 bus_space_handle_t nich = sc->sc_regh;
552 bus_space_tag_t asict = nsc->sc_asict;
553 bus_space_handle_t asich = nsc->sc_asich;
554 int savelen, padlen;
555 int maxwait = 100; /* about 120us */
556
557 savelen = m->m_pkthdr.len;
558 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
559 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen;
560 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
561 } else
562 padlen = 0;
563
564
565 /* Select page 0 registers. */
566 NIC_BARRIER(nict, nich);
567 bus_space_write_1(nict, nich, ED_P0_CR,
568 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
569 NIC_BARRIER(nict, nich);
570
571 /* Reset remote DMA complete flag. */
572 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
573 NIC_BARRIER(nict, nich);
574
575 /* Set up DMA byte count. */
576 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen);
577 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8);
578
579 /* Set up destination address in NIC mem. */
580 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
581 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
582
583 /* Set remote DMA write. */
584 NIC_BARRIER(nict, nich);
585 bus_space_write_1(nict, nich,
586 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
587 NIC_BARRIER(nict, nich);
588
589 /*
590 * Transfer the mbuf chain to the NIC memory. NE2000 cards
591 * require that data be transferred as words, and only words,
592 * so that case requires some extra code to patch over odd-length
593 * mbufs.
594 */
595 if (nsc->sc_useword == 0) {
596 /* byte ops are easy. */
597 for (; m != 0; m = m->m_next) {
598 if (m->m_len) {
599 bus_space_write_multi_1(asict, asich,
600 NE2000_ASIC_DATA, mtod(m, u_int8_t *),
601 m->m_len);
602 }
603 }
604 if (padlen) {
605 for(; padlen > 0; padlen--)
606 bus_space_write_1(asict, asich,
607 NE2000_ASIC_DATA, 0);
608 }
609 } else {
610 /* word ops are a bit trickier. */
611 u_int8_t *data, savebyte[2];
612 int l, leftover;
613 #ifdef DIAGNOSTIC
614 u_int8_t *lim;
615 #endif
616 /* Start out with no leftover data. */
617 leftover = 0;
618 savebyte[0] = savebyte[1] = 0;
619
620 for (; m != 0; m = m->m_next) {
621 l = m->m_len;
622 if (l == 0)
623 continue;
624 data = mtod(m, u_int8_t *);
625 #ifdef DIAGNOSTIC
626 lim = data + l;
627 #endif
628 while (l > 0) {
629 if (leftover) {
630 /*
631 * Data left over (from mbuf or
632 * realignment). Buffer the next
633 * byte, and write it and the
634 * leftover data out.
635 */
636 savebyte[1] = *data++;
637 l--;
638 bus_space_write_stream_2(asict, asich,
639 NE2000_ASIC_DATA,
640 *(u_int16_t *)savebyte);
641 leftover = 0;
642 } else if (BUS_SPACE_ALIGNED_POINTER(data,
643 u_int16_t) == 0) {
644 /*
645 * Unaligned data; buffer the next
646 * byte.
647 */
648 savebyte[0] = *data++;
649 l--;
650 leftover = 1;
651 } else {
652 /*
653 * Aligned data; output contiguous
654 * words as much as we can, then
655 * buffer the remaining byte, if any.
656 */
657 leftover = l & 1;
658 l &= ~1;
659 bus_space_write_multi_stream_2(asict,
660 asich, NE2000_ASIC_DATA,
661 (u_int16_t *)data, l >> 1);
662 data += l;
663 if (leftover)
664 savebyte[0] = *data++;
665 l = 0;
666 }
667 }
668 if (l < 0)
669 panic("ne2000_write_mbuf: negative len");
670 #ifdef DIAGNOSTIC
671 if (data != lim)
672 panic("ne2000_write_mbuf: data != lim");
673 #endif
674 }
675 if (leftover) {
676 savebyte[1] = 0;
677 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
678 *(u_int16_t *)savebyte);
679 }
680 if (padlen) {
681 for(; padlen > 1; padlen -= 2)
682 bus_space_write_stream_2(asict, asich,
683 NE2000_ASIC_DATA, 0);
684 }
685 }
686 NIC_BARRIER(nict, nich);
687
688 /* AX88796 doesn't seem to have remote DMA complete */
689 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE)
690 return(savelen);
691
692 /*
693 * Wait for remote DMA to complete. This is necessary because on the
694 * transmit side, data is handled internally by the NIC in bursts, and
695 * we can't start another remote DMA until this one completes. Not
696 * waiting causes really bad things to happen - like the NIC wedging
697 * the bus.
698 */
699 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
700 ED_ISR_RDC) && --maxwait) {
701 (void)bus_space_read_1(nict, nich, ED_P0_CRDA1);
702 (void)bus_space_read_1(nict, nich, ED_P0_CRDA0);
703 NIC_BARRIER(nict, nich);
704 DELAY(1);
705 }
706
707 if (maxwait == 0) {
708 log(LOG_WARNING,
709 "%s: remote transmit DMA failed to complete\n",
710 device_xname(sc->sc_dev));
711 dp8390_reset(sc);
712 }
713
714 return (savelen);
715 }
716
717 /*
718 * Given a source and destination address, copy 'amout' of a packet from
719 * the ring buffer into a linear destination buffer. Takes into account
720 * ring-wrap.
721 */
722 int
723 ne2000_ring_copy(struct dp8390_softc *sc, int src, void *dstv, u_short amount)
724 {
725 char *dst = dstv;
726 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
727 bus_space_tag_t nict = sc->sc_regt;
728 bus_space_handle_t nich = sc->sc_regh;
729 bus_space_tag_t asict = nsc->sc_asict;
730 bus_space_handle_t asich = nsc->sc_asich;
731 u_short tmp_amount;
732 int useword = nsc->sc_useword;
733
734 /* Does copy wrap to lower addr in ring buffer? */
735 if (src + amount > sc->mem_end) {
736 tmp_amount = sc->mem_end - src;
737
738 /* Copy amount up to end of NIC memory. */
739 ne2000_readmem(nict, nich, asict, asich, src,
740 (u_int8_t *)dst, tmp_amount, useword);
741
742 amount -= tmp_amount;
743 src = sc->mem_ring;
744 dst += tmp_amount;
745 }
746
747 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
748 amount, useword);
749
750 return (src + amount);
751 }
752
753 void
754 ne2000_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr)
755 {
756 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
757
758 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
759 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
760 nsc->sc_useword);
761 #if BYTE_ORDER == BIG_ENDIAN
762 hdr->count = bswap16(hdr->count);
763 #endif
764 }
765
766 int
767 ne2000_test_mem(struct dp8390_softc *sc)
768 {
769
770 /* Noop. */
771 return (0);
772 }
773
774 /*
775 * Given a NIC memory source address and a host memory destination address,
776 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is
777 * rounded up to a word - ok as long as mbufs are word sized.
778 */
779 void
780 ne2000_readmem(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich, int src, u_int8_t *dst, size_t amount, int useword)
781 {
782
783 /* Select page 0 registers. */
784 NIC_BARRIER(nict, nich);
785 bus_space_write_1(nict, nich, ED_P0_CR,
786 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
787 NIC_BARRIER(nict, nich);
788
789 /* Round up to a word. */
790 amount = roundup2(amount, sizeof(uint16_t));
791
792 /* Set up DMA byte count. */
793 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount);
794 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8);
795
796 /* Set up source address in NIC mem. */
797 bus_space_write_1(nict, nich, ED_P0_RSAR0, src);
798 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8);
799
800 NIC_BARRIER(nict, nich);
801 bus_space_write_1(nict, nich, ED_P0_CR,
802 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
803
804 ASIC_BARRIER(asict, asich);
805 if (useword)
806 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
807 (u_int16_t *)dst, amount >> 1);
808 else
809 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
810 dst, amount);
811 }
812
813 /*
814 * Stripped down routine for writing a linear buffer to NIC memory. Only
815 * used in the probe routine to test the memory. 'len' must be even.
816 */
817 void
818 ne2000_writemem(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich, u_int8_t *src, int dst, size_t len, int useword, int quiet)
819 {
820 int maxwait = 100; /* about 120us */
821
822 /* Select page 0 registers. */
823 NIC_BARRIER(nict, nich);
824 bus_space_write_1(nict, nich, ED_P0_CR,
825 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
826 NIC_BARRIER(nict, nich);
827
828 /* Reset remote DMA complete flag. */
829 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
830 NIC_BARRIER(nict, nich);
831
832 /* Set up DMA byte count. */
833 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
834 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
835
836 /* Set up destination address in NIC mem. */
837 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst);
838 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8);
839
840 /* Set remote DMA write. */
841 NIC_BARRIER(nict, nich);
842 bus_space_write_1(nict, nich, ED_P0_CR,
843 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
844 NIC_BARRIER(nict, nich);
845
846 ASIC_BARRIER(asict, asich);
847 if (useword)
848 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
849 (u_int16_t *)src, len >> 1);
850 else
851 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA,
852 src, len);
853 ASIC_BARRIER(asict, asich);
854
855 /*
856 * Wait for remote DMA to complete. This is necessary because on the
857 * transmit side, data is handled internally by the NIC in bursts, and
858 * we can't start another remote DMA until this one completes. Not
859 * waiting causes really bad things to happen - like the NIC wedging
860 * the bus.
861 */
862 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
863 ED_ISR_RDC) && --maxwait)
864 DELAY(1);
865
866 if (!quiet && maxwait == 0)
867 printf("ne2000_writemem: failed to complete\n");
868 }
869
870 int
871 ne2000_detach(struct ne2000_softc *sc, int flags)
872 {
873
874 return (dp8390_detach(&sc->sc_dp8390, flags));
875 }
876
877 #ifdef IPKDB_NE
878 /*
879 * This code is essentially the same as ne2000_attach above.
880 */
881 int
882 ne2000_ipkdb_attach(struct ipkdb_if *kip)
883 {
884 struct ne2000_softc *np = kip->port;
885 struct dp8390_softc *dp = &np->sc_dp8390;
886 bus_space_tag_t nict = dp->sc_regt;
887 bus_space_handle_t nich = dp->sc_regh;
888 bus_space_tag_t asict = np->sc_asict;
889 bus_space_handle_t asich = np->sc_asich;
890 int i, useword;
891
892 #ifdef GWETHER
893 /* Not supported (yet?) */
894 return -1;
895 #endif
896
897 if (np->sc_type == NE2000_TYPE_UNKNOWN)
898 np->sc_type = ne2000_detect(nict, nich, asict, asich);
899 if (np->sc_type == NE2000_TYPE_UNKNOWN)
900 return -1;
901
902 switch (np->sc_type) {
903 case NE2000_TYPE_NE1000:
904 dp->mem_start = 8192;
905 dp->mem_size = 8192;
906 useword = 0;
907 kip->name = "ne1000";
908 break;
909 case NE2000_TYPE_NE2000:
910 case NE2000_TYPE_AX88190:
911 case NE2000_TYPE_AX88790:
912 #if NRTL80X9 > 0
913 case NE2000_TYPE_RTL8019:
914 #endif
915 dp->mem_start = 16384;
916 dp->mem_size = 16384;
917 useword = 1;
918 if (
919 #ifdef NE2000_DETECT_8BIT
920 ne2000_detect_8bit(nict, nich, asict, asich) ||
921 #endif
922 (np->sc_quirk & NE2000_QUIRK_8BIT) != 0) {
923 /* in 8 bit mode, only 8KB memory can be used */
924 dp->mem_size = 8192;
925 useword = 0;
926 }
927 kip->name =
928 (np->sc_type == NE2000_TYPE_AX88190 ||
929 np->sc_type == NE2000_TYPE_AX88790) ?
930 "ax88190" : "ne2000";
931 break;
932 case NE2000_TYPE_DL10019:
933 case NE2000_TYPE_DL10022:
934 dp->mem_start = 8192 * 3;
935 dp->mem_size = 8192 * 3;
936 useword = 1;
937 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ?
938 "dl10022" : "dl10019";
939 break;
940 default:
941 return -1;
942 break;
943 }
944
945 np->sc_useword = useword;
946 #if NRTL80X9 > 0
947 if (np->sc_type == NE2000_TYPE_RTL8019) {
948 dp->init_card = rtl80x9_init_card;
949 dp->sc_media_init = rtl80x9_media_init;
950 dp->sc_mediachange = rtl80x9_mediachange;
951 dp->sc_mediastatus = rtl80x9_mediastatus;
952 }
953 #endif
954
955 dp->cr_proto = ED_CR_RD2;
956 if (np->sc_type == NE2000_TYPE_AX88190 ||
957 np->sc_type == NE2000_TYPE_AX88790) {
958 dp->rcr_proto = ED_RCR_INTT;
959 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
960 } else
961 dp->rcr_proto = 0;
962 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
963
964 dp->test_mem = ne2000_test_mem;
965 dp->ring_copy = ne2000_ring_copy;
966 dp->write_mbuf = ne2000_write_mbuf;
967 dp->read_hdr = ne2000_read_hdr;
968
969 for (i = 0; i < 16; i++)
970 dp->sc_reg_map[i] = i;
971
972 if (dp8390_ipkdb_attach(kip))
973 return -1;
974
975 dp->mem_ring = dp->mem_start
976 + ((dp->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
977
978 if (!(kip->flags & IPKDB_MYHW)) {
979 char romdata[16];
980
981 /* Read the station address. */
982 if (np->sc_type == NE2000_TYPE_AX88190 ||
983 np->sc_type == NE2000_TYPE_AX88790) {
984 /* Select page 0 registers. */
985 NIC_BARRIER(nict, nich);
986 bus_space_write_1(nict, nich, ED_P0_CR,
987 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
988 NIC_BARRIER(nict, nich);
989 /* Select word transfer */
990 bus_space_write_1(nict, nich, ED_P0_DCR,
991 useword ? ED_DCR_WTS : 0);
992 ne2000_readmem(nict, nich, asict, asich,
993 AX88190_NODEID_OFFSET, kip->myenetaddr,
994 ETHER_ADDR_LEN, useword);
995 } else {
996 bool ne1000 = (np->sc_type == NE2000_TYPE_NE1000);
997
998 ne2000_readmem(nict, nich, asict, asich,
999 0, romdata, sizeof romdata, useword);
1000 for (i = 0; i < ETHER_ADDR_LEN; i++)
1001 kip->myenetaddr[i] =
1002 romdata[i * (ne1000 ? 1 : 2)];
1003 }
1004 kip->flags |= IPKDB_MYHW;
1005
1006 }
1007 dp8390_stop(dp);
1008
1009 return 0;
1010 }
1011 #endif
1012
1013 bool
1014 ne2000_suspend(device_t self, const pmf_qual_t *qual)
1015 {
1016 struct ne2000_softc *sc = device_private(self);
1017 struct dp8390_softc *dsc = &sc->sc_dp8390;
1018 int s;
1019
1020 s = splnet();
1021
1022 dp8390_stop(dsc);
1023 dp8390_disable(dsc);
1024
1025 splx(s);
1026 return true;
1027 }
1028
1029 bool
1030 ne2000_resume(device_t self, const pmf_qual_t *qual)
1031 {
1032 struct ne2000_softc *sc = device_private(self);
1033 struct dp8390_softc *dsc = &sc->sc_dp8390;
1034 struct ifnet *ifp = &dsc->sc_ec.ec_if;
1035 int s;
1036
1037 s = splnet();
1038
1039 if (ifp->if_flags & IFF_UP) {
1040 if (dp8390_enable(dsc) == 0)
1041 dp8390_init(dsc);
1042 }
1043
1044 splx(s);
1045 return true;
1046 }
1047