ne2000.c revision 1.60
1 /* $NetBSD: ne2000.c,v 1.60 2009/03/14 15:36:17 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 35 * adapters. 36 * 37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 38 * 39 * Copyright (C) 1993, David Greenman. This software may be used, modified, 40 * copied, distributed, and sold, in both source and binary form provided that 41 * the above copyright and these terms are retained. Under no circumstances is 42 * the author responsible for the proper functioning of this software, nor does 43 * the author assume any responsibility for damages incurred with its use. 44 */ 45 46 /* 47 * Common code shared by all NE2000-compatible Ethernet interfaces. 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.60 2009/03/14 15:36:17 dsl Exp $"); 52 53 #include "opt_ipkdb.h" 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/device.h> 58 #include <sys/socket.h> 59 #include <sys/mbuf.h> 60 #include <sys/syslog.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_types.h> 65 #include <net/if_media.h> 66 67 #include <net/if_ether.h> 68 69 #include <sys/bswap.h> 70 #include <sys/bus.h> 71 72 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 73 #define bus_space_write_stream_2 bus_space_write_2 74 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 75 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 76 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 77 78 #ifdef IPKDB_NE 79 #include <ipkdb/ipkdb.h> 80 #endif 81 82 #include <dev/ic/dp8390reg.h> 83 #include <dev/ic/dp8390var.h> 84 85 #include <dev/ic/ne2000reg.h> 86 #include <dev/ic/ne2000var.h> 87 88 #include <dev/ic/ax88190reg.h> 89 90 int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int); 91 int ne2000_ring_copy(struct dp8390_softc *, int, void *, u_short); 92 void ne2000_read_hdr(struct dp8390_softc *, int, struct dp8390_ring *); 93 int ne2000_test_mem(struct dp8390_softc *); 94 95 void ne2000_writemem(bus_space_tag_t, bus_space_handle_t, 96 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t, 97 int, int); 98 void ne2000_readmem(bus_space_tag_t, bus_space_handle_t, 99 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int); 100 101 #define ASIC_BARRIER(asict, asich) \ 102 bus_space_barrier((asict), (asich), 0, 0x10, \ 103 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 104 105 int 106 ne2000_attach(struct ne2000_softc *nsc, u_int8_t *myea) 107 { 108 struct dp8390_softc *dsc = &nsc->sc_dp8390; 109 bus_space_tag_t nict = dsc->sc_regt; 110 bus_space_handle_t nich = dsc->sc_regh; 111 bus_space_tag_t asict = nsc->sc_asict; 112 bus_space_handle_t asich = nsc->sc_asich; 113 u_int8_t romdata[16]; 114 int memsize, i, useword; 115 116 /* 117 * Detect it again unless caller specified it; this gives us 118 * the memory size. 119 */ 120 if (nsc->sc_type == NE2000_TYPE_UNKNOWN) 121 nsc->sc_type = ne2000_detect(nict, nich, asict, asich); 122 123 /* 124 * 8k of memory for NE1000, 16k for NE2000 and 24k for the 125 * card uses DL10019. 126 */ 127 switch (nsc->sc_type) { 128 case NE2000_TYPE_UNKNOWN: 129 default: 130 aprint_error_dev(dsc->sc_dev, "where did the card go?\n"); 131 return (1); 132 case NE2000_TYPE_NE1000: 133 memsize = 8192; 134 useword = 0; 135 break; 136 case NE2000_TYPE_NE2000: 137 case NE2000_TYPE_AX88190: /* XXX really? */ 138 case NE2000_TYPE_AX88790: 139 memsize = 8192 * 2; 140 useword = 1; 141 break; 142 case NE2000_TYPE_DL10019: 143 case NE2000_TYPE_DL10022: 144 memsize = 8192 * 3; 145 useword = 1; 146 break; 147 } 148 149 nsc->sc_useword = useword; 150 151 dsc->cr_proto = ED_CR_RD2; 152 if (nsc->sc_type == NE2000_TYPE_AX88190 || 153 nsc->sc_type == NE2000_TYPE_AX88790) { 154 dsc->rcr_proto = ED_RCR_INTT; 155 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 156 } else 157 dsc->rcr_proto = 0; 158 159 /* 160 * DCR gets: 161 * 162 * FIFO threshold to 8, No auto-init Remote DMA, 163 * byte order=80x86. 164 * 165 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 166 */ 167 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 168 169 dsc->test_mem = ne2000_test_mem; 170 dsc->ring_copy = ne2000_ring_copy; 171 dsc->write_mbuf = ne2000_write_mbuf; 172 dsc->read_hdr = ne2000_read_hdr; 173 174 /* Registers are linear. */ 175 for (i = 0; i < 16; i++) 176 dsc->sc_reg_map[i] = i; 177 178 /* 179 * NIC memory doens't start at zero on an NE board. 180 * The start address is tied to the bus width. 181 * (It happens to be computed the same way as mem size.) 182 */ 183 dsc->mem_start = memsize; 184 185 #ifdef GWETHER 186 { 187 int x, mstart = 0; 188 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 189 tbuf[ED_PAGE_SIZE]; 190 191 for (i = 0; i < ED_PAGE_SIZE; i++) 192 pbuf0[i] = 0; 193 194 /* Search for the start of RAM. */ 195 for (x = 1; x < 256; x++) { 196 ne2000_writemem(nict, nich, asict, asich, pbuf0, 197 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 198 ne2000_readmem(nict, nich, asict, asich, 199 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 200 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 201 for (i = 0; i < ED_PAGE_SIZE; i++) 202 pbuf[i] = 255 - x; 203 ne2000_writemem(nict, nich, asict, asich, 204 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 205 useword, 0); 206 ne2000_readmem(nict, nich, asict, asich, 207 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 208 useword); 209 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 210 mstart = x << ED_PAGE_SHIFT; 211 memsize = ED_PAGE_SIZE; 212 break; 213 } 214 } 215 } 216 217 if (mstart == 0) { 218 aprint_error_dev(&dsc->sc_dev, "cannot find start of RAM\n"); 219 return (1); 220 } 221 222 /* Search for the end of RAM. */ 223 for (++x; x < 256; x++) { 224 ne2000_writemem(nict, nich, asict, asich, pbuf0, 225 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 226 ne2000_readmem(nict, nich, asict, asich, 227 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 228 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 229 for (i = 0; i < ED_PAGE_SIZE; i++) 230 pbuf[i] = 255 - x; 231 ne2000_writemem(nict, nich, asict, asich, 232 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 233 useword, 0); 234 ne2000_readmem(nict, nich, asict, asich, 235 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 236 useword); 237 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 238 memsize += ED_PAGE_SIZE; 239 else 240 break; 241 } else 242 break; 243 } 244 245 printf("%s: RAM start 0x%x, size %d\n", 246 device_xname(&dsc->sc_dev), mstart, memsize); 247 248 dsc->mem_start = mstart; 249 } 250 #endif /* GWETHER */ 251 252 dsc->mem_size = memsize; 253 254 if (myea == NULL) { 255 /* Read the station address. */ 256 if (nsc->sc_type == NE2000_TYPE_AX88190 || 257 nsc->sc_type == NE2000_TYPE_AX88790) { 258 /* Select page 0 registers. */ 259 NIC_BARRIER(nict, nich); 260 bus_space_write_1(nict, nich, ED_P0_CR, 261 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 262 NIC_BARRIER(nict, nich); 263 /* Select word transfer. */ 264 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 265 NIC_BARRIER(nict, nich); 266 ne2000_readmem(nict, nich, asict, asich, 267 AX88190_NODEID_OFFSET, dsc->sc_enaddr, 268 ETHER_ADDR_LEN, useword); 269 } else { 270 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 271 sizeof(romdata), useword); 272 for (i = 0; i < ETHER_ADDR_LEN; i++) 273 dsc->sc_enaddr[i] = 274 romdata[i * (useword ? 2 : 1)]; 275 } 276 } else 277 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr)); 278 279 /* Clear any pending interrupts that might have occurred above. */ 280 NIC_BARRIER(nict, nich); 281 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 282 NIC_BARRIER(nict, nich); 283 284 if (dsc->sc_media_init == NULL) 285 dsc->sc_media_init = dp8390_media_init; 286 287 if (dp8390_config(dsc)) { 288 aprint_error_dev(dsc->sc_dev, "setup failed\n"); 289 return (1); 290 } 291 292 /* 293 * We need to compute mem_ring a bit differently; override the 294 * value set up in dp8390_config(). 295 */ 296 dsc->mem_ring = 297 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 298 299 return (0); 300 } 301 302 /* 303 * Detect an NE-2000 or compatible. Returns a model code. 304 */ 305 int 306 ne2000_detect(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich) 307 { 308 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern"; 309 u_int8_t test_buffer[32], tmp; 310 int i, rv = NE2000_TYPE_UNKNOWN; 311 312 /* Reset the board. */ 313 #ifdef GWETHER 314 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 315 ASIC_BARRIER(asict, asich); 316 delay(200); 317 #endif /* GWETHER */ 318 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 319 ASIC_BARRIER(asict, asich); 320 delay(10000); 321 322 /* 323 * I don't know if this is necessary; probably cruft leftover from 324 * Clarkson packet driver code. Doesn't do a thing on the boards I've 325 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 326 * non-invasive...but some boards don't seem to reset and I don't have 327 * complete documentation on what the 'right' thing to do is...so we do 328 * the invasive thing for now. Yuck.] 329 */ 330 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 331 ASIC_BARRIER(asict, asich); 332 delay(5000); 333 334 /* 335 * This is needed because some NE clones apparently don't reset the 336 * NIC properly (or the NIC chip doesn't reset fully on power-up). 337 * XXX - this makes the probe invasive! Done against my better 338 * judgement. -DLG 339 */ 340 bus_space_write_1(nict, nich, ED_P0_CR, 341 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 342 NIC_BARRIER(nict, nich); 343 344 delay(5000); 345 346 /* 347 * Generic probe routine for testing for the existence of a DS8390. 348 * Must be performed after the NIC has just been reset. This 349 * works by looking at certain register values that are guaranteed 350 * to be initialized a certain way after power-up or reset. 351 * 352 * Specifically: 353 * 354 * Register reset bits set bits 355 * -------- ---------- -------- 356 * CR TXP, STA RD2, STP 357 * ISR RST 358 * IMR <all> 359 * DCR LAS 360 * TCR LB1, LB0 361 * 362 * We only look at CR and ISR, however, since looking at the others 363 * would require changing register pages, which would be intrusive 364 * if this isn't an 8390. 365 */ 366 367 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 368 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 369 (ED_CR_RD2 | ED_CR_STP)) 370 goto out; 371 372 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 373 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 374 goto out; 375 376 bus_space_write_1(nict, nich, 377 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 378 NIC_BARRIER(nict, nich); 379 380 for (i = 0; i < 100; i++) { 381 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 382 ED_ISR_RST) { 383 /* Ack the reset bit. */ 384 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 385 NIC_BARRIER(nict, nich); 386 break; 387 } 388 delay(100); 389 } 390 391 #if 0 392 /* XXX */ 393 if (i == 100) 394 goto out; 395 #endif 396 397 /* 398 * Test the ability to read and write to the NIC memory. This has 399 * the side effect of determining if this is an NE1000 or an NE2000. 400 */ 401 402 /* 403 * This prevents packets from being stored in the NIC memory when 404 * the readmem routine turns on the start bit in the CR. 405 */ 406 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 407 NIC_BARRIER(nict, nich); 408 409 /* Temporarily initialize DCR for byte operations. */ 410 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 411 412 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 413 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 414 415 /* 416 * Write a test pattern in byte mode. If this fails, then there 417 * probably isn't any memory at 8k - which likely means that the 418 * board is an NE2000. 419 */ 420 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 421 sizeof(test_pattern), 0, 1); 422 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 423 sizeof(test_buffer), 0); 424 425 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 426 /* not an NE1000 - try NE2000 */ 427 bus_space_write_1(nict, nich, ED_P0_DCR, 428 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 429 bus_space_write_1(nict, nich, ED_P0_PSTART, 430 16384 >> ED_PAGE_SHIFT); 431 bus_space_write_1(nict, nich, ED_P0_PSTOP, 432 32768 >> ED_PAGE_SHIFT); 433 434 /* 435 * Write the test pattern in word mode. If this also fails, 436 * then we don't know what this board is. 437 */ 438 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 439 sizeof(test_pattern), 1, 0); 440 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 441 sizeof(test_buffer), 1); 442 443 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) 444 goto out; /* not an NE2000 either */ 445 446 rv = NE2000_TYPE_NE2000; 447 } else { 448 /* We're an NE1000. */ 449 rv = NE2000_TYPE_NE1000; 450 } 451 452 /* Clear any pending interrupts that might have occurred above. */ 453 NIC_BARRIER(nict, nich); 454 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 455 456 out: 457 return (rv); 458 } 459 460 /* 461 * Write an mbuf chain to the destination NIC memory address using programmed 462 * I/O. 463 */ 464 int 465 ne2000_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf) 466 { 467 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 468 bus_space_tag_t nict = sc->sc_regt; 469 bus_space_handle_t nich = sc->sc_regh; 470 bus_space_tag_t asict = nsc->sc_asict; 471 bus_space_handle_t asich = nsc->sc_asich; 472 int savelen, padlen; 473 int maxwait = 100; /* about 120us */ 474 475 savelen = m->m_pkthdr.len; 476 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) { 477 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen; 478 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN; 479 } else 480 padlen = 0; 481 482 483 /* Select page 0 registers. */ 484 NIC_BARRIER(nict, nich); 485 bus_space_write_1(nict, nich, ED_P0_CR, 486 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 487 NIC_BARRIER(nict, nich); 488 489 /* Reset remote DMA complete flag. */ 490 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 491 NIC_BARRIER(nict, nich); 492 493 /* Set up DMA byte count. */ 494 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 495 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 496 497 /* Set up destination address in NIC mem. */ 498 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 499 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 500 501 /* Set remote DMA write. */ 502 NIC_BARRIER(nict, nich); 503 bus_space_write_1(nict, nich, 504 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 505 NIC_BARRIER(nict, nich); 506 507 /* 508 * Transfer the mbuf chain to the NIC memory. NE2000 cards 509 * require that data be transferred as words, and only words, 510 * so that case requires some extra code to patch over odd-length 511 * mbufs. 512 */ 513 if (nsc->sc_type == NE2000_TYPE_NE1000) { 514 /* NE1000s are easy. */ 515 for (; m != 0; m = m->m_next) { 516 if (m->m_len) { 517 bus_space_write_multi_1(asict, asich, 518 NE2000_ASIC_DATA, mtod(m, u_int8_t *), 519 m->m_len); 520 } 521 } 522 if (padlen) { 523 for(; padlen > 0; padlen--) 524 bus_space_write_1(asict, asich, 525 NE2000_ASIC_DATA, 0); 526 } 527 } else { 528 /* NE2000s are a bit trickier. */ 529 u_int8_t *data, savebyte[2]; 530 int l, leftover; 531 #ifdef DIAGNOSTIC 532 u_int8_t *lim; 533 #endif 534 /* Start out with no leftover data. */ 535 leftover = 0; 536 savebyte[0] = savebyte[1] = 0; 537 538 for (; m != 0; m = m->m_next) { 539 l = m->m_len; 540 if (l == 0) 541 continue; 542 data = mtod(m, u_int8_t *); 543 #ifdef DIAGNOSTIC 544 lim = data + l; 545 #endif 546 while (l > 0) { 547 if (leftover) { 548 /* 549 * Data left over (from mbuf or 550 * realignment). Buffer the next 551 * byte, and write it and the 552 * leftover data out. 553 */ 554 savebyte[1] = *data++; 555 l--; 556 bus_space_write_stream_2(asict, asich, 557 NE2000_ASIC_DATA, 558 *(u_int16_t *)savebyte); 559 leftover = 0; 560 } else if (BUS_SPACE_ALIGNED_POINTER(data, 561 u_int16_t) == 0) { 562 /* 563 * Unaligned data; buffer the next 564 * byte. 565 */ 566 savebyte[0] = *data++; 567 l--; 568 leftover = 1; 569 } else { 570 /* 571 * Aligned data; output contiguous 572 * words as much as we can, then 573 * buffer the remaining byte, if any. 574 */ 575 leftover = l & 1; 576 l &= ~1; 577 bus_space_write_multi_stream_2(asict, 578 asich, NE2000_ASIC_DATA, 579 (u_int16_t *)data, l >> 1); 580 data += l; 581 if (leftover) 582 savebyte[0] = *data++; 583 l = 0; 584 } 585 } 586 if (l < 0) 587 panic("ne2000_write_mbuf: negative len"); 588 #ifdef DIAGNOSTIC 589 if (data != lim) 590 panic("ne2000_write_mbuf: data != lim"); 591 #endif 592 } 593 if (leftover) { 594 savebyte[1] = 0; 595 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 596 *(u_int16_t *)savebyte); 597 } 598 if (padlen) { 599 for(; padlen > 1; padlen -= 2) 600 bus_space_write_stream_2(asict, asich, 601 NE2000_ASIC_DATA, 0); 602 } 603 } 604 NIC_BARRIER(nict, nich); 605 606 /* AX88796 doesn't seem to have remote DMA complete */ 607 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE) 608 return(savelen); 609 610 /* 611 * Wait for remote DMA to complete. This is necessary because on the 612 * transmit side, data is handled internally by the NIC in bursts, and 613 * we can't start another remote DMA until this one completes. Not 614 * waiting causes really bad things to happen - like the NIC wedging 615 * the bus. 616 */ 617 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 618 ED_ISR_RDC) && --maxwait) { 619 (void)bus_space_read_1(nict, nich, ED_P0_CRDA1); 620 (void)bus_space_read_1(nict, nich, ED_P0_CRDA0); 621 NIC_BARRIER(nict, nich); 622 DELAY(1); 623 } 624 625 if (maxwait == 0) { 626 log(LOG_WARNING, 627 "%s: remote transmit DMA failed to complete\n", 628 device_xname(sc->sc_dev)); 629 dp8390_reset(sc); 630 } 631 632 return (savelen); 633 } 634 635 /* 636 * Given a source and destination address, copy 'amout' of a packet from 637 * the ring buffer into a linear destination buffer. Takes into account 638 * ring-wrap. 639 */ 640 int 641 ne2000_ring_copy(struct dp8390_softc *sc, int src, void *dstv, u_short amount) 642 { 643 char *dst = dstv; 644 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 645 bus_space_tag_t nict = sc->sc_regt; 646 bus_space_handle_t nich = sc->sc_regh; 647 bus_space_tag_t asict = nsc->sc_asict; 648 bus_space_handle_t asich = nsc->sc_asich; 649 u_short tmp_amount; 650 int useword = nsc->sc_useword; 651 652 /* Does copy wrap to lower addr in ring buffer? */ 653 if (src + amount > sc->mem_end) { 654 tmp_amount = sc->mem_end - src; 655 656 /* Copy amount up to end of NIC memory. */ 657 ne2000_readmem(nict, nich, asict, asich, src, 658 (u_int8_t *)dst, tmp_amount, useword); 659 660 amount -= tmp_amount; 661 src = sc->mem_ring; 662 dst += tmp_amount; 663 } 664 665 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 666 amount, useword); 667 668 return (src + amount); 669 } 670 671 void 672 ne2000_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr) 673 { 674 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 675 676 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 677 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 678 nsc->sc_useword); 679 #if BYTE_ORDER == BIG_ENDIAN 680 hdr->count = bswap16(hdr->count); 681 #endif 682 } 683 684 int 685 ne2000_test_mem(struct dp8390_softc *sc) 686 { 687 688 /* Noop. */ 689 return (0); 690 } 691 692 /* 693 * Given a NIC memory source address and a host memory destination address, 694 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 695 * rounded up to a word - ok as long as mbufs are word sized. 696 */ 697 void 698 ne2000_readmem(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich, int src, u_int8_t *dst, size_t amount, int useword) 699 { 700 701 /* Select page 0 registers. */ 702 NIC_BARRIER(nict, nich); 703 bus_space_write_1(nict, nich, ED_P0_CR, 704 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 705 NIC_BARRIER(nict, nich); 706 707 /* Round up to a word. */ 708 if (amount & 1) 709 ++amount; 710 711 /* Set up DMA byte count. */ 712 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 713 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 714 715 /* Set up source address in NIC mem. */ 716 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 717 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 718 719 NIC_BARRIER(nict, nich); 720 bus_space_write_1(nict, nich, ED_P0_CR, 721 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 722 723 ASIC_BARRIER(asict, asich); 724 if (useword) 725 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 726 (u_int16_t *)dst, amount >> 1); 727 else 728 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 729 dst, amount); 730 } 731 732 /* 733 * Stripped down routine for writing a linear buffer to NIC memory. Only 734 * used in the probe routine to test the memory. 'len' must be even. 735 */ 736 void 737 ne2000_writemem(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich, u_int8_t *src, int dst, size_t len, int useword, int quiet) 738 { 739 int maxwait = 100; /* about 120us */ 740 741 /* Select page 0 registers. */ 742 NIC_BARRIER(nict, nich); 743 bus_space_write_1(nict, nich, ED_P0_CR, 744 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 745 NIC_BARRIER(nict, nich); 746 747 /* Reset remote DMA complete flag. */ 748 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 749 NIC_BARRIER(nict, nich); 750 751 /* Set up DMA byte count. */ 752 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 753 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 754 755 /* Set up destination address in NIC mem. */ 756 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 757 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 758 759 /* Set remote DMA write. */ 760 NIC_BARRIER(nict, nich); 761 bus_space_write_1(nict, nich, ED_P0_CR, 762 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 763 NIC_BARRIER(nict, nich); 764 765 ASIC_BARRIER(asict, asich); 766 if (useword) 767 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 768 (u_int16_t *)src, len >> 1); 769 else 770 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 771 src, len); 772 ASIC_BARRIER(asict, asich); 773 774 /* 775 * Wait for remote DMA to complete. This is necessary because on the 776 * transmit side, data is handled internally by the NIC in bursts, and 777 * we can't start another remote DMA until this one completes. Not 778 * waiting causes really bad things to happen - like the NIC wedging 779 * the bus. 780 */ 781 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 782 ED_ISR_RDC) && --maxwait) 783 DELAY(1); 784 785 if (!quiet && maxwait == 0) 786 printf("ne2000_writemem: failed to complete\n"); 787 } 788 789 int 790 ne2000_detach(struct ne2000_softc *sc, int flags) 791 { 792 793 return (dp8390_detach(&sc->sc_dp8390, flags)); 794 } 795 796 #ifdef IPKDB_NE 797 /* 798 * This code is essentially the same as ne2000_attach above. 799 */ 800 int 801 ne2000_ipkdb_attach(struct ipkdb_if *kip) 802 { 803 struct ne2000_softc *np = kip->port; 804 struct dp8390_softc *dp = &np->sc_dp8390; 805 bus_space_tag_t nict = dp->sc_regt; 806 bus_space_handle_t nich = dp->sc_regh; 807 int i, useword; 808 809 #ifdef GWETHER 810 /* Not supported (yet?) */ 811 return -1; 812 #endif 813 814 if (np->sc_type == 0) 815 np->sc_type = ne2000_detect(nict, nich, 816 np->sc_asict, np->sc_asich); 817 if (np->sc_type == 0) 818 return -1; 819 820 useword = np->sc_useword; 821 822 dp->cr_proto = ED_CR_RD2; 823 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 824 dp->rcr_proto = 0; 825 826 dp->test_mem = ne2000_test_mem; 827 dp->ring_copy = ne2000_ring_copy; 828 dp->write_mbuf = ne2000_write_mbuf; 829 dp->read_hdr = ne2000_read_hdr; 830 831 for (i = 0; i < 16; i++) 832 dp->sc_reg_map[i] = i; 833 834 switch (np->sc_type) { 835 case NE2000_TYPE_NE1000: 836 dp->mem_start = dp->mem_size = 8192; 837 kip->name = "ne1000"; 838 break; 839 case NE2000_TYPE_NE2000: 840 dp->mem_start = dp->mem_size = 8192 * 2; 841 kip->name = "ne2000"; 842 break; 843 case NE2000_TYPE_DL10019: 844 case NE2000_TYPE_DL10022: 845 dp->mem_start = dp->mem_size = 8192 * 3; 846 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ? 847 "dl10022" : "dl10019"; 848 break; 849 case NE2000_TYPE_AX88190: 850 case NE2000_TYPE_AX88790: 851 dp->rcr_proto = ED_RCR_INTT; 852 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 853 dp->mem_start = dp->mem_size = 8192 * 2; 854 kip->name = "ax88190"; 855 break; 856 default: 857 return -1; 858 break; 859 } 860 861 if (dp8390_ipkdb_attach(kip)) 862 return -1; 863 864 dp->mem_ring = dp->mem_start 865 + ((dp->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 866 867 if (!(kip->flags & IPKDB_MYHW)) { 868 char romdata[16]; 869 870 /* Read the station address. */ 871 if (np->sc_type == NE2000_TYPE_AX88190 || 872 np->sc_type == NE2000_TYPE_AX88790) { 873 /* Select page 0 registers. */ 874 NIC_BARRIER(nict, nich); 875 bus_space_write_1(nict, nich, ED_P0_CR, 876 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 877 NIC_BARRIER(nict, nich); 878 /* Select word transfer */ 879 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 880 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 881 AX88190_NODEID_OFFSET, kip->myenetaddr, 882 ETHER_ADDR_LEN, useword); 883 } else { 884 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 885 0, romdata, sizeof romdata, useword); 886 for (i = 0; i < ETHER_ADDR_LEN; i++) 887 kip->myenetaddr[i] = romdata[i << useword]; 888 } 889 kip->flags |= IPKDB_MYHW; 890 891 } 892 dp8390_stop(dp); 893 894 return 0; 895 } 896 #endif 897 898 void 899 ne2000_power(int why, void *arg) 900 { 901 struct ne2000_softc *sc = arg; 902 struct dp8390_softc *dsc = &sc->sc_dp8390; 903 struct ifnet *ifp = &dsc->sc_ec.ec_if; 904 int s; 905 906 s = splnet(); 907 switch (why) { 908 case PWR_SUSPEND: 909 case PWR_STANDBY: 910 dp8390_stop(dsc); 911 dp8390_disable(dsc); 912 break; 913 case PWR_RESUME: 914 if (ifp->if_flags & IFF_UP) { 915 if (dp8390_enable(dsc) == 0) 916 dp8390_init(dsc); 917 } 918 break; 919 case PWR_SOFTSUSPEND: 920 case PWR_SOFTSTANDBY: 921 case PWR_SOFTRESUME: 922 break; 923 } 924 splx(s); 925 } 926
Indexes created Tue Sep 23 22:09:46 GMT 2025