ne2000.c revision 1.73
1 /* $NetBSD: ne2000.c,v 1.73 2012/10/27 17:18:22 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 35 * adapters. 36 * 37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 38 * 39 * Copyright (C) 1993, David Greenman. This software may be used, modified, 40 * copied, distributed, and sold, in both source and binary form provided that 41 * the above copyright and these terms are retained. Under no circumstances is 42 * the author responsible for the proper functioning of this software, nor does 43 * the author assume any responsibility for damages incurred with its use. 44 */ 45 46 /* 47 * Common code shared by all NE2000-compatible Ethernet interfaces. 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.73 2012/10/27 17:18:22 chs Exp $"); 52 53 #include "opt_ipkdb.h" 54 55 #include "rtl80x9.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/device.h> 60 #include <sys/socket.h> 61 #include <sys/mbuf.h> 62 #include <sys/syslog.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_types.h> 67 #include <net/if_media.h> 68 69 #include <net/if_ether.h> 70 71 #include <sys/bswap.h> 72 #include <sys/bus.h> 73 74 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 75 #define bus_space_write_stream_2 bus_space_write_2 76 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 77 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 78 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 79 80 #ifdef IPKDB_NE 81 #include <ipkdb/ipkdb.h> 82 #endif 83 84 #include <dev/ic/dp8390reg.h> 85 #include <dev/ic/dp8390var.h> 86 87 #include <dev/ic/ne2000reg.h> 88 #include <dev/ic/ne2000var.h> 89 90 #include <dev/ic/rtl80x9reg.h> 91 #include <dev/ic/rtl80x9var.h> 92 93 #include <dev/ic/ax88190reg.h> 94 95 static int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int); 96 static int ne2000_ring_copy(struct dp8390_softc *, int, void *, u_short); 97 static void ne2000_read_hdr(struct dp8390_softc *, int, 98 struct dp8390_ring *); 99 static int ne2000_test_mem(struct dp8390_softc *); 100 101 static void ne2000_writemem(bus_space_tag_t, bus_space_handle_t, 102 bus_space_tag_t, bus_space_handle_t, const uint8_t *, int, 103 size_t, int, int); 104 static void ne2000_readmem(bus_space_tag_t, bus_space_handle_t, 105 bus_space_tag_t, bus_space_handle_t, int, uint8_t *, 106 size_t, int); 107 108 #ifdef NE2000_DETECT_8BIT 109 static bool ne2000_detect_8bit(bus_space_tag_t, bus_space_handle_t, 110 bus_space_tag_t, bus_space_handle_t); 111 #endif 112 113 #define ASIC_BARRIER(asict, asich) \ 114 bus_space_barrier((asict), (asich), 0, 0x10, \ 115 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 116 117 int 118 ne2000_attach(struct ne2000_softc *nsc, uint8_t *myea) 119 { 120 struct dp8390_softc *dsc = &nsc->sc_dp8390; 121 bus_space_tag_t nict = dsc->sc_regt; 122 bus_space_handle_t nich = dsc->sc_regh; 123 bus_space_tag_t asict = nsc->sc_asict; 124 bus_space_handle_t asich = nsc->sc_asich; 125 uint8_t romdata[16]; 126 int memstart, memsize, i, useword; 127 128 /* 129 * Detect it again unless caller specified it; this gives us 130 * the memory size. 131 */ 132 if (nsc->sc_type == NE2000_TYPE_UNKNOWN) 133 nsc->sc_type = ne2000_detect(nict, nich, asict, asich); 134 135 /* 136 * 8k of memory for NE1000, 16k for NE2000 and 24k for the 137 * card uses DL10019. 138 */ 139 switch (nsc->sc_type) { 140 case NE2000_TYPE_UNKNOWN: 141 default: 142 aprint_error_dev(dsc->sc_dev, "where did the card go?\n"); 143 return 1; 144 case NE2000_TYPE_NE1000: 145 memstart = 8192; 146 memsize = 8192; 147 useword = 0; 148 break; 149 case NE2000_TYPE_NE2000: 150 case NE2000_TYPE_AX88190: /* XXX really? */ 151 case NE2000_TYPE_AX88790: 152 #if NRTL80X9 > 0 153 case NE2000_TYPE_RTL8019: 154 #endif 155 memstart = 16384; 156 memsize = 16384; 157 useword = 1; 158 if ( 159 #ifdef NE2000_DETECT_8BIT 160 ne2000_detect_8bit(nict, nich, asict, asich) || 161 #endif 162 (nsc->sc_quirk & NE2000_QUIRK_8BIT) != 0) { 163 /* in 8 bit mode, only 8KB memory can be used */ 164 memsize = 8192; 165 useword = 0; 166 } 167 break; 168 case NE2000_TYPE_DL10019: 169 case NE2000_TYPE_DL10022: 170 memstart = 8192 * 3; 171 memsize = 8192 * 3; 172 useword = 1; 173 break; 174 } 175 176 nsc->sc_useword = useword; 177 #if NRTL80X9 > 0 178 if (nsc->sc_type == NE2000_TYPE_RTL8019) { 179 dsc->init_card = rtl80x9_init_card; 180 dsc->sc_media_init = rtl80x9_media_init; 181 dsc->sc_mediachange = rtl80x9_mediachange; 182 dsc->sc_mediastatus = rtl80x9_mediastatus; 183 } 184 #endif 185 186 dsc->cr_proto = ED_CR_RD2; 187 if (nsc->sc_type == NE2000_TYPE_AX88190 || 188 nsc->sc_type == NE2000_TYPE_AX88790) { 189 dsc->rcr_proto = ED_RCR_INTT; 190 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 191 } else 192 dsc->rcr_proto = 0; 193 194 /* 195 * DCR gets: 196 * 197 * FIFO threshold to 8, No auto-init Remote DMA, 198 * byte order=80x86. 199 * 200 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 201 */ 202 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 203 204 dsc->test_mem = ne2000_test_mem; 205 dsc->ring_copy = ne2000_ring_copy; 206 dsc->write_mbuf = ne2000_write_mbuf; 207 dsc->read_hdr = ne2000_read_hdr; 208 209 /* Registers are linear. */ 210 for (i = 0; i < 16; i++) 211 dsc->sc_reg_map[i] = i; 212 213 /* 214 * NIC memory doens't start at zero on an NE board. 215 * The start address is tied to the bus width. 216 */ 217 #ifdef GWETHER 218 { 219 int x; 220 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 221 tbuf[ED_PAGE_SIZE]; 222 223 memstart = 0; 224 for (i = 0; i < ED_PAGE_SIZE; i++) 225 pbuf0[i] = 0; 226 227 /* Search for the start of RAM. */ 228 for (x = 1; x < 256; x++) { 229 ne2000_writemem(nict, nich, asict, asich, pbuf0, 230 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 231 ne2000_readmem(nict, nich, asict, asich, 232 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 233 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 234 for (i = 0; i < ED_PAGE_SIZE; i++) 235 pbuf[i] = 255 - x; 236 ne2000_writemem(nict, nich, asict, asich, 237 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 238 useword, 0); 239 ne2000_readmem(nict, nich, asict, asich, 240 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 241 useword); 242 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 243 memstart = x << ED_PAGE_SHIFT; 244 memsize = ED_PAGE_SIZE; 245 break; 246 } 247 } 248 } 249 250 if (memstart == 0) { 251 aprint_error_dev(dsc->sc_dev, 252 "cannot find start of RAM\n"); 253 return 1; 254 } 255 256 /* Search for the end of RAM. */ 257 for (++x; x < 256; x++) { 258 ne2000_writemem(nict, nich, asict, asich, pbuf0, 259 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 260 ne2000_readmem(nict, nich, asict, asich, 261 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 262 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 263 for (i = 0; i < ED_PAGE_SIZE; i++) 264 pbuf[i] = 255 - x; 265 ne2000_writemem(nict, nich, asict, asich, 266 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 267 useword, 0); 268 ne2000_readmem(nict, nich, asict, asich, 269 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 270 useword); 271 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 272 memsize += ED_PAGE_SIZE; 273 else 274 break; 275 } else 276 break; 277 } 278 279 printf("%s: RAM start 0x%x, size %d\n", 280 device_xname(dsc->sc_dev), memstart, memsize); 281 } 282 #endif /* GWETHER */ 283 dsc->mem_start = memstart; 284 285 dsc->mem_size = memsize; 286 287 if (myea == NULL) { 288 /* Read the station address. */ 289 if (nsc->sc_type == NE2000_TYPE_AX88190 || 290 nsc->sc_type == NE2000_TYPE_AX88790) { 291 /* Select page 0 registers. */ 292 NIC_BARRIER(nict, nich); 293 bus_space_write_1(nict, nich, ED_P0_CR, 294 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 295 NIC_BARRIER(nict, nich); 296 /* Select word transfer. */ 297 bus_space_write_1(nict, nich, ED_P0_DCR, 298 useword ? ED_DCR_WTS : 0); 299 NIC_BARRIER(nict, nich); 300 ne2000_readmem(nict, nich, asict, asich, 301 AX88190_NODEID_OFFSET, dsc->sc_enaddr, 302 ETHER_ADDR_LEN, useword); 303 } else { 304 bool ne1000 = (nsc->sc_type == NE2000_TYPE_NE1000); 305 306 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 307 sizeof(romdata), useword); 308 for (i = 0; i < ETHER_ADDR_LEN; i++) 309 dsc->sc_enaddr[i] = 310 romdata[i * (ne1000 ? 1 : 2)]; 311 } 312 } else 313 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr)); 314 315 /* Clear any pending interrupts that might have occurred above. */ 316 NIC_BARRIER(nict, nich); 317 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 318 NIC_BARRIER(nict, nich); 319 320 if (dsc->sc_media_init == NULL) 321 dsc->sc_media_init = dp8390_media_init; 322 323 if (dp8390_config(dsc)) { 324 aprint_error_dev(dsc->sc_dev, "setup failed\n"); 325 return 1; 326 } 327 328 return 0; 329 } 330 331 /* 332 * Detect an NE-2000 or compatible. Returns a model code. 333 */ 334 int 335 ne2000_detect(bus_space_tag_t nict, bus_space_handle_t nich, 336 bus_space_tag_t asict, bus_space_handle_t asich) 337 { 338 const uint8_t test_pattern[32] = "THIS is A memory TEST pattern"; 339 uint8_t test_buffer[32], tmp; 340 int i, rv = NE2000_TYPE_UNKNOWN; 341 int useword; 342 343 /* Reset the board. */ 344 #ifdef GWETHER 345 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 346 ASIC_BARRIER(asict, asich); 347 delay(200); 348 #endif /* GWETHER */ 349 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 350 ASIC_BARRIER(asict, asich); 351 delay(10000); 352 353 /* 354 * I don't know if this is necessary; probably cruft leftover from 355 * Clarkson packet driver code. Doesn't do a thing on the boards I've 356 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 357 * non-invasive...but some boards don't seem to reset and I don't have 358 * complete documentation on what the 'right' thing to do is...so we do 359 * the invasive thing for now. Yuck.] 360 */ 361 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 362 ASIC_BARRIER(asict, asich); 363 delay(5000); 364 365 /* 366 * This is needed because some NE clones apparently don't reset the 367 * NIC properly (or the NIC chip doesn't reset fully on power-up). 368 * XXX - this makes the probe invasive! Done against my better 369 * judgement. -DLG 370 */ 371 bus_space_write_1(nict, nich, ED_P0_CR, 372 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 373 NIC_BARRIER(nict, nich); 374 375 delay(5000); 376 377 /* 378 * Generic probe routine for testing for the existence of a DS8390. 379 * Must be performed after the NIC has just been reset. This 380 * works by looking at certain register values that are guaranteed 381 * to be initialized a certain way after power-up or reset. 382 * 383 * Specifically: 384 * 385 * Register reset bits set bits 386 * -------- ---------- -------- 387 * CR TXP, STA RD2, STP 388 * ISR RST 389 * IMR <all> 390 * DCR LAS 391 * TCR LB1, LB0 392 * 393 * We only look at CR and ISR, however, since looking at the others 394 * would require changing register pages, which would be intrusive 395 * if this isn't an 8390. 396 */ 397 398 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 399 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 400 (ED_CR_RD2 | ED_CR_STP)) 401 goto out; 402 403 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 404 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 405 goto out; 406 407 bus_space_write_1(nict, nich, 408 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 409 NIC_BARRIER(nict, nich); 410 411 for (i = 0; i < 100; i++) { 412 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 413 ED_ISR_RST) { 414 /* Ack the reset bit. */ 415 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 416 NIC_BARRIER(nict, nich); 417 break; 418 } 419 delay(100); 420 } 421 422 #if 0 423 /* XXX */ 424 if (i == 100) 425 goto out; 426 #endif 427 428 /* 429 * Test the ability to read and write to the NIC memory. This has 430 * the side effect of determining if this is an NE1000 or an NE2000. 431 */ 432 433 /* 434 * This prevents packets from being stored in the NIC memory when 435 * the readmem routine turns on the start bit in the CR. 436 */ 437 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 438 NIC_BARRIER(nict, nich); 439 440 /* Temporarily initialize DCR for byte operations. */ 441 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 442 443 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 444 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 445 446 /* 447 * Write a test pattern in byte mode. If this fails, then there 448 * probably isn't any memory at 8k - which likely means that the 449 * board is an NE2000. 450 */ 451 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 452 sizeof(test_pattern), 0, 1); 453 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 454 sizeof(test_buffer), 0); 455 456 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) { 457 /* We're an NE1000. */ 458 rv = NE2000_TYPE_NE1000; 459 goto out; 460 } 461 462 /* not an NE1000 - try NE2000 */ 463 464 /* try 16 bit mode first */ 465 useword = 1; 466 467 #ifdef NE2000_DETECT_8BIT 468 /* 469 * Check bus type in EEPROM first because some NE2000 compatible wedges 470 * on 16 bit DMA access if the chip is configured in 8 bit mode. 471 */ 472 if (ne2000_detect_8bit(nict, nich, asict, asich)) 473 useword = 0; 474 #endif 475 again: 476 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS | 477 (useword ? ED_DCR_WTS : 0)); 478 bus_space_write_1(nict, nich, ED_P0_PSTART, 16384 >> ED_PAGE_SHIFT); 479 bus_space_write_1(nict, nich, ED_P0_PSTOP, 480 (16384 + (useword ? 16384 : 8192)) >> ED_PAGE_SHIFT); 481 482 /* 483 * Write the test pattern in word mode. If this also fails, 484 * then we don't know what this board is. 485 */ 486 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 487 sizeof(test_pattern), useword, 1); 488 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 489 sizeof(test_buffer), useword); 490 491 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) { 492 if (useword == 1) { 493 /* try 8 bit mode */ 494 useword = 0; 495 goto again; 496 } 497 return NE2000_TYPE_UNKNOWN; /* not an NE2000 either */ 498 } 499 500 rv = NE2000_TYPE_NE2000; 501 502 #if NRTL80X9 > 0 503 /* Check for a Realtek RTL8019. */ 504 if (bus_space_read_1(nict, nich, NERTL_RTL0_8019ID0) == RTL0_8019ID0 && 505 bus_space_read_1(nict, nich, NERTL_RTL0_8019ID1) == RTL0_8019ID1) 506 rv = NE2000_TYPE_RTL8019; 507 #endif 508 509 out: 510 /* Clear any pending interrupts that might have occurred above. */ 511 NIC_BARRIER(nict, nich); 512 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 513 514 return rv; 515 } 516 517 #ifdef NE2000_DETECT_8BIT 518 static bool 519 ne2000_detect_8bit(bus_space_tag_t nict, bus_space_handle_t nich, 520 bus_space_tag_t asict, bus_space_handle_t asich) 521 { 522 bool is8bit; 523 uint8_t romdata[32]; 524 525 is8bit = false; 526 527 /* Set DCR for 8 bit DMA. */ 528 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 529 /* Read PROM area. */ 530 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 531 sizeof(romdata), 0); 532 if (romdata[28] == 'B' && romdata[30] == 'B') { 533 /* 'B' (0x42) in 8 bit mode, 'W' (0x57) in 16 bit mode */ 534 is8bit = true; 535 } 536 if (!is8bit) { 537 /* not in 8 bit mode; put back DCR setting for 16 bit DMA */ 538 bus_space_write_1(nict, nich, ED_P0_DCR, 539 ED_DCR_FT1 | ED_DCR_LS | ED_DCR_WTS); 540 } 541 542 return is8bit; 543 } 544 #endif 545 546 /* 547 * Write an mbuf chain to the destination NIC memory address using programmed 548 * I/O. 549 */ 550 int 551 ne2000_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf) 552 { 553 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 554 bus_space_tag_t nict = sc->sc_regt; 555 bus_space_handle_t nich = sc->sc_regh; 556 bus_space_tag_t asict = nsc->sc_asict; 557 bus_space_handle_t asich = nsc->sc_asich; 558 int savelen, padlen; 559 int maxwait = 100; /* about 120us */ 560 561 savelen = m->m_pkthdr.len; 562 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) { 563 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen; 564 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN; 565 } else 566 padlen = 0; 567 568 569 /* Select page 0 registers. */ 570 NIC_BARRIER(nict, nich); 571 bus_space_write_1(nict, nich, ED_P0_CR, 572 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 573 NIC_BARRIER(nict, nich); 574 575 /* Reset remote DMA complete flag. */ 576 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 577 NIC_BARRIER(nict, nich); 578 579 /* Set up DMA byte count. */ 580 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 581 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 582 583 /* Set up destination address in NIC mem. */ 584 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 585 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 586 587 /* Set remote DMA write. */ 588 NIC_BARRIER(nict, nich); 589 bus_space_write_1(nict, nich, 590 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 591 NIC_BARRIER(nict, nich); 592 593 /* 594 * Transfer the mbuf chain to the NIC memory. NE2000 cards 595 * require that data be transferred as words, and only words, 596 * so that case requires some extra code to patch over odd-length 597 * mbufs. 598 */ 599 if (nsc->sc_useword == 0) { 600 /* byte ops are easy. */ 601 for (; m != NULL; m = m->m_next) { 602 if (m->m_len) { 603 bus_space_write_multi_1(asict, asich, 604 NE2000_ASIC_DATA, mtod(m, uint8_t *), 605 m->m_len); 606 } 607 } 608 if (padlen) { 609 for(; padlen > 0; padlen--) 610 bus_space_write_1(asict, asich, 611 NE2000_ASIC_DATA, 0); 612 } 613 } else { 614 /* word ops are a bit trickier. */ 615 uint8_t *data, savebyte[2]; 616 int l, leftover; 617 #ifdef DIAGNOSTIC 618 uint8_t *lim; 619 #endif 620 /* Start out with no leftover data. */ 621 leftover = 0; 622 savebyte[0] = savebyte[1] = 0; 623 624 for (; m != NULL; m = m->m_next) { 625 l = m->m_len; 626 if (l == 0) 627 continue; 628 data = mtod(m, uint8_t *); 629 #ifdef DIAGNOSTIC 630 lim = data + l; 631 #endif 632 while (l > 0) { 633 if (leftover) { 634 /* 635 * Data left over (from mbuf or 636 * realignment). Buffer the next 637 * byte, and write it and the 638 * leftover data out. 639 */ 640 savebyte[1] = *data++; 641 l--; 642 bus_space_write_stream_2(asict, asich, 643 NE2000_ASIC_DATA, 644 *(uint16_t *)savebyte); 645 leftover = 0; 646 } else if (BUS_SPACE_ALIGNED_POINTER(data, 647 uint16_t) == 0) { 648 /* 649 * Unaligned data; buffer the next 650 * byte. 651 */ 652 savebyte[0] = *data++; 653 l--; 654 leftover = 1; 655 } else { 656 /* 657 * Aligned data; output contiguous 658 * words as much as we can, then 659 * buffer the remaining byte, if any. 660 */ 661 leftover = l & 1; 662 l &= ~1; 663 bus_space_write_multi_stream_2(asict, 664 asich, NE2000_ASIC_DATA, 665 (uint16_t *)data, l >> 1); 666 data += l; 667 if (leftover) 668 savebyte[0] = *data++; 669 l = 0; 670 } 671 } 672 if (l < 0) 673 panic("ne2000_write_mbuf: negative len"); 674 #ifdef DIAGNOSTIC 675 if (data != lim) 676 panic("ne2000_write_mbuf: data != lim"); 677 #endif 678 } 679 if (leftover) { 680 savebyte[1] = 0; 681 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 682 *(uint16_t *)savebyte); 683 } 684 if (padlen) { 685 for(; padlen > 1; padlen -= 2) 686 bus_space_write_stream_2(asict, asich, 687 NE2000_ASIC_DATA, 0); 688 } 689 } 690 NIC_BARRIER(nict, nich); 691 692 /* AX88796 doesn't seem to have remote DMA complete */ 693 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE) 694 return savelen; 695 696 /* 697 * Wait for remote DMA to complete. This is necessary because on the 698 * transmit side, data is handled internally by the NIC in bursts, and 699 * we can't start another remote DMA until this one completes. Not 700 * waiting causes really bad things to happen - like the NIC wedging 701 * the bus. 702 */ 703 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 704 ED_ISR_RDC) && --maxwait) { 705 (void)bus_space_read_1(nict, nich, ED_P0_CRDA1); 706 (void)bus_space_read_1(nict, nich, ED_P0_CRDA0); 707 NIC_BARRIER(nict, nich); 708 DELAY(1); 709 } 710 711 if (maxwait == 0) { 712 log(LOG_WARNING, 713 "%s: remote transmit DMA failed to complete\n", 714 device_xname(sc->sc_dev)); 715 dp8390_reset(sc); 716 } 717 718 return savelen; 719 } 720 721 /* 722 * Given a source and destination address, copy 'amout' of a packet from 723 * the ring buffer into a linear destination buffer. Takes into account 724 * ring-wrap. 725 */ 726 int 727 ne2000_ring_copy(struct dp8390_softc *sc, int src, void *dstv, u_short amount) 728 { 729 char *dst = dstv; 730 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 731 bus_space_tag_t nict = sc->sc_regt; 732 bus_space_handle_t nich = sc->sc_regh; 733 bus_space_tag_t asict = nsc->sc_asict; 734 bus_space_handle_t asich = nsc->sc_asich; 735 u_short tmp_amount; 736 int useword = nsc->sc_useword; 737 738 /* Does copy wrap to lower addr in ring buffer? */ 739 if (src + amount > sc->mem_end) { 740 tmp_amount = sc->mem_end - src; 741 742 /* Copy amount up to end of NIC memory. */ 743 ne2000_readmem(nict, nich, asict, asich, src, 744 (uint8_t *)dst, tmp_amount, useword); 745 746 amount -= tmp_amount; 747 src = sc->mem_ring; 748 dst += tmp_amount; 749 } 750 751 ne2000_readmem(nict, nich, asict, asich, src, (uint8_t *)dst, 752 amount, useword); 753 754 return src + amount; 755 } 756 757 void 758 ne2000_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr) 759 { 760 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 761 762 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 763 buf, (uint8_t *)hdr, sizeof(struct dp8390_ring), 764 nsc->sc_useword); 765 #if BYTE_ORDER == BIG_ENDIAN 766 hdr->count = bswap16(hdr->count); 767 #endif 768 } 769 770 int 771 ne2000_test_mem(struct dp8390_softc *sc) 772 { 773 774 /* Noop. */ 775 return 0; 776 } 777 778 /* 779 * Given a NIC memory source address and a host memory destination address, 780 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 781 * rounded up to a word - ok as long as mbufs are word sized. 782 */ 783 void 784 ne2000_readmem(bus_space_tag_t nict, bus_space_handle_t nich, 785 bus_space_tag_t asict, bus_space_handle_t asich, 786 int src, uint8_t *dst, size_t amount, int useword) 787 { 788 789 /* Select page 0 registers. */ 790 NIC_BARRIER(nict, nich); 791 bus_space_write_1(nict, nich, ED_P0_CR, 792 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 793 NIC_BARRIER(nict, nich); 794 795 /* Round up to a word. */ 796 amount = roundup2(amount, sizeof(uint16_t)); 797 798 /* Set up DMA byte count. */ 799 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 800 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 801 802 /* Set up source address in NIC mem. */ 803 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 804 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 805 806 NIC_BARRIER(nict, nich); 807 bus_space_write_1(nict, nich, ED_P0_CR, 808 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 809 810 ASIC_BARRIER(asict, asich); 811 if (useword) 812 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 813 (uint16_t *)dst, amount >> 1); 814 else 815 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 816 dst, amount); 817 } 818 819 /* 820 * Stripped down routine for writing a linear buffer to NIC memory. Only 821 * used in the probe routine to test the memory. 'len' must be even. 822 */ 823 void 824 ne2000_writemem(bus_space_tag_t nict, bus_space_handle_t nich, 825 bus_space_tag_t asict, bus_space_handle_t asich, 826 const uint8_t *src, int dst, size_t len, int useword, int quiet) 827 { 828 int maxwait = 100; /* about 120us */ 829 830 /* Select page 0 registers. */ 831 NIC_BARRIER(nict, nich); 832 bus_space_write_1(nict, nich, ED_P0_CR, 833 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 834 NIC_BARRIER(nict, nich); 835 836 /* Reset remote DMA complete flag. */ 837 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 838 NIC_BARRIER(nict, nich); 839 840 /* Set up DMA byte count. */ 841 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 842 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 843 844 /* Set up destination address in NIC mem. */ 845 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 846 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 847 848 /* Set remote DMA write. */ 849 NIC_BARRIER(nict, nich); 850 bus_space_write_1(nict, nich, ED_P0_CR, 851 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 852 NIC_BARRIER(nict, nich); 853 854 ASIC_BARRIER(asict, asich); 855 if (useword) 856 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 857 (const uint16_t *)src, len >> 1); 858 else 859 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 860 src, len); 861 ASIC_BARRIER(asict, asich); 862 863 /* 864 * Wait for remote DMA to complete. This is necessary because on the 865 * transmit side, data is handled internally by the NIC in bursts, and 866 * we can't start another remote DMA until this one completes. Not 867 * waiting causes really bad things to happen - like the NIC wedging 868 * the bus. 869 */ 870 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 871 ED_ISR_RDC) && --maxwait) 872 DELAY(1); 873 874 if (!quiet && maxwait == 0) 875 printf("ne2000_writemem: failed to complete\n"); 876 } 877 878 int 879 ne2000_detach(struct ne2000_softc *sc, int flags) 880 { 881 882 return dp8390_detach(&sc->sc_dp8390, flags); 883 } 884 885 #ifdef IPKDB_NE 886 /* 887 * This code is essentially the same as ne2000_attach above. 888 */ 889 int 890 ne2000_ipkdb_attach(struct ipkdb_if *kip) 891 { 892 struct ne2000_softc *np = kip->port; 893 struct dp8390_softc *dp = &np->sc_dp8390; 894 bus_space_tag_t nict = dp->sc_regt; 895 bus_space_handle_t nich = dp->sc_regh; 896 bus_space_tag_t asict = np->sc_asict; 897 bus_space_handle_t asich = np->sc_asich; 898 int i, useword; 899 900 #ifdef GWETHER 901 /* Not supported (yet?) */ 902 return -1; 903 #endif 904 905 if (np->sc_type == NE2000_TYPE_UNKNOWN) 906 np->sc_type = ne2000_detect(nict, nich, asict, asich); 907 if (np->sc_type == NE2000_TYPE_UNKNOWN) 908 return -1; 909 910 switch (np->sc_type) { 911 case NE2000_TYPE_NE1000: 912 dp->mem_start = 8192; 913 dp->mem_size = 8192; 914 useword = 0; 915 kip->name = "ne1000"; 916 break; 917 case NE2000_TYPE_NE2000: 918 case NE2000_TYPE_AX88190: 919 case NE2000_TYPE_AX88790: 920 #if NRTL80X9 > 0 921 case NE2000_TYPE_RTL8019: 922 #endif 923 dp->mem_start = 16384; 924 dp->mem_size = 16384; 925 useword = 1; 926 if ( 927 #ifdef NE2000_DETECT_8BIT 928 ne2000_detect_8bit(nict, nich, asict, asich) || 929 #endif 930 (np->sc_quirk & NE2000_QUIRK_8BIT) != 0) { 931 /* in 8 bit mode, only 8KB memory can be used */ 932 dp->mem_size = 8192; 933 useword = 0; 934 } 935 kip->name = 936 (np->sc_type == NE2000_TYPE_AX88190 || 937 np->sc_type == NE2000_TYPE_AX88790) ? 938 "ax88190" : "ne2000"; 939 break; 940 case NE2000_TYPE_DL10019: 941 case NE2000_TYPE_DL10022: 942 dp->mem_start = 8192 * 3; 943 dp->mem_size = 8192 * 3; 944 useword = 1; 945 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ? 946 "dl10022" : "dl10019"; 947 break; 948 default: 949 return -1; 950 break; 951 } 952 953 np->sc_useword = useword; 954 #if NRTL80X9 > 0 955 if (np->sc_type == NE2000_TYPE_RTL8019) { 956 dp->init_card = rtl80x9_init_card; 957 dp->sc_media_init = rtl80x9_media_init; 958 dp->sc_mediachange = rtl80x9_mediachange; 959 dp->sc_mediastatus = rtl80x9_mediastatus; 960 } 961 #endif 962 963 dp->cr_proto = ED_CR_RD2; 964 if (np->sc_type == NE2000_TYPE_AX88190 || 965 np->sc_type == NE2000_TYPE_AX88790) { 966 dp->rcr_proto = ED_RCR_INTT; 967 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 968 } else 969 dp->rcr_proto = 0; 970 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 971 972 dp->test_mem = ne2000_test_mem; 973 dp->ring_copy = ne2000_ring_copy; 974 dp->write_mbuf = ne2000_write_mbuf; 975 dp->read_hdr = ne2000_read_hdr; 976 977 for (i = 0; i < 16; i++) 978 dp->sc_reg_map[i] = i; 979 980 if (dp8390_ipkdb_attach(kip)) 981 return -1; 982 983 if (!(kip->flags & IPKDB_MYHW)) { 984 char romdata[16]; 985 986 /* Read the station address. */ 987 if (np->sc_type == NE2000_TYPE_AX88190 || 988 np->sc_type == NE2000_TYPE_AX88790) { 989 /* Select page 0 registers. */ 990 NIC_BARRIER(nict, nich); 991 bus_space_write_1(nict, nich, ED_P0_CR, 992 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 993 NIC_BARRIER(nict, nich); 994 /* Select word transfer */ 995 bus_space_write_1(nict, nich, ED_P0_DCR, 996 useword ? ED_DCR_WTS : 0); 997 ne2000_readmem(nict, nich, asict, asich, 998 AX88190_NODEID_OFFSET, kip->myenetaddr, 999 ETHER_ADDR_LEN, useword); 1000 } else { 1001 bool ne1000 = (np->sc_type == NE2000_TYPE_NE1000); 1002 1003 ne2000_readmem(nict, nich, asict, asich, 1004 0, romdata, sizeof romdata, useword); 1005 for (i = 0; i < ETHER_ADDR_LEN; i++) 1006 kip->myenetaddr[i] = 1007 romdata[i * (ne1000 ? 1 : 2)]; 1008 } 1009 kip->flags |= IPKDB_MYHW; 1010 1011 } 1012 dp8390_stop(dp); 1013 1014 return 0; 1015 } 1016 #endif 1017 1018 bool 1019 ne2000_suspend(device_t self, const pmf_qual_t *qual) 1020 { 1021 struct ne2000_softc *sc = device_private(self); 1022 struct dp8390_softc *dsc = &sc->sc_dp8390; 1023 int s; 1024 1025 s = splnet(); 1026 1027 dp8390_stop(dsc); 1028 dp8390_disable(dsc); 1029 1030 splx(s); 1031 return true; 1032 } 1033 1034 bool 1035 ne2000_resume(device_t self, const pmf_qual_t *qual) 1036 { 1037 struct ne2000_softc *sc = device_private(self); 1038 struct dp8390_softc *dsc = &sc->sc_dp8390; 1039 struct ifnet *ifp = &dsc->sc_ec.ec_if; 1040 int s; 1041 1042 s = splnet(); 1043 1044 if (ifp->if_flags & IFF_UP) { 1045 if (dp8390_enable(dsc) == 0) 1046 dp8390_init(dsc); 1047 } 1048 1049 splx(s); 1050 return true; 1051 } 1052
Indexes created Wed Sep 24 15:09:51 GMT 2025