ninjaata32var.h revision 1.3.4.2
1 1.3.4.2 yamt /* $NetBSD: ninjaata32var.h,v 1.3.4.2 2006/12/30 20:48:03 yamt Exp $ */ 2 1.3.4.2 yamt 3 1.3.4.2 yamt /* 4 1.3.4.2 yamt * Copyright (c) 2006 ITOH Yasufumi <itohy (at) NetBSD.org>. 5 1.3.4.2 yamt * All rights reserved. 6 1.3.4.2 yamt * 7 1.3.4.2 yamt * Redistribution and use in source and binary forms, with or without 8 1.3.4.2 yamt * modification, are permitted provided that the following conditions 9 1.3.4.2 yamt * are met: 10 1.3.4.2 yamt * 1. Redistributions of source code must retain the above copyright 11 1.3.4.2 yamt * notice, this list of conditions and the following disclaimer. 12 1.3.4.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 13 1.3.4.2 yamt * notice, this list of conditions and the following disclaimer in the 14 1.3.4.2 yamt * documentation and/or other materials provided with the distribution. 15 1.3.4.2 yamt * 16 1.3.4.2 yamt * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' 17 1.3.4.2 yamt * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 1.3.4.2 yamt * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.3.4.2 yamt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS 20 1.3.4.2 yamt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.3.4.2 yamt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.3.4.2 yamt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.3.4.2 yamt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.3.4.2 yamt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.3.4.2 yamt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 1.3.4.2 yamt * THE POSSIBILITY OF SUCH DAMAGE. 27 1.3.4.2 yamt */ 28 1.3.4.2 yamt 29 1.3.4.2 yamt #ifndef _NJATA32VAR_H_ 30 1.3.4.2 yamt #define _NJATA32VAR_H_ 31 1.3.4.2 yamt 32 1.3.4.2 yamt #define NJATA32NAME(sc) (sc->sc_wdcdev.sc_atac.atac_dev.dv_xname) 33 1.3.4.2 yamt 34 1.3.4.2 yamt /* ??? */ 35 1.3.4.2 yamt #define NJATA32_MAX_XFER (64 * 1024) 36 1.3.4.2 yamt 37 1.3.4.2 yamt /* 38 1.3.4.2 yamt * DMA page 39 1.3.4.2 yamt */ 40 1.3.4.2 yamt /* # device */ 41 1.3.4.2 yamt #define NJATA32_NUM_DEV 2 42 1.3.4.2 yamt /* # scatter/gather table entries */ 43 1.3.4.2 yamt #define NJATA32_NUM_SG NJATA32_SGT_MAXENTRY 44 1.3.4.2 yamt 45 1.3.4.2 yamt struct njata32_dma_page { 46 1.3.4.2 yamt /* 47 1.3.4.2 yamt * scatter/gather transfer table 48 1.3.4.2 yamt */ 49 1.3.4.2 yamt struct njata32_sgtable dp_sg[NJATA32_NUM_DEV][NJATA32_NUM_SG]; 50 1.3.4.2 yamt }; 51 1.3.4.2 yamt 52 1.3.4.2 yamt #define NJATA32_NCHAN 1 /* only one channel */ 53 1.3.4.2 yamt 54 1.3.4.2 yamt struct njata32_softc { 55 1.3.4.2 yamt struct wdc_softc sc_wdcdev; /* common wdc definitions */ 56 1.3.4.2 yamt 57 1.3.4.2 yamt unsigned sc_flags; 58 1.3.4.2 yamt #define NJATA32_IO_MAPPED 0x00000001 59 1.3.4.2 yamt #define NJATA32_MEM_MAPPED 0x00000002 60 1.3.4.2 yamt #define NJATA32_CMDPG_MAPPED 0x00000004 61 1.3.4.2 yamt 62 1.3.4.2 yamt unsigned sc_devflags; 63 1.3.4.2 yamt 64 1.3.4.2 yamt /* interrupt handle */ 65 1.3.4.2 yamt void *sc_ih; 66 1.3.4.2 yamt 67 1.3.4.2 yamt struct ninjaata32_channel { /* per-channel data */ 68 1.3.4.2 yamt struct ata_channel ch_ata_channel; /* generic part */ 69 1.3.4.2 yamt } sc_ch[NJATA32_NCHAN]; 70 1.3.4.2 yamt 71 1.3.4.2 yamt struct ata_channel *sc_wdc_chanarray[NJATA32_NCHAN]; 72 1.3.4.2 yamt struct ata_queue sc_wdc_chqueue; 73 1.3.4.2 yamt struct wdc_regs sc_wdc_regs; 74 1.3.4.2 yamt #define NJATA32_REGT(sc) (sc)->sc_wdc_regs.cmd_iot 75 1.3.4.2 yamt #define NJATA32_REGH(sc) (sc)->sc_wdc_regs.cmd_baseioh 76 1.3.4.2 yamt 77 1.3.4.2 yamt /* for DMA */ 78 1.3.4.2 yamt bus_dma_tag_t sc_dmat; 79 1.3.4.2 yamt struct njata32_dma_page *sc_sgtpg; /* scatter/gather table page */ 80 1.3.4.2 yamt #if 0 81 1.3.4.2 yamt bus_addr_t sc_sgt_dma; 82 1.3.4.2 yamt #endif 83 1.3.4.2 yamt bus_dma_segment_t sc_sgt_seg; 84 1.3.4.2 yamt bus_dmamap_t sc_dmamap_sgt; 85 1.3.4.2 yamt int sc_sgt_nsegs; 86 1.3.4.2 yamt 87 1.3.4.2 yamt int sc_piobm_nsegs; 88 1.3.4.2 yamt 89 1.3.4.2 yamt uint8_t sc_timing_pio; 90 1.3.4.2 yamt #if 0 /* ATA DMA is currently unused */ 91 1.3.4.2 yamt uint8_t sc_timing_dma; 92 1.3.4.2 yamt #endif 93 1.3.4.2 yamt 94 1.3.4.2 yamt uint8_t sc_atawait; 95 1.3.4.2 yamt 96 1.3.4.2 yamt /* per-device structure */ 97 1.3.4.2 yamt struct njata32_device { 98 1.3.4.2 yamt /* DMA resource */ 99 1.3.4.2 yamt struct njata32_sgtable *d_sgt; /* for host */ 100 1.3.4.2 yamt bus_addr_t d_sgt_dma; /* for device */ 101 1.3.4.2 yamt bus_dmamap_t d_dmamap_xfer; 102 1.3.4.2 yamt unsigned d_flags; 103 1.3.4.2 yamt #define NJATA32_DEV_DMA_MAPPED 0x0001 104 1.3.4.2 yamt #define NJATA32_DEV_DMA_READ 0x0002 105 1.3.4.2 yamt #define NJATA32_DEV_DMA_ATAPI 0x0004 106 1.3.4.2 yamt #define NJATA32_DEV_XFER_INTR 0x0100 /* only for sc_devflags */ 107 1.3.4.2 yamt #define NJATA32_DEV_GOT_XFER_INTR 0x0200 /* only for sc_devflags */ 108 1.3.4.2 yamt #define NJATA32_DEV_DMA_STARTED 0x8000 /* for diag */ 109 1.3.4.2 yamt } sc_dev[NJATA32_NUM_DEV]; 110 1.3.4.2 yamt }; 111 1.3.4.2 yamt 112 1.3.4.2 yamt #ifdef _KERNEL 113 1.3.4.2 yamt void njata32_attach(struct njata32_softc *); 114 1.3.4.2 yamt int njata32_detach(struct njata32_softc *, int); 115 1.3.4.2 yamt int njata32_intr(void *); 116 1.3.4.2 yamt #endif 117 1.3.4.2 yamt 118 1.3.4.2 yamt #endif /* _NJATA32VAR_H_ */ 119
Indexes created Mon Oct 27 08:10:08 GMT 2025