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ninjascsi32var.h revision 1.2
      1 /*	$NetBSD: ninjascsi32var.h,v 1.2 2004/08/26 18:38:19 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2004 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by ITOH Yasufumi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #ifndef _NJSC32VAR_H_
     40 #define _NJSC32VAR_H_
     41 
     42 typedef unsigned	njsc32_model_t;
     43 #define NJSC32_MODEL_MASK	0xff
     44 #define NJSC32_MODEL_INVALID	0
     45 #define NJSC32_MODEL_32BI	1
     46 #define NJSC32_MODEL_32UDE	2
     47 #define NJSC32_FLAG_DUALEDGE	0x100	/* supports DualEdge */
     48 
     49 /*
     50  * time parameters (25us per unit?)
     51  */
     52 #define NJSC32_SEL_TIMEOUT_TIME		20000	/* selection timeout (500ms) */
     53 #define NJSC32_ARBITRATION_RETRY_TIME	4	/* 100us */
     54 
     55 /* in microseconds */
     56 #define NJSC32_REQ_TIMEOUT		10000	/* 10ms */
     57 #define NJSC32_RESET_HOLD_TIME		30	/* 25us min */
     58 
     59 /*
     60  * DMA page
     61  */
     62 #ifdef NJSC32_AUTOPARAM
     63 #define NJSC32_NUM_CMD	15	/* # simultaneous commands */
     64 #else
     65 #define NJSC32_NUM_CMD	16	/* # simultaneous commands */
     66 #endif
     67 #define NJSC32_NUM_SG	16	/* # scatter/gather table entries per command */
     68 
     69 struct njsc32_dma_page {
     70 	/*
     71 	 * scatter/gather transfer table
     72 	 */
     73 	struct njsc32_sgtable	dp_sg[NJSC32_NUM_CMD][NJSC32_NUM_SG];
     74 #define NJSC32_SIZE_SGT \
     75 	(sizeof(struct njsc32_sgtable) * NJSC32_NUM_SG)
     76 
     77 #ifdef NJSC32_AUTOPARAM
     78 	/*
     79 	 * device reads parameters from this structure (autoparam)
     80 	 */
     81 	struct njsc32_autoparam	dp_ap;
     82 #endif
     83 };
     84 
     85 /* per command */
     86 struct njsc32_cmd {
     87 	TAILQ_ENTRY(njsc32_cmd)	c_q;
     88 	struct njsc32_softc	*c_sc;
     89 
     90 	/* on transfer */
     91 	struct scsipi_xfer	*c_xs;
     92 	struct njsc32_target	*c_target;
     93 	struct njsc32_lu	*c_lu;
     94 	u_int32_t		c_datacnt;	/* I/O buffer length */
     95 
     96 	/* command status */
     97 	int		c_flags;
     98 #define NJSC32_CMD_DMA_MAPPED	0x01
     99 #define NJSC32_CMD_TAGGED	0x02
    100 #define NJSC32_CMD_TAGGED_HEAD	0x04
    101 
    102 	/* SCSI pointer */
    103 	u_int32_t	c_dp_cur;	/* current (or active) data pointer */
    104 	u_int32_t	c_dp_saved;	/* saved data pointer */
    105 	u_int32_t	c_dp_max;	/* max value of data pointer */
    106 
    107 	/* last loaded scatter/gather table */
    108 	unsigned	c_sgoffset;	/* # skip entries */
    109 	u_int32_t	c_sgfixcnt;	/* # skip bytes in the top entry */
    110 
    111 	/* command start/restart parameter */
    112 	u_int8_t	c_msg_identify;	/* Identify message */
    113 	u_int16_t	c_xferctl;
    114 	u_int32_t	c_sgtdmaaddr;
    115 
    116 	/* DMA resource */
    117 	struct njsc32_sgtable	*c_sgt;		/* for host */
    118 	bus_addr_t		c_sgt_dma;	/* for device */
    119 #define NJSC32_CMD_DMAADDR_SGT(cmd, n)	\
    120 		((cmd)->c_sgt_dma + sizeof(struct njsc32_sgtable) * (n))
    121 	bus_dmamap_t		c_dmamap_xfer;
    122 };
    123 
    124 /* XXX? */
    125 #define NJSC32_MAX_XFER	(NJSC32_NUM_SG << PGSHIFT)
    126 
    127 struct njsc32_softc {
    128 	struct device	sc_dev;
    129 
    130 	/* device spec */
    131 	njsc32_model_t		sc_model;
    132 
    133 	int			sc_clk;		/* one of following */
    134 #define NJSC32_CLK_40M		NJSC32_CLOCK_DIV_4	/* 20MB/s */
    135 #define NJSC32_CLK_20M		NJSC32_CLOCK_DIV_2	/* 10MB/s */
    136 #define NJSC32_CLK_PCI_33M	NJSC32_CLOCK_PCICLK	/* 16.6MB/s */
    137 
    138 	/* device register */
    139 	bus_space_tag_t		sc_regt;
    140 	bus_space_handle_t	sc_regh;
    141 
    142 	unsigned		sc_flags;
    143 #define NJSC32_IO_MAPPED		0x00000001
    144 #define NJSC32_MEM_MAPPED		0x00000002
    145 #define NJSC32_CMDPG_MAPPED		0x00000004
    146 #define NJSC32_CANNOT_SUPPLY_TERMPWR	0x00000100
    147 
    148 	/*
    149 	 * controller state
    150 	 */
    151 	enum njsc32_stat {
    152 		NJSC32_STAT_IDLE,
    153 		NJSC32_STAT_ARBIT,	/* initiator started arbitration */
    154 		NJSC32_STAT_CONNECT,	/* command is active (connection) */
    155 		NJSC32_STAT_RESEL,	/* a target did Reselection */
    156 		NJSC32_STAT_RESEL_LUN,	/* received Identify message */
    157 		NJSC32_STAT_RECONNECT,	/* command is active (reconnection) */
    158 		NJSC32_STAT_DETACH	/* detaching */
    159 	} sc_stat;
    160 
    161 	/* interrupt handle */
    162 	void			*sc_ih;
    163 
    164 	/* for DMA */
    165 	bus_dma_tag_t		sc_dmat;
    166 	struct njsc32_dma_page	*sc_cmdpg;	/* scatter/gather table page */
    167 #if 0
    168 	bus_addr_t		sc_cmdpg_dma;
    169 #endif
    170 	bus_dma_segment_t	sc_cmdpg_seg;
    171 	bus_dmamap_t		sc_dmamap_cmdpg;
    172 	int			sc_cmdpg_nsegs;
    173 
    174 #ifdef NJSC32_AUTOPARAM
    175 	u_int32_t		sc_ap_dma;	/* autoparam DMA address */
    176 #endif
    177 
    178 	/*
    179 	 * command control structure
    180 	 */
    181 	struct njsc32_cmd	sc_cmds[NJSC32_NUM_CMD];
    182 	TAILQ_HEAD(njsc32_cmd_head, njsc32_cmd)
    183 				sc_freecmd,	/* free list */
    184 				sc_reqcmd;	/* waiting commands */
    185 
    186 	struct njsc32_cmd	*sc_curcmd;	/* currently active command */
    187 	int			sc_ncmd;	/* total # commands available */
    188 	int			sc_nusedcmds;	/* # used commands */
    189 
    190 	/* reselection */
    191 	int			sc_reselid, sc_resellun;
    192 
    193 	/* message in buffer */
    194 #define NJSC32_MSGIN_LEN	20
    195 	u_int8_t		sc_msginbuf[NJSC32_MSGIN_LEN];
    196 	int			sc_msgincnt;
    197 
    198 	/* message out buffer */
    199 #define NJSC32_MSGOUT_LEN	16
    200 	u_int8_t		sc_msgout[NJSC32_MSGOUT_LEN];
    201 	size_t			sc_msgoutlen;
    202 	size_t			sc_msgoutidx;
    203 
    204 	/* sync timing table */
    205 	const struct njsc32_sync_param {
    206 		u_int8_t	sp_period;	/* transfer period */
    207 		u_int8_t	sp_ackw;	/* ACK width parameter */
    208 		u_int8_t	sp_sample;	/* sampling period */
    209 	} *sc_synct;
    210 	int	sc_sync_max;
    211 
    212 	/* for scsipi layer */
    213 	struct device		*sc_scsi;
    214 	struct scsipi_adapter	sc_adapter;
    215 	struct scsipi_channel	sc_channel;
    216 
    217 	/* per-target */
    218 	struct njsc32_target {
    219 		enum njsc32_tarst {
    220 			NJSC32_TARST_DONE,	/* negotiation done */
    221 			NJSC32_TARST_INIT,
    222 			NJSC32_TARST_DE,	/* negotiating DualEdge */
    223 			NJSC32_TARST_WDTR,	/* negotiating width */
    224 			NJSC32_TARST_SDTR,	/* negotiating sync */
    225 			NJSC32_TARST_ASYNC	/* negotiating async */
    226 		} t_state;
    227 		int	t_flags;
    228 #define NJSC32_TARF_TAG		0x0001	/* tagged queueing is enabled */
    229 #define NJSC32_TARF_SYNC	0x0002	/* negotiate for sync transfer */
    230 #define NJSC32_TARF_DE		0x0004	/* negotiate for DualEdge transfer */
    231 
    232 		int		t_syncperiod;
    233 		int		t_syncoffset;
    234 
    235 		u_int8_t	t_sync;
    236 		u_int8_t	t_ackwidth;
    237 		u_int8_t	t_targetid;	/* initiator and target id */
    238 		u_int8_t	t_sample;
    239 
    240 		u_int16_t	t_xferctl;	/* DualEdge flag */
    241 
    242 		/* per logical unit */
    243 		struct njsc32_lu {
    244 			/*
    245 			 * disconnected commands
    246 			 */
    247 			struct njsc32_cmd *lu_cmd;	/* untagged command */
    248 			struct njsc32_cmd_head	lu_q;	/* tagged commands */
    249 		} t_lus[NJSC32_NLU];
    250 	} sc_targets[NJSC32_MAX_TARGET_ID + 1];
    251 };
    252 
    253 #ifdef _KERNEL
    254 void	njsc32_attach(struct njsc32_softc *);
    255 int	njsc32_detach(struct njsc32_softc *, int);
    256 int	njsc32_intr(void *);
    257 #endif
    258 
    259 #endif	/* _NJSC32VAR_H_ */
    260