nslm7xvar.h revision 1.15.2.4
1 1.15.2.4 yamt /* $NetBSD: nslm7xvar.h,v 1.15.2.4 2007/12/07 17:29:56 yamt Exp $ */ 2 1.1 groo 3 1.1 groo /*- 4 1.1 groo * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 1.1 groo * All rights reserved. 6 1.1 groo * 7 1.1 groo * This code is derived from software contributed to The NetBSD Foundation 8 1.1 groo * by Bill Squier. 9 1.1 groo * 10 1.1 groo * Redistribution and use in source and binary forms, with or without 11 1.1 groo * modification, are permitted provided that the following conditions 12 1.1 groo * are met: 13 1.1 groo * 1. Redistributions of source code must retain the above copyright 14 1.1 groo * notice, this list of conditions and the following disclaimer. 15 1.1 groo * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 groo * notice, this list of conditions and the following disclaimer in the 17 1.1 groo * documentation and/or other materials provided with the distribution. 18 1.1 groo * 3. All advertising materials mentioning features or use of this software 19 1.1 groo * must display the following acknowledgement: 20 1.1 groo * This product includes software developed by the NetBSD 21 1.1 groo * Foundation, Inc. and its contributors. 22 1.1 groo * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.1 groo * contributors may be used to endorse or promote products derived 24 1.1 groo * from this software without specific prior written permission. 25 1.1 groo * 26 1.1 groo * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.1 groo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.1 groo * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.1 groo * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.1 groo * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.1 groo * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.1 groo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.1 groo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.1 groo * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.1 groo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.1 groo * POSSIBILITY OF SUCH DAMAGE. 37 1.1 groo */ 38 1.1 groo 39 1.1 groo #ifndef _DEV_ISA_NSLM7XVAR_H_ 40 1.1 groo #define _DEV_ISA_NSLM7XVAR_H_ 41 1.1 groo 42 1.15.2.2 yamt /* 43 1.15.2.2 yamt * National Semiconductor LM78/79/81 registers. 44 1.15.2.2 yamt */ 45 1.15.2.2 yamt 46 1.15.2.2 yamt /* Control registers */ 47 1.1 groo 48 1.1 groo #define LMC_ADDR 0x05 49 1.1 groo #define LMC_DATA 0x06 50 1.1 groo 51 1.15.2.2 yamt /* Data registers */ 52 1.1 groo 53 1.15.2.2 yamt #define LMD_POST_RAM 0x00 /* POST RAM occupies 0x00 -- 0x1f */ 54 1.15.2.2 yamt #define LMD_VALUE_RAM 0x20 /* Value RAM occupies 0x20 -- 0x3f */ 55 1.15.2.2 yamt #define LMD_FAN1 0x28 /* FAN1 reading */ 56 1.15.2.2 yamt #define LMD_FAN2 0x29 /* FAN2 reading */ 57 1.15.2.2 yamt #define LMD_FAN3 0x2a /* FAN3 reading */ 58 1.1 groo 59 1.14 perry #define LMD_CONFIG 0x40 /* Configuration */ 60 1.1 groo #define LMD_ISR1 0x41 /* Interrupt Status 1 */ 61 1.1 groo #define LMD_ISR2 0x42 /* Interrupt Status 2 */ 62 1.1 groo #define LMD_SMI1 0x43 /* SMI Mask 1 */ 63 1.1 groo #define LMD_SMI2 0x44 /* SMI Mask 2 */ 64 1.1 groo #define LMD_NMI1 0x45 /* NMI Mask 1 */ 65 1.1 groo #define LMD_NMI2 0x46 /* NMI Mask 2 */ 66 1.1 groo #define LMD_VIDFAN 0x47 /* VID/Fan Divisor */ 67 1.1 groo #define LMD_SBUSADDR 0x48 /* Serial Bus Address */ 68 1.1 groo #define LMD_CHIPID 0x49 /* Chip Reset/ID */ 69 1.1 groo 70 1.15.2.2 yamt /* Chip IDs */ 71 1.1 groo 72 1.1 groo #define LM_NUM_SENSORS 11 73 1.1 groo #define LM_ID_LM78 0x00 74 1.1 groo #define LM_ID_LM78J 0x40 75 1.1 groo #define LM_ID_LM79 0xC0 76 1.8 bouyer #define LM_ID_LM81 0x80 77 1.1 groo #define LM_ID_MASK 0xFE 78 1.1 groo 79 1.15.2.2 yamt 80 1.5 bouyer /* 81 1.15.2.2 yamt * Winbond registers 82 1.15.2.2 yamt * 83 1.15.2.2 yamt * Several models exists. The W83781D is mostly compatible with the 84 1.15.2.2 yamt * LM78, but has two extra temperatures. Later models add extra 85 1.15.2.2 yamt * voltage sensors, fans and bigger fan divisors to accomodate slow 86 1.15.2.2 yamt * running fans. To accomodate the extra sensors some models have 87 1.15.2.2 yamt * different memory banks. 88 1.5 bouyer */ 89 1.15.2.2 yamt 90 1.15.2.2 yamt #define WB_T23ADDR 0x4a /* Temperature 2 and 3 Serial Bus Address */ 91 1.15.2.2 yamt #define WB_PIN 0x4b /* Pin Control */ 92 1.15.2.2 yamt #define WB_BANKSEL 0x4e /* Bank Select */ 93 1.15.2.2 yamt #define WB_VENDID 0x4f /* Vendor ID */ 94 1.15.2.2 yamt 95 1.15.2.2 yamt /* Bank 0 regs */ 96 1.15.2.2 yamt #define WB_BANK0_CHIPID 0x58 /* Chip ID */ 97 1.15.2.2 yamt #define WB_BANK0_FAN45 0x5c /* Fan 4/5 Divisor Control (W83791D only) */ 98 1.15.2.2 yamt #define WB_BANK0_VBAT 0x5d /* VBAT Monitor Control */ 99 1.15.2.2 yamt #define WB_BANK0_FAN4 0xba /* Fan 4 reading (W83791D only) */ 100 1.15.2.2 yamt #define WB_BANK0_FAN5 0xbb /* Fan 5 reading (W83791D only) */ 101 1.15.2.2 yamt 102 1.15.2.2 yamt #define WB_BANK0_CONFIG 0x18 /* VRM & OVT Config (W83627THF/W83637HF) */ 103 1.15.2.2 yamt 104 1.15.2.2 yamt /* Bank 1 registers */ 105 1.15.2.2 yamt #define WB_BANK1_T2H 0x50 /* Temperature 2 High Byte */ 106 1.15.2.2 yamt #define WB_BANK1_T2L 0x51 /* Temperature 2 Low Byte */ 107 1.15.2.2 yamt 108 1.15.2.2 yamt /* Bank 2 registers */ 109 1.15.2.2 yamt #define WB_BANK2_T3H 0x50 /* Temperature 3 High Byte */ 110 1.15.2.2 yamt #define WB_BANK2_T3L 0x51 /* Temperature 3 Low Byte */ 111 1.15.2.2 yamt 112 1.15.2.2 yamt /* Bank 4 registers (W83782D/W83627HF and later models only) */ 113 1.15.2.2 yamt #define WB_BANK4_T1OFF 0x54 /* Temperature 1 Offset */ 114 1.15.2.2 yamt #define WB_BANK4_T2OFF 0x55 /* Temperature 2 Offset */ 115 1.15.2.2 yamt #define WB_BANK4_T3OFF 0x56 /* Temperature 3 Offset */ 116 1.15.2.2 yamt 117 1.15.2.2 yamt /* Bank 5 registers (W83782D/W83627HF and later models only) */ 118 1.15.2.2 yamt #define WB_BANK5_5VSB 0x50 /* 5VSB reading */ 119 1.15.2.2 yamt #define WB_BANK5_VBAT 0x51 /* VBAT reading */ 120 1.15.2.2 yamt 121 1.15.2.2 yamt /* Bank selection */ 122 1.15.2.2 yamt #define WB_BANKSEL_B0 0x00 /* Bank 0 */ 123 1.15.2.2 yamt #define WB_BANKSEL_B1 0x01 /* Bank 1 */ 124 1.15.2.2 yamt #define WB_BANKSEL_B2 0x02 /* Bank 2 */ 125 1.15.2.2 yamt #define WB_BANKSEL_B3 0x03 /* Bank 3 */ 126 1.15.2.2 yamt #define WB_BANKSEL_B4 0x04 /* Bank 4 */ 127 1.15.2.2 yamt #define WB_BANKSEL_B5 0x05 /* Bank 5 */ 128 1.15.2.2 yamt #define WB_BANKSEL_HBAC 0x80 /* Register 0x4f High Byte Access */ 129 1.15.2.2 yamt 130 1.15.2.2 yamt /* Vendor IDs */ 131 1.15.2.2 yamt #define WB_VENDID_WINBOND 0x5ca3 /* Winbond */ 132 1.15.2.2 yamt #define WB_VENDID_ASUS 0x12c3 /* ASUS */ 133 1.15.2.2 yamt 134 1.15.2.2 yamt /* Chip IDs */ 135 1.15.2.2 yamt #define WB_CHIPID_W83781D 0x10 136 1.15.2.2 yamt #define WB_CHIPID_W83781D_2 0x11 137 1.15.2.2 yamt #define WB_CHIPID_W83627HF 0x21 138 1.15.2.2 yamt #define WB_CHIPID_AS99127F 0x31 /* Asus W83781D clone */ 139 1.15.2.2 yamt #define WB_CHIPID_W83782D 0x30 140 1.15.2.2 yamt #define WB_CHIPID_W83783S 0x40 141 1.15.2.2 yamt #define WB_CHIPID_W83697HF 0x60 142 1.15.2.2 yamt #define WB_CHIPID_W83791D 0x71 143 1.15.2.2 yamt #define WB_CHIPID_W83791SD 0x72 144 1.15.2.2 yamt #define WB_CHIPID_W83792D 0x7a 145 1.15.2.2 yamt #define WB_CHIPID_W83637HF 0x80 146 1.15.2.2 yamt #define WB_CHIPID_W83627EHF_A 0x88 /* early version, only for ASUS MBs */ 147 1.15.2.2 yamt #define WB_CHIPID_W83627THF 0x90 148 1.15.2.2 yamt #define WB_CHIPID_W83627EHF 0xa1 149 1.15.2.2 yamt #define WB_CHIPID_W83627DHG 0xc1 150 1.15.2.2 yamt 151 1.15.2.2 yamt /* Config bits */ 152 1.15.2.2 yamt #define WB_CONFIG_VMR9 0x01 153 1.15.2.2 yamt 154 1.15.2.2 yamt /* Reference voltage (mV) */ 155 1.15.2.2 yamt #define WB_VREF 3600 156 1.15.2.2 yamt #define WB_W83627EHF_VREF 2048 157 1.15.2.2 yamt 158 1.15.2.2 yamt #define WB_MAX_SENSORS 19 159 1.4 bouyer 160 1.1 groo struct lm_softc { 161 1.1 groo struct device sc_dev; 162 1.1 groo 163 1.15.2.2 yamt bus_space_tag_t lm_iot; 164 1.1 groo bus_space_handle_t lm_ioh; 165 1.1 groo 166 1.15.2.3 yamt callout_t sc_callout; 167 1.10 ad 168 1.15.2.2 yamt envsys_data_t sensors[WB_MAX_SENSORS]; 169 1.15.2.4 yamt struct sysmon_envsys *sc_sme; 170 1.15.2.2 yamt uint8_t numsensors; 171 1.15.2.2 yamt 172 1.15.2.3 yamt void (*refresh_sensor_data)(struct lm_softc *); 173 1.15.2.2 yamt 174 1.15.2.2 yamt uint8_t (*lm_readreg)(struct lm_softc *, int); 175 1.10 ad void (*lm_writereg)(struct lm_softc *, int, int); 176 1.3 thorpej 177 1.15.2.2 yamt struct lm_sensor *lm_sensors; 178 1.15.2.2 yamt uint8_t chipid; 179 1.15.2.2 yamt uint8_t vrm9; 180 1.15.2.2 yamt }; 181 1.15.2.2 yamt 182 1.15.2.2 yamt struct lm_sensor { 183 1.15.2.2 yamt const char *desc; 184 1.15.2.2 yamt enum envsys_units type; 185 1.15.2.2 yamt uint8_t bank; 186 1.15.2.2 yamt uint8_t reg; 187 1.15.2.2 yamt void (*refresh)(struct lm_softc *, int); 188 1.15.2.2 yamt int rfact; 189 1.1 groo }; 190 1.1 groo 191 1.15.2.3 yamt void lm_attach(struct lm_softc *); 192 1.15.2.3 yamt void lm_detach(struct lm_softc *); 193 1.15.2.3 yamt int lm_probe(bus_space_tag_t, bus_space_handle_t); 194 1.1 groo 195 1.1 groo #endif /* _DEV_ISA_NSLM7XVAR_H_ */ 196
Indexes created Wed Oct 22 13:09:56 GMT 2025