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nslm7xvar.h revision 1.8
      1  1.8   bouyer /*	$NetBSD: nslm7xvar.h,v 1.8 2002/04/05 16:11:47 bouyer Exp $ */
      2  1.1     groo 
      3  1.1     groo /*-
      4  1.1     groo  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  1.1     groo  * All rights reserved.
      6  1.1     groo  *
      7  1.1     groo  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1     groo  * by Bill Squier.
      9  1.1     groo  *
     10  1.1     groo  * Redistribution and use in source and binary forms, with or without
     11  1.1     groo  * modification, are permitted provided that the following conditions
     12  1.1     groo  * are met:
     13  1.1     groo  * 1. Redistributions of source code must retain the above copyright
     14  1.1     groo  *    notice, this list of conditions and the following disclaimer.
     15  1.1     groo  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1     groo  *    notice, this list of conditions and the following disclaimer in the
     17  1.1     groo  *    documentation and/or other materials provided with the distribution.
     18  1.1     groo  * 3. All advertising materials mentioning features or use of this software
     19  1.1     groo  *    must display the following acknowledgement:
     20  1.1     groo  *        This product includes software developed by the NetBSD
     21  1.1     groo  *        Foundation, Inc. and its contributors.
     22  1.1     groo  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1     groo  *    contributors may be used to endorse or promote products derived
     24  1.1     groo  *    from this software without specific prior written permission.
     25  1.1     groo  *
     26  1.1     groo  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1     groo  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1     groo  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1     groo  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1     groo  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1     groo  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1     groo  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1     groo  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1     groo  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1     groo  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1     groo  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1     groo  */
     38  1.1     groo 
     39  1.1     groo #ifndef _DEV_ISA_NSLM7XVAR_H_
     40  1.1     groo #define _DEV_ISA_NSLM7XVAR_H_
     41  1.1     groo 
     42  1.1     groo /* ctl registers */
     43  1.1     groo 
     44  1.1     groo #define LMC_ADDR	0x05
     45  1.1     groo #define LMC_DATA	0x06
     46  1.1     groo 
     47  1.1     groo /* data registers */
     48  1.1     groo 
     49  1.1     groo #define LMD_SENSORBASE	0x20	/* Sensors occupy 0x20 -- 0x2a */
     50  1.1     groo 
     51  1.1     groo #define LMD_CONFIG	0x40	/* Configuration */
     52  1.1     groo #define LMD_ISR1	0x41	/* Interrupt Status 1 */
     53  1.1     groo #define LMD_ISR2	0x42	/* Interrupt Status 2 */
     54  1.1     groo #define LMD_SMI1	0x43	/* SMI Mask 1 */
     55  1.1     groo #define LMD_SMI2	0x44	/* SMI Mask 2 */
     56  1.1     groo #define LMD_NMI1	0x45	/* NMI Mask 1 */
     57  1.1     groo #define LMD_NMI2	0x46	/* NMI Mask 2 */
     58  1.1     groo #define LMD_VIDFAN	0x47	/* VID/Fan Divisor */
     59  1.1     groo #define LMD_SBUSADDR	0x48	/* Serial Bus Address */
     60  1.1     groo #define LMD_CHIPID	0x49	/* Chip Reset/ID */
     61  1.1     groo 
     62  1.1     groo /* misc constants */
     63  1.1     groo 
     64  1.1     groo #define LM_NUM_SENSORS	11
     65  1.1     groo #define LM_ID_LM78	0x00
     66  1.1     groo #define LM_ID_LM78J	0x40
     67  1.1     groo #define LM_ID_LM79	0xC0
     68  1.8   bouyer #define LM_ID_LM81	0x80
     69  1.1     groo #define LM_ID_MASK	0xFE
     70  1.1     groo 
     71  1.5   bouyer /*
     72  1.5   bouyer  * additionnal registers for the Winbond chips:
     73  1.5   bouyer  * WB83781D: mostly lm7x compatible; extra temp sensors in bank1 & 2
     74  1.5   bouyer  * WB83782D & WB83627HF: voltage sensors needs different handling, more FAN
     75  1.5   bouyer  *                       dividers; mode voltage sensors, more temp sensors.
     76  1.5   bouyer  */
     77  1.4   bouyer #define WB_PIN		0x4B	/* pin & fan3 divider */
     78  1.4   bouyer #define WB_BANKSEL	0x4E	/* banck select register */
     79  1.4   bouyer #define WB_BANKSEL_B0	0x00	/* select bank 0 */
     80  1.4   bouyer #define WB_BANKSEL_B1	0x01	/* select bank 1 */
     81  1.4   bouyer #define WB_BANKSEL_B2	0x02	/* select bank 2 */
     82  1.4   bouyer #define WB_BANKSEL_B3	0x03	/* select bank 3 */
     83  1.4   bouyer #define WB_BANKSEL_B4	0x04	/* select bank 4 */
     84  1.4   bouyer #define WB_BANKSEL_B5	0x05	/* select bank 5 */
     85  1.4   bouyer #define WB_BANKSEL_HBAC	0x80	/* hight byte access */
     86  1.4   bouyer 
     87  1.4   bouyer #define WB_VENDID	0x4F	/* vendor ID register */
     88  1.4   bouyer #define WB_VENDID_WINBOND 0x5CA3
     89  1.4   bouyer /* Bank0 regs */
     90  1.5   bouyer #define WB_BANK0_CHIPID	0x58
     91  1.5   bouyer #define WB_CHIPID_83781		0x10
     92  1.7   bouyer #define WB_CHIPID_83781_2	0x11
     93  1.5   bouyer #define WB_CHIPID_83782		0x30
     94  1.5   bouyer #define WB_CHIPID_83627		0x21
     95  1.6   bouyer #define WB_CHIPID_83697		0x60
     96  1.4   bouyer #define WB_BANK0_FANBAT	0x5D
     97  1.4   bouyer /* Bank1 regs */
     98  1.4   bouyer #define WB_BANK1_T2H	0x50
     99  1.4   bouyer #define WB_BANK1_T2L	0x51
    100  1.4   bouyer 
    101  1.4   bouyer /* Bank2 regs */
    102  1.4   bouyer #define WB_BANK2_T3H	0x50
    103  1.4   bouyer #define WB_BANK2_T3L	0x51
    104  1.4   bouyer 
    105  1.5   bouyer /* Bank4 regs 83782/83627 only */
    106  1.4   bouyer #define WB_BANK4_T1OFF	0x54
    107  1.4   bouyer #define WB_BANK4_T2OFF	0x55
    108  1.4   bouyer #define WB_BANK4_T3OFF	0x56
    109  1.4   bouyer 
    110  1.5   bouyer /* Bank5 regs 83782/83627 only */
    111  1.4   bouyer #define WB_BANK5_5VSB	0x50
    112  1.4   bouyer #define WB_BANK5_VBAT	0x51
    113  1.4   bouyer 
    114  1.5   bouyer #define WB83781_NUM_SENSORS	13
    115  1.6   bouyer #define WB83697_NUM_SENSORS	14
    116  1.4   bouyer #define WB_NUM_SENSORS	15
    117  1.4   bouyer 
    118  1.1     groo struct lm_softc {
    119  1.1     groo 	struct	device sc_dev;
    120  1.1     groo 
    121  1.1     groo 	int	lm_iobase;
    122  1.1     groo 	bus_space_tag_t lm_iot;
    123  1.1     groo 	bus_space_handle_t lm_ioh;
    124  1.1     groo 
    125  1.2     groo 	int	sc_flags;
    126  1.1     groo 	struct	timeval lastread; /* only allow reads every 1.5 seconds */
    127  1.4   bouyer 	struct	envsys_tre_data sensors[WB_NUM_SENSORS];
    128  1.4   bouyer 	struct	envsys_basic_info info[WB_NUM_SENSORS];
    129  1.4   bouyer 	int numsensors;
    130  1.4   bouyer 	void (*refresh_sensor_data) __P((struct lm_softc *));
    131  1.3  thorpej 
    132  1.3  thorpej 	struct sysmon_envsys sc_sysmon;
    133  1.1     groo };
    134  1.1     groo 
    135  1.1     groo void lm_attach __P((struct lm_softc *));
    136  1.2     groo int lm_probe __P((bus_space_tag_t, bus_space_handle_t));
    137  1.1     groo 
    138  1.1     groo #endif /* _DEV_ISA_NSLM7XVAR_H_ */
    139