nvmevar.h revision 1.1.2.5
1 1.1.2.5 skrll /* $NetBSD: nvmevar.h,v 1.1.2.5 2016/12/05 10:55:01 skrll Exp $ */ 2 1.1.2.2 skrll /* $OpenBSD: nvmevar.h,v 1.8 2016/04/14 11:18:32 dlg Exp $ */ 3 1.1.2.2 skrll 4 1.1.2.2 skrll /* 5 1.1.2.2 skrll * Copyright (c) 2014 David Gwynne <dlg (at) openbsd.org> 6 1.1.2.2 skrll * 7 1.1.2.2 skrll * Permission to use, copy, modify, and distribute this software for any 8 1.1.2.2 skrll * purpose with or without fee is hereby granted, provided that the above 9 1.1.2.2 skrll * copyright notice and this permission notice appear in all copies. 10 1.1.2.2 skrll * 11 1.1.2.2 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 1.1.2.2 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 1.1.2.2 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 1.1.2.2 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 1.1.2.2 skrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 1.1.2.2 skrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 1.1.2.2 skrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 1.1.2.2 skrll */ 19 1.1.2.2 skrll 20 1.1.2.2 skrll #include <sys/bus.h> 21 1.1.2.2 skrll #include <sys/cpu.h> 22 1.1.2.2 skrll #include <sys/device.h> 23 1.1.2.2 skrll #include <sys/mutex.h> 24 1.1.2.2 skrll #include <sys/pool.h> 25 1.1.2.2 skrll #include <sys/queue.h> 26 1.1.2.2 skrll 27 1.1.2.2 skrll struct nvme_dmamem { 28 1.1.2.2 skrll bus_dmamap_t ndm_map; 29 1.1.2.2 skrll bus_dma_segment_t ndm_seg; 30 1.1.2.2 skrll size_t ndm_size; 31 1.1.2.2 skrll void *ndm_kva; 32 1.1.2.2 skrll }; 33 1.1.2.5 skrll #define NVME_DMA_MAP(_ndm) ((_ndm)->ndm_map) 34 1.1.2.5 skrll #define NVME_DMA_LEN(_ndm) ((_ndm)->ndm_map->dm_segs[0].ds_len) 35 1.1.2.5 skrll #define NVME_DMA_DVA(_ndm) ((uint64_t)(_ndm)->ndm_map->dm_segs[0].ds_addr) 36 1.1.2.5 skrll #define NVME_DMA_KVA(_ndm) ((void *)(_ndm)->ndm_kva) 37 1.1.2.2 skrll 38 1.1.2.2 skrll struct nvme_softc; 39 1.1.2.2 skrll struct nvme_queue; 40 1.1.2.2 skrll 41 1.1.2.4 skrll typedef void (*nvme_nnc_done)(void *, struct buf *, uint16_t); 42 1.1.2.4 skrll 43 1.1.2.2 skrll struct nvme_ccb { 44 1.1.2.2 skrll SIMPLEQ_ENTRY(nvme_ccb) ccb_entry; 45 1.1.2.2 skrll 46 1.1.2.4 skrll /* DMA handles */ 47 1.1.2.2 skrll bus_dmamap_t ccb_dmamap; 48 1.1.2.2 skrll 49 1.1.2.2 skrll bus_addr_t ccb_prpl_off; 50 1.1.2.2 skrll uint64_t ccb_prpl_dva; 51 1.1.2.2 skrll uint64_t *ccb_prpl; 52 1.1.2.2 skrll 53 1.1.2.4 skrll /* command context */ 54 1.1.2.2 skrll uint16_t ccb_id; 55 1.1.2.4 skrll void *ccb_cookie; 56 1.1.2.5 skrll #define NVME_CCB_FREE 0xbeefdeed 57 1.1.2.4 skrll void (*ccb_done)(struct nvme_queue *, 58 1.1.2.4 skrll struct nvme_ccb *, struct nvme_cqe *); 59 1.1.2.4 skrll 60 1.1.2.4 skrll /* namespace context */ 61 1.1.2.4 skrll void *nnc_cookie; 62 1.1.2.4 skrll nvme_nnc_done nnc_done; 63 1.1.2.4 skrll uint16_t nnc_nsid; 64 1.1.2.4 skrll uint16_t nnc_flags; 65 1.1.2.4 skrll #define NVME_NS_CTX_F_READ __BIT(0) 66 1.1.2.4 skrll #define NVME_NS_CTX_F_POLL __BIT(1) 67 1.1.2.4 skrll 68 1.1.2.4 skrll struct buf *nnc_buf; 69 1.1.2.4 skrll daddr_t nnc_blkno; 70 1.1.2.4 skrll size_t nnc_datasize; 71 1.1.2.4 skrll int nnc_secsize; 72 1.1.2.2 skrll }; 73 1.1.2.2 skrll 74 1.1.2.2 skrll struct nvme_queue { 75 1.1.2.2 skrll struct nvme_softc *q_sc; 76 1.1.2.2 skrll kmutex_t q_sq_mtx; 77 1.1.2.2 skrll kmutex_t q_cq_mtx; 78 1.1.2.5 skrll struct nvme_dmamem *q_sq_dmamem; 79 1.1.2.5 skrll struct nvme_dmamem *q_cq_dmamem; 80 1.1.2.2 skrll bus_size_t q_sqtdbl; /* submission queue tail doorbell */ 81 1.1.2.2 skrll bus_size_t q_cqhdbl; /* completion queue head doorbell */ 82 1.1.2.2 skrll uint16_t q_id; 83 1.1.2.2 skrll uint32_t q_entries; 84 1.1.2.2 skrll uint32_t q_sq_tail; 85 1.1.2.2 skrll uint32_t q_cq_head; 86 1.1.2.2 skrll uint16_t q_cq_phase; 87 1.1.2.2 skrll 88 1.1.2.2 skrll kmutex_t q_ccb_mtx; 89 1.1.2.5 skrll uint16_t q_nccbs; /* total number of ccbs */ 90 1.1.2.5 skrll uint16_t q_nccbs_avail; /* available ccbs */ 91 1.1.2.2 skrll struct nvme_ccb *q_ccbs; 92 1.1.2.4 skrll SIMPLEQ_HEAD(, nvme_ccb) q_ccb_list; 93 1.1.2.5 skrll struct nvme_dmamem *q_ccb_prpls; 94 1.1.2.2 skrll }; 95 1.1.2.2 skrll 96 1.1.2.2 skrll struct nvme_namespace { 97 1.1.2.2 skrll struct nvm_identify_namespace *ident; 98 1.1.2.2 skrll device_t dev; 99 1.1.2.3 skrll uint32_t flags; 100 1.1.2.3 skrll #define NVME_NS_F_OPEN __BIT(0) 101 1.1.2.2 skrll }; 102 1.1.2.2 skrll 103 1.1.2.2 skrll struct nvme_softc { 104 1.1.2.2 skrll device_t sc_dev; 105 1.1.2.2 skrll 106 1.1.2.2 skrll bus_space_tag_t sc_iot; 107 1.1.2.2 skrll bus_space_handle_t sc_ioh; 108 1.1.2.2 skrll bus_size_t sc_ios; 109 1.1.2.2 skrll bus_dma_tag_t sc_dmat; 110 1.1.2.2 skrll 111 1.1.2.2 skrll int (*sc_intr_establish)(struct nvme_softc *, 112 1.1.2.2 skrll uint16_t qid, struct nvme_queue *); 113 1.1.2.2 skrll int (*sc_intr_disestablish)(struct nvme_softc *, 114 1.1.2.2 skrll uint16_t qid); 115 1.1.2.4 skrll void **sc_ih; /* interrupt handlers */ 116 1.1.2.4 skrll void **sc_softih; /* softintr handlers */ 117 1.1.2.2 skrll 118 1.1.2.4 skrll u_int sc_rdy_to; /* RDY timeout */ 119 1.1.2.4 skrll size_t sc_mps; /* memory page size */ 120 1.1.2.4 skrll size_t sc_mdts; /* max data trasfer size */ 121 1.1.2.4 skrll u_int sc_max_sgl; /* max S/G segments */ 122 1.1.2.2 skrll 123 1.1.2.2 skrll struct nvm_identify_controller 124 1.1.2.2 skrll sc_identify; 125 1.1.2.2 skrll 126 1.1.2.4 skrll u_int sc_nn; /* namespace count */ 127 1.1.2.2 skrll struct nvme_namespace *sc_namespaces; 128 1.1.2.2 skrll 129 1.1.2.2 skrll bool sc_use_mq; 130 1.1.2.2 skrll u_int sc_nq; /* # of io queue (sc_q) */ 131 1.1.2.2 skrll struct nvme_queue *sc_admin_q; 132 1.1.2.2 skrll struct nvme_queue **sc_q; 133 1.1.2.2 skrll 134 1.1.2.2 skrll uint32_t sc_flags; 135 1.1.2.2 skrll #define NVME_F_ATTACHED __BIT(0) 136 1.1.2.3 skrll #define NVME_F_OPEN __BIT(1) 137 1.1.2.2 skrll }; 138 1.1.2.2 skrll 139 1.1.2.2 skrll #define lemtoh16(p) le16toh(*((uint16_t *)(p))) 140 1.1.2.2 skrll #define lemtoh32(p) le32toh(*((uint32_t *)(p))) 141 1.1.2.2 skrll #define lemtoh64(p) le64toh(*((uint64_t *)(p))) 142 1.1.2.2 skrll #define htolem16(p, x) (*((uint16_t *)(p)) = htole16(x)) 143 1.1.2.2 skrll #define htolem32(p, x) (*((uint32_t *)(p)) = htole32(x)) 144 1.1.2.2 skrll #define htolem64(p, x) (*((uint64_t *)(p)) = htole64(x)) 145 1.1.2.2 skrll 146 1.1.2.2 skrll struct nvme_attach_args { 147 1.1.2.2 skrll uint16_t naa_nsid; 148 1.1.2.5 skrll uint32_t naa_qentries; /* total number of queue slots */ 149 1.1.2.5 skrll uint32_t naa_maxphys; /* maximum device transfer size */ 150 1.1.2.2 skrll }; 151 1.1.2.2 skrll 152 1.1.2.2 skrll int nvme_attach(struct nvme_softc *); 153 1.1.2.2 skrll int nvme_detach(struct nvme_softc *, int flags); 154 1.1.2.4 skrll int nvme_rescan(device_t, const char *, const int *); 155 1.1.2.2 skrll void nvme_childdet(device_t, device_t); 156 1.1.2.2 skrll int nvme_intr(void *); 157 1.1.2.5 skrll void nvme_softintr_intx(void *); 158 1.1.2.4 skrll int nvme_intr_msi(void *); 159 1.1.2.4 skrll void nvme_softintr_msi(void *); 160 1.1.2.2 skrll 161 1.1.2.2 skrll static inline struct nvme_queue * 162 1.1.2.2 skrll nvme_get_q(struct nvme_softc *sc) 163 1.1.2.2 skrll { 164 1.1.2.2 skrll return sc->sc_q[cpu_index(curcpu()) % sc->sc_nq]; 165 1.1.2.2 skrll } 166 1.1.2.2 skrll 167 1.1.2.2 skrll /* 168 1.1.2.2 skrll * namespace 169 1.1.2.2 skrll */ 170 1.1.2.2 skrll static inline struct nvme_namespace * 171 1.1.2.2 skrll nvme_ns_get(struct nvme_softc *sc, uint16_t nsid) 172 1.1.2.2 skrll { 173 1.1.2.2 skrll if (nsid == 0 || nsid - 1 >= sc->sc_nn) 174 1.1.2.2 skrll return NULL; 175 1.1.2.2 skrll return &sc->sc_namespaces[nsid - 1]; 176 1.1.2.2 skrll } 177 1.1.2.2 skrll 178 1.1.2.2 skrll int nvme_ns_identify(struct nvme_softc *, uint16_t); 179 1.1.2.2 skrll void nvme_ns_free(struct nvme_softc *, uint16_t); 180 1.1.2.4 skrll int nvme_ns_dobio(struct nvme_softc *, uint16_t, void *, 181 1.1.2.4 skrll struct buf *, void *, size_t, int, daddr_t, int, nvme_nnc_done); 182 1.1.2.4 skrll int nvme_ns_sync(struct nvme_softc *, uint16_t, void *, int, nvme_nnc_done); 183
Indexes created Sat Oct 25 07:10:08 GMT 2025