oosiop.c revision 1.3
1 /* $NetBSD: oosiop.c,v 1.3 2003/09/26 16:02:24 simonb Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Shuichiro URATA. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * NCR53C700 SCSI I/O processor (OOSIOP) driver 31 * 32 * TODO: 33 * - More better error handling. 34 * - Implement tagged queuing. 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: oosiop.c,v 1.3 2003/09/26 16:02:24 simonb Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/callout.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/buf.h> 46 #include <sys/malloc.h> 47 #include <sys/queue.h> 48 49 #include <uvm/uvm_extern.h> 50 51 #include <dev/scsipi/scsi_all.h> 52 #include <dev/scsipi/scsipi_all.h> 53 #include <dev/scsipi/scsiconf.h> 54 #include <dev/scsipi/scsi_message.h> 55 56 #include <machine/cpu.h> 57 #include <machine/bus.h> 58 59 #include <dev/ic/oosiopreg.h> 60 #include <dev/ic/oosiopvar.h> 61 #include <dev/microcode/siop/oosiop.out> 62 63 static int oosiop_alloc_cb(struct oosiop_softc *, int); 64 65 static __inline void oosiop_relocate_io(struct oosiop_softc *, bus_addr_t); 66 static __inline void oosiop_relocate_tc(struct oosiop_softc *, bus_addr_t); 67 static __inline void oosiop_fixup_select(struct oosiop_softc *, bus_addr_t, 68 int); 69 static __inline void oosiop_fixup_jump(struct oosiop_softc *, bus_addr_t, 70 bus_addr_t); 71 static __inline void oosiop_fixup_move(struct oosiop_softc *, bus_addr_t, 72 bus_size_t, bus_addr_t); 73 74 static void oosiop_load_script(struct oosiop_softc *); 75 static void oosiop_setup_sgdma(struct oosiop_softc *, struct oosiop_cb *); 76 static void oosiop_setup_dma(struct oosiop_softc *); 77 static void oosiop_flush_fifo(struct oosiop_softc *); 78 static void oosiop_clear_fifo(struct oosiop_softc *); 79 static void oosiop_phasemismatch(struct oosiop_softc *); 80 static void oosiop_setup_syncxfer(struct oosiop_softc *); 81 static void oosiop_set_syncparam(struct oosiop_softc *, int, int, int); 82 static void oosiop_minphys(struct buf *); 83 static void oosiop_scsipi_request(struct scsipi_channel *, 84 scsipi_adapter_req_t, void *); 85 static void oosiop_done(struct oosiop_softc *, struct oosiop_cb *); 86 static void oosiop_timeout(void *); 87 static void oosiop_reset(struct oosiop_softc *); 88 static void oosiop_reset_bus(struct oosiop_softc *); 89 static void oosiop_scriptintr(struct oosiop_softc *); 90 static void oosiop_msgin(struct oosiop_softc *, struct oosiop_cb *); 91 92 /* Trap interrupt code for unexpected data I/O */ 93 #define DATAIN_TRAP 0xdead0001 94 #define DATAOUT_TRAP 0xdead0002 95 96 /* Possible TP and SCF conbination */ 97 static const struct { 98 u_int8_t tp; 99 u_int8_t scf; 100 } synctbl[] = { 101 {0, 1}, /* SCLK / 4.0 */ 102 {1, 1}, /* SCLK / 5.0 */ 103 {2, 1}, /* SCLK / 6.0 */ 104 {3, 1}, /* SCLK / 7.0 */ 105 {1, 2}, /* SCLK / 7.5 */ 106 {4, 1}, /* SCLK / 8.0 */ 107 {5, 1}, /* SCLK / 9.0 */ 108 {6, 1}, /* SCLK / 10.0 */ 109 {3, 2}, /* SCLK / 10.5 */ 110 {7, 1}, /* SCLK / 11.0 */ 111 {4, 2}, /* SCLK / 12.0 */ 112 {5, 2}, /* SCLK / 13.5 */ 113 {3, 3}, /* SCLK / 14.0 */ 114 {6, 2}, /* SCLK / 15.0 */ 115 {4, 3}, /* SCLK / 16.0 */ 116 {7, 2}, /* SCLK / 16.5 */ 117 {5, 3}, /* SCLK / 18.0 */ 118 {6, 3}, /* SCLK / 20.0 */ 119 {7, 3} /* SCLK / 22.0 */ 120 }; 121 #define NSYNCTBL (sizeof(synctbl) / sizeof(synctbl[0])) 122 123 #define oosiop_period(sc, tp, scf) \ 124 (((1000000000 / (sc)->sc_freq) * (tp) * (scf)) / 40) 125 126 void 127 oosiop_attach(struct oosiop_softc *sc) 128 { 129 bus_size_t scrsize; 130 bus_dma_segment_t seg; 131 struct oosiop_cb *cb; 132 int err, i, nseg; 133 134 /* 135 * Allocate DMA-safe memory for the script and map it. 136 */ 137 scrsize = sizeof(oosiop_script); 138 err = bus_dmamem_alloc(sc->sc_dmat, scrsize, PAGE_SIZE, 0, &seg, 1, 139 &nseg, BUS_DMA_NOWAIT); 140 if (err) { 141 printf(": failed to allocate script memory, err=%d\n", err); 142 return; 143 } 144 err = bus_dmamem_map(sc->sc_dmat, &seg, nseg, scrsize, 145 (caddr_t *)&sc->sc_scr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 146 if (err) { 147 printf(": failed to map script memory, err=%d\n", err); 148 return; 149 } 150 err = bus_dmamap_create(sc->sc_dmat, scrsize, 1, scrsize, 0, 151 BUS_DMA_NOWAIT, &sc->sc_scrdma); 152 if (err) { 153 printf(": failed to create script map, err=%d\n", err); 154 return; 155 } 156 err = bus_dmamap_load(sc->sc_dmat, sc->sc_scrdma, sc->sc_scr, scrsize, 157 NULL, BUS_DMA_NOWAIT | BUS_DMA_WRITE); 158 if (err) { 159 printf(": failed to load script map, err=%d\n", err); 160 return; 161 } 162 sc->sc_scrbase = sc->sc_scrdma->dm_segs[0].ds_addr; 163 164 /* Initialize command block array */ 165 TAILQ_INIT(&sc->sc_free_cb); 166 TAILQ_INIT(&sc->sc_cbq); 167 if (oosiop_alloc_cb(sc, OOSIOP_NCB) != 0) 168 return; 169 170 /* Use first cb to reselection msgin buffer */ 171 cb = TAILQ_FIRST(&sc->sc_free_cb); 172 sc->sc_reselbuf = cb->xferdma->dm_segs[0].ds_addr + 173 offsetof(struct oosiop_xfer, msgin[0]); 174 175 for (i = 0; i < OOSIOP_NTGT; i++) { 176 sc->sc_tgt[i].nexus = NULL; 177 sc->sc_tgt[i].flags = 0; 178 } 179 180 /* Setup asynchronous clock divisor parameters */ 181 if (sc->sc_freq <= 25000000) { 182 sc->sc_ccf = 10; 183 sc->sc_dcntl = OOSIOP_DCNTL_CF_1; 184 } else if (sc->sc_freq <= 37500000) { 185 sc->sc_ccf = 15; 186 sc->sc_dcntl = OOSIOP_DCNTL_CF_1_5; 187 } else if (sc->sc_freq <= 50000000) { 188 sc->sc_ccf = 20; 189 sc->sc_dcntl = OOSIOP_DCNTL_CF_2; 190 } else { 191 sc->sc_ccf = 30; 192 sc->sc_dcntl = OOSIOP_DCNTL_CF_3; 193 } 194 195 if (sc->sc_chip == OOSIOP_700) 196 sc->sc_minperiod = oosiop_period(sc, 4, sc->sc_ccf); 197 else 198 sc->sc_minperiod = oosiop_period(sc, 4, 10); 199 200 if (sc->sc_minperiod < 25) 201 sc->sc_minperiod = 25; /* limit to 10MB/s */ 202 203 printf(": NCR53C700%s rev %d, %dMHz, SCSI ID %d\n", 204 sc->sc_chip == OOSIOP_700_66 ? "-66" : "", 205 oosiop_read_1(sc, OOSIOP_CTEST7) >> 4, 206 sc->sc_freq / 1000000, sc->sc_id); 207 /* 208 * Reset all 209 */ 210 oosiop_reset(sc); 211 oosiop_reset_bus(sc); 212 213 /* 214 * Start SCRIPTS processor 215 */ 216 oosiop_load_script(sc); 217 sc->sc_active = 0; 218 oosiop_write_4(sc, OOSIOP_DSP, sc->sc_scrbase + Ent_wait_reselect); 219 220 /* 221 * Fill in the scsipi_adapter. 222 */ 223 sc->sc_adapter.adapt_dev = &sc->sc_dev; 224 sc->sc_adapter.adapt_nchannels = 1; 225 sc->sc_adapter.adapt_openings = OOSIOP_NCB; 226 sc->sc_adapter.adapt_max_periph = 1; 227 sc->sc_adapter.adapt_ioctl = NULL; 228 sc->sc_adapter.adapt_minphys = oosiop_minphys; 229 sc->sc_adapter.adapt_request = oosiop_scsipi_request; 230 231 /* 232 * Fill in the scsipi_channel. 233 */ 234 sc->sc_channel.chan_adapter = &sc->sc_adapter; 235 sc->sc_channel.chan_bustype = &scsi_bustype; 236 sc->sc_channel.chan_channel = 0; 237 sc->sc_channel.chan_ntargets = OOSIOP_NTGT; 238 sc->sc_channel.chan_nluns = 8; 239 sc->sc_channel.chan_id = sc->sc_id; 240 241 /* 242 * Now try to attach all the sub devices. 243 */ 244 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 245 } 246 247 static int 248 oosiop_alloc_cb(struct oosiop_softc *sc, int ncb) 249 { 250 struct oosiop_cb *cb; 251 struct oosiop_xfer *xfer; 252 bus_size_t xfersize; 253 bus_dma_segment_t seg; 254 int i, s, err, nseg; 255 256 /* 257 * Allocate oosiop_cb. 258 */ 259 cb = malloc(sizeof(struct oosiop_cb) * ncb, M_DEVBUF, M_NOWAIT|M_ZERO); 260 if (cb == NULL) { 261 printf(": failed to allocate cb memory\n"); 262 return (ENOMEM); 263 } 264 265 /* 266 * Allocate DMA-safe memory for the oosiop_xfer and map it. 267 */ 268 xfersize = sizeof(struct oosiop_xfer) * ncb; 269 err = bus_dmamem_alloc(sc->sc_dmat, xfersize, PAGE_SIZE, 0, &seg, 1, 270 &nseg, BUS_DMA_NOWAIT); 271 if (err) { 272 printf(": failed to allocate xfer block memory, err=%d\n", err); 273 return (err); 274 } 275 err = bus_dmamem_map(sc->sc_dmat, &seg, nseg, xfersize, 276 (caddr_t *)(void *)&xfer, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 277 if (err) { 278 printf(": failed to map xfer block memory, err=%d\n", err); 279 return (err); 280 } 281 282 /* Initialize each command block */ 283 for (i = 0; i < ncb; i++) { 284 err = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 285 0, BUS_DMA_NOWAIT, &cb->cmddma); 286 if (err) { 287 printf(": failed to create cmddma map, err=%d\n", err); 288 return (err); 289 } 290 err = bus_dmamap_create(sc->sc_dmat, OOSIOP_MAX_XFER, 291 OOSIOP_NSG, OOSIOP_DBC_MAX, 0, BUS_DMA_NOWAIT, 292 &cb->datadma); 293 if (err) { 294 printf(": failed to create datadma map, err=%d\n", err); 295 return (err); 296 } 297 298 err = bus_dmamap_create(sc->sc_dmat, 299 sizeof(struct oosiop_xfer), 1, sizeof(struct oosiop_xfer), 300 0, BUS_DMA_NOWAIT, &cb->xferdma); 301 if (err) { 302 printf(": failed to create xfer block map, err=%d\n", 303 err); 304 return (err); 305 } 306 err = bus_dmamap_load(sc->sc_dmat, cb->xferdma, xfer, 307 sizeof(struct oosiop_xfer), NULL, BUS_DMA_NOWAIT); 308 if (err) { 309 printf(": failed to load xfer block, err=%d\n", err); 310 return (err); 311 } 312 313 cb->xfer = xfer; 314 315 s = splbio(); 316 TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain); 317 splx(s); 318 319 cb++; 320 xfer++; 321 } 322 323 return (0); 324 } 325 326 static __inline void 327 oosiop_relocate_io(struct oosiop_softc *sc, bus_addr_t addr) 328 { 329 u_int32_t dcmd; 330 int32_t dsps; 331 332 dcmd = le32toh(sc->sc_scr[addr / 4 + 0]); 333 dsps = le32toh(sc->sc_scr[addr / 4 + 1]); 334 335 /* convert relative to absolute */ 336 if (dcmd & 0x04000000) { 337 dcmd &= ~0x04000000; 338 #if 0 339 /* 340 * sign extention isn't needed here because 341 * ncr53cxxx.c generates 32 bit dsps. 342 */ 343 dsps <<= 8; 344 dsps >>= 8; 345 #endif 346 sc->sc_scr[addr / 4 + 0] = htole32(dcmd); 347 dsps += addr + 8; 348 } 349 350 sc->sc_scr[addr / 4 + 1] = htole32(dsps + sc->sc_scrbase); 351 } 352 353 static __inline void 354 oosiop_relocate_tc(struct oosiop_softc *sc, bus_addr_t addr) 355 { 356 u_int32_t dcmd; 357 int32_t dsps; 358 359 dcmd = le32toh(sc->sc_scr[addr / 4 + 0]); 360 dsps = le32toh(sc->sc_scr[addr / 4 + 1]); 361 362 /* convert relative to absolute */ 363 if (dcmd & 0x00800000) { 364 dcmd &= ~0x00800000; 365 sc->sc_scr[addr / 4] = htole32(dcmd); 366 #if 0 367 /* 368 * sign extention isn't needed here because 369 * ncr53cxxx.c generates 32 bit dsps. 370 */ 371 dsps <<= 8; 372 dsps >>= 8; 373 #endif 374 dsps += addr + 8; 375 } 376 377 sc->sc_scr[addr / 4 + 1] = htole32(dsps + sc->sc_scrbase); 378 } 379 380 static __inline void 381 oosiop_fixup_select(struct oosiop_softc *sc, bus_addr_t addr, int id) 382 { 383 u_int32_t dcmd; 384 385 dcmd = le32toh(sc->sc_scr[addr / 4]); 386 dcmd &= 0xff00ffff; 387 dcmd |= 0x00010000 << id; 388 sc->sc_scr[addr / 4] = htole32(dcmd); 389 } 390 391 static __inline void 392 oosiop_fixup_jump(struct oosiop_softc *sc, bus_addr_t addr, bus_addr_t dst) 393 { 394 395 sc->sc_scr[addr / 4 + 1] = htole32(dst); 396 } 397 398 static __inline void 399 oosiop_fixup_move(struct oosiop_softc *sc, bus_addr_t addr, bus_size_t dbc, 400 bus_addr_t dsps) 401 { 402 u_int32_t dcmd; 403 404 dcmd = le32toh(sc->sc_scr[addr / 4]); 405 dcmd &= 0xff000000; 406 dcmd |= dbc & 0x00ffffff; 407 sc->sc_scr[addr / 4 + 0] = htole32(dcmd); 408 sc->sc_scr[addr / 4 + 1] = htole32(dsps); 409 } 410 411 static void 412 oosiop_load_script(struct oosiop_softc *sc) 413 { 414 int i; 415 416 /* load script */ 417 for (i = 0; i < sizeof(oosiop_script) / sizeof(oosiop_script[0]); i++) 418 sc->sc_scr[i] = htole32(oosiop_script[i]); 419 420 /* relocate script */ 421 for (i = 0; i < (sizeof(oosiop_script) / 8); i++) { 422 switch (oosiop_script[i * 2] >> 27) { 423 case 0x08: /* select */ 424 case 0x0a: /* wait reselect */ 425 oosiop_relocate_io(sc, i * 8); 426 break; 427 case 0x10: /* jump */ 428 case 0x11: /* call */ 429 oosiop_relocate_tc(sc, i * 8); 430 break; 431 } 432 } 433 434 oosiop_fixup_move(sc, Ent_p_resel_msgin_move, 1, sc->sc_reselbuf); 435 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE); 436 } 437 438 static void 439 oosiop_setup_sgdma(struct oosiop_softc *sc, struct oosiop_cb *cb) 440 { 441 int i, n, off; 442 struct oosiop_xfer *xfer; 443 444 OOSIOP_XFERSCR_SYNC(sc, cb, 445 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 446 447 off = cb->curdp; 448 xfer = cb->xfer; 449 450 /* Find start segment */ 451 if (cb->xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 452 for (i = 0; i < cb->datadma->dm_nsegs; i++) { 453 if (off < cb->datadma->dm_segs[i].ds_len) 454 break; 455 off -= cb->datadma->dm_segs[i].ds_len; 456 } 457 } 458 459 /* build MOVE block */ 460 if (cb->xs->xs_control & XS_CTL_DATA_IN) { 461 n = 0; 462 while (i < cb->datadma->dm_nsegs) { 463 xfer->datain_scr[n * 2 + 0] = htole32(0x09000000 | 464 (cb->datadma->dm_segs[i].ds_len - off)); 465 xfer->datain_scr[n * 2 + 1] = 466 htole32(cb->datadma->dm_segs[i].ds_addr + off); 467 n++; 468 i++; 469 off = 0; 470 } 471 xfer->datain_scr[n * 2 + 0] = htole32(0x80080000); 472 xfer->datain_scr[n * 2 + 1] = 473 htole32(sc->sc_scrbase + Ent_phasedispatch); 474 } else { 475 xfer->datain_scr[0] = htole32(0x98080000); 476 xfer->datain_scr[1] = htole32(DATAIN_TRAP); 477 } 478 479 if (cb->xs->xs_control & XS_CTL_DATA_OUT) { 480 n = 0; 481 while (i < cb->datadma->dm_nsegs) { 482 xfer->dataout_scr[n * 2 + 0] = htole32(0x08000000 | 483 (cb->datadma->dm_segs[i].ds_len - off)); 484 xfer->dataout_scr[n * 2 + 1] = 485 htole32(cb->datadma->dm_segs[i].ds_addr + off); 486 n++; 487 i++; 488 off = 0; 489 } 490 xfer->dataout_scr[n * 2 + 0] = htole32(0x80080000); 491 xfer->dataout_scr[n * 2 + 1] = 492 htole32(sc->sc_scrbase + Ent_phasedispatch); 493 } else { 494 xfer->dataout_scr[0] = htole32(0x98080000); 495 xfer->dataout_scr[1] = htole32(DATAOUT_TRAP); 496 } 497 OOSIOP_XFERSCR_SYNC(sc, cb, 498 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 499 } 500 501 /* 502 * Setup DMA pointer into script. 503 */ 504 static void 505 oosiop_setup_dma(struct oosiop_softc *sc) 506 { 507 struct oosiop_cb *cb; 508 bus_addr_t xferbase; 509 510 cb = sc->sc_curcb; 511 xferbase = cb->xferdma->dm_segs[0].ds_addr; 512 513 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE); 514 515 oosiop_fixup_select(sc, Ent_p_select, cb->id); 516 oosiop_fixup_jump(sc, Ent_p_datain_jump, xferbase + 517 offsetof(struct oosiop_xfer, datain_scr[0])); 518 oosiop_fixup_jump(sc, Ent_p_dataout_jump, xferbase + 519 offsetof(struct oosiop_xfer, dataout_scr[0])); 520 oosiop_fixup_move(sc, Ent_p_msgin_move, 1, xferbase + 521 offsetof(struct oosiop_xfer, msgin[0])); 522 oosiop_fixup_move(sc, Ent_p_extmsglen_move, 1, xferbase + 523 offsetof(struct oosiop_xfer, msgin[1])); 524 oosiop_fixup_move(sc, Ent_p_msgout_move, cb->msgoutlen, xferbase + 525 offsetof(struct oosiop_xfer, msgout[0])); 526 oosiop_fixup_move(sc, Ent_p_status_move, 1, xferbase + 527 offsetof(struct oosiop_xfer, status)); 528 oosiop_fixup_move(sc, Ent_p_cmdout_move, cb->xs->cmdlen, 529 cb->cmddma->dm_segs[0].ds_addr); 530 531 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE); 532 } 533 534 static void 535 oosiop_flush_fifo(struct oosiop_softc *sc) 536 { 537 538 oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) | 539 OOSIOP_DFIFO_FLF); 540 while ((oosiop_read_1(sc, OOSIOP_CTEST1) & OOSIOP_CTEST1_FMT) != 541 OOSIOP_CTEST1_FMT) 542 ; 543 oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) & 544 ~OOSIOP_DFIFO_FLF); 545 } 546 547 static void 548 oosiop_clear_fifo(struct oosiop_softc *sc) 549 { 550 551 oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) | 552 OOSIOP_DFIFO_CLF); 553 while ((oosiop_read_1(sc, OOSIOP_CTEST1) & OOSIOP_CTEST1_FMT) != 554 OOSIOP_CTEST1_FMT) 555 ; 556 oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) & 557 ~OOSIOP_DFIFO_CLF); 558 } 559 560 static void 561 oosiop_phasemismatch(struct oosiop_softc *sc) 562 { 563 struct oosiop_cb *cb; 564 u_int32_t dsp, dbc, n, i, len; 565 u_int8_t dfifo, sstat1; 566 567 cb = sc->sc_curcb; 568 if (cb == NULL) 569 return; 570 571 dsp = oosiop_read_4(sc, OOSIOP_DSP); 572 dbc = oosiop_read_4(sc, OOSIOP_DBC) & OOSIOP_DBC_MAX; 573 len = 0; 574 575 n = dsp - cb->xferdma->dm_segs[0].ds_addr - 8; 576 if (n >= offsetof(struct oosiop_xfer, datain_scr[0]) && 577 n < offsetof(struct oosiop_xfer, datain_scr[OOSIOP_NSG * 2])) { 578 n -= offsetof(struct oosiop_xfer, datain_scr[0]); 579 n >>= 3; 580 OOSIOP_DINSCR_SYNC(sc, cb, 581 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 582 for (i = 0; i <= n; i++) 583 len += le32toh(cb->xfer->datain_scr[i * 2]) & 584 0x00ffffff; 585 OOSIOP_DINSCR_SYNC(sc, cb, 586 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 587 /* All data in the chip are already flushed */ 588 } else if (n >= offsetof(struct oosiop_xfer, dataout_scr[0]) && 589 n < offsetof(struct oosiop_xfer, dataout_scr[OOSIOP_NSG * 2])) { 590 n -= offsetof(struct oosiop_xfer, dataout_scr[0]); 591 n >>= 3; 592 OOSIOP_DOUTSCR_SYNC(sc, cb, 593 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 594 for (i = 0; i <= n; i++) 595 len += le32toh(cb->xfer->dataout_scr[i * 2]) & 596 0x00ffffff; 597 OOSIOP_DOUTSCR_SYNC(sc, cb, 598 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 599 600 dfifo = oosiop_read_1(sc, OOSIOP_DFIFO); 601 dbc += ((dfifo & OOSIOP_DFIFO_BO) - (dbc & OOSIOP_DFIFO_BO)) & 602 OOSIOP_DFIFO_BO; 603 604 sstat1 = oosiop_read_1(sc, OOSIOP_SSTAT1); 605 if (sstat1 & OOSIOP_SSTAT1_OLF) 606 dbc++; 607 if ((sc->sc_tgt[cb->id].sxfer != 0) && 608 (sstat1 & OOSIOP_SSTAT1_ORF) != 0) 609 dbc++; 610 611 oosiop_clear_fifo(sc); 612 } else { 613 printf("%s: phase mismatch addr=%08x\n", sc->sc_dev.dv_xname, 614 oosiop_read_4(sc, OOSIOP_DSP) - 8); 615 oosiop_clear_fifo(sc); 616 return; 617 } 618 619 len -= dbc; 620 if (len) { 621 cb->curdp += len; 622 oosiop_setup_sgdma(sc, cb); 623 } 624 } 625 626 static void 627 oosiop_setup_syncxfer(struct oosiop_softc *sc) 628 { 629 int id; 630 631 id = sc->sc_curcb->id; 632 if (sc->sc_chip != OOSIOP_700) 633 oosiop_write_1(sc, OOSIOP_SBCL, sc->sc_tgt[id].scf); 634 635 oosiop_write_1(sc, OOSIOP_SXFER, sc->sc_tgt[id].sxfer); 636 } 637 638 static void 639 oosiop_set_syncparam(struct oosiop_softc *sc, int id, int period, int offset) 640 { 641 int i, p; 642 struct scsipi_xfer_mode xm; 643 644 xm.xm_target = id; 645 xm.xm_mode = 0; 646 xm.xm_period = 0; 647 xm.xm_offset = 0; 648 649 if (offset == 0) { 650 /* Asynchronous */ 651 sc->sc_tgt[id].scf = 0; 652 sc->sc_tgt[id].sxfer = 0; 653 } else { 654 /* Synchronous */ 655 if (sc->sc_chip == OOSIOP_700) { 656 for (i = 4; i < 12; i++) { 657 p = oosiop_period(sc, i, sc->sc_ccf); 658 if (p >= period) 659 break; 660 } 661 if (i == 12) { 662 printf("%s: target %d period too large\n", 663 sc->sc_dev.dv_xname, id); 664 i = 11; /* XXX */ 665 } 666 sc->sc_tgt[id].scf = 0; 667 sc->sc_tgt[id].sxfer = ((i - 4) << 4) | offset; 668 } else { 669 for (i = 0; i < NSYNCTBL; i++) { 670 p = oosiop_period(sc, synctbl[i].tp + 4, 671 (synctbl[i].scf + 1) * 5); 672 if (p >= period) 673 break; 674 } 675 if (i == NSYNCTBL) { 676 printf("%s: target %d period too large\n", 677 sc->sc_dev.dv_xname, id); 678 i = NSYNCTBL - 1; /* XXX */ 679 } 680 sc->sc_tgt[id].scf = synctbl[i].scf; 681 sc->sc_tgt[id].sxfer = (synctbl[i].tp << 4) | offset; 682 } 683 684 xm.xm_mode |= PERIPH_CAP_SYNC; 685 xm.xm_period = period; 686 xm.xm_offset = offset; 687 } 688 689 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 690 } 691 692 static void 693 oosiop_minphys(struct buf *bp) 694 { 695 696 if (bp->b_bcount > OOSIOP_MAX_XFER) 697 bp->b_bcount = OOSIOP_MAX_XFER; 698 minphys(bp); 699 } 700 701 static void 702 oosiop_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 703 void *arg) 704 { 705 struct scsipi_xfer *xs; 706 struct oosiop_softc *sc; 707 struct oosiop_cb *cb; 708 struct oosiop_xfer *xfer; 709 struct scsipi_xfer_mode *xm; 710 int s, err; 711 712 sc = (struct oosiop_softc *)chan->chan_adapter->adapt_dev; 713 714 switch (req) { 715 case ADAPTER_REQ_RUN_XFER: 716 xs = arg; 717 718 s = splbio(); 719 cb = TAILQ_FIRST(&sc->sc_free_cb); 720 TAILQ_REMOVE(&sc->sc_free_cb, cb, chain); 721 splx(s); 722 723 cb->xs = xs; 724 cb->flags = 0; 725 cb->id = xs->xs_periph->periph_target; 726 cb->lun = xs->xs_periph->periph_lun; 727 cb->curdp = 0; 728 cb->savedp = 0; 729 xfer = cb->xfer; 730 731 /* Setup SCSI command buffer DMA */ 732 err = bus_dmamap_load(sc->sc_dmat, cb->cmddma, xs->cmd, 733 xs->cmdlen, NULL, ((xs->xs_control & XS_CTL_NOSLEEP) ? 734 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | BUS_DMA_WRITE); 735 if (err) { 736 printf("%s: unable to load cmd DMA map: %d", 737 sc->sc_dev.dv_xname, err); 738 xs->error = XS_RESOURCE_SHORTAGE; 739 TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain); 740 scsipi_done(xs); 741 return; 742 } 743 bus_dmamap_sync(sc->sc_dmat, cb->cmddma, 0, xs->cmdlen, 744 BUS_DMASYNC_PREWRITE); 745 746 /* Setup data buffer DMA */ 747 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 748 err = bus_dmamap_load(sc->sc_dmat, cb->datadma, 749 xs->data, xs->datalen, NULL, 750 ((xs->xs_control & XS_CTL_NOSLEEP) ? 751 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | 752 BUS_DMA_STREAMING | 753 ((xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMA_READ : 754 BUS_DMA_WRITE)); 755 if (err) { 756 printf("%s: unable to load data DMA map: %d", 757 sc->sc_dev.dv_xname, err); 758 xs->error = XS_RESOURCE_SHORTAGE; 759 bus_dmamap_unload(sc->sc_dmat, cb->cmddma); 760 TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain); 761 scsipi_done(xs); 762 return; 763 } 764 bus_dmamap_sync(sc->sc_dmat, cb->datadma, 765 0, xs->datalen, 766 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 767 } 768 769 oosiop_setup_sgdma(sc, cb); 770 771 /* Setup msgout buffer */ 772 OOSIOP_XFERMSG_SYNC(sc, cb, 773 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 774 xfer->msgout[0] = MSG_IDENTIFY(cb->lun, 775 (xs->xs_control & XS_CTL_REQSENSE) == 0); 776 cb->msgoutlen = 1; 777 778 if (sc->sc_tgt[cb->id].flags & TGTF_SYNCNEG) { 779 /* Send SDTR */ 780 xfer->msgout[1] = MSG_EXTENDED; 781 xfer->msgout[2] = MSG_EXT_SDTR_LEN; 782 xfer->msgout[3] = MSG_EXT_SDTR; 783 xfer->msgout[4] = sc->sc_minperiod; 784 xfer->msgout[5] = OOSIOP_MAX_OFFSET; 785 cb->msgoutlen = 6; 786 sc->sc_tgt[cb->id].flags &= ~TGTF_SYNCNEG; 787 sc->sc_tgt[cb->id].flags |= TGTF_WAITSDTR; 788 } 789 790 xfer->status = SCSI_OOSIOP_NOSTATUS; 791 792 OOSIOP_XFERMSG_SYNC(sc, cb, 793 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 794 795 s = splbio(); 796 797 TAILQ_INSERT_TAIL(&sc->sc_cbq, cb, chain); 798 799 if (!sc->sc_active) { 800 /* Abort script to start selection */ 801 oosiop_write_1(sc, OOSIOP_ISTAT, OOSIOP_ISTAT_ABRT); 802 } 803 if (xs->xs_control & XS_CTL_POLL) { 804 /* Poll for command completion */ 805 while ((xs->xs_status & XS_STS_DONE) == 0) { 806 delay(1000); 807 oosiop_intr(sc); 808 } 809 } 810 811 splx(s); 812 813 return; 814 815 case ADAPTER_REQ_GROW_RESOURCES: 816 return; 817 818 case ADAPTER_REQ_SET_XFER_MODE: 819 xm = arg; 820 if (xm->xm_mode & PERIPH_CAP_SYNC) 821 sc->sc_tgt[xm->xm_target].flags |= TGTF_SYNCNEG; 822 else 823 oosiop_set_syncparam(sc, xm->xm_target, 0, 0); 824 825 return; 826 } 827 } 828 829 static void 830 oosiop_done(struct oosiop_softc *sc, struct oosiop_cb *cb) 831 { 832 struct scsipi_xfer *xs; 833 834 xs = cb->xs; 835 if (cb == sc->sc_curcb) 836 sc->sc_curcb = NULL; 837 if (cb == sc->sc_lastcb) 838 sc->sc_lastcb = NULL; 839 sc->sc_tgt[cb->id].nexus = NULL; 840 841 callout_stop(&xs->xs_callout); 842 843 bus_dmamap_sync(sc->sc_dmat, cb->cmddma, 0, xs->cmdlen, 844 BUS_DMASYNC_POSTWRITE); 845 bus_dmamap_unload(sc->sc_dmat, cb->cmddma); 846 847 if (xs->datalen > 0) { 848 bus_dmamap_sync(sc->sc_dmat, cb->datadma, 0, xs->datalen, 849 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 850 bus_dmamap_unload(sc->sc_dmat, cb->datadma); 851 } 852 853 xs->status = cb->xfer->status; 854 xs->resid = 0; /* XXX */ 855 856 if (cb->flags & CBF_SELTOUT) 857 xs->error = XS_SELTIMEOUT; 858 else if (cb->flags & CBF_TIMEOUT) 859 xs->error = XS_TIMEOUT; 860 else switch (xs->status) { 861 case SCSI_OK: 862 xs->error = XS_NOERROR; 863 break; 864 865 case SCSI_BUSY: 866 case SCSI_CHECK: 867 xs->error = XS_BUSY; 868 break; 869 case SCSI_OOSIOP_NOSTATUS: 870 /* the status byte was not updated, cmd was aborted. */ 871 xs->error = XS_SELTIMEOUT; 872 break; 873 874 default: 875 xs->error = XS_RESET; 876 break; 877 } 878 879 scsipi_done(xs); 880 881 /* Put it on the free list. */ 882 TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain); 883 } 884 885 static void 886 oosiop_timeout(void *arg) 887 { 888 struct oosiop_cb *cb; 889 struct scsipi_periph *periph; 890 struct oosiop_softc *sc; 891 int s; 892 893 cb = arg; 894 periph = cb->xs->xs_periph; 895 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 896 scsipi_printaddr(periph); 897 printf("timed out\n"); 898 899 s = splbio(); 900 901 cb->flags |= CBF_TIMEOUT; 902 oosiop_done(sc, cb); 903 904 splx(s); 905 } 906 907 static void 908 oosiop_reset(struct oosiop_softc *sc) 909 { 910 int i, s; 911 912 s = splbio(); 913 914 /* Stop SCRIPTS processor */ 915 oosiop_write_1(sc, OOSIOP_ISTAT, OOSIOP_ISTAT_ABRT); 916 delay(100); 917 oosiop_write_1(sc, OOSIOP_ISTAT, 0); 918 919 /* Reset the chip */ 920 oosiop_write_1(sc, OOSIOP_DCNTL, sc->sc_dcntl | OOSIOP_DCNTL_RST); 921 delay(100); 922 oosiop_write_1(sc, OOSIOP_DCNTL, sc->sc_dcntl); 923 delay(10000); 924 925 /* Set up various chip parameters */ 926 oosiop_write_1(sc, OOSIOP_SCNTL0, OOSIOP_ARB_FULL | OOSIOP_SCNTL0_EPG); 927 oosiop_write_1(sc, OOSIOP_SCNTL1, OOSIOP_SCNTL1_ESR); 928 oosiop_write_1(sc, OOSIOP_DCNTL, sc->sc_dcntl); 929 oosiop_write_1(sc, OOSIOP_DMODE, OOSIOP_DMODE_BL_8); 930 oosiop_write_1(sc, OOSIOP_SCID, OOSIOP_SCID_VALUE(sc->sc_id)); 931 oosiop_write_1(sc, OOSIOP_DWT, 0xff); /* Enable DMA timeout */ 932 oosiop_write_1(sc, OOSIOP_CTEST7, 0); 933 oosiop_write_1(sc, OOSIOP_SXFER, 0); 934 935 /* Clear all interrupts */ 936 (void)oosiop_read_1(sc, OOSIOP_SSTAT0); 937 (void)oosiop_read_1(sc, OOSIOP_SSTAT1); 938 (void)oosiop_read_1(sc, OOSIOP_DSTAT); 939 940 /* Enable interrupts */ 941 oosiop_write_1(sc, OOSIOP_SIEN, 942 OOSIOP_SIEN_M_A | OOSIOP_SIEN_STO | OOSIOP_SIEN_SGE | 943 OOSIOP_SIEN_UDC | OOSIOP_SIEN_RST | OOSIOP_SIEN_PAR); 944 oosiop_write_1(sc, OOSIOP_DIEN, 945 OOSIOP_DIEN_ABRT | OOSIOP_DIEN_SSI | OOSIOP_DIEN_SIR | 946 OOSIOP_DIEN_WTD | OOSIOP_DIEN_IID); 947 948 /* Set target state to asynchronous */ 949 for (i = 0; i < OOSIOP_NTGT; i++) { 950 sc->sc_tgt[i].flags = 0; 951 sc->sc_tgt[i].scf = 0; 952 sc->sc_tgt[i].sxfer = 0; 953 } 954 955 splx(s); 956 } 957 958 static void 959 oosiop_reset_bus(struct oosiop_softc *sc) 960 { 961 int s, i; 962 963 s = splbio(); 964 965 /* Assert SCSI RST */ 966 oosiop_write_1(sc, OOSIOP_SCNTL1, OOSIOP_SCNTL1_RST); 967 delay(25); /* Reset hold time (25us) */ 968 oosiop_write_1(sc, OOSIOP_SCNTL1, 0); 969 970 /* Remove all nexuses */ 971 for (i = 0; i < OOSIOP_NTGT; i++) { 972 if (sc->sc_tgt[i].nexus) { 973 sc->sc_tgt[i].nexus->xfer->status = 974 SCSI_OOSIOP_NOSTATUS; /* XXX */ 975 oosiop_done(sc, sc->sc_tgt[i].nexus); 976 } 977 } 978 979 sc->sc_curcb = NULL; 980 981 delay(250000); /* Reset to selection (250ms) */ 982 983 splx(s); 984 } 985 986 /* 987 * interrupt handler 988 */ 989 int 990 oosiop_intr(struct oosiop_softc *sc) 991 { 992 struct oosiop_cb *cb; 993 u_int32_t dcmd; 994 int timeout; 995 u_int8_t istat, dstat, sstat0; 996 997 istat = oosiop_read_1(sc, OOSIOP_ISTAT); 998 999 if ((istat & (OOSIOP_ISTAT_SIP | OOSIOP_ISTAT_DIP)) == 0) 1000 return (0); 1001 1002 sc->sc_nextdsp = Ent_wait_reselect; 1003 1004 /* DMA interrupts */ 1005 if (istat & OOSIOP_ISTAT_DIP) { 1006 oosiop_write_1(sc, OOSIOP_ISTAT, 0); 1007 1008 dstat = oosiop_read_1(sc, OOSIOP_DSTAT); 1009 1010 if (dstat & OOSIOP_DSTAT_ABRT) { 1011 sc->sc_nextdsp = oosiop_read_4(sc, OOSIOP_DSP) - 1012 sc->sc_scrbase - 8; 1013 1014 if (sc->sc_nextdsp == Ent_p_resel_msgin_move && 1015 (oosiop_read_1(sc, OOSIOP_SBCL) & OOSIOP_ACK)) { 1016 if ((dstat & OOSIOP_DSTAT_DFE) == 0) 1017 oosiop_flush_fifo(sc); 1018 sc->sc_nextdsp += 8; 1019 } 1020 } 1021 1022 if (dstat & OOSIOP_DSTAT_SSI) { 1023 sc->sc_nextdsp = oosiop_read_4(sc, OOSIOP_DSP) - 1024 sc->sc_scrbase; 1025 printf("%s: single step %08x\n", sc->sc_dev.dv_xname, 1026 sc->sc_nextdsp); 1027 } 1028 1029 if (dstat & OOSIOP_DSTAT_SIR) { 1030 if ((dstat & OOSIOP_DSTAT_DFE) == 0) 1031 oosiop_flush_fifo(sc); 1032 oosiop_scriptintr(sc); 1033 } 1034 1035 if (dstat & OOSIOP_DSTAT_WTD) { 1036 printf("%s: DMA time out\n", sc->sc_dev.dv_xname); 1037 oosiop_reset(sc); 1038 } 1039 1040 if (dstat & OOSIOP_DSTAT_IID) { 1041 dcmd = oosiop_read_4(sc, OOSIOP_DBC); 1042 if ((dcmd & 0xf8000000) == 0x48000000) { 1043 printf("%s: REQ asserted on WAIT DISCONNECT\n", 1044 sc->sc_dev.dv_xname); 1045 sc->sc_nextdsp = Ent_phasedispatch; /* XXX */ 1046 } else { 1047 printf("%s: invalid SCRIPTS instruction " 1048 "addr=%08x dcmd=%08x dsps=%08x\n", 1049 sc->sc_dev.dv_xname, 1050 oosiop_read_4(sc, OOSIOP_DSP) - 8, dcmd, 1051 oosiop_read_4(sc, OOSIOP_DSPS)); 1052 oosiop_reset(sc); 1053 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE); 1054 oosiop_load_script(sc); 1055 } 1056 } 1057 1058 if ((dstat & OOSIOP_DSTAT_DFE) == 0) 1059 oosiop_clear_fifo(sc); 1060 } 1061 1062 /* SCSI interrupts */ 1063 if (istat & OOSIOP_ISTAT_SIP) { 1064 if (istat & OOSIOP_ISTAT_DIP) 1065 delay(1); 1066 sstat0 = oosiop_read_1(sc, OOSIOP_SSTAT0); 1067 1068 if (sstat0 & OOSIOP_SSTAT0_M_A) { 1069 /* SCSI phase mismatch during MOVE operation */ 1070 oosiop_phasemismatch(sc); 1071 sc->sc_nextdsp = Ent_phasedispatch; 1072 } 1073 1074 if (sstat0 & OOSIOP_SSTAT0_STO) { 1075 if (sc->sc_curcb) { 1076 sc->sc_curcb->flags |= CBF_SELTOUT; 1077 oosiop_done(sc, sc->sc_curcb); 1078 } 1079 } 1080 1081 if (sstat0 & OOSIOP_SSTAT0_SGE) { 1082 printf("%s: SCSI gross error\n", sc->sc_dev.dv_xname); 1083 oosiop_reset(sc); 1084 } 1085 1086 if (sstat0 & OOSIOP_SSTAT0_UDC) { 1087 /* XXX */ 1088 if (sc->sc_curcb) { 1089 printf("%s: unexpected disconnect\n", 1090 sc->sc_dev.dv_xname); 1091 oosiop_done(sc, sc->sc_curcb); 1092 } 1093 } 1094 1095 if (sstat0 & OOSIOP_SSTAT0_RST) 1096 oosiop_reset(sc); 1097 1098 if (sstat0 & OOSIOP_SSTAT0_PAR) 1099 printf("%s: parity error\n", sc->sc_dev.dv_xname); 1100 } 1101 1102 /* Start next command if available */ 1103 if (sc->sc_nextdsp == Ent_wait_reselect && TAILQ_FIRST(&sc->sc_cbq)) { 1104 cb = sc->sc_curcb = TAILQ_FIRST(&sc->sc_cbq); 1105 TAILQ_REMOVE(&sc->sc_cbq, cb, chain); 1106 sc->sc_tgt[cb->id].nexus = cb; 1107 1108 oosiop_setup_dma(sc); 1109 oosiop_setup_syncxfer(sc); 1110 sc->sc_lastcb = cb; 1111 sc->sc_nextdsp = Ent_start_select; 1112 1113 /* Schedule timeout */ 1114 if ((cb->xs->xs_control & XS_CTL_POLL) == 0) { 1115 timeout = mstohz(cb->xs->timeout) + 1; 1116 callout_reset(&cb->xs->xs_callout, timeout, 1117 oosiop_timeout, cb); 1118 } 1119 } 1120 1121 sc->sc_active = (sc->sc_nextdsp != Ent_wait_reselect); 1122 1123 /* Restart script */ 1124 oosiop_write_4(sc, OOSIOP_DSP, sc->sc_nextdsp + sc->sc_scrbase); 1125 1126 return (1); 1127 } 1128 1129 static void 1130 oosiop_scriptintr(struct oosiop_softc *sc) 1131 { 1132 struct oosiop_cb *cb; 1133 u_int32_t icode; 1134 u_int32_t dsp; 1135 int i; 1136 u_int8_t sfbr, resid, resmsg; 1137 1138 cb = sc->sc_curcb; 1139 icode = oosiop_read_4(sc, OOSIOP_DSPS); 1140 1141 switch (icode) { 1142 case A_int_done: 1143 if (cb) 1144 oosiop_done(sc, cb); 1145 break; 1146 1147 case A_int_msgin: 1148 if (cb) 1149 oosiop_msgin(sc, cb); 1150 break; 1151 1152 case A_int_extmsg: 1153 /* extended message in DMA setup request */ 1154 sfbr = oosiop_read_1(sc, OOSIOP_SFBR); 1155 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE); 1156 oosiop_fixup_move(sc, Ent_p_extmsgin_move, sfbr, 1157 cb->xferdma->dm_segs[0].ds_addr + 1158 offsetof(struct oosiop_xfer, msgin[2])); 1159 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE); 1160 sc->sc_nextdsp = Ent_rcv_extmsg; 1161 break; 1162 1163 case A_int_resel: 1164 /* reselected */ 1165 resid = oosiop_read_1(sc, OOSIOP_SFBR); 1166 for (i = 0; i < OOSIOP_NTGT; i++) 1167 if (resid & (1 << i)) 1168 break; 1169 if (i == OOSIOP_NTGT) { 1170 printf("%s: missing reselection target id\n", 1171 sc->sc_dev.dv_xname); 1172 break; 1173 } 1174 sc->sc_resid = i; 1175 sc->sc_nextdsp = Ent_wait_resel_identify; 1176 1177 if (cb) { 1178 /* Current command was lost arbitration */ 1179 sc->sc_tgt[cb->id].nexus = NULL; 1180 TAILQ_INSERT_HEAD(&sc->sc_cbq, cb, chain); 1181 sc->sc_curcb = NULL; 1182 } 1183 1184 break; 1185 1186 case A_int_res_id: 1187 cb = sc->sc_tgt[sc->sc_resid].nexus; 1188 resmsg = oosiop_read_1(sc, OOSIOP_SFBR); 1189 if (MSG_ISIDENTIFY(resmsg) && cb && 1190 (resmsg & MSG_IDENTIFY_LUNMASK) == cb->lun) { 1191 sc->sc_curcb = cb; 1192 if (cb != sc->sc_lastcb) { 1193 oosiop_setup_dma(sc); 1194 oosiop_setup_syncxfer(sc); 1195 sc->sc_lastcb = cb; 1196 } 1197 if (cb->curdp != cb->savedp) { 1198 cb->curdp = cb->savedp; 1199 oosiop_setup_sgdma(sc, cb); 1200 } 1201 sc->sc_nextdsp = Ent_ack_msgin; 1202 } else { 1203 /* Reselection from invalid target */ 1204 oosiop_reset_bus(sc); 1205 } 1206 break; 1207 1208 case A_int_resfail: 1209 /* reselect failed */ 1210 break; 1211 1212 case A_int_disc: 1213 /* disconnected */ 1214 sc->sc_curcb = NULL; 1215 break; 1216 1217 case A_int_err: 1218 /* generic error */ 1219 dsp = oosiop_read_4(sc, OOSIOP_DSP); 1220 printf("%s: script error at 0x%08x\n", sc->sc_dev.dv_xname, 1221 dsp - 8); 1222 sc->sc_curcb = NULL; 1223 break; 1224 1225 case DATAIN_TRAP: 1226 printf("%s: unexpected datain\n", sc->sc_dev.dv_xname); 1227 /* XXX: need to reset? */ 1228 break; 1229 1230 case DATAOUT_TRAP: 1231 printf("%s: unexpected dataout\n", sc->sc_dev.dv_xname); 1232 /* XXX: need to reset? */ 1233 break; 1234 1235 default: 1236 printf("%s: unknown intr code %08x\n", sc->sc_dev.dv_xname, 1237 icode); 1238 break; 1239 } 1240 } 1241 1242 static void 1243 oosiop_msgin(struct oosiop_softc *sc, struct oosiop_cb *cb) 1244 { 1245 struct oosiop_xfer *xfer; 1246 int msgout; 1247 1248 xfer = cb->xfer; 1249 sc->sc_nextdsp = Ent_ack_msgin; 1250 msgout = 0; 1251 1252 OOSIOP_XFERMSG_SYNC(sc, cb, 1253 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1254 1255 switch (xfer->msgin[0]) { 1256 case MSG_EXTENDED: 1257 switch (xfer->msgin[2]) { 1258 case MSG_EXT_SDTR: 1259 if (sc->sc_tgt[cb->id].flags & TGTF_WAITSDTR) { 1260 /* Host initiated SDTR */ 1261 sc->sc_tgt[cb->id].flags &= ~TGTF_WAITSDTR; 1262 } else { 1263 /* Target initiated SDTR */ 1264 if (xfer->msgin[3] < sc->sc_minperiod) 1265 xfer->msgin[3] = sc->sc_minperiod; 1266 if (xfer->msgin[4] > OOSIOP_MAX_OFFSET) 1267 xfer->msgin[4] = OOSIOP_MAX_OFFSET; 1268 xfer->msgout[0] = MSG_EXTENDED; 1269 xfer->msgout[1] = MSG_EXT_SDTR_LEN; 1270 xfer->msgout[2] = MSG_EXT_SDTR; 1271 xfer->msgout[3] = xfer->msgin[3]; 1272 xfer->msgout[4] = xfer->msgin[4]; 1273 cb->msgoutlen = 5; 1274 msgout = 1; 1275 } 1276 oosiop_set_syncparam(sc, cb->id, (int)xfer->msgin[3], 1277 (int)xfer->msgin[4]); 1278 oosiop_setup_syncxfer(sc); 1279 break; 1280 1281 default: 1282 /* Reject message */ 1283 xfer->msgout[0] = MSG_MESSAGE_REJECT; 1284 cb->msgoutlen = 1; 1285 msgout = 1; 1286 break; 1287 } 1288 break; 1289 1290 case MSG_SAVEDATAPOINTER: 1291 cb->savedp = cb->curdp; 1292 break; 1293 1294 case MSG_RESTOREPOINTERS: 1295 if (cb->curdp != cb->savedp) { 1296 cb->curdp = cb->savedp; 1297 oosiop_setup_sgdma(sc, cb); 1298 } 1299 break; 1300 1301 case MSG_MESSAGE_REJECT: 1302 if (sc->sc_tgt[cb->id].flags & TGTF_WAITSDTR) { 1303 /* SDTR rejected */ 1304 sc->sc_tgt[cb->id].flags &= ~TGTF_WAITSDTR; 1305 oosiop_set_syncparam(sc, cb->id, 0, 0); 1306 oosiop_setup_syncxfer(sc); 1307 } 1308 break; 1309 1310 default: 1311 /* Reject message */ 1312 xfer->msgout[0] = MSG_MESSAGE_REJECT; 1313 cb->msgoutlen = 1; 1314 msgout = 1; 1315 } 1316 1317 OOSIOP_XFERMSG_SYNC(sc, cb, 1318 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1319 1320 if (msgout) { 1321 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE); 1322 oosiop_fixup_move(sc, Ent_p_msgout_move, cb->msgoutlen, 1323 cb->xferdma->dm_segs[0].ds_addr + 1324 offsetof(struct oosiop_xfer, msgout[0])); 1325 OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE); 1326 sc->sc_nextdsp = Ent_sendmsg; 1327 } 1328 } 1329
Indexes created Mon Sep 22 13:09:51 GMT 2025