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      1  1.3  andvar /*	$NetBSD: pcf8584reg.h,v 1.3 2025/01/05 22:11:18 andvar Exp $ */
      2  1.1     tnn 
      3  1.1     tnn /* Written by Tobias Nygren. Released into the public domain. */
      4  1.1     tnn 
      5  1.1     tnn /* SCL clock frequency */
      6  1.1     tnn #define	PCF8584_SCL_90		0 	/* 90 kHz */
      7  1.1     tnn #define	PCF8584_SCL_45		1 	/* 45 kHz */
      8  1.1     tnn #define	PCF8584_SCL_11		2	/* 11 kHz */
      9  1.1     tnn #define	PCF8584_SCL_1_5		3	/* 1.5 kHz */
     10  1.1     tnn 
     11  1.1     tnn /* Internal clock frequency */
     12  1.1     tnn #define	PCF8584_CLK_3		0	/* 3 MHz */
     13  1.1     tnn #define	PCF8584_CLK_4_43	0x10	/* 4.43 MHz */
     14  1.1     tnn #define	PCF8584_CLK_6		0x14	/* 6 MHz */
     15  1.1     tnn #define	PCF8584_CLK_8		0x18	/* 8 MHz */
     16  1.1     tnn #define	PCF8584_CLK_12		0x1C	/* 12 MHz */
     17  1.1     tnn 
     18  1.1     tnn /* Control register bits (write only) */
     19  1.1     tnn #define	PCF8584_CTRL_ACK	(1<<0)	/* send ACK */
     20  1.1     tnn #define	PCF8584_CTRL_STO	(1<<1)	/* send STOP */
     21  1.1     tnn #define	PCF8584_CTRL_STA	(1<<2)	/* send START */
     22  1.1     tnn #define	PCF8584_CTRL_ENI	(1<<3)	/* Enable Interrupt */
     23  1.1     tnn #define	PCF8584_CTRL_ES2	(1<<4)	/* alternate register selection */
     24  1.1     tnn #define	PCF8584_CTRL_ES1	(1<<5)	/* alternate register selection */
     25  1.1     tnn #define	PCF8584_CTRL_ESO	(1<<6)	/* Enable Serial Output */
     26  1.1     tnn #define	PCF8584_CTRL_PIN	(1<<7)	/* Pending Interrupt Not */
     27  1.1     tnn 
     28  1.1     tnn /* Status register bits (read only) */
     29  1.1     tnn #define	PCF8584_STATUS_BBN	(1<<0)	/* Bus Busy Not */
     30  1.1     tnn #define	PCF8584_STATUS_LAB	(1<<1)	/* Lost Arbitration */
     31  1.3  andvar #define	PCF8584_STATUS_AAS	(1<<2)	/* Addressed As Slave */
     32  1.1     tnn #define	PCF8584_STATUS_LRB	(1<<3)	/* Last Received Bit (NAK+bcast det.) */
     33  1.1     tnn #define	PCF8584_STATUS_BER	(1<<4)	/* Bus error */
     34  1.1     tnn #define	PCF8584_STATUS_STS	(1<<5)	/* external STOP condition detected */
     35  1.1     tnn #define	PCF8584_STATUS_INI	(1<<6)	/* 0 if initialized */
     36  1.1     tnn #define	PCF8584_STATUS_PIN	(1<<7)	/* Pending Interrupt Not */
     37  1.1     tnn 
     38  1.1     tnn #define	PCF8584_REG_S0_		0			/* S0' own address */
     39  1.1     tnn #define	PCF8584_REG_S2		PCF8584_CTRL_ES1	/* clock register */
     40  1.1     tnn #define	PCF8584_REG_S3		PCF8584_CTRL_ES2	/* Interrupt vector */
     41  1.1     tnn 
     42  1.2     jdc #define PCF8584_CMD_START	(PCF8584_CTRL_PIN | PCF8584_CTRL_ESO | \
     43  1.1     tnn     PCF8584_CTRL_STA | PCF8584_CTRL_ACK)
     44  1.2     jdc #define PCF8584_CMD_STOP	(PCF8584_CTRL_PIN | PCF8584_CTRL_ESO | \
     45  1.1     tnn     PCF8584_CTRL_STO | PCF8584_CTRL_ACK)
     46  1.2     jdc #define PCF8584_CMD_REPSTART    (PCF8584_CTRL_ESO | PCF8584_CTRL_STA | \
     47  1.2     jdc     PCF8584_CTRL_ACK)
     48  1.2     jdc #define PCF8584_CMD_IDLE        (PCF8584_CTRL_PIN | PCF8584_CTRL_ESO | \
     49  1.2     jdc     PCF8584_CTRL_ACK)
     50  1.1     tnn #define PCF8584_CMD_NAK (PCF8584_CTRL_ESO)
     51