rf3000reg.h revision 1.2 1 1.1 dyoung /* $NetBSD */
2 1.1 dyoung
3 1.1 dyoung /*
4 1.1 dyoung * Copyright (c) 2005 David Young. All rights reserved.
5 1.1 dyoung *
6 1.1 dyoung * This code was written by David Young.
7 1.1 dyoung *
8 1.1 dyoung * Redistribution and use in source and binary forms, with or without
9 1.1 dyoung * modification, are permitted provided that the following conditions
10 1.1 dyoung * are met:
11 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
12 1.1 dyoung * notice, this list of conditions and the following disclaimer.
13 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
15 1.1 dyoung * documentation and/or other materials provided with the distribution.
16 1.1 dyoung * 3. Neither the name of the author nor the names of any co-contributors
17 1.1 dyoung * may be used to endorse or promote products derived from this software
18 1.1 dyoung * without specific prior written permission.
19 1.1 dyoung *
20 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
21 1.1 dyoung * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 1.1 dyoung * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 1.1 dyoung * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
24 1.1 dyoung * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 1.1 dyoung * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
26 1.1 dyoung * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 dyoung * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 1.1 dyoung * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 1.1 dyoung * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 dyoung * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 1.1 dyoung * OF SUCH DAMAGE.
32 1.1 dyoung */
33 1.1 dyoung
34 1.1 dyoung #ifndef _DEV_IC_RF3000REG_H_
35 1.1 dyoung #define _DEV_IC_RF3000REG_H_
36 1.1 dyoung
37 1.1 dyoung /*
38 1.2 dyoung * Serial bus format for RF Microdevices RF3000 spread-spectrum
39 1.2 dyoung * baseband modem.
40 1.2 dyoung */
41 1.2 dyoung #define RF3000_TWI_DATA_MASK 0xff
42 1.2 dyoung #define RF3000_TWI_ADDR_MASK 0x7f
43 1.2 dyoung
44 1.2 dyoung /*
45 1.2 dyoung * Registers for RFMD RF3000.
46 1.1 dyoung */
47 1.1 dyoung #define RF3000_CTL 0x01 /* modem control */
48 1.1 dyoung #define RF3000_RXSTAT RF3000_CTL /* RX status */
49 1.1 dyoung #define RF3000_CTL_MODE_MASK BITS(7, 4)
50 1.1 dyoung #define RF3000_RXSTAT_ACQ BIT(2)
51 1.1 dyoung #define RF3000_RXSTAT_SFD BIT(1)
52 1.1 dyoung #define RF3000_RXSTAT_CRC BIT(0)
53 1.1 dyoung #define RF3000_CCACTL 0x02 /* CCA control */
54 1.1 dyoung /* CCA mode */
55 1.1 dyoung #define RF3000_CCACTL_MODE_MASK BITS(7, 6)
56 1.1 dyoung #define RF3000_CCACTL_MODE_RSSIT 0 /* RSSI threshold */
57 1.1 dyoung #define RF3000_CCACTL_MODE_ACQ 1 /* acquisition */
58 1.1 dyoung #define RF3000_CCACTL_MODE_BOTH 2 /* threshold or acq. */
59 1.1 dyoung /* RSSI threshold for CCA */
60 1.1 dyoung #define RF3000_CCACTL_RSSIT_MASK BITS(5, 0)
61 1.1 dyoung #define RF3000_DIVCTL 0x03 /* diversity control */
62 1.1 dyoung #define RF3000_DIVCTL_ENABLE BIT(7) /* enable diversity */
63 1.1 dyoung #define RF3000_DIVCTL_ANTSEL BIT(6) /* if ENABLE = 0, set
64 1.1 dyoung * ANT SEL
65 1.1 dyoung */
66 1.1 dyoung #define RF3000_RSSI RF3000_DIVCTL /* RSSI value */
67 1.1 dyoung #define RF3000_RSSI_MASK BITS(5, 0)
68 1.1 dyoung #define RF3000_GAINCTL 0x11 /* TX variable gain control */
69 1.1 dyoung #define RF3000_GAINCTL_TXVGC_MASK BITS(7, 2)
70 1.1 dyoung #define RF3000_GAINCTL_SCRAMBLER BIT(1)
71 1.1 dyoung #define RF3000_LOGAINCAL 0x14 /* low gain calibration */
72 1.1 dyoung #define RF3000_LOGAINCAL_CAL_MASK BITS(5, 0)
73 1.1 dyoung #define RF3000_HIGAINCAL 0x15 /* high gain calibration */
74 1.1 dyoung #define RF3000_HIGAINCAL_CAL_MASK BITS(5, 0)
75 1.1 dyoung #define RF3000_HIGAINCAL_DSSSPAD BIT(6) /* 6dB gain pad for DSSS
76 1.1 dyoung * modes (meaning?)
77 1.1 dyoung */
78 1.1 dyoung #define RF3000_OPTIONS1 0x1C /* Options Register 1 */
79 1.1 dyoung /* Saturation threshold is 4 + offset, where -3 <= offset <= 3.
80 1.1 dyoung * SAT_THRESH is the absolute value, SAT_THRESH_SIGN is the sign.
81 1.1 dyoung */
82 1.1 dyoung #define RF3000_OPTIONS1_SAT_THRESH_SIGN BIT(7)
83 1.1 dyoung #define RF3000_OPTIONS1_SAT_THRESH BITS(6,5)
84 1.1 dyoung #define RF3000_OPTIONS1_ALTAGC BIT(4) /* 1: retrigger AGC
85 1.1 dyoung * algorithm on ADC
86 1.1 dyoung * saturation
87 1.1 dyoung */
88 1.1 dyoung #define RF3000_OPTIONS1_ALTBUS BIT(3) /* 1: enable alternate
89 1.1 dyoung * Tx/Rx data bus
90 1.1 dyoung * interface.
91 1.1 dyoung */
92 1.1 dyoung #define RF3000_OPTIONS1_RESERVED0_MASK BITS(2,0)/* 0 */
93 1.1 dyoung
94 1.1 dyoung #define RF3000_OPTIONS2 0x1D /* Options Register 2 */
95 1.1 dyoung /* 1: delay next AGC 2us instead of 1us after a 1->0 LNAGS-pin transition. */
96 1.1 dyoung #define RF3000_OPTIONS2_LNAGS_DELAY BIT(7)
97 1.1 dyoung #define RF3000_OPTIONS2_RESERVED0_MASK BITS(6,3) /* 0 */
98 1.1 dyoung /* Threshold for AGC re-trigger. 0: high count, 1: low count. */
99 1.1 dyoung #define RF3000_OPTIONS2_RTG_THRESH BIT(2)
100 1.1 dyoung #define RF3000_OPTIONS2_RESERVED1_MASK BITS(1,0) /* 0 */
101 1.1 dyoung
102 1.1 dyoung #endif /* _DEV_IC_RF3000REG_H_ */
103