rs5c313.c revision 1.4
1 /* $NetBSD: rs5c313.c,v 1.4 2008/01/09 22:09:22 uwe Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: rs5c313.c,v 1.4 2008/01/09 22:09:22 uwe Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 #include <sys/kernel.h> 40 41 #include <dev/clock_subr.h> 42 43 #include <dev/ic/rs5c313reg.h> 44 #include <dev/ic/rs5c313var.h> 45 46 47 /* todr(9) methods */ 48 static int rs5c313_todr_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 49 static int rs5c313_todr_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 50 51 /* sugar for chip access */ 52 #define rtc_begin(sc) ((*sc->sc_ops->rs5c313_op_begin)(sc)) 53 #define rtc_ce(sc, onoff) ((*sc->sc_ops->rs5c313_op_ce)(sc, onoff)) 54 #define rtc_clk(sc, onoff) ((*sc->sc_ops->rs5c313_op_clk)(sc, onoff)) 55 #define rtc_dir(sc, output) ((*sc->sc_ops->rs5c313_op_dir)(sc, output)) 56 #define rtc_di(sc) ((*sc->sc_ops->rs5c313_op_read)(sc)) 57 #define rtc_do(sc, bit) ((*sc->sc_ops->rs5c313_op_write)(sc, bit)) 58 59 static int rs5c313_init(struct rs5c313_softc *); 60 static int rs5c313_read_reg(struct rs5c313_softc *, int); 61 static void rs5c313_write_reg(struct rs5c313_softc *, int, int); 62 63 64 void 65 rs5c313_attach(struct rs5c313_softc *sc) 66 { 67 68 aprint_naive("\n"); 69 aprint_normal(": real time clock\n"); 70 71 sc->sc_todr.cookie = sc; 72 sc->sc_todr.todr_gettime_ymdhms = rs5c313_todr_gettime_ymdhms; 73 sc->sc_todr.todr_settime_ymdhms = rs5c313_todr_settime_ymdhms; 74 75 sc->sc_todr.todr_gettime = NULL; 76 sc->sc_todr.todr_settime = NULL; 77 sc->sc_todr.todr_setwen = NULL; 78 79 if (rs5c313_init(sc) != 0) { 80 aprint_error_dev(&sc->sc_dev, "init failed\n"); 81 return; 82 } 83 84 todr_attach(&sc->sc_todr); 85 } 86 87 88 static int 89 rs5c313_init(struct rs5c313_softc *sc) 90 { 91 int status = 0; 92 int retry; 93 94 rtc_ce(sc, 0); 95 96 rtc_begin(sc); 97 rtc_ce(sc, 1); 98 99 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_XSTP) == 0) { 100 sc->sc_valid = 1; 101 goto done; 102 } 103 104 sc->sc_valid = 0; 105 aprint_error_dev(&sc->sc_dev, "time not valid\n"); 106 107 rs5c313_write_reg(sc, RS5C313_TINT, 0); 108 rs5c313_write_reg(sc, RS5C313_CTRL, (CTRL_BASE | CTRL_ADJ)); 109 110 for (retry = 1000; retry > 0; --retry) { 111 if (rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) 112 delay(1); 113 else 114 break; 115 } 116 117 if (retry == 0) { 118 status = EIO; 119 goto done; 120 } 121 122 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 123 124 done: 125 rtc_ce(sc, 0); 126 return status; 127 } 128 129 130 static int 131 rs5c313_todr_gettime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt) 132 { 133 struct rs5c313_softc *sc = todr->cookie; 134 int retry; 135 int s; 136 137 /* 138 * If chip had invalid data on init, don't bother reading 139 * bogus values, let todr(9) cope. 140 */ 141 if (sc->sc_valid == 0) 142 return EIO; 143 144 s = splhigh(); 145 146 rtc_begin(sc); 147 for (retry = 10; retry > 0; --retry) { 148 rtc_ce(sc, 1); 149 150 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 151 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0) 152 break; 153 154 rtc_ce(sc, 0); 155 delay(1); 156 } 157 158 if (retry == 0) { 159 splx(s); 160 return EIO; 161 } 162 163 #define RTCGET(x, y) \ 164 do { \ 165 int ones = rs5c313_read_reg(sc, RS5C313_ ## y ## 1); \ 166 int tens = rs5c313_read_reg(sc, RS5C313_ ## y ## 10); \ 167 dt->dt_ ## x = tens * 10 + ones; \ 168 } while (/* CONSTCOND */0) 169 170 RTCGET(sec, SEC); 171 RTCGET(min, MIN); 172 RTCGET(hour, HOUR); 173 RTCGET(day, DAY); 174 RTCGET(mon, MON); 175 RTCGET(year, YEAR); 176 #undef RTCGET 177 dt->dt_wday = rs5c313_read_reg(sc, RS5C313_WDAY); 178 179 rtc_ce(sc, 0); 180 splx(s); 181 182 183 dt->dt_year = (dt->dt_year % 100) + 1900; 184 if (dt->dt_year < POSIX_BASE_YEAR) { 185 dt->dt_year += 100; 186 } 187 188 return 0; 189 } 190 191 192 static int 193 rs5c313_todr_settime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt) 194 { 195 struct rs5c313_softc *sc = todr->cookie; 196 int retry; 197 int t; 198 int s; 199 200 s = splhigh(); 201 202 rtc_begin(sc); 203 for (retry = 10; retry > 0; --retry) { 204 rtc_ce(sc, 1); 205 206 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 207 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0) 208 break; 209 210 rtc_ce(sc, 0); 211 delay(1); 212 } 213 214 if (retry == 0) { 215 splx(s); 216 return EIO; 217 } 218 219 #define RTCSET(x, y) \ 220 do { \ 221 t = TOBCD(dt->dt_ ## y) & 0xff; \ 222 rs5c313_write_reg(sc, RS5C313_ ## x ## 1, t & 0x0f); \ 223 rs5c313_write_reg(sc, RS5C313_ ## x ## 10, (t >> 4) & 0x0f); \ 224 } while (/* CONSTCOND */0) 225 226 RTCSET(SEC, sec); 227 RTCSET(MIN, min); 228 RTCSET(HOUR, hour); 229 RTCSET(DAY, day); 230 RTCSET(MON, mon); 231 232 #undef RTCSET 233 234 t = dt->dt_year % 100; 235 t = TOBCD(t); 236 rs5c313_write_reg(sc, RS5C313_YEAR1, t & 0x0f); 237 rs5c313_write_reg(sc, RS5C313_YEAR10, (t >> 4) & 0x0f); 238 239 rs5c313_write_reg(sc, RS5C313_WDAY, dt->dt_wday); 240 241 rtc_ce(sc, 0); 242 splx(s); 243 244 sc->sc_valid = 1; 245 return 0; 246 } 247 248 249 static int 250 rs5c313_read_reg(struct rs5c313_softc *sc, int addr) 251 { 252 int data; 253 254 /* output */ 255 rtc_dir(sc, 1); 256 257 /* control */ 258 rtc_do(sc, 1); /* ignored */ 259 rtc_do(sc, 1); /* R/#W = 1(READ) */ 260 rtc_do(sc, 1); /* AD = 1 */ 261 rtc_do(sc, 0); /* DT = 0 */ 262 263 /* address */ 264 rtc_do(sc, addr & 0x8); /* A3 */ 265 rtc_do(sc, addr & 0x4); /* A2 */ 266 rtc_do(sc, addr & 0x2); /* A1 */ 267 rtc_do(sc, addr & 0x1); /* A0 */ 268 269 /* input */ 270 rtc_dir(sc, 0); 271 272 /* ignore */ 273 (void)rtc_di(sc); 274 (void)rtc_di(sc); 275 (void)rtc_di(sc); 276 (void)rtc_di(sc); 277 278 /* data */ 279 data = rtc_di(sc); /* D3 */ 280 data <<= 1; 281 data |= rtc_di(sc); /* D2 */ 282 data <<= 1; 283 data |= rtc_di(sc); /* D1 */ 284 data <<= 1; 285 data |= rtc_di(sc); /* D0 */ 286 287 return data; 288 } 289 290 291 static void 292 rs5c313_write_reg(struct rs5c313_softc *sc, int addr, int data) 293 { 294 295 /* output */ 296 rtc_dir(sc, 1); 297 298 /* control */ 299 rtc_do(sc, 1); /* ignored */ 300 rtc_do(sc, 0); /* R/#W = 0 (WRITE) */ 301 rtc_do(sc, 1); /* AD = 1 */ 302 rtc_do(sc, 0); /* DT = 0 */ 303 304 /* address */ 305 rtc_do(sc, addr & 0x8); /* A3 */ 306 rtc_do(sc, addr & 0x4); /* A2 */ 307 rtc_do(sc, addr & 0x2); /* A1 */ 308 rtc_do(sc, addr & 0x1); /* A0 */ 309 310 /* control */ 311 rtc_do(sc, 1); /* ignored */ 312 rtc_do(sc, 0); /* R/#W = 0(WRITE) */ 313 rtc_do(sc, 0); /* AD = 0 */ 314 rtc_do(sc, 1); /* DT = 1 */ 315 316 /* data */ 317 rtc_do(sc, data & 0x8); /* D3 */ 318 rtc_do(sc, data & 0x4); /* D2 */ 319 rtc_do(sc, data & 0x2); /* D1 */ 320 rtc_do(sc, data & 0x1); /* D0 */ 321 } 322
Indexes created Thu Sep 25 02:09:54 GMT 2025