rs5c313.c revision 1.5
1 /* $NetBSD: rs5c313.c,v 1.5 2008/01/09 22:20:40 uwe Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: rs5c313.c,v 1.5 2008/01/09 22:20:40 uwe Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 #include <sys/kernel.h> 40 41 #include <dev/clock_subr.h> 42 43 #include <dev/ic/rs5c313reg.h> 44 #include <dev/ic/rs5c313var.h> 45 46 47 /* todr(9) methods */ 48 static int rs5c313_todr_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 49 static int rs5c313_todr_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 50 51 /* sugar for chip access */ 52 #define rtc_begin(sc) ((*sc->sc_ops->rs5c313_op_begin)(sc)) 53 #define rtc_ce(sc, onoff) ((*sc->sc_ops->rs5c313_op_ce)(sc, onoff)) 54 #define rtc_clk(sc, onoff) ((*sc->sc_ops->rs5c313_op_clk)(sc, onoff)) 55 #define rtc_dir(sc, output) ((*sc->sc_ops->rs5c313_op_dir)(sc, output)) 56 #define rtc_di(sc) ((*sc->sc_ops->rs5c313_op_read)(sc)) 57 #define rtc_do(sc, bit) ((*sc->sc_ops->rs5c313_op_write)(sc, bit)) 58 59 static int rs5c313_init(struct rs5c313_softc *); 60 static int rs5c313_read_reg(struct rs5c313_softc *, int); 61 static void rs5c313_write_reg(struct rs5c313_softc *, int, int); 62 63 64 void 65 rs5c313_attach(struct rs5c313_softc *sc) 66 { 67 68 aprint_naive("\n"); 69 aprint_normal(": real time clock\n"); 70 71 sc->sc_todr.cookie = sc; 72 sc->sc_todr.todr_gettime_ymdhms = rs5c313_todr_gettime_ymdhms; 73 sc->sc_todr.todr_settime_ymdhms = rs5c313_todr_settime_ymdhms; 74 75 if (rs5c313_init(sc) != 0) { 76 aprint_error_dev(&sc->sc_dev, "init failed\n"); 77 return; 78 } 79 80 todr_attach(&sc->sc_todr); 81 } 82 83 84 static int 85 rs5c313_init(struct rs5c313_softc *sc) 86 { 87 int status = 0; 88 int retry; 89 90 rtc_ce(sc, 0); 91 92 rtc_begin(sc); 93 rtc_ce(sc, 1); 94 95 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_XSTP) == 0) { 96 sc->sc_valid = 1; 97 goto done; 98 } 99 100 sc->sc_valid = 0; 101 aprint_error_dev(&sc->sc_dev, "time not valid\n"); 102 103 rs5c313_write_reg(sc, RS5C313_TINT, 0); 104 rs5c313_write_reg(sc, RS5C313_CTRL, (CTRL_BASE | CTRL_ADJ)); 105 106 for (retry = 1000; retry > 0; --retry) { 107 if (rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) 108 delay(1); 109 else 110 break; 111 } 112 113 if (retry == 0) { 114 status = EIO; 115 goto done; 116 } 117 118 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 119 120 done: 121 rtc_ce(sc, 0); 122 return status; 123 } 124 125 126 static int 127 rs5c313_todr_gettime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt) 128 { 129 struct rs5c313_softc *sc = todr->cookie; 130 int retry; 131 int s; 132 133 /* 134 * If chip had invalid data on init, don't bother reading 135 * bogus values, let todr(9) cope. 136 */ 137 if (sc->sc_valid == 0) 138 return EIO; 139 140 s = splhigh(); 141 142 rtc_begin(sc); 143 for (retry = 10; retry > 0; --retry) { 144 rtc_ce(sc, 1); 145 146 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 147 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0) 148 break; 149 150 rtc_ce(sc, 0); 151 delay(1); 152 } 153 154 if (retry == 0) { 155 splx(s); 156 return EIO; 157 } 158 159 #define RTCGET(x, y) \ 160 do { \ 161 int ones = rs5c313_read_reg(sc, RS5C313_ ## y ## 1); \ 162 int tens = rs5c313_read_reg(sc, RS5C313_ ## y ## 10); \ 163 dt->dt_ ## x = tens * 10 + ones; \ 164 } while (/* CONSTCOND */0) 165 166 RTCGET(sec, SEC); 167 RTCGET(min, MIN); 168 RTCGET(hour, HOUR); 169 RTCGET(day, DAY); 170 RTCGET(mon, MON); 171 RTCGET(year, YEAR); 172 #undef RTCGET 173 dt->dt_wday = rs5c313_read_reg(sc, RS5C313_WDAY); 174 175 rtc_ce(sc, 0); 176 splx(s); 177 178 179 dt->dt_year = (dt->dt_year % 100) + 1900; 180 if (dt->dt_year < POSIX_BASE_YEAR) { 181 dt->dt_year += 100; 182 } 183 184 return 0; 185 } 186 187 188 static int 189 rs5c313_todr_settime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt) 190 { 191 struct rs5c313_softc *sc = todr->cookie; 192 int retry; 193 int t; 194 int s; 195 196 s = splhigh(); 197 198 rtc_begin(sc); 199 for (retry = 10; retry > 0; --retry) { 200 rtc_ce(sc, 1); 201 202 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 203 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0) 204 break; 205 206 rtc_ce(sc, 0); 207 delay(1); 208 } 209 210 if (retry == 0) { 211 splx(s); 212 return EIO; 213 } 214 215 #define RTCSET(x, y) \ 216 do { \ 217 t = TOBCD(dt->dt_ ## y) & 0xff; \ 218 rs5c313_write_reg(sc, RS5C313_ ## x ## 1, t & 0x0f); \ 219 rs5c313_write_reg(sc, RS5C313_ ## x ## 10, (t >> 4) & 0x0f); \ 220 } while (/* CONSTCOND */0) 221 222 RTCSET(SEC, sec); 223 RTCSET(MIN, min); 224 RTCSET(HOUR, hour); 225 RTCSET(DAY, day); 226 RTCSET(MON, mon); 227 228 #undef RTCSET 229 230 t = dt->dt_year % 100; 231 t = TOBCD(t); 232 rs5c313_write_reg(sc, RS5C313_YEAR1, t & 0x0f); 233 rs5c313_write_reg(sc, RS5C313_YEAR10, (t >> 4) & 0x0f); 234 235 rs5c313_write_reg(sc, RS5C313_WDAY, dt->dt_wday); 236 237 rtc_ce(sc, 0); 238 splx(s); 239 240 sc->sc_valid = 1; 241 return 0; 242 } 243 244 245 static int 246 rs5c313_read_reg(struct rs5c313_softc *sc, int addr) 247 { 248 int data; 249 250 /* output */ 251 rtc_dir(sc, 1); 252 253 /* control */ 254 rtc_do(sc, 1); /* ignored */ 255 rtc_do(sc, 1); /* R/#W = 1(READ) */ 256 rtc_do(sc, 1); /* AD = 1 */ 257 rtc_do(sc, 0); /* DT = 0 */ 258 259 /* address */ 260 rtc_do(sc, addr & 0x8); /* A3 */ 261 rtc_do(sc, addr & 0x4); /* A2 */ 262 rtc_do(sc, addr & 0x2); /* A1 */ 263 rtc_do(sc, addr & 0x1); /* A0 */ 264 265 /* input */ 266 rtc_dir(sc, 0); 267 268 /* ignore */ 269 (void)rtc_di(sc); 270 (void)rtc_di(sc); 271 (void)rtc_di(sc); 272 (void)rtc_di(sc); 273 274 /* data */ 275 data = rtc_di(sc); /* D3 */ 276 data <<= 1; 277 data |= rtc_di(sc); /* D2 */ 278 data <<= 1; 279 data |= rtc_di(sc); /* D1 */ 280 data <<= 1; 281 data |= rtc_di(sc); /* D0 */ 282 283 return data; 284 } 285 286 287 static void 288 rs5c313_write_reg(struct rs5c313_softc *sc, int addr, int data) 289 { 290 291 /* output */ 292 rtc_dir(sc, 1); 293 294 /* control */ 295 rtc_do(sc, 1); /* ignored */ 296 rtc_do(sc, 0); /* R/#W = 0 (WRITE) */ 297 rtc_do(sc, 1); /* AD = 1 */ 298 rtc_do(sc, 0); /* DT = 0 */ 299 300 /* address */ 301 rtc_do(sc, addr & 0x8); /* A3 */ 302 rtc_do(sc, addr & 0x4); /* A2 */ 303 rtc_do(sc, addr & 0x2); /* A1 */ 304 rtc_do(sc, addr & 0x1); /* A0 */ 305 306 /* control */ 307 rtc_do(sc, 1); /* ignored */ 308 rtc_do(sc, 0); /* R/#W = 0(WRITE) */ 309 rtc_do(sc, 0); /* AD = 0 */ 310 rtc_do(sc, 1); /* DT = 1 */ 311 312 /* data */ 313 rtc_do(sc, data & 0x8); /* D3 */ 314 rtc_do(sc, data & 0x4); /* D2 */ 315 rtc_do(sc, data & 0x2); /* D1 */ 316 rtc_do(sc, data & 0x1); /* D0 */ 317 } 318
Indexes created Wed Oct 22 13:09:56 GMT 2025