rs5c313.c revision 1.7
1 /* $NetBSD: rs5c313.c,v 1.7 2008/03/27 02:15:29 uwe Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: rs5c313.c,v 1.7 2008/03/27 02:15:29 uwe Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 #include <sys/kernel.h> 40 41 #include <dev/clock_subr.h> 42 43 #include <dev/ic/rs5c313reg.h> 44 #include <dev/ic/rs5c313var.h> 45 46 47 /* todr(9) methods */ 48 static int rs5c313_todr_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 49 static int rs5c313_todr_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 50 51 /* sugar for chip access */ 52 #define rtc_begin(sc) ((*sc->sc_ops->rs5c313_op_begin)(sc)) 53 #define rtc_ce(sc, onoff) ((*sc->sc_ops->rs5c313_op_ce)(sc, onoff)) 54 #define rtc_clk(sc, onoff) ((*sc->sc_ops->rs5c313_op_clk)(sc, onoff)) 55 #define rtc_dir(sc, output) ((*sc->sc_ops->rs5c313_op_dir)(sc, output)) 56 #define rtc_di(sc) ((*sc->sc_ops->rs5c313_op_read)(sc)) 57 #define rtc_do(sc, bit) ((*sc->sc_ops->rs5c313_op_write)(sc, bit)) 58 59 static int rs5c313_init(struct rs5c313_softc *); 60 static int rs5c313_read_reg(struct rs5c313_softc *, int); 61 static void rs5c313_write_reg(struct rs5c313_softc *, int, int); 62 63 64 void 65 rs5c313_attach(struct rs5c313_softc *sc) 66 { 67 device_t self = sc->sc_dev; 68 69 aprint_naive("\n"); 70 aprint_normal(": real time clock\n"); 71 72 sc->sc_todr.cookie = sc; 73 sc->sc_todr.todr_gettime_ymdhms = rs5c313_todr_gettime_ymdhms; 74 sc->sc_todr.todr_settime_ymdhms = rs5c313_todr_settime_ymdhms; 75 76 if (rs5c313_init(sc) != 0) { 77 aprint_error_dev(self, "init failed\n"); 78 return; 79 } 80 81 todr_attach(&sc->sc_todr); 82 } 83 84 85 static int 86 rs5c313_init(struct rs5c313_softc *sc) 87 { 88 device_t self = sc->sc_dev; 89 int status = 0; 90 int retry; 91 92 rtc_ce(sc, 0); 93 94 rtc_begin(sc); 95 rtc_ce(sc, 1); 96 97 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_XSTP) == 0) { 98 sc->sc_valid = 1; 99 goto done; 100 } 101 102 sc->sc_valid = 0; 103 aprint_error_dev(self, "time not valid\n"); 104 105 rs5c313_write_reg(sc, RS5C313_TINT, 0); 106 rs5c313_write_reg(sc, RS5C313_CTRL, (CTRL_BASE | CTRL_ADJ)); 107 108 for (retry = 1000; retry > 0; --retry) { 109 if (rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) 110 delay(1); 111 else 112 break; 113 } 114 115 if (retry == 0) { 116 status = EIO; 117 goto done; 118 } 119 120 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 121 122 done: 123 rtc_ce(sc, 0); 124 return status; 125 } 126 127 128 static int 129 rs5c313_todr_gettime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt) 130 { 131 struct rs5c313_softc *sc = todr->cookie; 132 int retry; 133 int s; 134 135 /* 136 * If chip had invalid data on init, don't bother reading 137 * bogus values, let todr(9) cope. 138 */ 139 if (sc->sc_valid == 0) 140 return EIO; 141 142 s = splhigh(); 143 144 rtc_begin(sc); 145 for (retry = 10; retry > 0; --retry) { 146 rtc_ce(sc, 1); 147 148 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 149 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0) 150 break; 151 152 rtc_ce(sc, 0); 153 delay(1); 154 } 155 156 if (retry == 0) { 157 splx(s); 158 return EIO; 159 } 160 161 #define RTCGET(x, y) \ 162 do { \ 163 int ones = rs5c313_read_reg(sc, RS5C313_ ## y ## 1); \ 164 int tens = rs5c313_read_reg(sc, RS5C313_ ## y ## 10); \ 165 dt->dt_ ## x = tens * 10 + ones; \ 166 } while (/* CONSTCOND */0) 167 168 RTCGET(sec, SEC); 169 RTCGET(min, MIN); 170 RTCGET(hour, HOUR); 171 RTCGET(day, DAY); 172 RTCGET(mon, MON); 173 RTCGET(year, YEAR); 174 #undef RTCGET 175 dt->dt_wday = rs5c313_read_reg(sc, RS5C313_WDAY); 176 177 rtc_ce(sc, 0); 178 splx(s); 179 180 181 dt->dt_year = (dt->dt_year % 100) + 1900; 182 if (dt->dt_year < POSIX_BASE_YEAR) { 183 dt->dt_year += 100; 184 } 185 186 return 0; 187 } 188 189 190 static int 191 rs5c313_todr_settime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt) 192 { 193 struct rs5c313_softc *sc = todr->cookie; 194 int retry; 195 int t; 196 int s; 197 198 s = splhigh(); 199 200 rtc_begin(sc); 201 for (retry = 10; retry > 0; --retry) { 202 rtc_ce(sc, 1); 203 204 rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE); 205 if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0) 206 break; 207 208 rtc_ce(sc, 0); 209 delay(1); 210 } 211 212 if (retry == 0) { 213 splx(s); 214 return EIO; 215 } 216 217 #define RTCSET(x, y) \ 218 do { \ 219 t = TOBCD(dt->dt_ ## y) & 0xff; \ 220 rs5c313_write_reg(sc, RS5C313_ ## x ## 1, t & 0x0f); \ 221 rs5c313_write_reg(sc, RS5C313_ ## x ## 10, (t >> 4) & 0x0f); \ 222 } while (/* CONSTCOND */0) 223 224 RTCSET(SEC, sec); 225 RTCSET(MIN, min); 226 RTCSET(HOUR, hour); 227 RTCSET(DAY, day); 228 RTCSET(MON, mon); 229 230 #undef RTCSET 231 232 t = dt->dt_year % 100; 233 t = TOBCD(t); 234 rs5c313_write_reg(sc, RS5C313_YEAR1, t & 0x0f); 235 rs5c313_write_reg(sc, RS5C313_YEAR10, (t >> 4) & 0x0f); 236 237 rs5c313_write_reg(sc, RS5C313_WDAY, dt->dt_wday); 238 239 rtc_ce(sc, 0); 240 splx(s); 241 242 sc->sc_valid = 1; 243 return 0; 244 } 245 246 247 static int 248 rs5c313_read_reg(struct rs5c313_softc *sc, int addr) 249 { 250 int data; 251 252 /* output */ 253 rtc_dir(sc, 1); 254 255 /* control */ 256 rtc_do(sc, 1); /* ignored */ 257 rtc_do(sc, 1); /* R/#W = 1(READ) */ 258 rtc_do(sc, 1); /* AD = 1 */ 259 rtc_do(sc, 0); /* DT = 0 */ 260 261 /* address */ 262 rtc_do(sc, addr & 0x8); /* A3 */ 263 rtc_do(sc, addr & 0x4); /* A2 */ 264 rtc_do(sc, addr & 0x2); /* A1 */ 265 rtc_do(sc, addr & 0x1); /* A0 */ 266 267 /* input */ 268 rtc_dir(sc, 0); 269 270 /* ignore */ 271 (void)rtc_di(sc); 272 (void)rtc_di(sc); 273 (void)rtc_di(sc); 274 (void)rtc_di(sc); 275 276 /* data */ 277 data = rtc_di(sc); /* D3 */ 278 data <<= 1; 279 data |= rtc_di(sc); /* D2 */ 280 data <<= 1; 281 data |= rtc_di(sc); /* D1 */ 282 data <<= 1; 283 data |= rtc_di(sc); /* D0 */ 284 285 return data; 286 } 287 288 289 static void 290 rs5c313_write_reg(struct rs5c313_softc *sc, int addr, int data) 291 { 292 293 /* output */ 294 rtc_dir(sc, 1); 295 296 /* control */ 297 rtc_do(sc, 1); /* ignored */ 298 rtc_do(sc, 0); /* R/#W = 0 (WRITE) */ 299 rtc_do(sc, 1); /* AD = 1 */ 300 rtc_do(sc, 0); /* DT = 0 */ 301 302 /* address */ 303 rtc_do(sc, addr & 0x8); /* A3 */ 304 rtc_do(sc, addr & 0x4); /* A2 */ 305 rtc_do(sc, addr & 0x2); /* A1 */ 306 rtc_do(sc, addr & 0x1); /* A0 */ 307 308 /* control */ 309 rtc_do(sc, 1); /* ignored */ 310 rtc_do(sc, 0); /* R/#W = 0(WRITE) */ 311 rtc_do(sc, 0); /* AD = 0 */ 312 rtc_do(sc, 1); /* DT = 1 */ 313 314 /* data */ 315 rtc_do(sc, data & 0x8); /* D3 */ 316 rtc_do(sc, data & 0x4); /* D2 */ 317 rtc_do(sc, data & 0x2); /* D1 */ 318 rtc_do(sc, data & 0x1); /* D0 */ 319 } 320
Indexes created Tue Sep 23 01:09:51 GMT 2025