1 1.3 nonaka /* $NetBSD: rs5c313var.h,v 1.3 2010/04/06 15:29:19 nonaka Exp $ */ 2 1.1 uwe 3 1.1 uwe /* 4 1.1 uwe * Copyright (c) 2006 Valeriy E. Ushakov 5 1.1 uwe * All rights reserved. 6 1.1 uwe * 7 1.1 uwe * Redistribution and use in source and binary forms, with or without 8 1.1 uwe * modification, are permitted provided that the following conditions 9 1.1 uwe * are met: 10 1.1 uwe * 1. Redistributions of source code must retain the above copyright 11 1.1 uwe * notice, this list of conditions and the following disclaimer. 12 1.1 uwe * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 uwe * notice, this list of conditions and the following disclaimer in the 14 1.1 uwe * documentation and/or other materials provided with the distribution. 15 1.1 uwe * 3. The name of the author may not be used to endorse or promote products 16 1.1 uwe * derived from this software without specific prior written permission 17 1.1 uwe * 18 1.1 uwe * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 1.1 uwe * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 1.1 uwe * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 1.1 uwe * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 1.1 uwe * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 1.1 uwe * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 1.1 uwe * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 1.1 uwe * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 1.1 uwe * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 1.1 uwe * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 1.1 uwe */ 29 1.1 uwe 30 1.1 uwe #ifndef _DEV_IC_RS5C313VAR_H_ 31 1.1 uwe #define _DEV_IC_RS5C313VAR_H_ 32 1.1 uwe 33 1.1 uwe /* 34 1.1 uwe * RICOH RS5C313 Real Time Clock 35 1.1 uwe */ 36 1.1 uwe 37 1.1 uwe struct rs5c313_ops; 38 1.1 uwe 39 1.1 uwe struct rs5c313_softc { 40 1.2 uwe device_t sc_dev; 41 1.1 uwe 42 1.1 uwe struct todr_chip_handle sc_todr; 43 1.1 uwe struct rs5c313_ops *sc_ops; 44 1.1 uwe 45 1.1 uwe int sc_valid; /* oscillation halt sensing on init */ 46 1.3 nonaka 47 1.3 nonaka enum { 48 1.3 nonaka MODEL_5C313 = 0, 49 1.3 nonaka MODEL_5C316, 50 1.3 nonaka MODEL_NUM 51 1.3 nonaka } sc_model; 52 1.3 nonaka 53 1.3 nonaka int sc_ctrl[2]; /* ctrl registers */ 54 1.1 uwe }; 55 1.1 uwe 56 1.1 uwe struct rs5c313_ops { 57 1.1 uwe void (*rs5c313_op_begin)(struct rs5c313_softc *); 58 1.1 uwe 59 1.1 uwe /* CE pin */ 60 1.1 uwe void (*rs5c313_op_ce)(struct rs5c313_softc *, int); 61 1.1 uwe 62 1.1 uwe /* SCLK pin */ 63 1.1 uwe void (*rs5c313_op_clk)(struct rs5c313_softc *, int); 64 1.1 uwe 65 1.1 uwe /* SIO pin */ 66 1.1 uwe void (*rs5c313_op_dir)(struct rs5c313_softc *, int); 67 1.1 uwe int (*rs5c313_op_read)(struct rs5c313_softc *); 68 1.1 uwe void (*rs5c313_op_write)(struct rs5c313_softc *, int); 69 1.1 uwe }; 70 1.1 uwe 71 1.1 uwe void rs5c313_attach(struct rs5c313_softc *); 72 1.1 uwe 73 1.1 uwe #endif /* _DEV_IC_RS5C313VAR_H_ */ 74