rt2560.c revision 1.38.10.1 1 1.38.10.1 thorpej /* $NetBSD: rt2560.c,v 1.38.10.1 2021/06/17 04:46:28 thorpej Exp $ */
2 1.1 rpaulo /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */
3 1.1 rpaulo /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/
4 1.1 rpaulo
5 1.1 rpaulo /*-
6 1.1 rpaulo * Copyright (c) 2005, 2006
7 1.1 rpaulo * Damien Bergamini <damien.bergamini (at) free.fr>
8 1.1 rpaulo *
9 1.1 rpaulo * Permission to use, copy, modify, and distribute this software for any
10 1.1 rpaulo * purpose with or without fee is hereby granted, provided that the above
11 1.1 rpaulo * copyright notice and this permission notice appear in all copies.
12 1.1 rpaulo *
13 1.1 rpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 1.1 rpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 1.1 rpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 1.1 rpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 1.1 rpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 1.1 rpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 1.1 rpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 1.1 rpaulo */
21 1.1 rpaulo
22 1.1 rpaulo /*-
23 1.1 rpaulo * Ralink Technology RT2560 chipset driver
24 1.1 rpaulo * http://www.ralinktech.com/
25 1.1 rpaulo */
26 1.1 rpaulo #include <sys/cdefs.h>
27 1.38.10.1 thorpej __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.38.10.1 2021/06/17 04:46:28 thorpej Exp $");
28 1.1 rpaulo
29 1.1 rpaulo
30 1.1 rpaulo #include <sys/param.h>
31 1.1 rpaulo #include <sys/sockio.h>
32 1.1 rpaulo #include <sys/mbuf.h>
33 1.1 rpaulo #include <sys/kernel.h>
34 1.1 rpaulo #include <sys/socket.h>
35 1.1 rpaulo #include <sys/systm.h>
36 1.1 rpaulo #include <sys/malloc.h>
37 1.1 rpaulo #include <sys/callout.h>
38 1.1 rpaulo #include <sys/conf.h>
39 1.1 rpaulo #include <sys/device.h>
40 1.1 rpaulo
41 1.13 ad #include <sys/bus.h>
42 1.1 rpaulo #include <machine/endian.h>
43 1.13 ad #include <sys/intr.h>
44 1.1 rpaulo
45 1.1 rpaulo #include <net/bpf.h>
46 1.1 rpaulo #include <net/if.h>
47 1.1 rpaulo #include <net/if_arp.h>
48 1.1 rpaulo #include <net/if_dl.h>
49 1.1 rpaulo #include <net/if_media.h>
50 1.1 rpaulo #include <net/if_types.h>
51 1.1 rpaulo #include <net/if_ether.h>
52 1.1 rpaulo
53 1.1 rpaulo #include <netinet/in.h>
54 1.1 rpaulo #include <netinet/in_systm.h>
55 1.1 rpaulo #include <netinet/in_var.h>
56 1.1 rpaulo #include <netinet/ip.h>
57 1.1 rpaulo
58 1.1 rpaulo #include <net80211/ieee80211_var.h>
59 1.1 rpaulo #include <net80211/ieee80211_rssadapt.h>
60 1.1 rpaulo #include <net80211/ieee80211_radiotap.h>
61 1.1 rpaulo
62 1.1 rpaulo #include <dev/ic/rt2560reg.h>
63 1.1 rpaulo #include <dev/ic/rt2560var.h>
64 1.1 rpaulo
65 1.1 rpaulo #ifdef RAL_DEBUG
66 1.1 rpaulo #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0)
67 1.1 rpaulo #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0)
68 1.1 rpaulo int rt2560_debug = 0;
69 1.1 rpaulo #else
70 1.1 rpaulo #define DPRINTF(x)
71 1.1 rpaulo #define DPRINTFN(n, x)
72 1.1 rpaulo #endif
73 1.1 rpaulo
74 1.1 rpaulo static int rt2560_alloc_tx_ring(struct rt2560_softc *,
75 1.1 rpaulo struct rt2560_tx_ring *, int);
76 1.1 rpaulo static void rt2560_reset_tx_ring(struct rt2560_softc *,
77 1.1 rpaulo struct rt2560_tx_ring *);
78 1.1 rpaulo static void rt2560_free_tx_ring(struct rt2560_softc *,
79 1.1 rpaulo struct rt2560_tx_ring *);
80 1.1 rpaulo static int rt2560_alloc_rx_ring(struct rt2560_softc *,
81 1.1 rpaulo struct rt2560_rx_ring *, int);
82 1.1 rpaulo static void rt2560_reset_rx_ring(struct rt2560_softc *,
83 1.1 rpaulo struct rt2560_rx_ring *);
84 1.1 rpaulo static void rt2560_free_rx_ring(struct rt2560_softc *,
85 1.1 rpaulo struct rt2560_rx_ring *);
86 1.1 rpaulo static struct ieee80211_node *
87 1.1 rpaulo rt2560_node_alloc(struct ieee80211_node_table *);
88 1.1 rpaulo static int rt2560_media_change(struct ifnet *);
89 1.1 rpaulo static void rt2560_next_scan(void *);
90 1.1 rpaulo static void rt2560_iter_func(void *, struct ieee80211_node *);
91 1.1 rpaulo static void rt2560_update_rssadapt(void *);
92 1.1 rpaulo static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state,
93 1.1 rpaulo int);
94 1.1 rpaulo static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
95 1.1 rpaulo static void rt2560_encryption_intr(struct rt2560_softc *);
96 1.1 rpaulo static void rt2560_tx_intr(struct rt2560_softc *);
97 1.1 rpaulo static void rt2560_prio_intr(struct rt2560_softc *);
98 1.1 rpaulo static void rt2560_decryption_intr(struct rt2560_softc *);
99 1.1 rpaulo static void rt2560_rx_intr(struct rt2560_softc *);
100 1.1 rpaulo static void rt2560_beacon_expire(struct rt2560_softc *);
101 1.1 rpaulo static void rt2560_wakeup_expire(struct rt2560_softc *);
102 1.1 rpaulo static uint8_t rt2560_rxrate(struct rt2560_rx_desc *);
103 1.1 rpaulo static int rt2560_ack_rate(struct ieee80211com *, int);
104 1.1 rpaulo static uint16_t rt2560_txtime(int, int, uint32_t);
105 1.1 rpaulo static uint8_t rt2560_plcp_signal(int);
106 1.1 rpaulo static void rt2560_setup_tx_desc(struct rt2560_softc *,
107 1.1 rpaulo struct rt2560_tx_desc *, uint32_t, int, int, int,
108 1.1 rpaulo bus_addr_t);
109 1.1 rpaulo static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
110 1.1 rpaulo struct ieee80211_node *);
111 1.1 rpaulo static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
112 1.1 rpaulo struct ieee80211_node *);
113 1.1 rpaulo static struct mbuf *rt2560_get_rts(struct rt2560_softc *,
114 1.1 rpaulo struct ieee80211_frame *, uint16_t);
115 1.1 rpaulo static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
116 1.1 rpaulo struct ieee80211_node *);
117 1.1 rpaulo static void rt2560_start(struct ifnet *);
118 1.1 rpaulo static void rt2560_watchdog(struct ifnet *);
119 1.1 rpaulo static int rt2560_reset(struct ifnet *);
120 1.8 christos static int rt2560_ioctl(struct ifnet *, u_long, void *);
121 1.1 rpaulo static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t);
122 1.1 rpaulo static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t);
123 1.1 rpaulo static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t);
124 1.1 rpaulo static void rt2560_set_chan(struct rt2560_softc *,
125 1.1 rpaulo struct ieee80211_channel *);
126 1.1 rpaulo static void rt2560_disable_rf_tune(struct rt2560_softc *);
127 1.1 rpaulo static void rt2560_enable_tsf_sync(struct rt2560_softc *);
128 1.1 rpaulo static void rt2560_update_plcp(struct rt2560_softc *);
129 1.1 rpaulo static void rt2560_update_slot(struct ifnet *);
130 1.1 rpaulo static void rt2560_set_basicrates(struct rt2560_softc *);
131 1.1 rpaulo static void rt2560_update_led(struct rt2560_softc *, int, int);
132 1.1 rpaulo static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *);
133 1.1 rpaulo static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *);
134 1.1 rpaulo static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
135 1.1 rpaulo static void rt2560_update_promisc(struct rt2560_softc *);
136 1.1 rpaulo static void rt2560_set_txantenna(struct rt2560_softc *, int);
137 1.1 rpaulo static void rt2560_set_rxantenna(struct rt2560_softc *, int);
138 1.1 rpaulo static const char *rt2560_get_rf(int);
139 1.1 rpaulo static void rt2560_read_eeprom(struct rt2560_softc *);
140 1.1 rpaulo static int rt2560_bbp_init(struct rt2560_softc *);
141 1.1 rpaulo static int rt2560_init(struct ifnet *);
142 1.15 jmcneill static void rt2560_stop(struct ifnet *, int);
143 1.29 nonaka static void rt2560_softintr(void *);
144 1.1 rpaulo
145 1.1 rpaulo /*
146 1.1 rpaulo * Default values for MAC registers; values taken from the reference driver.
147 1.1 rpaulo */
148 1.1 rpaulo static const struct {
149 1.1 rpaulo uint32_t reg;
150 1.1 rpaulo uint32_t val;
151 1.1 rpaulo } rt2560_def_mac[] = {
152 1.1 rpaulo { RT2560_PSCSR0, 0x00020002 },
153 1.1 rpaulo { RT2560_PSCSR1, 0x00000002 },
154 1.1 rpaulo { RT2560_PSCSR2, 0x00020002 },
155 1.1 rpaulo { RT2560_PSCSR3, 0x00000002 },
156 1.1 rpaulo { RT2560_TIMECSR, 0x00003f21 },
157 1.1 rpaulo { RT2560_CSR9, 0x00000780 },
158 1.1 rpaulo { RT2560_CSR11, 0x07041483 },
159 1.1 rpaulo { RT2560_CNT3, 0x00000000 },
160 1.1 rpaulo { RT2560_TXCSR1, 0x07614562 },
161 1.1 rpaulo { RT2560_ARSP_PLCP_0, 0x8c8d8b8a },
162 1.1 rpaulo { RT2560_ACKPCTCSR, 0x7038140a },
163 1.1 rpaulo { RT2560_ARTCSR1, 0x1d21252d },
164 1.1 rpaulo { RT2560_ARTCSR2, 0x1919191d },
165 1.1 rpaulo { RT2560_RXCSR0, 0xffffffff },
166 1.1 rpaulo { RT2560_RXCSR3, 0xb3aab3af },
167 1.1 rpaulo { RT2560_PCICSR, 0x000003b8 },
168 1.1 rpaulo { RT2560_PWRCSR0, 0x3f3b3100 },
169 1.1 rpaulo { RT2560_GPIOCSR, 0x0000ff00 },
170 1.1 rpaulo { RT2560_TESTCSR, 0x000000f0 },
171 1.1 rpaulo { RT2560_PWRCSR1, 0x000001ff },
172 1.1 rpaulo { RT2560_MACCSR0, 0x00213223 },
173 1.1 rpaulo { RT2560_MACCSR1, 0x00235518 },
174 1.1 rpaulo { RT2560_RLPWCSR, 0x00000040 },
175 1.1 rpaulo { RT2560_RALINKCSR, 0x9a009a11 },
176 1.1 rpaulo { RT2560_CSR7, 0xffffffff },
177 1.1 rpaulo { RT2560_BBPCSR1, 0x82188200 },
178 1.1 rpaulo { RT2560_TXACKCSR0, 0x00000020 },
179 1.1 rpaulo { RT2560_SECCSR3, 0x0000e78f }
180 1.1 rpaulo };
181 1.1 rpaulo
182 1.1 rpaulo /*
183 1.1 rpaulo * Default values for BBP registers; values taken from the reference driver.
184 1.1 rpaulo */
185 1.1 rpaulo static const struct {
186 1.1 rpaulo uint8_t reg;
187 1.1 rpaulo uint8_t val;
188 1.1 rpaulo } rt2560_def_bbp[] = {
189 1.1 rpaulo { 3, 0x02 },
190 1.1 rpaulo { 4, 0x19 },
191 1.1 rpaulo { 14, 0x1c },
192 1.1 rpaulo { 15, 0x30 },
193 1.1 rpaulo { 16, 0xac },
194 1.1 rpaulo { 17, 0x48 },
195 1.1 rpaulo { 18, 0x18 },
196 1.1 rpaulo { 19, 0xff },
197 1.1 rpaulo { 20, 0x1e },
198 1.1 rpaulo { 21, 0x08 },
199 1.1 rpaulo { 22, 0x08 },
200 1.1 rpaulo { 23, 0x08 },
201 1.1 rpaulo { 24, 0x80 },
202 1.1 rpaulo { 25, 0x50 },
203 1.1 rpaulo { 26, 0x08 },
204 1.1 rpaulo { 27, 0x23 },
205 1.1 rpaulo { 30, 0x10 },
206 1.1 rpaulo { 31, 0x2b },
207 1.1 rpaulo { 32, 0xb9 },
208 1.1 rpaulo { 34, 0x12 },
209 1.1 rpaulo { 35, 0x50 },
210 1.1 rpaulo { 39, 0xc4 },
211 1.1 rpaulo { 40, 0x02 },
212 1.1 rpaulo { 41, 0x60 },
213 1.1 rpaulo { 53, 0x10 },
214 1.1 rpaulo { 54, 0x18 },
215 1.1 rpaulo { 56, 0x08 },
216 1.1 rpaulo { 57, 0x10 },
217 1.1 rpaulo { 58, 0x08 },
218 1.1 rpaulo { 61, 0x60 },
219 1.1 rpaulo { 62, 0x10 },
220 1.1 rpaulo { 75, 0xff }
221 1.1 rpaulo };
222 1.1 rpaulo
223 1.1 rpaulo /*
224 1.1 rpaulo * Default values for RF register R2 indexed by channel numbers; values taken
225 1.1 rpaulo * from the reference driver.
226 1.1 rpaulo */
227 1.1 rpaulo static const uint32_t rt2560_rf2522_r2[] = {
228 1.1 rpaulo 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
229 1.1 rpaulo 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
230 1.1 rpaulo };
231 1.1 rpaulo
232 1.1 rpaulo static const uint32_t rt2560_rf2523_r2[] = {
233 1.1 rpaulo 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
234 1.1 rpaulo 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
235 1.1 rpaulo };
236 1.1 rpaulo
237 1.1 rpaulo static const uint32_t rt2560_rf2524_r2[] = {
238 1.1 rpaulo 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
239 1.1 rpaulo 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
240 1.1 rpaulo };
241 1.1 rpaulo
242 1.1 rpaulo static const uint32_t rt2560_rf2525_r2[] = {
243 1.1 rpaulo 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
244 1.1 rpaulo 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
245 1.1 rpaulo };
246 1.1 rpaulo
247 1.1 rpaulo static const uint32_t rt2560_rf2525_hi_r2[] = {
248 1.1 rpaulo 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
249 1.1 rpaulo 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
250 1.1 rpaulo };
251 1.1 rpaulo
252 1.1 rpaulo static const uint32_t rt2560_rf2525e_r2[] = {
253 1.1 rpaulo 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
254 1.1 rpaulo 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
255 1.1 rpaulo };
256 1.1 rpaulo
257 1.1 rpaulo static const uint32_t rt2560_rf2526_hi_r2[] = {
258 1.1 rpaulo 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
259 1.1 rpaulo 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
260 1.1 rpaulo };
261 1.1 rpaulo
262 1.1 rpaulo static const uint32_t rt2560_rf2526_r2[] = {
263 1.1 rpaulo 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
264 1.1 rpaulo 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
265 1.1 rpaulo };
266 1.1 rpaulo
267 1.1 rpaulo /*
268 1.1 rpaulo * For dual-band RF, RF registers R1 and R4 also depend on channel number;
269 1.1 rpaulo * values taken from the reference driver.
270 1.1 rpaulo */
271 1.1 rpaulo static const struct {
272 1.1 rpaulo uint8_t chan;
273 1.1 rpaulo uint32_t r1;
274 1.1 rpaulo uint32_t r2;
275 1.1 rpaulo uint32_t r4;
276 1.1 rpaulo } rt2560_rf5222[] = {
277 1.1 rpaulo { 1, 0x08808, 0x0044d, 0x00282 },
278 1.1 rpaulo { 2, 0x08808, 0x0044e, 0x00282 },
279 1.1 rpaulo { 3, 0x08808, 0x0044f, 0x00282 },
280 1.1 rpaulo { 4, 0x08808, 0x00460, 0x00282 },
281 1.1 rpaulo { 5, 0x08808, 0x00461, 0x00282 },
282 1.1 rpaulo { 6, 0x08808, 0x00462, 0x00282 },
283 1.1 rpaulo { 7, 0x08808, 0x00463, 0x00282 },
284 1.1 rpaulo { 8, 0x08808, 0x00464, 0x00282 },
285 1.1 rpaulo { 9, 0x08808, 0x00465, 0x00282 },
286 1.1 rpaulo { 10, 0x08808, 0x00466, 0x00282 },
287 1.1 rpaulo { 11, 0x08808, 0x00467, 0x00282 },
288 1.1 rpaulo { 12, 0x08808, 0x00468, 0x00282 },
289 1.1 rpaulo { 13, 0x08808, 0x00469, 0x00282 },
290 1.1 rpaulo { 14, 0x08808, 0x0046b, 0x00286 },
291 1.1 rpaulo
292 1.1 rpaulo { 36, 0x08804, 0x06225, 0x00287 },
293 1.1 rpaulo { 40, 0x08804, 0x06226, 0x00287 },
294 1.1 rpaulo { 44, 0x08804, 0x06227, 0x00287 },
295 1.1 rpaulo { 48, 0x08804, 0x06228, 0x00287 },
296 1.1 rpaulo { 52, 0x08804, 0x06229, 0x00287 },
297 1.1 rpaulo { 56, 0x08804, 0x0622a, 0x00287 },
298 1.1 rpaulo { 60, 0x08804, 0x0622b, 0x00287 },
299 1.1 rpaulo { 64, 0x08804, 0x0622c, 0x00287 },
300 1.1 rpaulo
301 1.1 rpaulo { 100, 0x08804, 0x02200, 0x00283 },
302 1.1 rpaulo { 104, 0x08804, 0x02201, 0x00283 },
303 1.1 rpaulo { 108, 0x08804, 0x02202, 0x00283 },
304 1.1 rpaulo { 112, 0x08804, 0x02203, 0x00283 },
305 1.1 rpaulo { 116, 0x08804, 0x02204, 0x00283 },
306 1.1 rpaulo { 120, 0x08804, 0x02205, 0x00283 },
307 1.1 rpaulo { 124, 0x08804, 0x02206, 0x00283 },
308 1.1 rpaulo { 128, 0x08804, 0x02207, 0x00283 },
309 1.1 rpaulo { 132, 0x08804, 0x02208, 0x00283 },
310 1.1 rpaulo { 136, 0x08804, 0x02209, 0x00283 },
311 1.1 rpaulo { 140, 0x08804, 0x0220a, 0x00283 },
312 1.1 rpaulo
313 1.1 rpaulo { 149, 0x08808, 0x02429, 0x00281 },
314 1.1 rpaulo { 153, 0x08808, 0x0242b, 0x00281 },
315 1.1 rpaulo { 157, 0x08808, 0x0242d, 0x00281 },
316 1.1 rpaulo { 161, 0x08808, 0x0242f, 0x00281 }
317 1.1 rpaulo };
318 1.1 rpaulo
319 1.1 rpaulo int
320 1.7 christos rt2560_attach(void *xsc, int id)
321 1.1 rpaulo {
322 1.1 rpaulo struct rt2560_softc *sc = xsc;
323 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
324 1.1 rpaulo struct ifnet *ifp = &sc->sc_if;
325 1.1 rpaulo int error, i;
326 1.1 rpaulo
327 1.9 ad callout_init(&sc->scan_ch, 0);
328 1.9 ad callout_init(&sc->rssadapt_ch, 0);
329 1.1 rpaulo
330 1.1 rpaulo /* retrieve RT2560 rev. no */
331 1.1 rpaulo sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
332 1.1 rpaulo
333 1.1 rpaulo /* retrieve MAC address */
334 1.1 rpaulo rt2560_get_macaddr(sc, ic->ic_myaddr);
335 1.1 rpaulo
336 1.25 drochner aprint_normal_dev(sc->sc_dev, "802.11 address %s\n",
337 1.1 rpaulo ether_sprintf(ic->ic_myaddr));
338 1.1 rpaulo
339 1.1 rpaulo /* retrieve RF rev. no and various other things from EEPROM */
340 1.1 rpaulo rt2560_read_eeprom(sc);
341 1.1 rpaulo
342 1.25 drochner aprint_normal_dev(sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n",
343 1.19 cegger sc->asic_rev, rt2560_get_rf(sc->rf_rev));
344 1.1 rpaulo
345 1.29 nonaka sc->sc_soft_ih = softint_establish(SOFTINT_NET, rt2560_softintr, sc);
346 1.29 nonaka if (sc->sc_soft_ih == NULL) {
347 1.29 nonaka aprint_error_dev(sc->sc_dev, "could not establish softint\n)");
348 1.29 nonaka goto fail0;
349 1.29 nonaka }
350 1.29 nonaka
351 1.1 rpaulo /*
352 1.1 rpaulo * Allocate Tx and Rx rings.
353 1.1 rpaulo */
354 1.1 rpaulo error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
355 1.1 rpaulo if (error != 0) {
356 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate Tx ring\n)");
357 1.1 rpaulo goto fail1;
358 1.1 rpaulo }
359 1.1 rpaulo
360 1.1 rpaulo error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
361 1.1 rpaulo if (error != 0) {
362 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate ATIM ring\n");
363 1.1 rpaulo goto fail2;
364 1.1 rpaulo }
365 1.1 rpaulo
366 1.1 rpaulo error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
367 1.1 rpaulo if (error != 0) {
368 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate Prio ring\n");
369 1.1 rpaulo goto fail3;
370 1.1 rpaulo }
371 1.1 rpaulo
372 1.1 rpaulo error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
373 1.1 rpaulo if (error != 0) {
374 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate Beacon ring\n");
375 1.1 rpaulo goto fail4;
376 1.1 rpaulo }
377 1.1 rpaulo
378 1.1 rpaulo error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
379 1.1 rpaulo if (error != 0) {
380 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n");
381 1.1 rpaulo goto fail5;
382 1.1 rpaulo }
383 1.1 rpaulo
384 1.1 rpaulo ifp->if_softc = sc;
385 1.1 rpaulo ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
386 1.1 rpaulo ifp->if_init = rt2560_init;
387 1.15 jmcneill ifp->if_stop = rt2560_stop;
388 1.1 rpaulo ifp->if_ioctl = rt2560_ioctl;
389 1.1 rpaulo ifp->if_start = rt2560_start;
390 1.1 rpaulo ifp->if_watchdog = rt2560_watchdog;
391 1.1 rpaulo IFQ_SET_READY(&ifp->if_snd);
392 1.25 drochner memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
393 1.1 rpaulo
394 1.1 rpaulo ic->ic_ifp = ifp;
395 1.1 rpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
396 1.1 rpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
397 1.1 rpaulo ic->ic_state = IEEE80211_S_INIT;
398 1.1 rpaulo
399 1.1 rpaulo /* set device capabilities */
400 1.1 rpaulo ic->ic_caps =
401 1.1 rpaulo IEEE80211_C_IBSS | /* IBSS mode supported */
402 1.1 rpaulo IEEE80211_C_MONITOR | /* monitor mode supported */
403 1.1 rpaulo IEEE80211_C_HOSTAP | /* HostAp mode supported */
404 1.1 rpaulo IEEE80211_C_TXPMGT | /* tx power management */
405 1.1 rpaulo IEEE80211_C_SHPREAMBLE | /* short preamble supported */
406 1.1 rpaulo IEEE80211_C_SHSLOT | /* short slot time supported */
407 1.1 rpaulo IEEE80211_C_WPA; /* 802.11i */
408 1.1 rpaulo
409 1.1 rpaulo if (sc->rf_rev == RT2560_RF_5222) {
410 1.1 rpaulo /* set supported .11a rates */
411 1.33 maya ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a;
412 1.1 rpaulo
413 1.1 rpaulo /* set supported .11a channels */
414 1.1 rpaulo for (i = 36; i <= 64; i += 4) {
415 1.1 rpaulo ic->ic_channels[i].ic_freq =
416 1.1 rpaulo ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
417 1.1 rpaulo ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
418 1.1 rpaulo }
419 1.1 rpaulo for (i = 100; i <= 140; i += 4) {
420 1.1 rpaulo ic->ic_channels[i].ic_freq =
421 1.1 rpaulo ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
422 1.1 rpaulo ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
423 1.1 rpaulo }
424 1.1 rpaulo for (i = 149; i <= 161; i += 4) {
425 1.1 rpaulo ic->ic_channels[i].ic_freq =
426 1.1 rpaulo ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
427 1.1 rpaulo ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
428 1.1 rpaulo }
429 1.1 rpaulo }
430 1.1 rpaulo
431 1.1 rpaulo /* set supported .11b and .11g rates */
432 1.33 maya ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
433 1.33 maya ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
434 1.1 rpaulo
435 1.1 rpaulo /* set supported .11b and .11g channels (1 through 14) */
436 1.1 rpaulo for (i = 1; i <= 14; i++) {
437 1.1 rpaulo ic->ic_channels[i].ic_freq =
438 1.1 rpaulo ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
439 1.1 rpaulo ic->ic_channels[i].ic_flags =
440 1.1 rpaulo IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
441 1.1 rpaulo IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
442 1.1 rpaulo }
443 1.1 rpaulo
444 1.38.10.1 thorpej if_initialize(ifp);
445 1.1 rpaulo ieee80211_ifattach(ic);
446 1.29 nonaka /* Use common softint-based if_input */
447 1.29 nonaka ifp->if_percpuq = if_percpuq_create(ifp);
448 1.29 nonaka if_register(ifp);
449 1.29 nonaka
450 1.1 rpaulo ic->ic_node_alloc = rt2560_node_alloc;
451 1.1 rpaulo ic->ic_updateslot = rt2560_update_slot;
452 1.1 rpaulo ic->ic_reset = rt2560_reset;
453 1.1 rpaulo
454 1.1 rpaulo /* override state transition machine */
455 1.1 rpaulo sc->sc_newstate = ic->ic_newstate;
456 1.1 rpaulo ic->ic_newstate = rt2560_newstate;
457 1.1 rpaulo ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status);
458 1.1 rpaulo
459 1.23 joerg bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
460 1.22 pooka sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
461 1.1 rpaulo
462 1.1 rpaulo sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
463 1.1 rpaulo sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
464 1.1 rpaulo sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
465 1.1 rpaulo
466 1.1 rpaulo sc->sc_txtap_len = sizeof sc->sc_txtapu;
467 1.1 rpaulo sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
468 1.1 rpaulo sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
469 1.1 rpaulo
470 1.1 rpaulo
471 1.1 rpaulo sc->dwelltime = 200;
472 1.1 rpaulo
473 1.1 rpaulo ieee80211_announce(ic);
474 1.1 rpaulo
475 1.25 drochner if (pmf_device_register(sc->sc_dev, NULL, NULL))
476 1.25 drochner pmf_class_network_register(sc->sc_dev, ifp);
477 1.15 jmcneill else
478 1.25 drochner aprint_error_dev(sc->sc_dev,
479 1.21 tsutsui "couldn't establish power handler\n");
480 1.15 jmcneill
481 1.1 rpaulo return 0;
482 1.1 rpaulo
483 1.1 rpaulo fail5: rt2560_free_tx_ring(sc, &sc->bcnq);
484 1.1 rpaulo fail4: rt2560_free_tx_ring(sc, &sc->prioq);
485 1.1 rpaulo fail3: rt2560_free_tx_ring(sc, &sc->atimq);
486 1.1 rpaulo fail2: rt2560_free_tx_ring(sc, &sc->txq);
487 1.29 nonaka fail1: softint_disestablish(sc->sc_soft_ih);
488 1.29 nonaka sc->sc_soft_ih = NULL;
489 1.29 nonaka fail0: return ENXIO;
490 1.1 rpaulo }
491 1.1 rpaulo
492 1.1 rpaulo
493 1.1 rpaulo int
494 1.1 rpaulo rt2560_detach(void *xsc)
495 1.1 rpaulo {
496 1.1 rpaulo struct rt2560_softc *sc = xsc;
497 1.1 rpaulo struct ifnet *ifp = &sc->sc_if;
498 1.1 rpaulo
499 1.1 rpaulo callout_stop(&sc->scan_ch);
500 1.1 rpaulo callout_stop(&sc->rssadapt_ch);
501 1.1 rpaulo
502 1.25 drochner pmf_device_deregister(sc->sc_dev);
503 1.5 jmcneill
504 1.15 jmcneill rt2560_stop(ifp, 1);
505 1.4 jmcneill
506 1.1 rpaulo ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */
507 1.1 rpaulo if_detach(ifp);
508 1.1 rpaulo
509 1.1 rpaulo rt2560_free_tx_ring(sc, &sc->txq);
510 1.1 rpaulo rt2560_free_tx_ring(sc, &sc->atimq);
511 1.1 rpaulo rt2560_free_tx_ring(sc, &sc->prioq);
512 1.1 rpaulo rt2560_free_tx_ring(sc, &sc->bcnq);
513 1.1 rpaulo rt2560_free_rx_ring(sc, &sc->rxq);
514 1.1 rpaulo
515 1.29 nonaka if (sc->sc_soft_ih != NULL) {
516 1.29 nonaka softint_disestablish(sc->sc_soft_ih);
517 1.29 nonaka sc->sc_soft_ih = NULL;
518 1.29 nonaka }
519 1.29 nonaka
520 1.1 rpaulo return 0;
521 1.1 rpaulo }
522 1.1 rpaulo
523 1.1 rpaulo int
524 1.1 rpaulo rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
525 1.1 rpaulo int count)
526 1.1 rpaulo {
527 1.1 rpaulo int i, nsegs, error;
528 1.1 rpaulo
529 1.1 rpaulo ring->count = count;
530 1.1 rpaulo ring->queued = 0;
531 1.1 rpaulo ring->cur = ring->next = 0;
532 1.1 rpaulo ring->cur_encrypt = ring->next_encrypt = 0;
533 1.1 rpaulo
534 1.1 rpaulo error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1,
535 1.1 rpaulo count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
536 1.1 rpaulo if (error != 0) {
537 1.25 drochner aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n");
538 1.1 rpaulo goto fail;
539 1.1 rpaulo }
540 1.1 rpaulo
541 1.1 rpaulo error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE,
542 1.1 rpaulo PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
543 1.1 rpaulo if (error != 0) {
544 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n");
545 1.1 rpaulo goto fail;
546 1.1 rpaulo }
547 1.1 rpaulo
548 1.1 rpaulo error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
549 1.8 christos count * RT2560_TX_DESC_SIZE, (void **)&ring->desc,
550 1.1 rpaulo BUS_DMA_NOWAIT);
551 1.1 rpaulo if (error != 0) {
552 1.25 drochner aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n");
553 1.1 rpaulo goto fail;
554 1.1 rpaulo }
555 1.1 rpaulo
556 1.1 rpaulo error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
557 1.1 rpaulo count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
558 1.1 rpaulo if (error != 0) {
559 1.25 drochner aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n");
560 1.1 rpaulo goto fail;
561 1.1 rpaulo }
562 1.1 rpaulo
563 1.1 rpaulo memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE);
564 1.1 rpaulo ring->physaddr = ring->map->dm_segs->ds_addr;
565 1.1 rpaulo
566 1.1 rpaulo ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
567 1.37 chs M_WAITOK | M_ZERO);
568 1.1 rpaulo
569 1.1 rpaulo for (i = 0; i < count; i++) {
570 1.1 rpaulo error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
571 1.1 rpaulo RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
572 1.1 rpaulo &ring->data[i].map);
573 1.1 rpaulo if (error != 0) {
574 1.25 drochner aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
575 1.1 rpaulo goto fail;
576 1.1 rpaulo }
577 1.1 rpaulo }
578 1.1 rpaulo
579 1.1 rpaulo return 0;
580 1.1 rpaulo
581 1.1 rpaulo fail: rt2560_free_tx_ring(sc, ring);
582 1.1 rpaulo return error;
583 1.1 rpaulo }
584 1.1 rpaulo
585 1.1 rpaulo void
586 1.1 rpaulo rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
587 1.1 rpaulo {
588 1.1 rpaulo struct rt2560_tx_desc *desc;
589 1.1 rpaulo struct rt2560_tx_data *data;
590 1.1 rpaulo int i;
591 1.1 rpaulo
592 1.1 rpaulo for (i = 0; i < ring->count; i++) {
593 1.1 rpaulo desc = &ring->desc[i];
594 1.1 rpaulo data = &ring->data[i];
595 1.1 rpaulo
596 1.1 rpaulo if (data->m != NULL) {
597 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
598 1.1 rpaulo data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
599 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, data->map);
600 1.1 rpaulo m_freem(data->m);
601 1.1 rpaulo data->m = NULL;
602 1.1 rpaulo }
603 1.1 rpaulo
604 1.1 rpaulo if (data->ni != NULL) {
605 1.1 rpaulo ieee80211_free_node(data->ni);
606 1.1 rpaulo data->ni = NULL;
607 1.1 rpaulo }
608 1.1 rpaulo
609 1.1 rpaulo desc->flags = 0;
610 1.1 rpaulo }
611 1.1 rpaulo
612 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
613 1.1 rpaulo BUS_DMASYNC_PREWRITE);
614 1.1 rpaulo
615 1.1 rpaulo ring->queued = 0;
616 1.1 rpaulo ring->cur = ring->next = 0;
617 1.1 rpaulo ring->cur_encrypt = ring->next_encrypt = 0;
618 1.1 rpaulo }
619 1.1 rpaulo
620 1.1 rpaulo void
621 1.1 rpaulo rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
622 1.1 rpaulo {
623 1.1 rpaulo struct rt2560_tx_data *data;
624 1.1 rpaulo int i;
625 1.1 rpaulo
626 1.1 rpaulo if (ring->desc != NULL) {
627 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
628 1.1 rpaulo ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
629 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, ring->map);
630 1.8 christos bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc,
631 1.1 rpaulo ring->count * RT2560_TX_DESC_SIZE);
632 1.1 rpaulo bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
633 1.1 rpaulo }
634 1.1 rpaulo
635 1.1 rpaulo if (ring->data != NULL) {
636 1.1 rpaulo for (i = 0; i < ring->count; i++) {
637 1.1 rpaulo data = &ring->data[i];
638 1.1 rpaulo
639 1.1 rpaulo if (data->m != NULL) {
640 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
641 1.1 rpaulo data->map->dm_mapsize,
642 1.1 rpaulo BUS_DMASYNC_POSTWRITE);
643 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, data->map);
644 1.1 rpaulo m_freem(data->m);
645 1.1 rpaulo }
646 1.1 rpaulo
647 1.1 rpaulo if (data->ni != NULL)
648 1.1 rpaulo ieee80211_free_node(data->ni);
649 1.1 rpaulo
650 1.1 rpaulo
651 1.1 rpaulo if (data->map != NULL)
652 1.1 rpaulo bus_dmamap_destroy(sc->sc_dmat, data->map);
653 1.1 rpaulo }
654 1.1 rpaulo free(ring->data, M_DEVBUF);
655 1.1 rpaulo }
656 1.1 rpaulo }
657 1.1 rpaulo
658 1.1 rpaulo int
659 1.1 rpaulo rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
660 1.1 rpaulo int count)
661 1.1 rpaulo {
662 1.1 rpaulo struct rt2560_rx_desc *desc;
663 1.1 rpaulo struct rt2560_rx_data *data;
664 1.1 rpaulo int i, nsegs, error;
665 1.1 rpaulo
666 1.1 rpaulo ring->count = count;
667 1.1 rpaulo ring->cur = ring->next = 0;
668 1.1 rpaulo ring->cur_decrypt = 0;
669 1.1 rpaulo
670 1.1 rpaulo error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1,
671 1.1 rpaulo count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
672 1.1 rpaulo if (error != 0) {
673 1.25 drochner aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n");
674 1.1 rpaulo goto fail;
675 1.1 rpaulo }
676 1.1 rpaulo
677 1.1 rpaulo error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE,
678 1.1 rpaulo PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
679 1.1 rpaulo if (error != 0) {
680 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n");
681 1.1 rpaulo goto fail;
682 1.1 rpaulo }
683 1.1 rpaulo
684 1.1 rpaulo error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
685 1.8 christos count * RT2560_RX_DESC_SIZE, (void **)&ring->desc,
686 1.1 rpaulo BUS_DMA_NOWAIT);
687 1.1 rpaulo if (error != 0) {
688 1.25 drochner aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n");
689 1.1 rpaulo goto fail;
690 1.1 rpaulo }
691 1.1 rpaulo
692 1.1 rpaulo error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
693 1.1 rpaulo count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
694 1.1 rpaulo if (error != 0) {
695 1.25 drochner aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n");
696 1.1 rpaulo goto fail;
697 1.1 rpaulo }
698 1.1 rpaulo
699 1.1 rpaulo memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE);
700 1.1 rpaulo ring->physaddr = ring->map->dm_segs->ds_addr;
701 1.1 rpaulo
702 1.1 rpaulo ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
703 1.37 chs M_WAITOK | M_ZERO);
704 1.1 rpaulo
705 1.1 rpaulo /*
706 1.1 rpaulo * Pre-allocate Rx buffers and populate Rx ring.
707 1.1 rpaulo */
708 1.1 rpaulo for (i = 0; i < count; i++) {
709 1.1 rpaulo desc = &sc->rxq.desc[i];
710 1.1 rpaulo data = &sc->rxq.data[i];
711 1.1 rpaulo
712 1.1 rpaulo error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
713 1.1 rpaulo 0, BUS_DMA_NOWAIT, &data->map);
714 1.1 rpaulo if (error != 0) {
715 1.25 drochner aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
716 1.1 rpaulo goto fail;
717 1.1 rpaulo }
718 1.1 rpaulo
719 1.1 rpaulo MGETHDR(data->m, M_DONTWAIT, MT_DATA);
720 1.1 rpaulo if (data->m == NULL) {
721 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n");
722 1.1 rpaulo error = ENOMEM;
723 1.1 rpaulo goto fail;
724 1.1 rpaulo }
725 1.1 rpaulo
726 1.1 rpaulo MCLGET(data->m, M_DONTWAIT);
727 1.1 rpaulo if (!(data->m->m_flags & M_EXT)) {
728 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n");
729 1.1 rpaulo error = ENOMEM;
730 1.1 rpaulo goto fail;
731 1.1 rpaulo }
732 1.1 rpaulo
733 1.1 rpaulo error = bus_dmamap_load(sc->sc_dmat, data->map,
734 1.1 rpaulo mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
735 1.1 rpaulo if (error != 0) {
736 1.25 drochner aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map");
737 1.1 rpaulo goto fail;
738 1.1 rpaulo }
739 1.1 rpaulo
740 1.1 rpaulo desc->flags = htole32(RT2560_RX_BUSY);
741 1.1 rpaulo desc->physaddr = htole32(data->map->dm_segs->ds_addr);
742 1.1 rpaulo }
743 1.1 rpaulo
744 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
745 1.1 rpaulo BUS_DMASYNC_PREWRITE);
746 1.1 rpaulo
747 1.1 rpaulo return 0;
748 1.1 rpaulo
749 1.1 rpaulo fail: rt2560_free_rx_ring(sc, ring);
750 1.1 rpaulo return error;
751 1.1 rpaulo }
752 1.1 rpaulo
753 1.1 rpaulo void
754 1.1 rpaulo rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
755 1.1 rpaulo {
756 1.1 rpaulo int i;
757 1.1 rpaulo
758 1.1 rpaulo for (i = 0; i < ring->count; i++) {
759 1.1 rpaulo ring->desc[i].flags = htole32(RT2560_RX_BUSY);
760 1.1 rpaulo ring->data[i].drop = 0;
761 1.1 rpaulo }
762 1.1 rpaulo
763 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
764 1.1 rpaulo BUS_DMASYNC_PREWRITE);
765 1.1 rpaulo
766 1.1 rpaulo ring->cur = ring->next = 0;
767 1.1 rpaulo ring->cur_decrypt = 0;
768 1.1 rpaulo }
769 1.1 rpaulo
770 1.1 rpaulo void
771 1.1 rpaulo rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
772 1.1 rpaulo {
773 1.1 rpaulo struct rt2560_rx_data *data;
774 1.1 rpaulo int i;
775 1.1 rpaulo
776 1.1 rpaulo if (ring->desc != NULL) {
777 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
778 1.1 rpaulo ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
779 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, ring->map);
780 1.8 christos bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc,
781 1.1 rpaulo ring->count * RT2560_RX_DESC_SIZE);
782 1.1 rpaulo bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
783 1.1 rpaulo }
784 1.1 rpaulo
785 1.1 rpaulo if (ring->data != NULL) {
786 1.1 rpaulo for (i = 0; i < ring->count; i++) {
787 1.1 rpaulo data = &ring->data[i];
788 1.1 rpaulo
789 1.1 rpaulo if (data->m != NULL) {
790 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
791 1.1 rpaulo data->map->dm_mapsize,
792 1.1 rpaulo BUS_DMASYNC_POSTREAD);
793 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, data->map);
794 1.1 rpaulo m_freem(data->m);
795 1.1 rpaulo }
796 1.1 rpaulo
797 1.1 rpaulo if (data->map != NULL)
798 1.1 rpaulo bus_dmamap_destroy(sc->sc_dmat, data->map);
799 1.1 rpaulo }
800 1.1 rpaulo free(ring->data, M_DEVBUF);
801 1.1 rpaulo }
802 1.1 rpaulo }
803 1.1 rpaulo
804 1.1 rpaulo struct ieee80211_node *
805 1.7 christos rt2560_node_alloc(struct ieee80211_node_table *nt)
806 1.1 rpaulo {
807 1.1 rpaulo struct rt2560_node *rn;
808 1.1 rpaulo
809 1.1 rpaulo rn = malloc(sizeof (struct rt2560_node), M_80211_NODE,
810 1.1 rpaulo M_NOWAIT | M_ZERO);
811 1.1 rpaulo
812 1.1 rpaulo return (rn != NULL) ? &rn->ni : NULL;
813 1.1 rpaulo }
814 1.1 rpaulo
815 1.1 rpaulo int
816 1.1 rpaulo rt2560_media_change(struct ifnet *ifp)
817 1.1 rpaulo {
818 1.1 rpaulo int error;
819 1.1 rpaulo
820 1.1 rpaulo error = ieee80211_media_change(ifp);
821 1.1 rpaulo if (error != ENETRESET)
822 1.1 rpaulo return error;
823 1.1 rpaulo
824 1.1 rpaulo if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
825 1.1 rpaulo rt2560_init(ifp);
826 1.1 rpaulo
827 1.1 rpaulo return 0;
828 1.1 rpaulo }
829 1.1 rpaulo
830 1.1 rpaulo /*
831 1.1 rpaulo * This function is called periodically (every 200ms) during scanning to
832 1.1 rpaulo * switch from one channel to another.
833 1.1 rpaulo */
834 1.1 rpaulo void
835 1.1 rpaulo rt2560_next_scan(void *arg)
836 1.1 rpaulo {
837 1.1 rpaulo struct rt2560_softc *sc = arg;
838 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
839 1.29 nonaka int s;
840 1.1 rpaulo
841 1.29 nonaka s = splnet();
842 1.1 rpaulo if (ic->ic_state == IEEE80211_S_SCAN)
843 1.1 rpaulo ieee80211_next_scan(ic);
844 1.29 nonaka splx(s);
845 1.1 rpaulo }
846 1.1 rpaulo
847 1.1 rpaulo /*
848 1.1 rpaulo * This function is called for each neighbor node.
849 1.1 rpaulo */
850 1.1 rpaulo void
851 1.7 christos rt2560_iter_func(void *arg, struct ieee80211_node *ni)
852 1.1 rpaulo {
853 1.1 rpaulo struct rt2560_node *rn = (struct rt2560_node *)ni;
854 1.1 rpaulo
855 1.1 rpaulo ieee80211_rssadapt_updatestats(&rn->rssadapt);
856 1.1 rpaulo }
857 1.1 rpaulo
858 1.1 rpaulo /*
859 1.1 rpaulo * This function is called periodically (every 100ms) in RUN state to update
860 1.1 rpaulo * the rate adaptation statistics.
861 1.1 rpaulo */
862 1.1 rpaulo void
863 1.1 rpaulo rt2560_update_rssadapt(void *arg)
864 1.1 rpaulo {
865 1.1 rpaulo struct rt2560_softc *sc = arg;
866 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
867 1.29 nonaka int s;
868 1.1 rpaulo
869 1.29 nonaka s = splnet();
870 1.1 rpaulo ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg);
871 1.1 rpaulo
872 1.1 rpaulo callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc);
873 1.29 nonaka splx(s);
874 1.1 rpaulo }
875 1.1 rpaulo
876 1.1 rpaulo int
877 1.1 rpaulo rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
878 1.1 rpaulo {
879 1.1 rpaulo struct rt2560_softc *sc = ic->ic_ifp->if_softc;
880 1.1 rpaulo enum ieee80211_state ostate;
881 1.1 rpaulo struct ieee80211_node *ni;
882 1.1 rpaulo struct mbuf *m;
883 1.1 rpaulo int error = 0;
884 1.1 rpaulo
885 1.1 rpaulo ostate = ic->ic_state;
886 1.1 rpaulo callout_stop(&sc->scan_ch);
887 1.1 rpaulo
888 1.1 rpaulo switch (nstate) {
889 1.1 rpaulo case IEEE80211_S_INIT:
890 1.1 rpaulo callout_stop(&sc->rssadapt_ch);
891 1.1 rpaulo
892 1.1 rpaulo if (ostate == IEEE80211_S_RUN) {
893 1.1 rpaulo /* abort TSF synchronization */
894 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR14, 0);
895 1.1 rpaulo
896 1.1 rpaulo /* turn association led off */
897 1.1 rpaulo rt2560_update_led(sc, 0, 0);
898 1.1 rpaulo }
899 1.1 rpaulo break;
900 1.1 rpaulo
901 1.1 rpaulo case IEEE80211_S_SCAN:
902 1.1 rpaulo rt2560_set_chan(sc, ic->ic_curchan);
903 1.1 rpaulo callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000,
904 1.1 rpaulo rt2560_next_scan, sc);
905 1.1 rpaulo break;
906 1.1 rpaulo
907 1.1 rpaulo case IEEE80211_S_AUTH:
908 1.1 rpaulo rt2560_set_chan(sc, ic->ic_curchan);
909 1.1 rpaulo break;
910 1.1 rpaulo
911 1.1 rpaulo case IEEE80211_S_ASSOC:
912 1.1 rpaulo rt2560_set_chan(sc, ic->ic_curchan);
913 1.1 rpaulo break;
914 1.1 rpaulo
915 1.1 rpaulo case IEEE80211_S_RUN:
916 1.1 rpaulo rt2560_set_chan(sc, ic->ic_curchan);
917 1.1 rpaulo
918 1.1 rpaulo ni = ic->ic_bss;
919 1.1 rpaulo
920 1.1 rpaulo if (ic->ic_opmode != IEEE80211_M_MONITOR) {
921 1.1 rpaulo rt2560_update_plcp(sc);
922 1.1 rpaulo rt2560_set_basicrates(sc);
923 1.1 rpaulo rt2560_set_bssid(sc, ni->ni_bssid);
924 1.1 rpaulo }
925 1.1 rpaulo
926 1.1 rpaulo if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
927 1.1 rpaulo ic->ic_opmode == IEEE80211_M_IBSS) {
928 1.1 rpaulo m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
929 1.1 rpaulo if (m == NULL) {
930 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate beacon\n");
931 1.1 rpaulo error = ENOBUFS;
932 1.1 rpaulo break;
933 1.1 rpaulo }
934 1.1 rpaulo
935 1.1 rpaulo ieee80211_ref_node(ni);
936 1.1 rpaulo error = rt2560_tx_bcn(sc, m, ni);
937 1.1 rpaulo if (error != 0)
938 1.1 rpaulo break;
939 1.1 rpaulo }
940 1.1 rpaulo
941 1.32 dholland /* turn association led on */
942 1.1 rpaulo rt2560_update_led(sc, 1, 0);
943 1.1 rpaulo
944 1.1 rpaulo if (ic->ic_opmode != IEEE80211_M_MONITOR) {
945 1.1 rpaulo callout_reset(&sc->rssadapt_ch, hz / 10,
946 1.1 rpaulo rt2560_update_rssadapt, sc);
947 1.1 rpaulo rt2560_enable_tsf_sync(sc);
948 1.1 rpaulo }
949 1.1 rpaulo break;
950 1.1 rpaulo }
951 1.1 rpaulo
952 1.1 rpaulo return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
953 1.1 rpaulo }
954 1.1 rpaulo
955 1.1 rpaulo /*
956 1.1 rpaulo * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
957 1.1 rpaulo * 93C66).
958 1.1 rpaulo */
959 1.1 rpaulo uint16_t
960 1.1 rpaulo rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
961 1.1 rpaulo {
962 1.1 rpaulo uint32_t tmp;
963 1.1 rpaulo uint16_t val;
964 1.1 rpaulo int n;
965 1.1 rpaulo
966 1.1 rpaulo /* clock C once before the first command */
967 1.1 rpaulo RT2560_EEPROM_CTL(sc, 0);
968 1.1 rpaulo
969 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S);
970 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
971 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S);
972 1.1 rpaulo
973 1.1 rpaulo /* write start bit (1) */
974 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
975 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
976 1.1 rpaulo
977 1.1 rpaulo /* write READ opcode (10) */
978 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
979 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
980 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S);
981 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
982 1.1 rpaulo
983 1.1 rpaulo /* write address (A5-A0 or A7-A0) */
984 1.1 rpaulo n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
985 1.1 rpaulo for (; n >= 0; n--) {
986 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S |
987 1.1 rpaulo (((addr >> n) & 1) << RT2560_SHIFT_D));
988 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S |
989 1.1 rpaulo (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
990 1.1 rpaulo }
991 1.1 rpaulo
992 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S);
993 1.1 rpaulo
994 1.1 rpaulo /* read data Q15-Q0 */
995 1.1 rpaulo val = 0;
996 1.1 rpaulo for (n = 15; n >= 0; n--) {
997 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
998 1.1 rpaulo tmp = RAL_READ(sc, RT2560_CSR21);
999 1.1 rpaulo val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
1000 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S);
1001 1.1 rpaulo }
1002 1.1 rpaulo
1003 1.1 rpaulo RT2560_EEPROM_CTL(sc, 0);
1004 1.1 rpaulo
1005 1.1 rpaulo /* clear Chip Select and clock C */
1006 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_S);
1007 1.1 rpaulo RT2560_EEPROM_CTL(sc, 0);
1008 1.1 rpaulo RT2560_EEPROM_CTL(sc, RT2560_C);
1009 1.1 rpaulo
1010 1.1 rpaulo return val;
1011 1.1 rpaulo }
1012 1.1 rpaulo
1013 1.1 rpaulo /*
1014 1.1 rpaulo * Some frames were processed by the hardware cipher engine and are ready for
1015 1.1 rpaulo * transmission.
1016 1.1 rpaulo */
1017 1.1 rpaulo void
1018 1.1 rpaulo rt2560_encryption_intr(struct rt2560_softc *sc)
1019 1.1 rpaulo {
1020 1.1 rpaulo struct rt2560_tx_desc *desc;
1021 1.1 rpaulo int hw;
1022 1.1 rpaulo
1023 1.1 rpaulo /* retrieve last descriptor index processed by cipher engine */
1024 1.1 rpaulo hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) /
1025 1.1 rpaulo RT2560_TX_DESC_SIZE;
1026 1.1 rpaulo
1027 1.1 rpaulo for (; sc->txq.next_encrypt != hw;) {
1028 1.1 rpaulo desc = &sc->txq.desc[sc->txq.next_encrypt];
1029 1.1 rpaulo
1030 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1031 1.1 rpaulo sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
1032 1.1 rpaulo RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1033 1.1 rpaulo
1034 1.1 rpaulo if (le32toh(desc->flags) &
1035 1.1 rpaulo (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY))
1036 1.1 rpaulo break;
1037 1.1 rpaulo
1038 1.1 rpaulo /* for TKIP, swap eiv field to fix a bug in ASIC */
1039 1.1 rpaulo if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) ==
1040 1.1 rpaulo RT2560_TX_CIPHER_TKIP)
1041 1.1 rpaulo desc->eiv = bswap32(desc->eiv);
1042 1.1 rpaulo
1043 1.1 rpaulo /* mark the frame ready for transmission */
1044 1.1 rpaulo desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1045 1.1 rpaulo
1046 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1047 1.1 rpaulo sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
1048 1.1 rpaulo RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1049 1.1 rpaulo
1050 1.1 rpaulo DPRINTFN(15, ("encryption done idx=%u\n",
1051 1.1 rpaulo sc->txq.next_encrypt));
1052 1.1 rpaulo
1053 1.1 rpaulo sc->txq.next_encrypt =
1054 1.1 rpaulo (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
1055 1.1 rpaulo }
1056 1.1 rpaulo
1057 1.1 rpaulo /* kick Tx */
1058 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
1059 1.1 rpaulo }
1060 1.1 rpaulo
1061 1.1 rpaulo void
1062 1.1 rpaulo rt2560_tx_intr(struct rt2560_softc *sc)
1063 1.1 rpaulo {
1064 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
1065 1.1 rpaulo struct ifnet *ifp = ic->ic_ifp;
1066 1.1 rpaulo struct rt2560_tx_desc *desc;
1067 1.1 rpaulo struct rt2560_tx_data *data;
1068 1.1 rpaulo struct rt2560_node *rn;
1069 1.29 nonaka int s;
1070 1.29 nonaka
1071 1.29 nonaka s = splnet();
1072 1.1 rpaulo
1073 1.1 rpaulo for (;;) {
1074 1.1 rpaulo desc = &sc->txq.desc[sc->txq.next];
1075 1.1 rpaulo data = &sc->txq.data[sc->txq.next];
1076 1.1 rpaulo
1077 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1078 1.1 rpaulo sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1079 1.1 rpaulo BUS_DMASYNC_POSTREAD);
1080 1.1 rpaulo
1081 1.1 rpaulo if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1082 1.1 rpaulo (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) ||
1083 1.1 rpaulo !(le32toh(desc->flags) & RT2560_TX_VALID))
1084 1.1 rpaulo break;
1085 1.1 rpaulo
1086 1.1 rpaulo rn = (struct rt2560_node *)data->ni;
1087 1.1 rpaulo
1088 1.1 rpaulo switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1089 1.1 rpaulo case RT2560_TX_SUCCESS:
1090 1.1 rpaulo DPRINTFN(10, ("data frame sent successfully\n"));
1091 1.1 rpaulo if (data->id.id_node != NULL) {
1092 1.1 rpaulo ieee80211_rssadapt_raise_rate(ic,
1093 1.1 rpaulo &rn->rssadapt, &data->id);
1094 1.1 rpaulo }
1095 1.38 thorpej if_statinc(ifp, if_opackets);
1096 1.1 rpaulo break;
1097 1.1 rpaulo
1098 1.1 rpaulo case RT2560_TX_SUCCESS_RETRY:
1099 1.1 rpaulo DPRINTFN(9, ("data frame sent after %u retries\n",
1100 1.1 rpaulo (le32toh(desc->flags) >> 5) & 0x7));
1101 1.38 thorpej if_statinc(ifp, if_opackets);
1102 1.1 rpaulo break;
1103 1.1 rpaulo
1104 1.1 rpaulo case RT2560_TX_FAIL_RETRY:
1105 1.1 rpaulo DPRINTFN(9, ("sending data frame failed (too much "
1106 1.1 rpaulo "retries)\n"));
1107 1.1 rpaulo if (data->id.id_node != NULL) {
1108 1.1 rpaulo ieee80211_rssadapt_lower_rate(ic, data->ni,
1109 1.1 rpaulo &rn->rssadapt, &data->id);
1110 1.1 rpaulo }
1111 1.38 thorpej if_statinc(ifp, if_oerrors);
1112 1.1 rpaulo break;
1113 1.1 rpaulo
1114 1.1 rpaulo case RT2560_TX_FAIL_INVALID:
1115 1.1 rpaulo case RT2560_TX_FAIL_OTHER:
1116 1.1 rpaulo default:
1117 1.29 nonaka aprint_error_dev(sc->sc_dev,
1118 1.29 nonaka "sending data frame failed 0x%08x\n",
1119 1.19 cegger le32toh(desc->flags));
1120 1.38 thorpej if_statinc(ifp, if_oerrors);
1121 1.1 rpaulo }
1122 1.1 rpaulo
1123 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1124 1.1 rpaulo data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1125 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, data->map);
1126 1.1 rpaulo m_freem(data->m);
1127 1.1 rpaulo data->m = NULL;
1128 1.1 rpaulo ieee80211_free_node(data->ni);
1129 1.1 rpaulo data->ni = NULL;
1130 1.1 rpaulo
1131 1.1 rpaulo /* descriptor is no longer valid */
1132 1.1 rpaulo desc->flags &= ~htole32(RT2560_TX_VALID);
1133 1.1 rpaulo
1134 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1135 1.1 rpaulo sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1136 1.1 rpaulo BUS_DMASYNC_PREWRITE);
1137 1.1 rpaulo
1138 1.1 rpaulo DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
1139 1.1 rpaulo
1140 1.1 rpaulo sc->txq.queued--;
1141 1.1 rpaulo sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
1142 1.1 rpaulo }
1143 1.1 rpaulo
1144 1.1 rpaulo sc->sc_tx_timer = 0;
1145 1.1 rpaulo ifp->if_flags &= ~IFF_OACTIVE;
1146 1.30 ozaki rt2560_start(ifp); /* in softint */
1147 1.29 nonaka
1148 1.29 nonaka splx(s);
1149 1.1 rpaulo }
1150 1.1 rpaulo
1151 1.1 rpaulo void
1152 1.1 rpaulo rt2560_prio_intr(struct rt2560_softc *sc)
1153 1.1 rpaulo {
1154 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
1155 1.1 rpaulo struct ifnet *ifp = ic->ic_ifp;
1156 1.1 rpaulo struct rt2560_tx_desc *desc;
1157 1.1 rpaulo struct rt2560_tx_data *data;
1158 1.29 nonaka int s;
1159 1.29 nonaka
1160 1.29 nonaka s = splnet();
1161 1.1 rpaulo
1162 1.1 rpaulo for (;;) {
1163 1.1 rpaulo desc = &sc->prioq.desc[sc->prioq.next];
1164 1.1 rpaulo data = &sc->prioq.data[sc->prioq.next];
1165 1.1 rpaulo
1166 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1167 1.1 rpaulo sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1168 1.1 rpaulo BUS_DMASYNC_POSTREAD);
1169 1.1 rpaulo
1170 1.1 rpaulo if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1171 1.1 rpaulo !(le32toh(desc->flags) & RT2560_TX_VALID))
1172 1.1 rpaulo break;
1173 1.1 rpaulo
1174 1.1 rpaulo switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1175 1.1 rpaulo case RT2560_TX_SUCCESS:
1176 1.1 rpaulo DPRINTFN(10, ("mgt frame sent successfully\n"));
1177 1.1 rpaulo break;
1178 1.1 rpaulo
1179 1.1 rpaulo case RT2560_TX_SUCCESS_RETRY:
1180 1.1 rpaulo DPRINTFN(9, ("mgt frame sent after %u retries\n",
1181 1.1 rpaulo (le32toh(desc->flags) >> 5) & 0x7));
1182 1.1 rpaulo break;
1183 1.1 rpaulo
1184 1.1 rpaulo case RT2560_TX_FAIL_RETRY:
1185 1.1 rpaulo DPRINTFN(9, ("sending mgt frame failed (too much "
1186 1.1 rpaulo "retries)\n"));
1187 1.1 rpaulo break;
1188 1.1 rpaulo
1189 1.1 rpaulo case RT2560_TX_FAIL_INVALID:
1190 1.1 rpaulo case RT2560_TX_FAIL_OTHER:
1191 1.1 rpaulo default:
1192 1.25 drochner aprint_error_dev(sc->sc_dev, "sending mgt frame failed 0x%08x\n",
1193 1.19 cegger le32toh(desc->flags));
1194 1.1 rpaulo }
1195 1.1 rpaulo
1196 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1197 1.1 rpaulo data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1198 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, data->map);
1199 1.1 rpaulo m_freem(data->m);
1200 1.1 rpaulo data->m = NULL;
1201 1.1 rpaulo ieee80211_free_node(data->ni);
1202 1.1 rpaulo data->ni = NULL;
1203 1.1 rpaulo
1204 1.1 rpaulo /* descriptor is no longer valid */
1205 1.1 rpaulo desc->flags &= ~htole32(RT2560_TX_VALID);
1206 1.1 rpaulo
1207 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1208 1.1 rpaulo sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1209 1.1 rpaulo BUS_DMASYNC_PREWRITE);
1210 1.1 rpaulo
1211 1.1 rpaulo DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1212 1.1 rpaulo
1213 1.1 rpaulo sc->prioq.queued--;
1214 1.1 rpaulo sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1215 1.1 rpaulo }
1216 1.1 rpaulo
1217 1.1 rpaulo sc->sc_tx_timer = 0;
1218 1.1 rpaulo ifp->if_flags &= ~IFF_OACTIVE;
1219 1.30 ozaki rt2560_start(ifp); /* in softint */
1220 1.29 nonaka
1221 1.29 nonaka splx(s);
1222 1.1 rpaulo }
1223 1.1 rpaulo
1224 1.1 rpaulo /*
1225 1.1 rpaulo * Some frames were processed by the hardware cipher engine and are ready for
1226 1.1 rpaulo * transmission to the IEEE802.11 layer.
1227 1.1 rpaulo */
1228 1.1 rpaulo void
1229 1.1 rpaulo rt2560_decryption_intr(struct rt2560_softc *sc)
1230 1.1 rpaulo {
1231 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
1232 1.1 rpaulo struct ifnet *ifp = ic->ic_ifp;
1233 1.1 rpaulo struct rt2560_rx_desc *desc;
1234 1.1 rpaulo struct rt2560_rx_data *data;
1235 1.1 rpaulo struct rt2560_node *rn;
1236 1.1 rpaulo struct ieee80211_frame *wh;
1237 1.1 rpaulo struct ieee80211_node *ni;
1238 1.1 rpaulo struct mbuf *mnew, *m;
1239 1.29 nonaka int hw, error, s;
1240 1.1 rpaulo
1241 1.1 rpaulo /* retrieve last decriptor index processed by cipher engine */
1242 1.1 rpaulo hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) /
1243 1.1 rpaulo RT2560_RX_DESC_SIZE;
1244 1.1 rpaulo
1245 1.1 rpaulo for (; sc->rxq.cur_decrypt != hw;) {
1246 1.1 rpaulo desc = &sc->rxq.desc[sc->rxq.cur_decrypt];
1247 1.1 rpaulo data = &sc->rxq.data[sc->rxq.cur_decrypt];
1248 1.1 rpaulo
1249 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1250 1.1 rpaulo sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1251 1.1 rpaulo RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1252 1.1 rpaulo
1253 1.1 rpaulo if (le32toh(desc->flags) &
1254 1.1 rpaulo (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1255 1.1 rpaulo break;
1256 1.1 rpaulo
1257 1.1 rpaulo if (data->drop) {
1258 1.38 thorpej if_statinc(ifp, if_ierrors);
1259 1.1 rpaulo goto skip;
1260 1.1 rpaulo }
1261 1.1 rpaulo
1262 1.1 rpaulo if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1263 1.1 rpaulo (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) {
1264 1.38 thorpej if_statinc(ifp, if_ierrors);
1265 1.1 rpaulo goto skip;
1266 1.1 rpaulo }
1267 1.1 rpaulo
1268 1.1 rpaulo /*
1269 1.1 rpaulo * Try to allocate a new mbuf for this ring element and load it
1270 1.1 rpaulo * before processing the current mbuf. If the ring element
1271 1.1 rpaulo * cannot be loaded, drop the received packet and reuse the old
1272 1.1 rpaulo * mbuf. In the unlikely case that the old mbuf can't be
1273 1.1 rpaulo * reloaded either, explicitly panic.
1274 1.1 rpaulo */
1275 1.1 rpaulo MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1276 1.1 rpaulo if (mnew == NULL) {
1277 1.38 thorpej if_statinc(ifp, if_ierrors);
1278 1.1 rpaulo goto skip;
1279 1.1 rpaulo }
1280 1.1 rpaulo
1281 1.1 rpaulo MCLGET(mnew, M_DONTWAIT);
1282 1.1 rpaulo if (!(mnew->m_flags & M_EXT)) {
1283 1.1 rpaulo m_freem(mnew);
1284 1.38 thorpej if_statinc(ifp, if_ierrors);
1285 1.1 rpaulo goto skip;
1286 1.1 rpaulo }
1287 1.1 rpaulo
1288 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1289 1.1 rpaulo data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1290 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, data->map);
1291 1.1 rpaulo
1292 1.1 rpaulo error = bus_dmamap_load(sc->sc_dmat, data->map,
1293 1.1 rpaulo mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
1294 1.1 rpaulo if (error != 0) {
1295 1.1 rpaulo m_freem(mnew);
1296 1.1 rpaulo
1297 1.1 rpaulo /* try to reload the old mbuf */
1298 1.1 rpaulo error = bus_dmamap_load(sc->sc_dmat, data->map,
1299 1.1 rpaulo mtod(data->m, void *), MCLBYTES, NULL,
1300 1.1 rpaulo BUS_DMA_NOWAIT);
1301 1.1 rpaulo if (error != 0) {
1302 1.1 rpaulo /* very unlikely that it will fail... */
1303 1.1 rpaulo panic("%s: could not load old rx mbuf",
1304 1.25 drochner device_xname(sc->sc_dev));
1305 1.1 rpaulo }
1306 1.18 xtraeme /* physical address may have changed */
1307 1.18 xtraeme desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1308 1.38 thorpej if_statinc(ifp, if_ierrors);
1309 1.1 rpaulo goto skip;
1310 1.1 rpaulo }
1311 1.1 rpaulo
1312 1.1 rpaulo /*
1313 1.1 rpaulo * New mbuf successfully loaded, update Rx ring and continue
1314 1.1 rpaulo * processing.
1315 1.1 rpaulo */
1316 1.1 rpaulo m = data->m;
1317 1.1 rpaulo data->m = mnew;
1318 1.1 rpaulo desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1319 1.1 rpaulo
1320 1.1 rpaulo /* finalize mbuf */
1321 1.28 ozaki m_set_rcvif(m, ifp);
1322 1.1 rpaulo m->m_pkthdr.len = m->m_len =
1323 1.1 rpaulo (le32toh(desc->flags) >> 16) & 0xfff;
1324 1.1 rpaulo
1325 1.29 nonaka s = splnet();
1326 1.29 nonaka
1327 1.1 rpaulo if (sc->sc_drvbpf != NULL) {
1328 1.1 rpaulo struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1329 1.1 rpaulo uint32_t tsf_lo, tsf_hi;
1330 1.1 rpaulo
1331 1.1 rpaulo /* get timestamp (low and high 32 bits) */
1332 1.1 rpaulo tsf_hi = RAL_READ(sc, RT2560_CSR17);
1333 1.1 rpaulo tsf_lo = RAL_READ(sc, RT2560_CSR16);
1334 1.1 rpaulo
1335 1.1 rpaulo tap->wr_tsf =
1336 1.1 rpaulo htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1337 1.1 rpaulo tap->wr_flags = 0;
1338 1.1 rpaulo tap->wr_rate = rt2560_rxrate(desc);
1339 1.1 rpaulo tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1340 1.1 rpaulo tap->wr_chan_flags =
1341 1.1 rpaulo htole16(ic->ic_ibss_chan->ic_flags);
1342 1.1 rpaulo tap->wr_antenna = sc->rx_ant;
1343 1.1 rpaulo tap->wr_antsignal = desc->rssi;
1344 1.1 rpaulo
1345 1.34 msaitoh bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m,
1346 1.34 msaitoh BPF_D_IN);
1347 1.1 rpaulo }
1348 1.1 rpaulo
1349 1.1 rpaulo wh = mtod(m, struct ieee80211_frame *);
1350 1.1 rpaulo ni = ieee80211_find_rxnode(ic,
1351 1.1 rpaulo (struct ieee80211_frame_min *)wh);
1352 1.1 rpaulo
1353 1.1 rpaulo /* send the frame to the 802.11 layer */
1354 1.1 rpaulo ieee80211_input(ic, m, ni, desc->rssi, 0);
1355 1.1 rpaulo
1356 1.1 rpaulo /* give rssi to the rate adatation algorithm */
1357 1.1 rpaulo rn = (struct rt2560_node *)ni;
1358 1.1 rpaulo ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi);
1359 1.1 rpaulo
1360 1.1 rpaulo /* node is no longer needed */
1361 1.1 rpaulo ieee80211_free_node(ni);
1362 1.1 rpaulo
1363 1.29 nonaka splx(s);
1364 1.29 nonaka
1365 1.1 rpaulo skip: desc->flags = htole32(RT2560_RX_BUSY);
1366 1.1 rpaulo
1367 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1368 1.1 rpaulo sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1369 1.1 rpaulo RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1370 1.1 rpaulo
1371 1.1 rpaulo DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1372 1.1 rpaulo
1373 1.1 rpaulo sc->rxq.cur_decrypt =
1374 1.1 rpaulo (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1375 1.1 rpaulo }
1376 1.1 rpaulo
1377 1.1 rpaulo /*
1378 1.1 rpaulo * In HostAP mode, ieee80211_input() will enqueue packets in if_snd
1379 1.1 rpaulo * without calling if_start().
1380 1.1 rpaulo */
1381 1.29 nonaka s = splnet();
1382 1.1 rpaulo if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE))
1383 1.1 rpaulo rt2560_start(ifp);
1384 1.29 nonaka splx(s);
1385 1.1 rpaulo }
1386 1.1 rpaulo
1387 1.1 rpaulo /*
1388 1.1 rpaulo * Some frames were received. Pass them to the hardware cipher engine before
1389 1.1 rpaulo * sending them to the 802.11 layer.
1390 1.1 rpaulo */
1391 1.1 rpaulo void
1392 1.1 rpaulo rt2560_rx_intr(struct rt2560_softc *sc)
1393 1.1 rpaulo {
1394 1.1 rpaulo struct rt2560_rx_desc *desc;
1395 1.1 rpaulo struct rt2560_rx_data *data;
1396 1.1 rpaulo
1397 1.1 rpaulo for (;;) {
1398 1.1 rpaulo desc = &sc->rxq.desc[sc->rxq.cur];
1399 1.1 rpaulo data = &sc->rxq.data[sc->rxq.cur];
1400 1.1 rpaulo
1401 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1402 1.1 rpaulo sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1403 1.1 rpaulo BUS_DMASYNC_POSTREAD);
1404 1.1 rpaulo
1405 1.1 rpaulo if (le32toh(desc->flags) &
1406 1.1 rpaulo (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1407 1.1 rpaulo break;
1408 1.1 rpaulo
1409 1.1 rpaulo data->drop = 0;
1410 1.1 rpaulo
1411 1.1 rpaulo if (le32toh(desc->flags) &
1412 1.1 rpaulo (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) {
1413 1.1 rpaulo /*
1414 1.1 rpaulo * This should not happen since we did not request
1415 1.1 rpaulo * to receive those frames when we filled RXCSR0.
1416 1.1 rpaulo */
1417 1.1 rpaulo DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1418 1.1 rpaulo le32toh(desc->flags)));
1419 1.1 rpaulo data->drop = 1;
1420 1.1 rpaulo }
1421 1.1 rpaulo
1422 1.1 rpaulo if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1423 1.1 rpaulo DPRINTFN(5, ("bad length\n"));
1424 1.1 rpaulo data->drop = 1;
1425 1.1 rpaulo }
1426 1.1 rpaulo
1427 1.1 rpaulo /* mark the frame for decryption */
1428 1.1 rpaulo desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1429 1.1 rpaulo
1430 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1431 1.1 rpaulo sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1432 1.1 rpaulo BUS_DMASYNC_PREWRITE);
1433 1.1 rpaulo
1434 1.1 rpaulo DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1435 1.1 rpaulo
1436 1.1 rpaulo sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1437 1.1 rpaulo }
1438 1.1 rpaulo
1439 1.1 rpaulo /* kick decrypt */
1440 1.1 rpaulo RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1441 1.1 rpaulo }
1442 1.1 rpaulo
1443 1.1 rpaulo /*
1444 1.1 rpaulo * This function is called periodically in IBSS mode when a new beacon must be
1445 1.1 rpaulo * sent out.
1446 1.1 rpaulo */
1447 1.1 rpaulo static void
1448 1.1 rpaulo rt2560_beacon_expire(struct rt2560_softc *sc)
1449 1.1 rpaulo {
1450 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
1451 1.1 rpaulo struct rt2560_tx_data *data;
1452 1.1 rpaulo
1453 1.1 rpaulo if (ic->ic_opmode != IEEE80211_M_IBSS &&
1454 1.1 rpaulo ic->ic_opmode != IEEE80211_M_HOSTAP)
1455 1.1 rpaulo return;
1456 1.1 rpaulo
1457 1.1 rpaulo data = &sc->bcnq.data[sc->bcnq.next];
1458 1.1 rpaulo
1459 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1460 1.1 rpaulo data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1461 1.1 rpaulo bus_dmamap_unload(sc->sc_dmat, data->map);
1462 1.1 rpaulo
1463 1.1 rpaulo ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1);
1464 1.1 rpaulo
1465 1.34 msaitoh bpf_mtap3(ic->ic_rawbpf, data->m, BPF_D_OUT);
1466 1.1 rpaulo rt2560_tx_bcn(sc, data->m, data->ni);
1467 1.1 rpaulo
1468 1.1 rpaulo DPRINTFN(15, ("beacon expired\n"));
1469 1.1 rpaulo
1470 1.1 rpaulo sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT;
1471 1.1 rpaulo }
1472 1.1 rpaulo
1473 1.1 rpaulo static void
1474 1.7 christos rt2560_wakeup_expire(struct rt2560_softc *sc)
1475 1.1 rpaulo {
1476 1.1 rpaulo DPRINTFN(15, ("wakeup expired\n"));
1477 1.1 rpaulo }
1478 1.1 rpaulo
1479 1.1 rpaulo int
1480 1.1 rpaulo rt2560_intr(void *arg)
1481 1.1 rpaulo {
1482 1.1 rpaulo struct rt2560_softc *sc = arg;
1483 1.1 rpaulo struct ifnet *ifp = &sc->sc_if;
1484 1.1 rpaulo uint32_t r;
1485 1.1 rpaulo
1486 1.25 drochner if (!device_is_active(sc->sc_dev))
1487 1.15 jmcneill return 0;
1488 1.15 jmcneill
1489 1.18 xtraeme if ((r = RAL_READ(sc, RT2560_CSR7)) == 0)
1490 1.18 xtraeme return 0; /* not for us */
1491 1.29 nonaka
1492 1.1 rpaulo /* disable interrupts */
1493 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1494 1.1 rpaulo
1495 1.1 rpaulo /* don't re-enable interrupts if we're shutting down */
1496 1.1 rpaulo if (!(ifp->if_flags & IFF_RUNNING))
1497 1.1 rpaulo return 0;
1498 1.1 rpaulo
1499 1.29 nonaka softint_schedule(sc->sc_soft_ih);
1500 1.29 nonaka return 1;
1501 1.29 nonaka }
1502 1.29 nonaka
1503 1.29 nonaka static void
1504 1.29 nonaka rt2560_softintr(void *arg)
1505 1.29 nonaka {
1506 1.29 nonaka struct rt2560_softc *sc = arg;
1507 1.29 nonaka struct ifnet *ifp = &sc->sc_if;
1508 1.29 nonaka uint32_t r;
1509 1.29 nonaka
1510 1.29 nonaka if (!device_is_active(sc->sc_dev) || !(ifp->if_flags & IFF_RUNNING))
1511 1.29 nonaka return;
1512 1.29 nonaka
1513 1.29 nonaka if ((r = RAL_READ(sc, RT2560_CSR7)) == 0)
1514 1.29 nonaka goto out;
1515 1.29 nonaka
1516 1.29 nonaka /* acknowledge interrupts */
1517 1.29 nonaka RAL_WRITE(sc, RT2560_CSR7, r);
1518 1.29 nonaka
1519 1.1 rpaulo if (r & RT2560_BEACON_EXPIRE)
1520 1.1 rpaulo rt2560_beacon_expire(sc);
1521 1.1 rpaulo
1522 1.1 rpaulo if (r & RT2560_WAKEUP_EXPIRE)
1523 1.1 rpaulo rt2560_wakeup_expire(sc);
1524 1.1 rpaulo
1525 1.1 rpaulo if (r & RT2560_ENCRYPTION_DONE)
1526 1.1 rpaulo rt2560_encryption_intr(sc);
1527 1.1 rpaulo
1528 1.1 rpaulo if (r & RT2560_TX_DONE)
1529 1.1 rpaulo rt2560_tx_intr(sc);
1530 1.1 rpaulo
1531 1.1 rpaulo if (r & RT2560_PRIO_DONE)
1532 1.1 rpaulo rt2560_prio_intr(sc);
1533 1.1 rpaulo
1534 1.1 rpaulo if (r & RT2560_DECRYPTION_DONE)
1535 1.1 rpaulo rt2560_decryption_intr(sc);
1536 1.1 rpaulo
1537 1.1 rpaulo if (r & RT2560_RX_DONE)
1538 1.1 rpaulo rt2560_rx_intr(sc);
1539 1.1 rpaulo
1540 1.29 nonaka out:
1541 1.1 rpaulo /* re-enable interrupts */
1542 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1543 1.1 rpaulo }
1544 1.1 rpaulo
1545 1.1 rpaulo /* quickly determine if a given rate is CCK or OFDM */
1546 1.1 rpaulo #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1547 1.1 rpaulo
1548 1.1 rpaulo #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
1549 1.1 rpaulo #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
1550 1.1 rpaulo
1551 1.1 rpaulo #define RAL_SIFS 10 /* us */
1552 1.1 rpaulo
1553 1.1 rpaulo #define RT2560_RXTX_TURNAROUND 10 /* us */
1554 1.1 rpaulo
1555 1.1 rpaulo /*
1556 1.1 rpaulo * This function is only used by the Rx radiotap code. It returns the rate at
1557 1.1 rpaulo * which a given frame was received.
1558 1.1 rpaulo */
1559 1.1 rpaulo static uint8_t
1560 1.1 rpaulo rt2560_rxrate(struct rt2560_rx_desc *desc)
1561 1.1 rpaulo {
1562 1.1 rpaulo if (le32toh(desc->flags) & RT2560_RX_OFDM) {
1563 1.1 rpaulo /* reverse function of rt2560_plcp_signal */
1564 1.1 rpaulo switch (desc->rate) {
1565 1.1 rpaulo case 0xb: return 12;
1566 1.1 rpaulo case 0xf: return 18;
1567 1.1 rpaulo case 0xa: return 24;
1568 1.1 rpaulo case 0xe: return 36;
1569 1.1 rpaulo case 0x9: return 48;
1570 1.1 rpaulo case 0xd: return 72;
1571 1.1 rpaulo case 0x8: return 96;
1572 1.1 rpaulo case 0xc: return 108;
1573 1.1 rpaulo }
1574 1.1 rpaulo } else {
1575 1.1 rpaulo if (desc->rate == 10)
1576 1.1 rpaulo return 2;
1577 1.1 rpaulo if (desc->rate == 20)
1578 1.1 rpaulo return 4;
1579 1.1 rpaulo if (desc->rate == 55)
1580 1.1 rpaulo return 11;
1581 1.1 rpaulo if (desc->rate == 110)
1582 1.1 rpaulo return 22;
1583 1.1 rpaulo }
1584 1.1 rpaulo return 2; /* should not get there */
1585 1.1 rpaulo }
1586 1.1 rpaulo
1587 1.1 rpaulo /*
1588 1.1 rpaulo * Return the expected ack rate for a frame transmitted at rate `rate'.
1589 1.1 rpaulo * XXX: this should depend on the destination node basic rate set.
1590 1.1 rpaulo */
1591 1.1 rpaulo static int
1592 1.1 rpaulo rt2560_ack_rate(struct ieee80211com *ic, int rate)
1593 1.1 rpaulo {
1594 1.1 rpaulo switch (rate) {
1595 1.1 rpaulo /* CCK rates */
1596 1.1 rpaulo case 2:
1597 1.1 rpaulo return 2;
1598 1.1 rpaulo case 4:
1599 1.1 rpaulo case 11:
1600 1.1 rpaulo case 22:
1601 1.1 rpaulo return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1602 1.1 rpaulo
1603 1.1 rpaulo /* OFDM rates */
1604 1.1 rpaulo case 12:
1605 1.1 rpaulo case 18:
1606 1.1 rpaulo return 12;
1607 1.1 rpaulo case 24:
1608 1.1 rpaulo case 36:
1609 1.1 rpaulo return 24;
1610 1.1 rpaulo case 48:
1611 1.1 rpaulo case 72:
1612 1.1 rpaulo case 96:
1613 1.1 rpaulo case 108:
1614 1.1 rpaulo return 48;
1615 1.1 rpaulo }
1616 1.1 rpaulo
1617 1.1 rpaulo /* default to 1Mbps */
1618 1.1 rpaulo return 2;
1619 1.1 rpaulo }
1620 1.1 rpaulo
1621 1.1 rpaulo /*
1622 1.1 rpaulo * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1623 1.1 rpaulo * The function automatically determines the operating mode depending on the
1624 1.1 rpaulo * given rate. `flags' indicates whether short preamble is in use or not.
1625 1.1 rpaulo */
1626 1.1 rpaulo static uint16_t
1627 1.1 rpaulo rt2560_txtime(int len, int rate, uint32_t flags)
1628 1.1 rpaulo {
1629 1.1 rpaulo uint16_t txtime;
1630 1.1 rpaulo
1631 1.1 rpaulo if (RAL_RATE_IS_OFDM(rate)) {
1632 1.1 rpaulo /* IEEE Std 802.11a-1999, pp. 37 */
1633 1.1 rpaulo txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1634 1.1 rpaulo txtime = 16 + 4 + 4 * txtime + 6;
1635 1.1 rpaulo } else {
1636 1.1 rpaulo /* IEEE Std 802.11b-1999, pp. 28 */
1637 1.1 rpaulo txtime = (16 * len + rate - 1) / rate;
1638 1.1 rpaulo if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1639 1.1 rpaulo txtime += 72 + 24;
1640 1.1 rpaulo else
1641 1.1 rpaulo txtime += 144 + 48;
1642 1.1 rpaulo }
1643 1.1 rpaulo return txtime;
1644 1.1 rpaulo }
1645 1.1 rpaulo
1646 1.1 rpaulo static uint8_t
1647 1.1 rpaulo rt2560_plcp_signal(int rate)
1648 1.1 rpaulo {
1649 1.1 rpaulo switch (rate) {
1650 1.1 rpaulo /* CCK rates (returned values are device-dependent) */
1651 1.1 rpaulo case 2: return 0x0;
1652 1.1 rpaulo case 4: return 0x1;
1653 1.1 rpaulo case 11: return 0x2;
1654 1.1 rpaulo case 22: return 0x3;
1655 1.1 rpaulo
1656 1.1 rpaulo /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1657 1.1 rpaulo case 12: return 0xb;
1658 1.1 rpaulo case 18: return 0xf;
1659 1.1 rpaulo case 24: return 0xa;
1660 1.1 rpaulo case 36: return 0xe;
1661 1.1 rpaulo case 48: return 0x9;
1662 1.1 rpaulo case 72: return 0xd;
1663 1.1 rpaulo case 96: return 0x8;
1664 1.1 rpaulo case 108: return 0xc;
1665 1.1 rpaulo
1666 1.1 rpaulo /* unsupported rates (should not get there) */
1667 1.1 rpaulo default: return 0xff;
1668 1.1 rpaulo }
1669 1.1 rpaulo }
1670 1.1 rpaulo
1671 1.1 rpaulo static void
1672 1.1 rpaulo rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1673 1.1 rpaulo uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1674 1.1 rpaulo {
1675 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
1676 1.1 rpaulo uint16_t plcp_length;
1677 1.1 rpaulo int remainder;
1678 1.1 rpaulo
1679 1.1 rpaulo desc->flags = htole32(flags);
1680 1.1 rpaulo desc->flags |= htole32(len << 16);
1681 1.1 rpaulo desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) :
1682 1.1 rpaulo htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1683 1.1 rpaulo
1684 1.1 rpaulo desc->physaddr = htole32(physaddr);
1685 1.1 rpaulo desc->wme = htole16(
1686 1.1 rpaulo RT2560_AIFSN(2) |
1687 1.1 rpaulo RT2560_LOGCWMIN(3) |
1688 1.1 rpaulo RT2560_LOGCWMAX(8));
1689 1.1 rpaulo
1690 1.1 rpaulo /* setup PLCP fields */
1691 1.1 rpaulo desc->plcp_signal = rt2560_plcp_signal(rate);
1692 1.1 rpaulo desc->plcp_service = 4;
1693 1.1 rpaulo
1694 1.1 rpaulo len += IEEE80211_CRC_LEN;
1695 1.1 rpaulo if (RAL_RATE_IS_OFDM(rate)) {
1696 1.1 rpaulo desc->flags |= htole32(RT2560_TX_OFDM);
1697 1.1 rpaulo
1698 1.1 rpaulo plcp_length = len & 0xfff;
1699 1.1 rpaulo desc->plcp_length_hi = plcp_length >> 6;
1700 1.1 rpaulo desc->plcp_length_lo = plcp_length & 0x3f;
1701 1.1 rpaulo } else {
1702 1.1 rpaulo plcp_length = (16 * len + rate - 1) / rate;
1703 1.1 rpaulo if (rate == 22) {
1704 1.1 rpaulo remainder = (16 * len) % 22;
1705 1.1 rpaulo if (remainder != 0 && remainder < 7)
1706 1.1 rpaulo desc->plcp_service |= RT2560_PLCP_LENGEXT;
1707 1.1 rpaulo }
1708 1.1 rpaulo desc->plcp_length_hi = plcp_length >> 8;
1709 1.1 rpaulo desc->plcp_length_lo = plcp_length & 0xff;
1710 1.1 rpaulo
1711 1.1 rpaulo if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1712 1.1 rpaulo desc->plcp_signal |= 0x08;
1713 1.1 rpaulo }
1714 1.1 rpaulo }
1715 1.1 rpaulo
1716 1.1 rpaulo static int
1717 1.1 rpaulo rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1718 1.1 rpaulo struct ieee80211_node *ni)
1719 1.1 rpaulo {
1720 1.1 rpaulo struct rt2560_tx_desc *desc;
1721 1.1 rpaulo struct rt2560_tx_data *data;
1722 1.1 rpaulo int rate, error;
1723 1.1 rpaulo
1724 1.1 rpaulo desc = &sc->bcnq.desc[sc->bcnq.cur];
1725 1.1 rpaulo data = &sc->bcnq.data[sc->bcnq.cur];
1726 1.1 rpaulo
1727 1.1 rpaulo rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1728 1.1 rpaulo
1729 1.1 rpaulo error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1730 1.1 rpaulo BUS_DMA_NOWAIT);
1731 1.1 rpaulo if (error != 0) {
1732 1.25 drochner aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1733 1.19 cegger error);
1734 1.1 rpaulo m_freem(m0);
1735 1.1 rpaulo return error;
1736 1.1 rpaulo }
1737 1.1 rpaulo
1738 1.1 rpaulo data->m = m0;
1739 1.1 rpaulo data->ni = ni;
1740 1.1 rpaulo
1741 1.1 rpaulo rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1742 1.1 rpaulo RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0,
1743 1.1 rpaulo data->map->dm_segs->ds_addr);
1744 1.1 rpaulo
1745 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1746 1.1 rpaulo BUS_DMASYNC_PREWRITE);
1747 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map,
1748 1.1 rpaulo sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1749 1.1 rpaulo BUS_DMASYNC_PREWRITE);
1750 1.1 rpaulo
1751 1.1 rpaulo return 0;
1752 1.1 rpaulo }
1753 1.1 rpaulo
1754 1.1 rpaulo static int
1755 1.1 rpaulo rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1756 1.1 rpaulo struct ieee80211_node *ni)
1757 1.1 rpaulo {
1758 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
1759 1.1 rpaulo struct rt2560_tx_desc *desc;
1760 1.1 rpaulo struct rt2560_tx_data *data;
1761 1.1 rpaulo struct ieee80211_frame *wh;
1762 1.14 degroote struct ieee80211_key *k;
1763 1.1 rpaulo uint16_t dur;
1764 1.1 rpaulo uint32_t flags = 0;
1765 1.1 rpaulo int rate, error;
1766 1.1 rpaulo
1767 1.1 rpaulo desc = &sc->prioq.desc[sc->prioq.cur];
1768 1.1 rpaulo data = &sc->prioq.data[sc->prioq.cur];
1769 1.1 rpaulo
1770 1.1 rpaulo rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1771 1.1 rpaulo
1772 1.14 degroote wh = mtod(m0, struct ieee80211_frame *);
1773 1.14 degroote
1774 1.14 degroote if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1775 1.14 degroote k = ieee80211_crypto_encap(ic, ni, m0);
1776 1.14 degroote if (k == NULL) {
1777 1.14 degroote m_freem(m0);
1778 1.14 degroote return ENOBUFS;
1779 1.14 degroote }
1780 1.18 xtraeme
1781 1.18 xtraeme /* packet header may have moved, reset our local pointer */
1782 1.18 xtraeme wh = mtod(m0, struct ieee80211_frame *);
1783 1.14 degroote }
1784 1.14 degroote
1785 1.1 rpaulo error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1786 1.1 rpaulo BUS_DMA_NOWAIT);
1787 1.1 rpaulo if (error != 0) {
1788 1.25 drochner aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1789 1.19 cegger error);
1790 1.1 rpaulo m_freem(m0);
1791 1.1 rpaulo return error;
1792 1.1 rpaulo }
1793 1.1 rpaulo
1794 1.1 rpaulo if (sc->sc_drvbpf != NULL) {
1795 1.1 rpaulo struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1796 1.1 rpaulo
1797 1.1 rpaulo tap->wt_flags = 0;
1798 1.1 rpaulo tap->wt_rate = rate;
1799 1.1 rpaulo tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1800 1.1 rpaulo tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1801 1.1 rpaulo tap->wt_antenna = sc->tx_ant;
1802 1.1 rpaulo
1803 1.34 msaitoh bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT);
1804 1.1 rpaulo }
1805 1.1 rpaulo
1806 1.1 rpaulo data->m = m0;
1807 1.1 rpaulo data->ni = ni;
1808 1.1 rpaulo
1809 1.1 rpaulo wh = mtod(m0, struct ieee80211_frame *);
1810 1.1 rpaulo
1811 1.1 rpaulo if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1812 1.1 rpaulo flags |= RT2560_TX_ACK;
1813 1.1 rpaulo
1814 1.1 rpaulo dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1815 1.1 rpaulo RAL_SIFS;
1816 1.1 rpaulo *(uint16_t *)wh->i_dur = htole16(dur);
1817 1.1 rpaulo
1818 1.1 rpaulo /* tell hardware to add timestamp for probe responses */
1819 1.1 rpaulo if ((wh->i_fc[0] &
1820 1.1 rpaulo (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1821 1.1 rpaulo (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1822 1.1 rpaulo flags |= RT2560_TX_TIMESTAMP;
1823 1.1 rpaulo }
1824 1.1 rpaulo
1825 1.1 rpaulo rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
1826 1.1 rpaulo data->map->dm_segs->ds_addr);
1827 1.1 rpaulo
1828 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1829 1.1 rpaulo BUS_DMASYNC_PREWRITE);
1830 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1831 1.1 rpaulo sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1832 1.1 rpaulo BUS_DMASYNC_PREWRITE);
1833 1.1 rpaulo
1834 1.1 rpaulo DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1835 1.1 rpaulo m0->m_pkthdr.len, sc->prioq.cur, rate));
1836 1.1 rpaulo
1837 1.1 rpaulo /* kick prio */
1838 1.1 rpaulo sc->prioq.queued++;
1839 1.1 rpaulo sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1840 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1841 1.1 rpaulo
1842 1.1 rpaulo return 0;
1843 1.1 rpaulo }
1844 1.1 rpaulo
1845 1.1 rpaulo /*
1846 1.1 rpaulo * Build a RTS control frame.
1847 1.1 rpaulo */
1848 1.1 rpaulo static struct mbuf *
1849 1.1 rpaulo rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh,
1850 1.1 rpaulo uint16_t dur)
1851 1.1 rpaulo {
1852 1.1 rpaulo struct ieee80211_frame_rts *rts;
1853 1.1 rpaulo struct mbuf *m;
1854 1.1 rpaulo
1855 1.1 rpaulo MGETHDR(m, M_DONTWAIT, MT_DATA);
1856 1.1 rpaulo if (m == NULL) {
1857 1.1 rpaulo sc->sc_ic.ic_stats.is_tx_nobuf++;
1858 1.25 drochner aprint_error_dev(sc->sc_dev, "could not allocate RTS frame\n");
1859 1.1 rpaulo return NULL;
1860 1.1 rpaulo }
1861 1.1 rpaulo
1862 1.1 rpaulo rts = mtod(m, struct ieee80211_frame_rts *);
1863 1.1 rpaulo
1864 1.1 rpaulo rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1865 1.1 rpaulo IEEE80211_FC0_SUBTYPE_RTS;
1866 1.1 rpaulo rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1867 1.1 rpaulo *(uint16_t *)rts->i_dur = htole16(dur);
1868 1.1 rpaulo IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1869 1.1 rpaulo IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1870 1.1 rpaulo
1871 1.1 rpaulo m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
1872 1.1 rpaulo
1873 1.1 rpaulo return m;
1874 1.1 rpaulo }
1875 1.1 rpaulo
1876 1.1 rpaulo static int
1877 1.1 rpaulo rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1878 1.1 rpaulo struct ieee80211_node *ni)
1879 1.1 rpaulo {
1880 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
1881 1.1 rpaulo struct rt2560_tx_desc *desc;
1882 1.1 rpaulo struct rt2560_tx_data *data;
1883 1.1 rpaulo struct rt2560_node *rn;
1884 1.1 rpaulo struct ieee80211_rateset *rs;
1885 1.1 rpaulo struct ieee80211_frame *wh;
1886 1.1 rpaulo struct ieee80211_key *k;
1887 1.1 rpaulo struct mbuf *mnew;
1888 1.1 rpaulo uint16_t dur;
1889 1.1 rpaulo uint32_t flags = 0;
1890 1.1 rpaulo int rate, error;
1891 1.1 rpaulo
1892 1.1 rpaulo wh = mtod(m0, struct ieee80211_frame *);
1893 1.1 rpaulo
1894 1.1 rpaulo if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
1895 1.1 rpaulo rs = &ic->ic_sup_rates[ic->ic_curmode];
1896 1.1 rpaulo rate = rs->rs_rates[ic->ic_fixed_rate];
1897 1.1 rpaulo } else {
1898 1.1 rpaulo rs = &ni->ni_rates;
1899 1.1 rpaulo rn = (struct rt2560_node *)ni;
1900 1.1 rpaulo ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs,
1901 1.1 rpaulo wh, m0->m_pkthdr.len, -1, NULL, 0);
1902 1.1 rpaulo rate = rs->rs_rates[ni->ni_txrate];
1903 1.1 rpaulo }
1904 1.1 rpaulo rate &= IEEE80211_RATE_VAL;
1905 1.1 rpaulo
1906 1.1 rpaulo if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1907 1.1 rpaulo k = ieee80211_crypto_encap(ic, ni, m0);
1908 1.1 rpaulo if (k == NULL) {
1909 1.1 rpaulo m_freem(m0);
1910 1.1 rpaulo return ENOBUFS;
1911 1.1 rpaulo }
1912 1.1 rpaulo
1913 1.1 rpaulo /* packet header may have moved, reset our local pointer */
1914 1.1 rpaulo wh = mtod(m0, struct ieee80211_frame *);
1915 1.1 rpaulo }
1916 1.1 rpaulo
1917 1.1 rpaulo /*
1918 1.1 rpaulo * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1919 1.1 rpaulo * for directed frames only when the length of the MPDU is greater
1920 1.1 rpaulo * than the length threshold indicated by [...]" ic_rtsthreshold.
1921 1.1 rpaulo */
1922 1.1 rpaulo if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1923 1.1 rpaulo m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1924 1.1 rpaulo struct mbuf *m;
1925 1.1 rpaulo int rtsrate, ackrate;
1926 1.1 rpaulo
1927 1.1 rpaulo rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1928 1.1 rpaulo ackrate = rt2560_ack_rate(ic, rate);
1929 1.1 rpaulo
1930 1.1 rpaulo dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) +
1931 1.1 rpaulo rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) +
1932 1.1 rpaulo rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1933 1.1 rpaulo 3 * RAL_SIFS;
1934 1.1 rpaulo
1935 1.1 rpaulo m = rt2560_get_rts(sc, wh, dur);
1936 1.1 rpaulo
1937 1.1 rpaulo desc = &sc->txq.desc[sc->txq.cur_encrypt];
1938 1.1 rpaulo data = &sc->txq.data[sc->txq.cur_encrypt];
1939 1.1 rpaulo
1940 1.1 rpaulo error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
1941 1.1 rpaulo BUS_DMA_NOWAIT);
1942 1.1 rpaulo if (error != 0) {
1943 1.25 drochner aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1944 1.19 cegger error);
1945 1.1 rpaulo m_freem(m);
1946 1.1 rpaulo m_freem(m0);
1947 1.1 rpaulo return error;
1948 1.1 rpaulo }
1949 1.1 rpaulo
1950 1.1 rpaulo /* avoid multiple free() of the same node for each fragment */
1951 1.1 rpaulo ieee80211_ref_node(ni);
1952 1.1 rpaulo
1953 1.1 rpaulo data->m = m;
1954 1.1 rpaulo data->ni = ni;
1955 1.1 rpaulo
1956 1.1 rpaulo /* RTS frames are not taken into account for rssadapt */
1957 1.1 rpaulo data->id.id_node = NULL;
1958 1.1 rpaulo
1959 1.1 rpaulo rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK |
1960 1.1 rpaulo RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1,
1961 1.1 rpaulo data->map->dm_segs->ds_addr);
1962 1.1 rpaulo
1963 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1964 1.1 rpaulo data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1965 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1966 1.1 rpaulo sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE,
1967 1.1 rpaulo RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1968 1.1 rpaulo
1969 1.1 rpaulo sc->txq.queued++;
1970 1.1 rpaulo sc->txq.cur_encrypt =
1971 1.1 rpaulo (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1972 1.1 rpaulo
1973 1.1 rpaulo /*
1974 1.1 rpaulo * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1975 1.1 rpaulo * asynchronous data frame shall be transmitted after the CTS
1976 1.1 rpaulo * frame and a SIFS period.
1977 1.1 rpaulo */
1978 1.1 rpaulo flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1979 1.1 rpaulo }
1980 1.1 rpaulo
1981 1.1 rpaulo data = &sc->txq.data[sc->txq.cur_encrypt];
1982 1.1 rpaulo desc = &sc->txq.desc[sc->txq.cur_encrypt];
1983 1.1 rpaulo
1984 1.1 rpaulo error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1985 1.1 rpaulo BUS_DMA_NOWAIT);
1986 1.1 rpaulo if (error != 0 && error != EFBIG) {
1987 1.25 drochner aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1988 1.19 cegger error);
1989 1.1 rpaulo m_freem(m0);
1990 1.1 rpaulo return error;
1991 1.1 rpaulo }
1992 1.1 rpaulo if (error != 0) {
1993 1.1 rpaulo /* too many fragments, linearize */
1994 1.1 rpaulo
1995 1.1 rpaulo MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1996 1.1 rpaulo if (mnew == NULL) {
1997 1.1 rpaulo m_freem(m0);
1998 1.1 rpaulo return ENOMEM;
1999 1.1 rpaulo }
2000 1.1 rpaulo
2001 1.36 maxv m_copy_pkthdr(mnew, m0);
2002 1.1 rpaulo if (m0->m_pkthdr.len > MHLEN) {
2003 1.1 rpaulo MCLGET(mnew, M_DONTWAIT);
2004 1.1 rpaulo if (!(mnew->m_flags & M_EXT)) {
2005 1.1 rpaulo m_freem(m0);
2006 1.1 rpaulo m_freem(mnew);
2007 1.1 rpaulo return ENOMEM;
2008 1.1 rpaulo }
2009 1.1 rpaulo }
2010 1.1 rpaulo
2011 1.8 christos m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *));
2012 1.1 rpaulo m_freem(m0);
2013 1.1 rpaulo mnew->m_len = mnew->m_pkthdr.len;
2014 1.1 rpaulo m0 = mnew;
2015 1.1 rpaulo
2016 1.1 rpaulo error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
2017 1.1 rpaulo BUS_DMA_NOWAIT);
2018 1.1 rpaulo if (error != 0) {
2019 1.25 drochner aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
2020 1.19 cegger error);
2021 1.1 rpaulo m_freem(m0);
2022 1.1 rpaulo return error;
2023 1.1 rpaulo }
2024 1.1 rpaulo
2025 1.1 rpaulo /* packet header have moved, reset our local pointer */
2026 1.1 rpaulo wh = mtod(m0, struct ieee80211_frame *);
2027 1.1 rpaulo }
2028 1.1 rpaulo
2029 1.1 rpaulo if (sc->sc_drvbpf != NULL) {
2030 1.1 rpaulo struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
2031 1.1 rpaulo
2032 1.1 rpaulo tap->wt_flags = 0;
2033 1.1 rpaulo tap->wt_rate = rate;
2034 1.1 rpaulo tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
2035 1.1 rpaulo tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
2036 1.1 rpaulo tap->wt_antenna = sc->tx_ant;
2037 1.1 rpaulo
2038 1.34 msaitoh bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT);
2039 1.1 rpaulo }
2040 1.1 rpaulo
2041 1.1 rpaulo data->m = m0;
2042 1.1 rpaulo data->ni = ni;
2043 1.1 rpaulo
2044 1.1 rpaulo /* remember link conditions for rate adaptation algorithm */
2045 1.1 rpaulo if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
2046 1.1 rpaulo data->id.id_len = m0->m_pkthdr.len;
2047 1.1 rpaulo data->id.id_rateidx = ni->ni_txrate;
2048 1.1 rpaulo data->id.id_node = ni;
2049 1.1 rpaulo data->id.id_rssi = ni->ni_rssi;
2050 1.1 rpaulo } else
2051 1.1 rpaulo data->id.id_node = NULL;
2052 1.1 rpaulo
2053 1.1 rpaulo if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2054 1.1 rpaulo flags |= RT2560_TX_ACK;
2055 1.1 rpaulo
2056 1.1 rpaulo dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate),
2057 1.1 rpaulo ic->ic_flags) + RAL_SIFS;
2058 1.1 rpaulo *(uint16_t *)wh->i_dur = htole16(dur);
2059 1.1 rpaulo }
2060 1.1 rpaulo
2061 1.1 rpaulo rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
2062 1.1 rpaulo data->map->dm_segs->ds_addr);
2063 1.1 rpaulo
2064 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
2065 1.1 rpaulo BUS_DMASYNC_PREWRITE);
2066 1.1 rpaulo bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
2067 1.1 rpaulo sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
2068 1.1 rpaulo BUS_DMASYNC_PREWRITE);
2069 1.1 rpaulo
2070 1.1 rpaulo DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
2071 1.1 rpaulo m0->m_pkthdr.len, sc->txq.cur_encrypt, rate));
2072 1.1 rpaulo
2073 1.1 rpaulo /* kick encrypt */
2074 1.1 rpaulo sc->txq.queued++;
2075 1.1 rpaulo sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
2076 1.1 rpaulo RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
2077 1.1 rpaulo
2078 1.1 rpaulo return 0;
2079 1.1 rpaulo }
2080 1.1 rpaulo
2081 1.1 rpaulo static void
2082 1.1 rpaulo rt2560_start(struct ifnet *ifp)
2083 1.1 rpaulo {
2084 1.1 rpaulo struct rt2560_softc *sc = ifp->if_softc;
2085 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2086 1.1 rpaulo struct mbuf *m0;
2087 1.1 rpaulo struct ieee80211_node *ni;
2088 1.1 rpaulo struct ether_header *eh;
2089 1.1 rpaulo
2090 1.1 rpaulo /*
2091 1.1 rpaulo * net80211 may still try to send management frames even if the
2092 1.1 rpaulo * IFF_RUNNING flag is not set...
2093 1.1 rpaulo */
2094 1.1 rpaulo if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
2095 1.1 rpaulo return;
2096 1.1 rpaulo
2097 1.1 rpaulo for (;;) {
2098 1.1 rpaulo IF_POLL(&ic->ic_mgtq, m0);
2099 1.1 rpaulo if (m0 != NULL) {
2100 1.1 rpaulo if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
2101 1.1 rpaulo ifp->if_flags |= IFF_OACTIVE;
2102 1.1 rpaulo break;
2103 1.1 rpaulo }
2104 1.1 rpaulo IF_DEQUEUE(&ic->ic_mgtq, m0);
2105 1.2 rpaulo if (m0 == NULL)
2106 1.2 rpaulo break;
2107 1.1 rpaulo
2108 1.26 ozaki ni = M_GETCTX(m0, struct ieee80211_node *);
2109 1.27 ozaki M_CLEARCTX(m0);
2110 1.34 msaitoh bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT);
2111 1.1 rpaulo if (rt2560_tx_mgt(sc, m0, ni) != 0)
2112 1.1 rpaulo break;
2113 1.1 rpaulo
2114 1.1 rpaulo } else {
2115 1.1 rpaulo if (ic->ic_state != IEEE80211_S_RUN)
2116 1.1 rpaulo break;
2117 1.1 rpaulo IFQ_DEQUEUE(&ifp->if_snd, m0);
2118 1.1 rpaulo if (m0 == NULL)
2119 1.1 rpaulo break;
2120 1.1 rpaulo if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
2121 1.1 rpaulo ifp->if_flags |= IFF_OACTIVE;
2122 1.1 rpaulo break;
2123 1.1 rpaulo }
2124 1.1 rpaulo
2125 1.1 rpaulo if (m0->m_len < sizeof (struct ether_header) &&
2126 1.1 rpaulo !(m0 = m_pullup(m0, sizeof (struct ether_header))))
2127 1.1 rpaulo continue;
2128 1.1 rpaulo
2129 1.1 rpaulo eh = mtod(m0, struct ether_header *);
2130 1.1 rpaulo ni = ieee80211_find_txnode(ic, eh->ether_dhost);
2131 1.1 rpaulo if (ni == NULL) {
2132 1.1 rpaulo m_freem(m0);
2133 1.1 rpaulo continue;
2134 1.1 rpaulo }
2135 1.34 msaitoh bpf_mtap(ifp, m0, BPF_D_OUT);
2136 1.1 rpaulo
2137 1.1 rpaulo m0 = ieee80211_encap(ic, m0, ni);
2138 1.1 rpaulo if (m0 == NULL) {
2139 1.1 rpaulo ieee80211_free_node(ni);
2140 1.1 rpaulo continue;
2141 1.1 rpaulo }
2142 1.1 rpaulo
2143 1.34 msaitoh bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT);
2144 1.1 rpaulo
2145 1.1 rpaulo if (rt2560_tx_data(sc, m0, ni) != 0) {
2146 1.1 rpaulo ieee80211_free_node(ni);
2147 1.38 thorpej if_statinc(ifp, if_oerrors);
2148 1.1 rpaulo break;
2149 1.1 rpaulo }
2150 1.1 rpaulo }
2151 1.1 rpaulo
2152 1.1 rpaulo sc->sc_tx_timer = 5;
2153 1.1 rpaulo ifp->if_timer = 1;
2154 1.1 rpaulo }
2155 1.1 rpaulo }
2156 1.1 rpaulo
2157 1.1 rpaulo static void
2158 1.1 rpaulo rt2560_watchdog(struct ifnet *ifp)
2159 1.1 rpaulo {
2160 1.1 rpaulo struct rt2560_softc *sc = ifp->if_softc;
2161 1.1 rpaulo
2162 1.1 rpaulo ifp->if_timer = 0;
2163 1.1 rpaulo
2164 1.1 rpaulo if (sc->sc_tx_timer > 0) {
2165 1.1 rpaulo if (--sc->sc_tx_timer == 0) {
2166 1.25 drochner aprint_error_dev(sc->sc_dev, "device timeout\n");
2167 1.1 rpaulo rt2560_init(ifp);
2168 1.38 thorpej if_statinc(ifp, if_oerrors);
2169 1.1 rpaulo return;
2170 1.1 rpaulo }
2171 1.1 rpaulo ifp->if_timer = 1;
2172 1.1 rpaulo }
2173 1.1 rpaulo
2174 1.1 rpaulo ieee80211_watchdog(&sc->sc_ic);
2175 1.1 rpaulo }
2176 1.1 rpaulo
2177 1.1 rpaulo /*
2178 1.1 rpaulo * This function allows for fast channel switching in monitor mode (used by
2179 1.1 rpaulo * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
2180 1.1 rpaulo * generate a new beacon frame.
2181 1.1 rpaulo */
2182 1.1 rpaulo static int
2183 1.1 rpaulo rt2560_reset(struct ifnet *ifp)
2184 1.1 rpaulo {
2185 1.1 rpaulo struct rt2560_softc *sc = ifp->if_softc;
2186 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2187 1.1 rpaulo
2188 1.1 rpaulo if (ic->ic_opmode != IEEE80211_M_MONITOR)
2189 1.1 rpaulo return ENETRESET;
2190 1.1 rpaulo
2191 1.1 rpaulo rt2560_set_chan(sc, ic->ic_curchan);
2192 1.1 rpaulo
2193 1.1 rpaulo return 0;
2194 1.1 rpaulo }
2195 1.1 rpaulo
2196 1.1 rpaulo int
2197 1.8 christos rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data)
2198 1.1 rpaulo {
2199 1.1 rpaulo struct rt2560_softc *sc = ifp->if_softc;
2200 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2201 1.1 rpaulo int s, error = 0;
2202 1.1 rpaulo
2203 1.1 rpaulo s = splnet();
2204 1.1 rpaulo
2205 1.1 rpaulo switch (cmd) {
2206 1.1 rpaulo case SIOCSIFFLAGS:
2207 1.20 dyoung if ((error = ifioctl_common(ifp, cmd, data)) != 0)
2208 1.20 dyoung break;
2209 1.1 rpaulo if (ifp->if_flags & IFF_UP) {
2210 1.1 rpaulo if (ifp->if_flags & IFF_RUNNING)
2211 1.1 rpaulo rt2560_update_promisc(sc);
2212 1.1 rpaulo else
2213 1.1 rpaulo rt2560_init(ifp);
2214 1.1 rpaulo } else {
2215 1.1 rpaulo if (ifp->if_flags & IFF_RUNNING)
2216 1.15 jmcneill rt2560_stop(ifp, 1);
2217 1.1 rpaulo }
2218 1.1 rpaulo break;
2219 1.1 rpaulo
2220 1.1 rpaulo case SIOCADDMULTI:
2221 1.1 rpaulo case SIOCDELMULTI:
2222 1.11 dyoung /* XXX no h/w multicast filter? --dyoung */
2223 1.11 dyoung if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET)
2224 1.1 rpaulo error = 0;
2225 1.1 rpaulo break;
2226 1.1 rpaulo
2227 1.1 rpaulo case SIOCS80211CHANNEL:
2228 1.1 rpaulo /*
2229 1.1 rpaulo * This allows for fast channel switching in monitor mode
2230 1.1 rpaulo * (used by kismet). In IBSS mode, we must explicitly reset
2231 1.1 rpaulo * the interface to generate a new beacon frame.
2232 1.1 rpaulo */
2233 1.1 rpaulo error = ieee80211_ioctl(ic, cmd, data);
2234 1.1 rpaulo if (error == ENETRESET &&
2235 1.1 rpaulo ic->ic_opmode == IEEE80211_M_MONITOR) {
2236 1.1 rpaulo rt2560_set_chan(sc, ic->ic_ibss_chan);
2237 1.1 rpaulo error = 0;
2238 1.1 rpaulo }
2239 1.1 rpaulo break;
2240 1.1 rpaulo
2241 1.1 rpaulo default:
2242 1.1 rpaulo error = ieee80211_ioctl(ic, cmd, data);
2243 1.1 rpaulo }
2244 1.1 rpaulo
2245 1.1 rpaulo if (error == ENETRESET) {
2246 1.1 rpaulo if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2247 1.1 rpaulo (IFF_UP | IFF_RUNNING))
2248 1.1 rpaulo rt2560_init(ifp);
2249 1.1 rpaulo error = 0;
2250 1.1 rpaulo }
2251 1.1 rpaulo
2252 1.1 rpaulo splx(s);
2253 1.1 rpaulo
2254 1.1 rpaulo return error;
2255 1.1 rpaulo }
2256 1.1 rpaulo
2257 1.1 rpaulo static void
2258 1.1 rpaulo rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2259 1.1 rpaulo {
2260 1.1 rpaulo uint32_t tmp;
2261 1.1 rpaulo int ntries;
2262 1.1 rpaulo
2263 1.1 rpaulo for (ntries = 0; ntries < 100; ntries++) {
2264 1.1 rpaulo if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2265 1.1 rpaulo break;
2266 1.1 rpaulo DELAY(1);
2267 1.1 rpaulo }
2268 1.1 rpaulo if (ntries == 100) {
2269 1.25 drochner aprint_error_dev(sc->sc_dev, "could not write to BBP\n");
2270 1.1 rpaulo return;
2271 1.1 rpaulo }
2272 1.1 rpaulo
2273 1.1 rpaulo tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2274 1.1 rpaulo RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2275 1.1 rpaulo
2276 1.1 rpaulo DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2277 1.1 rpaulo }
2278 1.1 rpaulo
2279 1.1 rpaulo static uint8_t
2280 1.1 rpaulo rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2281 1.1 rpaulo {
2282 1.1 rpaulo uint32_t val;
2283 1.1 rpaulo int ntries;
2284 1.1 rpaulo
2285 1.1 rpaulo val = RT2560_BBP_BUSY | reg << 8;
2286 1.1 rpaulo RAL_WRITE(sc, RT2560_BBPCSR, val);
2287 1.1 rpaulo
2288 1.1 rpaulo for (ntries = 0; ntries < 100; ntries++) {
2289 1.1 rpaulo val = RAL_READ(sc, RT2560_BBPCSR);
2290 1.1 rpaulo if (!(val & RT2560_BBP_BUSY))
2291 1.1 rpaulo return val & 0xff;
2292 1.1 rpaulo DELAY(1);
2293 1.1 rpaulo }
2294 1.1 rpaulo
2295 1.25 drochner aprint_error_dev(sc->sc_dev, "could not read from BBP\n");
2296 1.1 rpaulo return 0;
2297 1.1 rpaulo }
2298 1.1 rpaulo
2299 1.1 rpaulo static void
2300 1.1 rpaulo rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2301 1.1 rpaulo {
2302 1.1 rpaulo uint32_t tmp;
2303 1.1 rpaulo int ntries;
2304 1.1 rpaulo
2305 1.1 rpaulo for (ntries = 0; ntries < 100; ntries++) {
2306 1.1 rpaulo if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2307 1.1 rpaulo break;
2308 1.1 rpaulo DELAY(1);
2309 1.1 rpaulo }
2310 1.1 rpaulo if (ntries == 100) {
2311 1.25 drochner aprint_error_dev(sc->sc_dev, "could not write to RF\n");
2312 1.1 rpaulo return;
2313 1.1 rpaulo }
2314 1.1 rpaulo
2315 1.1 rpaulo tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2316 1.1 rpaulo (reg & 0x3);
2317 1.1 rpaulo RAL_WRITE(sc, RT2560_RFCSR, tmp);
2318 1.1 rpaulo
2319 1.1 rpaulo /* remember last written value in sc */
2320 1.1 rpaulo sc->rf_regs[reg] = val;
2321 1.1 rpaulo
2322 1.1 rpaulo DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2323 1.1 rpaulo }
2324 1.1 rpaulo
2325 1.1 rpaulo static void
2326 1.1 rpaulo rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2327 1.1 rpaulo {
2328 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2329 1.1 rpaulo uint8_t power, tmp;
2330 1.1 rpaulo u_int i, chan;
2331 1.1 rpaulo
2332 1.1 rpaulo chan = ieee80211_chan2ieee(ic, c);
2333 1.1 rpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2334 1.1 rpaulo return;
2335 1.1 rpaulo
2336 1.1 rpaulo if (IEEE80211_IS_CHAN_2GHZ(c))
2337 1.35 riastrad power = uimin(sc->txpow[chan - 1], 31);
2338 1.1 rpaulo else
2339 1.1 rpaulo power = 31;
2340 1.1 rpaulo
2341 1.1 rpaulo DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2342 1.1 rpaulo
2343 1.1 rpaulo switch (sc->rf_rev) {
2344 1.1 rpaulo case RT2560_RF_2522:
2345 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, 0x00814);
2346 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]);
2347 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2348 1.1 rpaulo break;
2349 1.1 rpaulo
2350 1.1 rpaulo case RT2560_RF_2523:
2351 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2352 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]);
2353 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044);
2354 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4,
2355 1.1 rpaulo (chan == 14) ? 0x00280 : 0x00286);
2356 1.1 rpaulo break;
2357 1.1 rpaulo
2358 1.1 rpaulo case RT2560_RF_2524:
2359 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, 0x0c808);
2360 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]);
2361 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2362 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4,
2363 1.1 rpaulo (chan == 14) ? 0x00280 : 0x00286);
2364 1.1 rpaulo break;
2365 1.1 rpaulo
2366 1.1 rpaulo case RT2560_RF_2525:
2367 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2368 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2369 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2370 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4,
2371 1.1 rpaulo (chan == 14) ? 0x00280 : 0x00286);
2372 1.1 rpaulo
2373 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2374 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]);
2375 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2376 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4,
2377 1.1 rpaulo (chan == 14) ? 0x00280 : 0x00286);
2378 1.1 rpaulo break;
2379 1.1 rpaulo
2380 1.1 rpaulo case RT2560_RF_2525E:
2381 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2382 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]);
2383 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2384 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4,
2385 1.1 rpaulo (chan == 14) ? 0x00286 : 0x00282);
2386 1.1 rpaulo break;
2387 1.1 rpaulo
2388 1.1 rpaulo case RT2560_RF_2526:
2389 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2390 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4,
2391 1.1 rpaulo (chan & 1) ? 0x00386 : 0x00381);
2392 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2393 1.1 rpaulo
2394 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]);
2395 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2396 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4,
2397 1.1 rpaulo (chan & 1) ? 0x00386 : 0x00381);
2398 1.1 rpaulo break;
2399 1.1 rpaulo
2400 1.1 rpaulo /* dual-band RF */
2401 1.1 rpaulo case RT2560_RF_5222:
2402 1.1 rpaulo for (i = 0; rt2560_rf5222[i].chan != chan; i++);
2403 1.1 rpaulo
2404 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1);
2405 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2);
2406 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2407 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4);
2408 1.1 rpaulo break;
2409 1.1 rpaulo }
2410 1.1 rpaulo
2411 1.1 rpaulo if (ic->ic_opmode != IEEE80211_M_MONITOR &&
2412 1.1 rpaulo ic->ic_state != IEEE80211_S_SCAN) {
2413 1.1 rpaulo /* set Japan filter bit for channel 14 */
2414 1.1 rpaulo tmp = rt2560_bbp_read(sc, 70);
2415 1.1 rpaulo
2416 1.1 rpaulo tmp &= ~RT2560_JAPAN_FILTER;
2417 1.1 rpaulo if (chan == 14)
2418 1.1 rpaulo tmp |= RT2560_JAPAN_FILTER;
2419 1.1 rpaulo
2420 1.1 rpaulo rt2560_bbp_write(sc, 70, tmp);
2421 1.1 rpaulo
2422 1.1 rpaulo DELAY(1000); /* RF needs a 1ms delay here */
2423 1.1 rpaulo rt2560_disable_rf_tune(sc);
2424 1.1 rpaulo
2425 1.1 rpaulo /* clear CRC errors */
2426 1.1 rpaulo RAL_READ(sc, RT2560_CNT0);
2427 1.1 rpaulo }
2428 1.1 rpaulo }
2429 1.1 rpaulo
2430 1.1 rpaulo /*
2431 1.1 rpaulo * Disable RF auto-tuning.
2432 1.1 rpaulo */
2433 1.1 rpaulo static void
2434 1.1 rpaulo rt2560_disable_rf_tune(struct rt2560_softc *sc)
2435 1.1 rpaulo {
2436 1.1 rpaulo uint32_t tmp;
2437 1.1 rpaulo
2438 1.1 rpaulo if (sc->rf_rev != RT2560_RF_2523) {
2439 1.1 rpaulo tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE;
2440 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF1, tmp);
2441 1.1 rpaulo }
2442 1.1 rpaulo
2443 1.1 rpaulo tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE;
2444 1.1 rpaulo rt2560_rf_write(sc, RT2560_RF3, tmp);
2445 1.1 rpaulo
2446 1.1 rpaulo DPRINTFN(2, ("disabling RF autotune\n"));
2447 1.1 rpaulo }
2448 1.1 rpaulo
2449 1.1 rpaulo /*
2450 1.1 rpaulo * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2451 1.1 rpaulo * synchronization.
2452 1.1 rpaulo */
2453 1.1 rpaulo static void
2454 1.1 rpaulo rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2455 1.1 rpaulo {
2456 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2457 1.1 rpaulo uint16_t logcwmin, preload;
2458 1.1 rpaulo uint32_t tmp;
2459 1.1 rpaulo
2460 1.1 rpaulo /* first, disable TSF synchronization */
2461 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR14, 0);
2462 1.1 rpaulo
2463 1.1 rpaulo tmp = 16 * ic->ic_bss->ni_intval;
2464 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR12, tmp);
2465 1.1 rpaulo
2466 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR13, 0);
2467 1.1 rpaulo
2468 1.1 rpaulo logcwmin = 5;
2469 1.1 rpaulo preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2470 1.1 rpaulo tmp = logcwmin << 16 | preload;
2471 1.1 rpaulo RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2472 1.1 rpaulo
2473 1.1 rpaulo /* finally, enable TSF synchronization */
2474 1.1 rpaulo tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2475 1.1 rpaulo if (ic->ic_opmode == IEEE80211_M_STA)
2476 1.1 rpaulo tmp |= RT2560_ENABLE_TSF_SYNC(1);
2477 1.1 rpaulo else
2478 1.1 rpaulo tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2479 1.1 rpaulo RT2560_ENABLE_BEACON_GENERATOR;
2480 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR14, tmp);
2481 1.1 rpaulo
2482 1.1 rpaulo DPRINTF(("enabling TSF synchronization\n"));
2483 1.1 rpaulo }
2484 1.1 rpaulo
2485 1.1 rpaulo static void
2486 1.1 rpaulo rt2560_update_plcp(struct rt2560_softc *sc)
2487 1.1 rpaulo {
2488 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2489 1.1 rpaulo
2490 1.1 rpaulo /* no short preamble for 1Mbps */
2491 1.1 rpaulo RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2492 1.1 rpaulo
2493 1.1 rpaulo if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2494 1.1 rpaulo /* values taken from the reference driver */
2495 1.1 rpaulo RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401);
2496 1.1 rpaulo RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2497 1.1 rpaulo RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403);
2498 1.1 rpaulo } else {
2499 1.1 rpaulo /* same values as above or'ed 0x8 */
2500 1.1 rpaulo RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409);
2501 1.1 rpaulo RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2502 1.1 rpaulo RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b);
2503 1.1 rpaulo }
2504 1.1 rpaulo
2505 1.1 rpaulo DPRINTF(("updating PLCP for %s preamble\n",
2506 1.1 rpaulo (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2507 1.1 rpaulo }
2508 1.1 rpaulo
2509 1.1 rpaulo /*
2510 1.1 rpaulo * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to
2511 1.1 rpaulo * know how these values are computed.
2512 1.1 rpaulo */
2513 1.1 rpaulo static void
2514 1.1 rpaulo rt2560_update_slot(struct ifnet *ifp)
2515 1.1 rpaulo {
2516 1.1 rpaulo struct rt2560_softc *sc = ifp->if_softc;
2517 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2518 1.1 rpaulo uint8_t slottime;
2519 1.1 rpaulo uint16_t sifs, pifs, difs, eifs;
2520 1.1 rpaulo uint32_t tmp;
2521 1.1 rpaulo
2522 1.1 rpaulo slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2523 1.1 rpaulo
2524 1.1 rpaulo /* define the MAC slot boundaries */
2525 1.1 rpaulo sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND;
2526 1.1 rpaulo pifs = sifs + slottime;
2527 1.1 rpaulo difs = sifs + 2 * slottime;
2528 1.1 rpaulo eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2529 1.1 rpaulo
2530 1.1 rpaulo tmp = RAL_READ(sc, RT2560_CSR11);
2531 1.1 rpaulo tmp = (tmp & ~0x1f00) | slottime << 8;
2532 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR11, tmp);
2533 1.1 rpaulo
2534 1.1 rpaulo tmp = pifs << 16 | sifs;
2535 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR18, tmp);
2536 1.1 rpaulo
2537 1.1 rpaulo tmp = eifs << 16 | difs;
2538 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR19, tmp);
2539 1.1 rpaulo
2540 1.1 rpaulo DPRINTF(("setting slottime to %uus\n", slottime));
2541 1.1 rpaulo }
2542 1.1 rpaulo
2543 1.1 rpaulo static void
2544 1.1 rpaulo rt2560_set_basicrates(struct rt2560_softc *sc)
2545 1.1 rpaulo {
2546 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2547 1.1 rpaulo
2548 1.1 rpaulo /* update basic rate set */
2549 1.1 rpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) {
2550 1.1 rpaulo /* 11b basic rates: 1, 2Mbps */
2551 1.1 rpaulo RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
2552 1.1 rpaulo } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
2553 1.1 rpaulo /* 11a basic rates: 6, 12, 24Mbps */
2554 1.1 rpaulo RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150);
2555 1.1 rpaulo } else {
2556 1.1 rpaulo /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
2557 1.1 rpaulo RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f);
2558 1.1 rpaulo }
2559 1.1 rpaulo }
2560 1.1 rpaulo
2561 1.1 rpaulo static void
2562 1.1 rpaulo rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2563 1.1 rpaulo {
2564 1.1 rpaulo uint32_t tmp;
2565 1.1 rpaulo
2566 1.1 rpaulo /* set ON period to 70ms and OFF period to 30ms */
2567 1.1 rpaulo tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2568 1.1 rpaulo RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2569 1.1 rpaulo }
2570 1.1 rpaulo
2571 1.1 rpaulo static void
2572 1.1 rpaulo rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
2573 1.1 rpaulo {
2574 1.1 rpaulo uint32_t tmp;
2575 1.1 rpaulo
2576 1.1 rpaulo tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2577 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR5, tmp);
2578 1.1 rpaulo
2579 1.1 rpaulo tmp = bssid[4] | bssid[5] << 8;
2580 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR6, tmp);
2581 1.1 rpaulo
2582 1.1 rpaulo DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
2583 1.1 rpaulo }
2584 1.1 rpaulo
2585 1.1 rpaulo static void
2586 1.1 rpaulo rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2587 1.1 rpaulo {
2588 1.1 rpaulo uint32_t tmp;
2589 1.1 rpaulo
2590 1.1 rpaulo tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2591 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR3, tmp);
2592 1.1 rpaulo
2593 1.1 rpaulo tmp = addr[4] | addr[5] << 8;
2594 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR4, tmp);
2595 1.1 rpaulo
2596 1.1 rpaulo DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
2597 1.1 rpaulo }
2598 1.1 rpaulo
2599 1.1 rpaulo static void
2600 1.1 rpaulo rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2601 1.1 rpaulo {
2602 1.1 rpaulo uint32_t tmp;
2603 1.1 rpaulo
2604 1.1 rpaulo tmp = RAL_READ(sc, RT2560_CSR3);
2605 1.1 rpaulo addr[0] = tmp & 0xff;
2606 1.1 rpaulo addr[1] = (tmp >> 8) & 0xff;
2607 1.1 rpaulo addr[2] = (tmp >> 16) & 0xff;
2608 1.1 rpaulo addr[3] = (tmp >> 24);
2609 1.1 rpaulo
2610 1.1 rpaulo tmp = RAL_READ(sc, RT2560_CSR4);
2611 1.1 rpaulo addr[4] = tmp & 0xff;
2612 1.1 rpaulo addr[5] = (tmp >> 8) & 0xff;
2613 1.1 rpaulo }
2614 1.1 rpaulo
2615 1.1 rpaulo static void
2616 1.1 rpaulo rt2560_update_promisc(struct rt2560_softc *sc)
2617 1.1 rpaulo {
2618 1.1 rpaulo struct ifnet *ifp = &sc->sc_if;
2619 1.1 rpaulo uint32_t tmp;
2620 1.1 rpaulo
2621 1.1 rpaulo tmp = RAL_READ(sc, RT2560_RXCSR0);
2622 1.1 rpaulo
2623 1.1 rpaulo tmp &= ~RT2560_DROP_NOT_TO_ME;
2624 1.1 rpaulo if (!(ifp->if_flags & IFF_PROMISC))
2625 1.1 rpaulo tmp |= RT2560_DROP_NOT_TO_ME;
2626 1.1 rpaulo
2627 1.1 rpaulo RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2628 1.1 rpaulo
2629 1.1 rpaulo DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2630 1.1 rpaulo "entering" : "leaving"));
2631 1.1 rpaulo }
2632 1.1 rpaulo
2633 1.1 rpaulo static void
2634 1.1 rpaulo rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2635 1.1 rpaulo {
2636 1.1 rpaulo uint32_t tmp;
2637 1.1 rpaulo uint8_t tx;
2638 1.1 rpaulo
2639 1.1 rpaulo tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2640 1.1 rpaulo if (antenna == 1)
2641 1.1 rpaulo tx |= RT2560_BBP_ANTA;
2642 1.1 rpaulo else if (antenna == 2)
2643 1.1 rpaulo tx |= RT2560_BBP_ANTB;
2644 1.1 rpaulo else
2645 1.1 rpaulo tx |= RT2560_BBP_DIVERSITY;
2646 1.1 rpaulo
2647 1.1 rpaulo /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2648 1.1 rpaulo if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
2649 1.1 rpaulo sc->rf_rev == RT2560_RF_5222)
2650 1.1 rpaulo tx |= RT2560_BBP_FLIPIQ;
2651 1.1 rpaulo
2652 1.1 rpaulo rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2653 1.1 rpaulo
2654 1.1 rpaulo /* update values for CCK and OFDM in BBPCSR1 */
2655 1.1 rpaulo tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2656 1.1 rpaulo tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2657 1.1 rpaulo RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2658 1.1 rpaulo }
2659 1.1 rpaulo
2660 1.1 rpaulo static void
2661 1.1 rpaulo rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2662 1.1 rpaulo {
2663 1.1 rpaulo uint8_t rx;
2664 1.1 rpaulo
2665 1.1 rpaulo rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2666 1.1 rpaulo if (antenna == 1)
2667 1.1 rpaulo rx |= RT2560_BBP_ANTA;
2668 1.1 rpaulo else if (antenna == 2)
2669 1.1 rpaulo rx |= RT2560_BBP_ANTB;
2670 1.1 rpaulo else
2671 1.1 rpaulo rx |= RT2560_BBP_DIVERSITY;
2672 1.1 rpaulo
2673 1.1 rpaulo /* need to force no I/Q flip for RF 2525e and 2526 */
2674 1.1 rpaulo if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
2675 1.1 rpaulo rx &= ~RT2560_BBP_FLIPIQ;
2676 1.1 rpaulo
2677 1.1 rpaulo rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2678 1.1 rpaulo }
2679 1.1 rpaulo
2680 1.1 rpaulo static const char *
2681 1.1 rpaulo rt2560_get_rf(int rev)
2682 1.1 rpaulo {
2683 1.1 rpaulo switch (rev) {
2684 1.1 rpaulo case RT2560_RF_2522: return "RT2522";
2685 1.1 rpaulo case RT2560_RF_2523: return "RT2523";
2686 1.1 rpaulo case RT2560_RF_2524: return "RT2524";
2687 1.1 rpaulo case RT2560_RF_2525: return "RT2525";
2688 1.1 rpaulo case RT2560_RF_2525E: return "RT2525e";
2689 1.1 rpaulo case RT2560_RF_2526: return "RT2526";
2690 1.1 rpaulo case RT2560_RF_5222: return "RT5222";
2691 1.1 rpaulo default: return "unknown";
2692 1.1 rpaulo }
2693 1.1 rpaulo }
2694 1.1 rpaulo
2695 1.1 rpaulo static void
2696 1.1 rpaulo rt2560_read_eeprom(struct rt2560_softc *sc)
2697 1.1 rpaulo {
2698 1.1 rpaulo uint16_t val;
2699 1.1 rpaulo int i;
2700 1.1 rpaulo
2701 1.1 rpaulo val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2702 1.1 rpaulo sc->rf_rev = (val >> 11) & 0x1f;
2703 1.1 rpaulo sc->hw_radio = (val >> 10) & 0x1;
2704 1.1 rpaulo sc->led_mode = (val >> 6) & 0x7;
2705 1.1 rpaulo sc->rx_ant = (val >> 4) & 0x3;
2706 1.1 rpaulo sc->tx_ant = (val >> 2) & 0x3;
2707 1.1 rpaulo sc->nb_ant = val & 0x3;
2708 1.1 rpaulo
2709 1.1 rpaulo /* read default values for BBP registers */
2710 1.1 rpaulo for (i = 0; i < 16; i++) {
2711 1.1 rpaulo val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2712 1.1 rpaulo sc->bbp_prom[i].reg = val >> 8;
2713 1.1 rpaulo sc->bbp_prom[i].val = val & 0xff;
2714 1.1 rpaulo }
2715 1.1 rpaulo
2716 1.1 rpaulo /* read Tx power for all b/g channels */
2717 1.1 rpaulo for (i = 0; i < 14 / 2; i++) {
2718 1.1 rpaulo val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2719 1.1 rpaulo sc->txpow[i * 2] = val >> 8;
2720 1.1 rpaulo sc->txpow[i * 2 + 1] = val & 0xff;
2721 1.1 rpaulo }
2722 1.1 rpaulo }
2723 1.1 rpaulo
2724 1.1 rpaulo static int
2725 1.1 rpaulo rt2560_bbp_init(struct rt2560_softc *sc)
2726 1.1 rpaulo {
2727 1.1 rpaulo #define N(a) (sizeof (a) / sizeof ((a)[0]))
2728 1.1 rpaulo int i, ntries;
2729 1.1 rpaulo
2730 1.1 rpaulo /* wait for BBP to be ready */
2731 1.1 rpaulo for (ntries = 0; ntries < 100; ntries++) {
2732 1.1 rpaulo if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2733 1.1 rpaulo break;
2734 1.1 rpaulo DELAY(1);
2735 1.1 rpaulo }
2736 1.1 rpaulo if (ntries == 100) {
2737 1.25 drochner aprint_error_dev(sc->sc_dev, "timeout waiting for BBP\n");
2738 1.1 rpaulo return EIO;
2739 1.1 rpaulo }
2740 1.1 rpaulo
2741 1.1 rpaulo /* initialize BBP registers to default values */
2742 1.1 rpaulo for (i = 0; i < N(rt2560_def_bbp); i++) {
2743 1.1 rpaulo rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2744 1.1 rpaulo rt2560_def_bbp[i].val);
2745 1.1 rpaulo }
2746 1.1 rpaulo #if 0
2747 1.1 rpaulo /* initialize BBP registers to values stored in EEPROM */
2748 1.1 rpaulo for (i = 0; i < 16; i++) {
2749 1.1 rpaulo if (sc->bbp_prom[i].reg == 0xff)
2750 1.1 rpaulo continue;
2751 1.1 rpaulo rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2752 1.1 rpaulo }
2753 1.1 rpaulo #endif
2754 1.1 rpaulo
2755 1.1 rpaulo return 0;
2756 1.1 rpaulo #undef N
2757 1.1 rpaulo }
2758 1.1 rpaulo
2759 1.1 rpaulo static int
2760 1.1 rpaulo rt2560_init(struct ifnet *ifp)
2761 1.1 rpaulo {
2762 1.1 rpaulo #define N(a) (sizeof (a) / sizeof ((a)[0]))
2763 1.1 rpaulo struct rt2560_softc *sc = ifp->if_softc;
2764 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2765 1.1 rpaulo uint32_t tmp;
2766 1.1 rpaulo int i;
2767 1.1 rpaulo
2768 1.1 rpaulo /* for CardBus, power on the socket */
2769 1.1 rpaulo if (!(sc->sc_flags & RT2560_ENABLED)) {
2770 1.1 rpaulo if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
2771 1.25 drochner aprint_error_dev(sc->sc_dev, "could not enable device\n");
2772 1.1 rpaulo return EIO;
2773 1.1 rpaulo }
2774 1.1 rpaulo sc->sc_flags |= RT2560_ENABLED;
2775 1.1 rpaulo }
2776 1.1 rpaulo
2777 1.15 jmcneill rt2560_stop(ifp, 1);
2778 1.1 rpaulo
2779 1.1 rpaulo /* setup tx rings */
2780 1.1 rpaulo tmp = RT2560_PRIO_RING_COUNT << 24 |
2781 1.1 rpaulo RT2560_ATIM_RING_COUNT << 16 |
2782 1.1 rpaulo RT2560_TX_RING_COUNT << 8 |
2783 1.1 rpaulo RT2560_TX_DESC_SIZE;
2784 1.1 rpaulo
2785 1.1 rpaulo /* rings _must_ be initialized in this _exact_ order! */
2786 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2787 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2788 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2789 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2790 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2791 1.1 rpaulo
2792 1.1 rpaulo /* setup rx ring */
2793 1.1 rpaulo tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2794 1.1 rpaulo
2795 1.1 rpaulo RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2796 1.1 rpaulo RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2797 1.1 rpaulo
2798 1.1 rpaulo /* initialize MAC registers to default values */
2799 1.1 rpaulo for (i = 0; i < N(rt2560_def_mac); i++)
2800 1.1 rpaulo RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2801 1.1 rpaulo
2802 1.10 dyoung IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
2803 1.1 rpaulo rt2560_set_macaddr(sc, ic->ic_myaddr);
2804 1.1 rpaulo
2805 1.1 rpaulo /* set basic rate set (will be updated later) */
2806 1.1 rpaulo RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2807 1.1 rpaulo
2808 1.1 rpaulo rt2560_update_slot(ifp);
2809 1.1 rpaulo rt2560_update_plcp(sc);
2810 1.1 rpaulo rt2560_update_led(sc, 0, 0);
2811 1.1 rpaulo
2812 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2813 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2814 1.1 rpaulo
2815 1.1 rpaulo if (rt2560_bbp_init(sc) != 0) {
2816 1.15 jmcneill rt2560_stop(ifp, 1);
2817 1.1 rpaulo return EIO;
2818 1.1 rpaulo }
2819 1.1 rpaulo
2820 1.17 degroote rt2560_set_txantenna(sc, 1);
2821 1.17 degroote rt2560_set_rxantenna(sc, 1);
2822 1.17 degroote
2823 1.1 rpaulo /* set default BSS channel */
2824 1.1 rpaulo ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2825 1.1 rpaulo rt2560_set_chan(sc, ic->ic_bss->ni_chan);
2826 1.1 rpaulo
2827 1.1 rpaulo /* kick Rx */
2828 1.1 rpaulo tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2829 1.1 rpaulo if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2830 1.1 rpaulo tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2831 1.1 rpaulo if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2832 1.1 rpaulo tmp |= RT2560_DROP_TODS;
2833 1.1 rpaulo if (!(ifp->if_flags & IFF_PROMISC))
2834 1.1 rpaulo tmp |= RT2560_DROP_NOT_TO_ME;
2835 1.1 rpaulo }
2836 1.1 rpaulo RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2837 1.1 rpaulo
2838 1.1 rpaulo /* clear old FCS and Rx FIFO errors */
2839 1.1 rpaulo RAL_READ(sc, RT2560_CNT0);
2840 1.1 rpaulo RAL_READ(sc, RT2560_CNT4);
2841 1.1 rpaulo
2842 1.1 rpaulo /* clear any pending interrupts */
2843 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2844 1.1 rpaulo
2845 1.1 rpaulo /* enable interrupts */
2846 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2847 1.1 rpaulo
2848 1.1 rpaulo ifp->if_flags &= ~IFF_OACTIVE;
2849 1.1 rpaulo ifp->if_flags |= IFF_RUNNING;
2850 1.1 rpaulo
2851 1.1 rpaulo if (ic->ic_opmode == IEEE80211_M_MONITOR)
2852 1.1 rpaulo ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2853 1.1 rpaulo else
2854 1.1 rpaulo ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2855 1.1 rpaulo
2856 1.1 rpaulo return 0;
2857 1.1 rpaulo #undef N
2858 1.1 rpaulo }
2859 1.1 rpaulo
2860 1.1 rpaulo static void
2861 1.15 jmcneill rt2560_stop(struct ifnet *ifp, int disable)
2862 1.1 rpaulo {
2863 1.15 jmcneill struct rt2560_softc *sc = ifp->if_softc;
2864 1.1 rpaulo struct ieee80211com *ic = &sc->sc_ic;
2865 1.1 rpaulo
2866 1.1 rpaulo sc->sc_tx_timer = 0;
2867 1.1 rpaulo ifp->if_timer = 0;
2868 1.1 rpaulo ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2869 1.1 rpaulo
2870 1.1 rpaulo ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */
2871 1.1 rpaulo
2872 1.1 rpaulo /* abort Tx */
2873 1.1 rpaulo RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2874 1.1 rpaulo
2875 1.1 rpaulo /* disable Rx */
2876 1.1 rpaulo RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2877 1.1 rpaulo
2878 1.1 rpaulo /* reset ASIC (and thus, BBP) */
2879 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2880 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR1, 0);
2881 1.1 rpaulo
2882 1.1 rpaulo /* disable interrupts */
2883 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2884 1.1 rpaulo
2885 1.1 rpaulo /* clear any pending interrupt */
2886 1.1 rpaulo RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2887 1.1 rpaulo
2888 1.1 rpaulo /* reset Tx and Rx rings */
2889 1.1 rpaulo rt2560_reset_tx_ring(sc, &sc->txq);
2890 1.1 rpaulo rt2560_reset_tx_ring(sc, &sc->atimq);
2891 1.1 rpaulo rt2560_reset_tx_ring(sc, &sc->prioq);
2892 1.1 rpaulo rt2560_reset_tx_ring(sc, &sc->bcnq);
2893 1.1 rpaulo rt2560_reset_rx_ring(sc, &sc->rxq);
2894 1.1 rpaulo }
2895